Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 17033:2d6dd2eebd51
Fixed HSAIL deopt
| author | Tom Rodriguez <tom.rodriguez@oracle.com> |
|---|---|
| date | Tue, 02 Sep 2014 21:42:37 -0700 |
| parents | ed29f7ff71eb |
| children | 89152779163c |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 14909 | 2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 28 #include "code/debugInfoRec.hpp" |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
| 1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
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43 #ifdef GRAAL |
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44 #include "graal/graalJavaAccess.hpp" |
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45 #endif |
| 0 | 46 |
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47 #define __ masm-> |
| 0 | 48 |
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49 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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50 |
| 0 | 51 class SimpleRuntimeFrame { |
| 52 | |
| 53 public: | |
| 54 | |
| 55 // Most of the runtime stubs have this simple frame layout. | |
| 56 // This class exists to make the layout shared in one place. | |
| 57 // Offsets are for compiler stack slots, which are jints. | |
| 58 enum layout { | |
| 59 // The frame sender code expects that rbp will be in the "natural" place and | |
| 60 // will override any oopMap setting for it. We must therefore force the layout | |
| 61 // so that it agrees with the frame sender code. | |
| 62 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
| 63 rbp_off2, | |
| 64 return_off, return_off2, | |
| 65 framesize | |
| 66 }; | |
| 67 }; | |
| 68 | |
| 69 class RegisterSaver { | |
| 70 // Capture info about frame layout. Layout offsets are in jint | |
| 71 // units because compiler frame slots are jints. | |
| 72 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
| 73 enum layout { | |
| 74 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
| 75 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
| 76 DEF_XMM_OFFS(0), | |
| 77 DEF_XMM_OFFS(1), | |
| 78 DEF_XMM_OFFS(2), | |
| 79 DEF_XMM_OFFS(3), | |
| 80 DEF_XMM_OFFS(4), | |
| 81 DEF_XMM_OFFS(5), | |
| 82 DEF_XMM_OFFS(6), | |
| 83 DEF_XMM_OFFS(7), | |
| 84 DEF_XMM_OFFS(8), | |
| 85 DEF_XMM_OFFS(9), | |
| 86 DEF_XMM_OFFS(10), | |
| 87 DEF_XMM_OFFS(11), | |
| 88 DEF_XMM_OFFS(12), | |
| 89 DEF_XMM_OFFS(13), | |
| 90 DEF_XMM_OFFS(14), | |
| 91 DEF_XMM_OFFS(15), | |
| 92 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
| 93 fpu_stateH_end, | |
| 94 r15_off, r15H_off, | |
| 95 r14_off, r14H_off, | |
| 96 r13_off, r13H_off, | |
| 97 r12_off, r12H_off, | |
| 98 r11_off, r11H_off, | |
| 99 r10_off, r10H_off, | |
| 100 r9_off, r9H_off, | |
| 101 r8_off, r8H_off, | |
| 102 rdi_off, rdiH_off, | |
| 103 rsi_off, rsiH_off, | |
| 104 ignore_off, ignoreH_off, // extra copy of rbp | |
| 105 rsp_off, rspH_off, | |
| 106 rbx_off, rbxH_off, | |
| 107 rdx_off, rdxH_off, | |
| 108 rcx_off, rcxH_off, | |
| 109 rax_off, raxH_off, | |
| 110 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
| 111 align_off, alignH_off, | |
| 112 flags_off, flagsH_off, | |
| 113 // The frame sender code expects that rbp will be in the "natural" place and | |
| 114 // will override any oopMap setting for it. We must therefore force the layout | |
| 115 // so that it agrees with the frame sender code. | |
| 116 rbp_off, rbpH_off, // copy of rbp we will restore | |
| 117 return_off, returnH_off, // slot for return address | |
| 118 reg_save_size // size in compiler stack slots | |
| 119 }; | |
| 120 | |
| 121 public: | |
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122 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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123 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
| 0 | 124 |
| 125 // Offsets into the register save area | |
| 126 // Used by deoptimization when it is managing result register | |
| 127 // values on its own | |
| 128 | |
| 129 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
| 304 | 130 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
| 0 | 131 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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132 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
| 0 | 133 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
| 134 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
| 135 | |
| 136 // During deoptimization only the result registers need to be restored, | |
| 137 // all the other values have already been extracted. | |
| 138 static void restore_result_registers(MacroAssembler* masm); | |
| 139 }; | |
| 140 | |
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141 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
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142 int vect_words = 0; |
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143 #ifdef COMPILER2 |
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144 if (save_vectors) { |
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145 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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146 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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147 // Save upper half of YMM registes |
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148 vect_words = 16 * 16 / wordSize; |
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149 additional_frame_words += vect_words; |
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150 } |
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151 #else |
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152 assert(!save_vectors, "vectors are generated only by C2"); |
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153 #endif |
| 0 | 154 |
| 155 // Always make the frame size 16-byte aligned | |
| 156 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
| 157 reg_save_size*BytesPerInt, 16); | |
| 158 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
| 159 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
| 160 // The caller will allocate additional_frame_words | |
| 161 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
| 162 // CodeBlob frame size is in words. | |
| 163 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
| 164 *total_frame_words = frame_size_in_words; | |
| 165 | |
| 166 // Save registers, fpu state, and flags. | |
| 167 // We assume caller has already pushed the return address onto the | |
| 168 // stack, so rsp is 8-byte aligned here. | |
| 169 // We push rpb twice in this sequence because we want the real rbp | |
| 170 // to be under the return like a normal enter. | |
| 171 | |
| 172 __ enter(); // rsp becomes 16-byte aligned here | |
| 173 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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174 |
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175 if (vect_words > 0) { |
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176 assert(vect_words*wordSize == 256, ""); |
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177 __ subptr(rsp, 256); // Save upper half of YMM registes |
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178 __ vextractf128h(Address(rsp, 0),xmm0); |
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179 __ vextractf128h(Address(rsp, 16),xmm1); |
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180 __ vextractf128h(Address(rsp, 32),xmm2); |
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181 __ vextractf128h(Address(rsp, 48),xmm3); |
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182 __ vextractf128h(Address(rsp, 64),xmm4); |
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183 __ vextractf128h(Address(rsp, 80),xmm5); |
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184 __ vextractf128h(Address(rsp, 96),xmm6); |
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185 __ vextractf128h(Address(rsp,112),xmm7); |
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186 __ vextractf128h(Address(rsp,128),xmm8); |
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187 __ vextractf128h(Address(rsp,144),xmm9); |
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188 __ vextractf128h(Address(rsp,160),xmm10); |
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189 __ vextractf128h(Address(rsp,176),xmm11); |
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190 __ vextractf128h(Address(rsp,192),xmm12); |
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191 __ vextractf128h(Address(rsp,208),xmm13); |
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192 __ vextractf128h(Address(rsp,224),xmm14); |
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193 __ vextractf128h(Address(rsp,240),xmm15); |
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194 } |
| 0 | 195 if (frame::arg_reg_save_area_bytes != 0) { |
| 196 // Allocate argument register save area | |
| 304 | 197 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 198 } |
| 199 | |
| 200 // Set an oopmap for the call site. This oopmap will map all | |
| 201 // oop-registers and debug-info registers as callee-saved. This | |
| 202 // will allow deoptimization at this safepoint to find all possible | |
| 203 // debug-info recordings, as well as let GC find all oops. | |
| 204 | |
| 205 OopMapSet *oop_maps = new OopMapSet(); | |
| 206 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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207 |
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208 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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209 |
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210 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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211 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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212 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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213 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
| 0 | 214 // rbp location is known implicitly by the frame sender code, needs no oopmap |
| 215 // and the location where rbp was saved by is ignored | |
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216 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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217 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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218 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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219 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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220 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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221 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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222 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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223 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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224 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
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225 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
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226 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
|
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227 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
|
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228 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
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229 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
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230 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
|
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231 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
|
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232 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
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233 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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234 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
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235 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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238 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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239 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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240 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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241 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
| 0 | 242 |
| 243 // %%% These should all be a waste but we'll keep things as they were for now | |
| 244 if (true) { | |
|
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245 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
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246 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
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247 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
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248 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
| 0 | 249 // rbp location is known implicitly by the frame sender code, needs no oopmap |
|
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250 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
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251 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
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252 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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253 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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254 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
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255 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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256 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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257 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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258 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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259 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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260 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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261 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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262 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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263 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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264 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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265 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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266 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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267 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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268 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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269 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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270 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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271 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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272 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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273 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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274 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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275 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
| 0 | 276 } |
| 277 | |
| 278 return map; | |
| 279 } | |
| 280 | |
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281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
| 0 | 282 if (frame::arg_reg_save_area_bytes != 0) { |
| 283 // Pop arg register save area | |
| 304 | 284 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 285 } |
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286 #ifdef COMPILER2 |
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287 if (restore_vectors) { |
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288 // Restore upper half of YMM registes. |
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289 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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290 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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291 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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292 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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293 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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294 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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295 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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296 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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297 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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298 __ vinsertf128h(xmm7, Address(rsp,112)); |
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299 __ vinsertf128h(xmm8, Address(rsp,128)); |
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300 __ vinsertf128h(xmm9, Address(rsp,144)); |
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301 __ vinsertf128h(xmm10, Address(rsp,160)); |
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302 __ vinsertf128h(xmm11, Address(rsp,176)); |
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303 __ vinsertf128h(xmm12, Address(rsp,192)); |
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304 __ vinsertf128h(xmm13, Address(rsp,208)); |
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305 __ vinsertf128h(xmm14, Address(rsp,224)); |
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306 __ vinsertf128h(xmm15, Address(rsp,240)); |
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307 __ addptr(rsp, 256); |
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308 } |
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309 #else |
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310 assert(!restore_vectors, "vectors are generated only by C2"); |
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311 #endif |
| 0 | 312 // Recover CPU state |
| 313 __ pop_CPU_state(); | |
| 314 // Get the rbp described implicitly by the calling convention (no oopMap) | |
| 304 | 315 __ pop(rbp); |
| 0 | 316 } |
| 317 | |
| 318 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 319 | |
| 320 // Just restore result register. Only used by deoptimization. By | |
| 321 // now any callee save register that needs to be restored to a c2 | |
| 322 // caller of the deoptee has been extracted into the vframeArray | |
| 323 // and will be stuffed into the c2i adapter we create for later | |
| 324 // restoration so only result registers need to be restored here. | |
| 325 | |
| 326 // Restore fp result register | |
| 327 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
| 328 // Restore integer result register | |
| 304 | 329 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
| 330 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
| 331 | |
| 0 | 332 // Pop all of the register save are off the stack except the return address |
| 304 | 333 __ addptr(rsp, return_offset_in_bytes()); |
| 0 | 334 } |
| 335 | |
|
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336 // Is vector's size (in bytes) bigger than a size saved by default? |
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337 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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338 bool SharedRuntime::is_wide_vector(int size) { |
|
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339 return size > 16; |
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340 } |
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341 |
| 0 | 342 // The java_calling_convention describes stack locations as ideal slots on |
| 343 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 344 // (like the placement of the register window) the slots must be biased by | |
| 345 // the following value. | |
| 346 static int reg2offset_in(VMReg r) { | |
| 347 // Account for saved rbp and return address | |
| 348 // This should really be in_preserve_stack_slots | |
| 349 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
| 350 } | |
| 351 | |
| 352 static int reg2offset_out(VMReg r) { | |
| 353 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 354 } | |
| 355 | |
| 356 // --------------------------------------------------------------------------- | |
| 357 // Read the array of BasicTypes from a signature, and compute where the | |
| 358 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 359 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
| 360 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 361 // as framesizes are fixed. | |
| 362 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 363 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 364 // up to RegisterImpl::number_of_registers) are the 64-bit | |
| 365 // integer registers. | |
| 366 | |
| 367 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 368 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 369 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 370 | |
| 371 // The Java calling convention is a "shifted" version of the C ABI. | |
| 372 // By skipping the first C ABI register we can call non-static jni methods | |
| 373 // with small numbers of arguments without having to shuffle the arguments | |
| 374 // at all. Since we control the java ABI we ought to at least get some | |
| 375 // advantage out of it. | |
| 376 | |
| 377 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 378 VMRegPair *regs, | |
| 379 int total_args_passed, | |
| 380 int is_outgoing) { | |
| 381 | |
| 382 // Create the mapping between argument positions and | |
| 383 // registers. | |
| 384 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
| 385 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
| 386 }; | |
| 387 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
| 388 j_farg0, j_farg1, j_farg2, j_farg3, | |
| 389 j_farg4, j_farg5, j_farg6, j_farg7 | |
| 390 }; | |
| 391 | |
| 392 | |
| 393 uint int_args = 0; | |
| 394 uint fp_args = 0; | |
| 395 uint stk_args = 0; // inc by 2 each time | |
| 396 | |
| 397 for (int i = 0; i < total_args_passed; i++) { | |
| 398 switch (sig_bt[i]) { | |
| 399 case T_BOOLEAN: | |
| 400 case T_CHAR: | |
| 401 case T_BYTE: | |
| 402 case T_SHORT: | |
| 403 case T_INT: | |
| 404 if (int_args < Argument::n_int_register_parameters_j) { | |
| 405 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 406 } else { | |
| 407 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 408 stk_args += 2; | |
| 409 } | |
| 410 break; | |
| 411 case T_VOID: | |
| 412 // halves of T_LONG or T_DOUBLE | |
| 413 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 414 regs[i].set_bad(); | |
| 415 break; | |
| 416 case T_LONG: | |
| 417 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 418 // fall through | |
| 419 case T_OBJECT: | |
| 420 case T_ARRAY: | |
| 421 case T_ADDRESS: | |
| 422 if (int_args < Argument::n_int_register_parameters_j) { | |
| 423 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 424 } else { | |
| 425 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 426 stk_args += 2; | |
| 427 } | |
| 428 break; | |
| 429 case T_FLOAT: | |
| 430 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 431 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 432 } else { | |
| 433 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 434 stk_args += 2; | |
| 435 } | |
| 436 break; | |
| 437 case T_DOUBLE: | |
| 438 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 439 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 440 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 441 } else { | |
| 442 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 443 stk_args += 2; | |
| 444 } | |
| 445 break; | |
| 446 default: | |
| 447 ShouldNotReachHere(); | |
| 448 break; | |
| 449 } | |
| 450 } | |
| 451 | |
| 452 return round_to(stk_args, 2); | |
| 453 } | |
| 454 | |
| 455 // Patch the callers callsite with entry to compiled code if it exists. | |
| 456 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 457 Label L; | |
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458 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 459 __ jcc(Assembler::equal, L); |
| 460 | |
| 461 // Save the current stack pointer | |
| 304 | 462 __ mov(r13, rsp); |
| 0 | 463 // Schedule the branch target address early. |
| 464 // Call into the VM to patch the caller, then jump to compiled callee | |
| 465 // rax isn't live so capture return address while we easily can | |
| 304 | 466 __ movptr(rax, Address(rsp, 0)); |
| 0 | 467 |
| 468 // align stack so push_CPU_state doesn't fault | |
| 304 | 469 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 470 __ push_CPU_state(); |
| 471 | |
| 472 // VM needs caller's callsite | |
| 473 // VM needs target method | |
| 474 // This needs to be a long call since we will relocate this adapter to | |
| 475 // the codeBuffer and it may not reach | |
| 476 | |
| 477 // Allocate argument register save area | |
| 478 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 479 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 480 } |
| 304 | 481 __ mov(c_rarg0, rbx); |
| 482 __ mov(c_rarg1, rax); | |
| 0 | 483 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 484 | |
| 485 // De-allocate argument register save area | |
| 486 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 487 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 488 } |
| 489 | |
| 490 __ pop_CPU_state(); | |
| 491 // restore sp | |
| 304 | 492 __ mov(rsp, r13); |
| 0 | 493 __ bind(L); |
| 494 } | |
| 495 | |
| 496 | |
| 497 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 498 int total_args_passed, | |
| 499 int comp_args_on_stack, | |
| 500 const BasicType *sig_bt, | |
| 501 const VMRegPair *regs, | |
| 502 Label& skip_fixup) { | |
| 503 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 504 // at all. We've come from compiled code and are attempting to jump to the | |
| 505 // interpreter, which means the caller made a static call to get here | |
| 506 // (vcalls always get a compiled target if there is one). Check for a | |
| 507 // compiled target. If there is one, we need to patch the caller's call. | |
| 508 patch_callers_callsite(masm); | |
| 509 | |
| 510 __ bind(skip_fixup); | |
| 511 | |
| 512 // Since all args are passed on the stack, total_args_passed * | |
| 513 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
| 514 // we also account for the return address location since | |
| 515 // we store it first rather than hold it in rax across all the shuffling | |
| 516 | |
| 1506 | 517 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
| 0 | 518 |
| 519 // stack is aligned, keep it that way | |
| 520 extraspace = round_to(extraspace, 2*wordSize); | |
| 521 | |
| 522 // Get return address | |
| 304 | 523 __ pop(rax); |
| 0 | 524 |
| 525 // set senderSP value | |
| 304 | 526 __ mov(r13, rsp); |
| 527 | |
| 528 __ subptr(rsp, extraspace); | |
| 0 | 529 |
| 530 // Store the return address in the expected location | |
| 304 | 531 __ movptr(Address(rsp, 0), rax); |
| 0 | 532 |
| 533 // Now write the args into the outgoing interpreter space | |
| 534 for (int i = 0; i < total_args_passed; i++) { | |
| 535 if (sig_bt[i] == T_VOID) { | |
| 536 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 537 continue; | |
| 538 } | |
| 539 | |
| 540 // offset to start parameters | |
| 1506 | 541 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 542 int next_off = st_off - Interpreter::stackElementSize; | |
| 0 | 543 |
| 544 // Say 4 args: | |
| 545 // i st_off | |
| 546 // 0 32 T_LONG | |
| 547 // 1 24 T_VOID | |
| 548 // 2 16 T_OBJECT | |
| 549 // 3 8 T_BOOL | |
| 550 // - 0 return address | |
| 551 // | |
| 552 // However to make thing extra confusing. Because we can fit a long/double in | |
| 553 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
| 554 // leaves one slot empty and only stores to a single slot. In this case the | |
| 555 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
| 556 | |
| 557 VMReg r_1 = regs[i].first(); | |
| 558 VMReg r_2 = regs[i].second(); | |
| 559 if (!r_1->is_valid()) { | |
| 560 assert(!r_2->is_valid(), ""); | |
| 561 continue; | |
| 562 } | |
| 563 if (r_1->is_stack()) { | |
| 564 // memory to memory use rax | |
| 565 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 566 if (!r_2->is_valid()) { | |
| 567 // sign extend?? | |
| 568 __ movl(rax, Address(rsp, ld_off)); | |
| 304 | 569 __ movptr(Address(rsp, st_off), rax); |
| 0 | 570 |
| 571 } else { | |
| 572 | |
| 573 __ movq(rax, Address(rsp, ld_off)); | |
| 574 | |
| 575 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 576 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 577 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 578 // ld_off == LSW, ld_off+wordSize == MSW | |
| 579 // st_off == MSW, next_off == LSW | |
| 580 __ movq(Address(rsp, next_off), rax); | |
| 581 #ifdef ASSERT | |
| 582 // Overwrite the unused slot with known junk | |
| 583 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 304 | 584 __ movptr(Address(rsp, st_off), rax); |
| 0 | 585 #endif /* ASSERT */ |
| 586 } else { | |
| 587 __ movq(Address(rsp, st_off), rax); | |
| 588 } | |
| 589 } | |
| 590 } else if (r_1->is_Register()) { | |
| 591 Register r = r_1->as_Register(); | |
| 592 if (!r_2->is_valid()) { | |
| 593 // must be only an int (or less ) so move only 32bits to slot | |
| 594 // why not sign extend?? | |
| 595 __ movl(Address(rsp, st_off), r); | |
| 596 } else { | |
| 597 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 598 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 599 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 600 // long/double in gpr | |
| 601 #ifdef ASSERT | |
| 602 // Overwrite the unused slot with known junk | |
| 603 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
| 304 | 604 __ movptr(Address(rsp, st_off), rax); |
| 0 | 605 #endif /* ASSERT */ |
| 606 __ movq(Address(rsp, next_off), r); | |
| 607 } else { | |
| 304 | 608 __ movptr(Address(rsp, st_off), r); |
| 0 | 609 } |
| 610 } | |
| 611 } else { | |
| 612 assert(r_1->is_XMMRegister(), ""); | |
| 613 if (!r_2->is_valid()) { | |
| 614 // only a float use just part of the slot | |
| 615 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 616 } else { | |
| 617 #ifdef ASSERT | |
| 618 // Overwrite the unused slot with known junk | |
| 619 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
| 304 | 620 __ movptr(Address(rsp, st_off), rax); |
| 0 | 621 #endif /* ASSERT */ |
| 622 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
| 623 } | |
| 624 } | |
| 625 } | |
| 626 | |
| 627 // Schedule the branch target address early. | |
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628 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
| 0 | 629 __ jmp(rcx); |
| 630 } | |
| 631 | |
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632 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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633 address code_start, address code_end, |
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634 Label& L_ok) { |
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635 Label L_fail; |
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636 __ lea(temp_reg, ExternalAddress(code_start)); |
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637 __ cmpptr(pc_reg, temp_reg); |
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638 __ jcc(Assembler::belowEqual, L_fail); |
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639 __ lea(temp_reg, ExternalAddress(code_end)); |
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640 __ cmpptr(pc_reg, temp_reg); |
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641 __ jcc(Assembler::below, L_ok); |
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642 __ bind(L_fail); |
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643 } |
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644 |
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645 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, |
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646 int total_args_passed, |
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647 int comp_args_on_stack, |
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648 const BasicType *sig_bt, |
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649 const VMRegPair *regs, |
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650 int frame_extension_argument) { |
| 0 | 651 |
| 652 // Note: r13 contains the senderSP on entry. We must preserve it since | |
| 653 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 654 // code goes non-entrant while we get args ready. | |
| 655 // In addition we use r13 to locate all the interpreter args as | |
| 656 // we must align the stack to 16 bytes on an i2c entry else we | |
| 657 // lose alignment we expect in all compiled code and register | |
| 658 // save code can segv when fxsave instructions find improperly | |
| 659 // aligned stack pointer. | |
| 660 | |
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661 // Adapters can be frameless because they do not require the caller |
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662 // to perform additional cleanup work, such as correcting the stack pointer. |
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663 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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664 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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665 // even if a callee has modified the stack pointer. |
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666 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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667 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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668 // up via the senderSP register). |
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669 // In other words, if *either* the caller or callee is interpreted, we can |
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670 // get the stack pointer repaired after a call. |
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671 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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672 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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673 // both caller and callee would be compiled methods, and neither would |
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674 // clean up the stack pointer changes performed by the two adapters. |
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675 // If this happens, control eventually transfers back to the compiled |
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676 // caller, but with an uncorrected stack, causing delayed havoc. |
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677 |
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678 // Pick up the return address |
| 304 | 679 __ movptr(rax, Address(rsp, 0)); |
| 0 | 680 |
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681 if (VerifyAdapterCalls && |
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682 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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683 // So, let's test for cascading c2i/i2c adapters right now. |
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684 // assert(Interpreter::contains($return_addr) || |
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685 // StubRoutines::contains($return_addr), |
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686 // "i2c adapter must return to an interpreter frame"); |
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687 __ block_comment("verify_i2c { "); |
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688 Label L_ok; |
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689 if (Interpreter::code() != NULL) |
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690 range_check(masm, rax, r11, |
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691 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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692 L_ok); |
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693 if (StubRoutines::code1() != NULL) |
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694 range_check(masm, rax, r11, |
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695 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
|
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696 L_ok); |
|
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697 if (StubRoutines::code2() != NULL) |
|
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698 range_check(masm, rax, r11, |
|
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699 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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700 L_ok); |
|
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|
701 const char* msg = "i2c adapter must return to an interpreter frame"; |
|
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|
702 __ block_comment(msg); |
|
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|
703 __ stop(msg); |
|
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|
704 __ bind(L_ok); |
|
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|
705 __ block_comment("} verify_i2ce "); |
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|
706 } |
|
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|
707 |
|
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|
708 #ifdef GRAAL |
|
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|
709 if (frame_extension_argument != -1) { |
|
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|
710 // The frame_extension_argument is an int that describes the |
|
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711 // expected amount of argument space in the caller frame. If that |
|
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712 // is greater than total_args_passed then enlarge the caller frame |
|
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713 // by that amount to ensure deopt works correctly. |
|
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|
714 assert(frame_extension_argument < total_args_passed, "out of range"); |
|
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|
715 assert(sig_bt[frame_extension_argument] == T_INT, "wrong signature"); |
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716 |
|
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|
717 Label done; |
|
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|
718 int i = frame_extension_argument; |
|
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719 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
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|
720 // Check if anything needs to be done. Too much space is ok. |
|
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|
721 __ movl(r13, Address(rsp, ld_off)); |
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|
722 __ cmpl(r13, total_args_passed); |
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723 __ jcc(Assembler::lessEqual, done); |
|
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|
724 // Save the old rsp for the copy code |
|
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725 __ movptr(r11, rsp); |
|
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|
726 // Enlarge the frame |
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|
727 __ subl(r13, total_args_passed); |
|
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|
728 __ shlq(r13, 3); |
|
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|
729 __ subptr(rsp, r13); |
|
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|
730 |
|
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|
731 // Now copy the arguments in reverse order so they don't get |
|
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Fixed HSAIL deopt
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|
732 // overwritten during the copy. |
|
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|
733 for (int i = total_args_passed - 1; i >= 0; i--) { |
|
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Fixed HSAIL deopt
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|
734 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
|
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diff
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|
735 __ movptr(r13, Address(r11, ld_off)); |
|
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Fixed HSAIL deopt
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|
736 __ movptr(Address(rsp, ld_off), r13); |
|
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|
737 } |
|
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|
738 __ bind(done); |
|
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|
739 } |
|
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|
740 #else |
|
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|
741 assert(frame_extension_argument == -1, "unsupported"); |
|
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|
742 #endif |
|
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|
743 |
|
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744 // Must preserve original SP for loading incoming arguments because |
|
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|
745 // we need to align the outgoing SP for compiled code. |
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|
746 __ movptr(r11, rsp); |
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|
747 |
| 0 | 748 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
| 749 // in registers, we will occasionally have no stack args. | |
| 750 int comp_words_on_stack = 0; | |
| 751 if (comp_args_on_stack) { | |
| 752 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 753 // registers are below. By subtracting stack0, we either get a negative | |
| 754 // number (all values in registers) or the maximum stack slot accessed. | |
| 755 | |
| 756 // Convert 4-byte c2 stack slots to words. | |
| 757 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
| 758 // Round up to miminum stack alignment, in wordSize | |
| 759 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 760 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 761 } |
| 762 | |
| 763 | |
| 764 // Ensure compiled code always sees stack at proper alignment | |
| 304 | 765 __ andptr(rsp, -16); |
| 0 | 766 |
| 767 // push the return address and misalign the stack that youngest frame always sees | |
| 768 // as far as the placement of the call instruction | |
| 304 | 769 __ push(rax); |
| 0 | 770 |
|
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|
771 // Put saved SP in another register |
|
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|
772 const Register saved_sp = rax; |
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|
773 __ movptr(saved_sp, r11); |
|
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6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
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|
774 |
| 0 | 775 // Will jump to the compiled code just as if compiled code was doing it. |
| 776 // Pre-load the register-jump target early, to schedule it better. | |
|
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777 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
| 0 | 778 |
|
4993
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
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diff
changeset
|
779 #ifdef GRAAL |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents:
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diff
changeset
|
780 // check if this call should be routed towards a specific entry point |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
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diff
changeset
|
781 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents:
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changeset
|
782 Label no_alternative_target; |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
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diff
changeset
|
783 __ jcc(Assembler::equal, no_alternative_target); |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents:
4985
diff
changeset
|
784 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents:
4985
diff
changeset
|
785 __ movptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents:
4985
diff
changeset
|
786 __ bind(no_alternative_target); |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
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parents:
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diff
changeset
|
787 #endif |
|
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
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diff
changeset
|
788 |
| 0 | 789 // Now generate the shuffle code. Pick up all register args and move the |
| 790 // rest through the floating point stack top. | |
| 791 for (int i = 0; i < total_args_passed; i++) { | |
| 792 if (sig_bt[i] == T_VOID) { | |
| 793 // Longs and doubles are passed in native word order, but misaligned | |
| 794 // in the 32-bit build. | |
| 795 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 796 continue; | |
| 797 } | |
| 798 | |
| 799 // Pick up 0, 1 or 2 words from SP+offset. | |
| 800 | |
| 801 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 802 "scrambled load targets?"); | |
| 803 // Load in argument order going down. | |
| 1506 | 804 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
| 0 | 805 // Point to interpreter value (vs. tag) |
| 1506 | 806 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 807 // |
| 808 // | |
| 809 // | |
| 810 VMReg r_1 = regs[i].first(); | |
| 811 VMReg r_2 = regs[i].second(); | |
| 812 if (!r_1->is_valid()) { | |
| 813 assert(!r_2->is_valid(), ""); | |
| 814 continue; | |
| 815 } | |
| 816 if (r_1->is_stack()) { | |
| 817 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 818 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
|
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|
819 |
|
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6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
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|
820 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
|
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|
821 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
|
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6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
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|
822 // will be generated. |
| 0 | 823 if (!r_2->is_valid()) { |
| 824 // sign extend??? | |
|
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|
825 __ movl(r13, Address(saved_sp, ld_off)); |
|
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6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
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diff
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|
826 __ movptr(Address(rsp, st_off), r13); |
| 0 | 827 } else { |
| 828 // | |
| 829 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 830 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 831 // So we must adjust where to pick up the data to match the interpreter. | |
| 832 // | |
| 833 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 834 // are accessed as negative so LSW is at LOW address | |
| 835 | |
| 836 // ld_off is MSW so get LSW | |
| 837 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 838 next_off : ld_off; | |
|
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|
839 __ movq(r13, Address(saved_sp, offset)); |
| 0 | 840 // st_off is LSW (i.e. reg.first()) |
|
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|
841 __ movq(Address(rsp, st_off), r13); |
| 0 | 842 } |
| 843 } else if (r_1->is_Register()) { // Register argument | |
| 844 Register r = r_1->as_Register(); | |
| 845 assert(r != rax, "must be different"); | |
| 846 if (r_2->is_valid()) { | |
| 847 // | |
| 848 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 849 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 850 // So we must adjust where to pick up the data to match the interpreter. | |
| 851 | |
| 852 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 853 next_off : ld_off; | |
| 854 | |
| 855 // this can be a misaligned move | |
|
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changeset
|
856 __ movq(r, Address(saved_sp, offset)); |
| 0 | 857 } else { |
| 858 // sign extend and use a full word? | |
|
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|
859 __ movl(r, Address(saved_sp, ld_off)); |
| 0 | 860 } |
| 861 } else { | |
| 862 if (!r_2->is_valid()) { | |
|
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|
863 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
| 0 | 864 } else { |
|
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|
865 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
| 0 | 866 } |
| 867 } | |
| 868 } | |
| 869 | |
| 870 // 6243940 We might end up in handle_wrong_method if | |
| 871 // the callee is deoptimized as we race thru here. If that | |
| 872 // happens we don't want to take a safepoint because the | |
| 873 // caller frame will look interpreted and arguments are now | |
| 874 // "compiled" so it is much better to make this transition | |
| 875 // invisible to the stack walking code. Unfortunately if | |
| 876 // we try and find the callee by normal means a safepoint | |
| 877 // is possible. So we stash the desired callee in the thread | |
| 878 // and the vm will find there should this case occur. | |
| 879 | |
| 304 | 880 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
| 0 | 881 |
|
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882 // put Method* where a c2i would expect should we end up there |
|
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883 // only needed becaus eof c2 resolve stubs return Method* as a result in |
| 0 | 884 // rax |
| 304 | 885 __ mov(rax, rbx); |
| 0 | 886 __ jmp(r11); |
| 887 } | |
| 888 | |
| 889 // --------------------------------------------------------------- | |
| 890 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 891 int total_args_passed, | |
| 892 int comp_args_on_stack, | |
| 893 const BasicType *sig_bt, | |
|
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diff
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|
894 const VMRegPair *regs, |
|
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895 AdapterFingerPrint* fingerprint) { |
| 0 | 896 address i2c_entry = __ pc(); |
| 897 | |
| 898 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 899 | |
| 900 // ------------------------------------------------------------------------- | |
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901 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
| 0 | 902 // to the interpreter. The args start out packed in the compiled layout. They |
| 903 // need to be unpacked into the interpreter layout. This will almost always | |
| 904 // require some stack space. We grow the current (compiled) stack, then repack | |
| 905 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 906 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 907 // compiled code, which relys solely on SP and not RBP, get sick). | |
| 908 | |
| 909 address c2i_unverified_entry = __ pc(); | |
| 910 Label skip_fixup; | |
| 911 Label ok; | |
| 912 | |
| 913 Register holder = rax; | |
| 914 Register receiver = j_rarg0; | |
| 915 Register temp = rbx; | |
| 916 | |
| 917 { | |
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918 __ load_klass(temp, receiver); |
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919 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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920 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
| 0 | 921 __ jcc(Assembler::equal, ok); |
| 922 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 923 | |
| 924 __ bind(ok); | |
| 925 // Method might have been compiled since the call site was patched to | |
| 926 // interpreted if that is the case treat it as a miss so we can get | |
| 927 // the call site corrected. | |
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928 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 929 __ jcc(Assembler::equal, skip_fixup); |
| 930 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 931 } | |
| 932 | |
| 933 address c2i_entry = __ pc(); | |
| 934 | |
| 935 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 936 | |
| 937 __ flush(); | |
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938 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 939 } |
| 940 | |
| 941 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 942 VMRegPair *regs, | |
| 943 int total_args_passed) { | |
| 944 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
| 945 // the arguments NOT counting out_preserve_stack_slots. | |
| 946 | |
| 947 // NOTE: These arrays will have to change when c1 is ported | |
| 948 #ifdef _WIN64 | |
| 949 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 950 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
| 951 }; | |
| 952 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 953 c_farg0, c_farg1, c_farg2, c_farg3 | |
| 954 }; | |
| 955 #else | |
| 956 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 957 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
| 958 }; | |
| 959 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 960 c_farg0, c_farg1, c_farg2, c_farg3, | |
| 961 c_farg4, c_farg5, c_farg6, c_farg7 | |
| 962 }; | |
| 963 #endif // _WIN64 | |
| 964 | |
| 965 | |
| 966 uint int_args = 0; | |
| 967 uint fp_args = 0; | |
| 968 uint stk_args = 0; // inc by 2 each time | |
| 969 | |
| 970 for (int i = 0; i < total_args_passed; i++) { | |
| 971 switch (sig_bt[i]) { | |
| 972 case T_BOOLEAN: | |
| 973 case T_CHAR: | |
| 974 case T_BYTE: | |
| 975 case T_SHORT: | |
| 976 case T_INT: | |
| 977 if (int_args < Argument::n_int_register_parameters_c) { | |
| 978 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 979 #ifdef _WIN64 | |
| 980 fp_args++; | |
| 981 // Allocate slots for callee to stuff register args the stack. | |
| 982 stk_args += 2; | |
| 983 #endif | |
| 984 } else { | |
| 985 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 986 stk_args += 2; | |
| 987 } | |
| 988 break; | |
| 989 case T_LONG: | |
| 990 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 991 // fall through | |
| 992 case T_OBJECT: | |
| 993 case T_ARRAY: | |
| 994 case T_ADDRESS: | |
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995 case T_METADATA: |
| 0 | 996 if (int_args < Argument::n_int_register_parameters_c) { |
| 997 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 998 #ifdef _WIN64 | |
| 999 fp_args++; | |
| 1000 stk_args += 2; | |
| 1001 #endif | |
| 1002 } else { | |
| 1003 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 1004 stk_args += 2; | |
| 1005 } | |
| 1006 break; | |
| 1007 case T_FLOAT: | |
| 1008 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 1009 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 1010 #ifdef _WIN64 | |
| 1011 int_args++; | |
| 1012 // Allocate slots for callee to stuff register args the stack. | |
| 1013 stk_args += 2; | |
| 1014 #endif | |
| 1015 } else { | |
| 1016 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 1017 stk_args += 2; | |
| 1018 } | |
| 1019 break; | |
| 1020 case T_DOUBLE: | |
| 1021 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 1022 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 1023 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 1024 #ifdef _WIN64 | |
| 1025 int_args++; | |
| 1026 // Allocate slots for callee to stuff register args the stack. | |
| 1027 stk_args += 2; | |
| 1028 #endif | |
| 1029 } else { | |
| 1030 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 1031 stk_args += 2; | |
| 1032 } | |
| 1033 break; | |
| 1034 case T_VOID: // Halves of longs and doubles | |
| 1035 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 1036 regs[i].set_bad(); | |
| 1037 break; | |
| 1038 default: | |
| 1039 ShouldNotReachHere(); | |
| 1040 break; | |
| 1041 } | |
| 1042 } | |
| 1043 #ifdef _WIN64 | |
| 1044 // windows abi requires that we always allocate enough stack space | |
| 1045 // for 4 64bit registers to be stored down. | |
| 1046 if (stk_args < 8) { | |
| 1047 stk_args = 8; | |
| 1048 } | |
| 1049 #endif // _WIN64 | |
| 1050 | |
| 1051 return stk_args; | |
| 1052 } | |
| 1053 | |
| 1054 // On 64 bit we will store integer like items to the stack as | |
| 1055 // 64 bits items (sparc abi) even though java would only store | |
| 1056 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
| 1057 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
| 1058 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1059 if (src.first()->is_stack()) { | |
| 1060 if (dst.first()->is_stack()) { | |
| 1061 // stack to stack | |
| 1062 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1063 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1064 } else { | |
| 1065 // stack to reg | |
| 1066 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
| 1067 } | |
| 1068 } else if (dst.first()->is_stack()) { | |
| 1069 // reg to stack | |
| 1070 // Do we really have to sign extend??? | |
| 1071 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
| 1072 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1073 } else { | |
| 1074 // Do we really have to sign extend??? | |
| 1075 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1076 if (dst.first() != src.first()) { | |
| 1077 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1078 } | |
| 1079 } | |
| 1080 } | |
| 1081 | |
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1082 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1083 if (src.first()->is_stack()) { |
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1084 if (dst.first()->is_stack()) { |
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1085 // stack to stack |
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1086 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1087 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1088 } else { |
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1089 // stack to reg |
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1090 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1091 } |
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1092 } else if (dst.first()->is_stack()) { |
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1093 // reg to stack |
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1094 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1095 } else { |
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1096 if (dst.first() != src.first()) { |
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1097 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1098 } |
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1099 } |
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1100 } |
| 0 | 1101 |
| 1102 // An oop arg. Must pass a handle not the oop itself | |
| 1103 static void object_move(MacroAssembler* masm, | |
| 1104 OopMap* map, | |
| 1105 int oop_handle_offset, | |
| 1106 int framesize_in_slots, | |
| 1107 VMRegPair src, | |
| 1108 VMRegPair dst, | |
| 1109 bool is_receiver, | |
| 1110 int* receiver_offset) { | |
| 1111 | |
| 1112 // must pass a handle. First figure out the location we use as a handle | |
| 1113 | |
| 1114 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
| 1115 | |
| 1116 // See if oop is NULL if it is we need no handle | |
| 1117 | |
| 1118 if (src.first()->is_stack()) { | |
| 1119 | |
| 1120 // Oop is already on the stack as an argument | |
| 1121 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1122 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1123 if (is_receiver) { | |
| 1124 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1125 } | |
| 1126 | |
| 304 | 1127 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
| 1128 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
| 0 | 1129 // conditionally move a NULL |
| 304 | 1130 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1131 } else { |
| 1132 | |
| 1133 // Oop is in an a register we must store it to the space we reserve | |
| 1134 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
| 1135 | |
| 1136 const Register rOop = src.first()->as_Register(); | |
| 1137 int oop_slot; | |
| 1138 if (rOop == j_rarg0) | |
| 1139 oop_slot = 0; | |
| 1140 else if (rOop == j_rarg1) | |
| 1141 oop_slot = 1; | |
| 1142 else if (rOop == j_rarg2) | |
| 1143 oop_slot = 2; | |
| 1144 else if (rOop == j_rarg3) | |
| 1145 oop_slot = 3; | |
| 1146 else if (rOop == j_rarg4) | |
| 1147 oop_slot = 4; | |
| 1148 else { | |
| 1149 assert(rOop == j_rarg5, "wrong register"); | |
| 1150 oop_slot = 5; | |
| 1151 } | |
| 1152 | |
| 1153 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1154 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1155 | |
| 1156 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
| 1157 // Store oop in handle area, may be NULL | |
| 304 | 1158 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1159 if (is_receiver) { |
| 1160 *receiver_offset = offset; | |
| 1161 } | |
| 1162 | |
| 304 | 1163 __ cmpptr(rOop, (int32_t)NULL_WORD); |
| 1164 __ lea(rHandle, Address(rsp, offset)); | |
| 0 | 1165 // conditionally move a NULL from the handle area where it was just stored |
| 304 | 1166 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
| 0 | 1167 } |
| 1168 | |
| 1169 // If arg is on the stack then place it otherwise it is already in correct reg. | |
| 1170 if (dst.first()->is_stack()) { | |
| 304 | 1171 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1172 } |
| 1173 } | |
| 1174 | |
| 1175 // A float arg may have to do float reg int reg conversion | |
| 1176 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1177 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1178 | |
| 1179 // The calling conventions assures us that each VMregpair is either | |
| 1180 // all really one physical register or adjacent stack slots. | |
| 1181 // This greatly simplifies the cases here compared to sparc. | |
| 1182 | |
| 1183 if (src.first()->is_stack()) { | |
| 1184 if (dst.first()->is_stack()) { | |
| 1185 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1186 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1187 } else { |
| 1188 // stack to reg | |
| 1189 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1190 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
| 1191 } | |
| 1192 } else if (dst.first()->is_stack()) { | |
| 1193 // reg to stack | |
| 1194 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1195 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1196 } else { | |
| 1197 // reg to reg | |
| 1198 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1199 if ( src.first() != dst.first()) { | |
| 1200 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1201 } | |
| 1202 } | |
| 1203 } | |
| 1204 | |
| 1205 // A long move | |
| 1206 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1207 | |
| 1208 // The calling conventions assures us that each VMregpair is either | |
| 1209 // all really one physical register or adjacent stack slots. | |
| 1210 // This greatly simplifies the cases here compared to sparc. | |
| 1211 | |
| 1212 if (src.is_single_phys_reg() ) { | |
| 1213 if (dst.is_single_phys_reg()) { | |
| 1214 if (dst.first() != src.first()) { | |
| 304 | 1215 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
| 0 | 1216 } |
| 1217 } else { | |
| 1218 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1219 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1220 } | |
| 1221 } else if (dst.is_single_phys_reg()) { | |
| 1222 assert(src.is_single_reg(), "not a stack pair"); | |
| 1223 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
| 1224 } else { | |
| 1225 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1226 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1227 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1228 } | |
| 1229 } | |
| 1230 | |
| 1231 // A double move | |
| 1232 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1233 | |
| 1234 // The calling conventions assures us that each VMregpair is either | |
| 1235 // all really one physical register or adjacent stack slots. | |
| 1236 // This greatly simplifies the cases here compared to sparc. | |
| 1237 | |
| 1238 if (src.is_single_phys_reg() ) { | |
| 1239 if (dst.is_single_phys_reg()) { | |
| 1240 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1241 if ( src.first() != dst.first()) { | |
| 1242 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1243 } | |
| 1244 } else { | |
| 1245 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1246 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1247 } | |
| 1248 } else if (dst.is_single_phys_reg()) { | |
| 1249 assert(src.is_single_reg(), "not a stack pair"); | |
| 1250 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
| 1251 } else { | |
| 1252 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1253 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1254 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1255 } | |
| 1256 } | |
| 1257 | |
| 1258 | |
| 1259 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1260 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1261 // which by this time is free to use | |
| 1262 switch (ret_type) { | |
| 1263 case T_FLOAT: | |
| 1264 __ movflt(Address(rbp, -wordSize), xmm0); | |
| 1265 break; | |
| 1266 case T_DOUBLE: | |
| 1267 __ movdbl(Address(rbp, -wordSize), xmm0); | |
| 1268 break; | |
| 1269 case T_VOID: break; | |
| 1270 default: { | |
| 304 | 1271 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1272 } |
| 1273 } | |
| 1274 } | |
| 1275 | |
| 1276 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1277 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1278 // which by this time is free to use | |
| 1279 switch (ret_type) { | |
| 1280 case T_FLOAT: | |
| 1281 __ movflt(xmm0, Address(rbp, -wordSize)); | |
| 1282 break; | |
| 1283 case T_DOUBLE: | |
| 1284 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
| 1285 break; | |
| 1286 case T_VOID: break; | |
| 1287 default: { | |
| 304 | 1288 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1289 } |
| 1290 } | |
| 1291 } | |
| 1292 | |
| 1293 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1294 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
| 1295 if (args[i].first()->is_Register()) { | |
| 304 | 1296 __ push(args[i].first()->as_Register()); |
| 0 | 1297 } else if (args[i].first()->is_XMMRegister()) { |
| 304 | 1298 __ subptr(rsp, 2*wordSize); |
| 0 | 1299 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
| 1300 } | |
| 1301 } | |
| 1302 } | |
| 1303 | |
| 1304 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1305 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
| 1306 if (args[i].first()->is_Register()) { | |
| 304 | 1307 __ pop(args[i].first()->as_Register()); |
| 0 | 1308 } else if (args[i].first()->is_XMMRegister()) { |
| 1309 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
| 304 | 1310 __ addptr(rsp, 2*wordSize); |
| 0 | 1311 } |
| 1312 } | |
| 1313 } | |
| 1314 | |
|
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1315 |
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1316 static void save_or_restore_arguments(MacroAssembler* masm, |
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1317 const int stack_slots, |
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1318 const int total_in_args, |
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1319 const int arg_save_area, |
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1320 OopMap* map, |
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1321 VMRegPair* in_regs, |
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1322 BasicType* in_sig_bt) { |
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1323 // if map is non-NULL then the code should store the values, |
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1324 // otherwise it should load them. |
| 5905 | 1325 int slot = arg_save_area; |
|
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1326 // Save down double word first |
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1327 for ( int i = 0; i < total_in_args; i++) { |
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1328 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1329 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1330 slot += VMRegImpl::slots_per_word; |
| 1331 assert(slot <= stack_slots, "overflow"); | |
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1332 if (map != NULL) { |
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1333 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1334 } else { |
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1335 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1336 } |
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1337 } |
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1338 if (in_regs[i].first()->is_Register() && |
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1339 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1340 int offset = slot * VMRegImpl::stack_slot_size; |
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1341 if (map != NULL) { |
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1342 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1343 if (in_sig_bt[i] == T_ARRAY) { |
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1344 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1345 } |
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1346 } else { |
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1347 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1348 } |
| 5907 | 1349 slot += VMRegImpl::slots_per_word; |
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1350 } |
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1351 } |
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1352 // Save or restore single word registers |
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1353 for ( int i = 0; i < total_in_args; i++) { |
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1354 if (in_regs[i].first()->is_Register()) { |
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1355 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1356 slot++; |
| 1357 assert(slot <= stack_slots, "overflow"); | |
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1358 |
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1359 // Value is in an input register pass we must flush it to the stack |
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1360 const Register reg = in_regs[i].first()->as_Register(); |
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1361 switch (in_sig_bt[i]) { |
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1362 case T_BOOLEAN: |
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1363 case T_CHAR: |
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1364 case T_BYTE: |
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1365 case T_SHORT: |
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1366 case T_INT: |
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1367 if (map != NULL) { |
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1368 __ movl(Address(rsp, offset), reg); |
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1369 } else { |
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1370 __ movl(reg, Address(rsp, offset)); |
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1371 } |
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1372 break; |
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1373 case T_ARRAY: |
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1374 case T_LONG: |
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1375 // handled above |
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1376 break; |
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1377 case T_OBJECT: |
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1378 default: ShouldNotReachHere(); |
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1379 } |
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1380 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1381 if (in_sig_bt[i] == T_FLOAT) { |
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1382 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1383 slot++; |
| 1384 assert(slot <= stack_slots, "overflow"); | |
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1385 if (map != NULL) { |
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1386 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1387 } else { |
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1388 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1389 } |
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1390 } |
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1391 } else if (in_regs[i].first()->is_stack()) { |
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1392 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1393 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1394 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1395 } |
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1396 } |
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1397 } |
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1398 } |
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1399 |
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1400 |
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1401 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1402 // keeps a new JNI critical region from starting until a GC has been |
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1403 // forced. Save down any oops in registers and describe them in an |
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1404 // OopMap. |
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1405 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1406 int stack_slots, |
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1407 int total_c_args, |
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1408 int total_in_args, |
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1409 int arg_save_area, |
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1410 OopMapSet* oop_maps, |
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1411 VMRegPair* in_regs, |
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1412 BasicType* in_sig_bt) { |
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1413 __ block_comment("check GC_locker::needs_gc"); |
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1414 Label cont; |
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1415 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1416 __ jcc(Assembler::equal, cont); |
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1417 |
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1418 // Save down any incoming oops and call into the runtime to halt for a GC |
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1419 |
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1420 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1421 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1422 arg_save_area, map, in_regs, in_sig_bt); |
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1423 |
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1424 address the_pc = __ pc(); |
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1425 oop_maps->add_gc_map( __ offset(), map); |
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1426 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1427 |
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1428 __ block_comment("block_for_jni_critical"); |
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1429 __ movptr(c_rarg0, r15_thread); |
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1430 __ mov(r12, rsp); // remember sp |
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1431 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
|
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1432 __ andptr(rsp, -16); // align stack as required by ABI |
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1433 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
|
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1434 __ mov(rsp, r12); // restore sp |
|
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1435 __ reinit_heapbase(); |
|
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1436 |
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1437 __ reset_last_Java_frame(false, true); |
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1438 |
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1439 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1440 arg_save_area, NULL, in_regs, in_sig_bt); |
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1441 |
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1442 __ bind(cont); |
|
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1443 #ifdef ASSERT |
|
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1444 if (StressCriticalJNINatives) { |
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1445 // Stress register saving |
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1446 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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1447 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1448 arg_save_area, map, in_regs, in_sig_bt); |
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1449 // Destroy argument registers |
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1450 for (int i = 0; i < total_in_args - 1; i++) { |
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1451 if (in_regs[i].first()->is_Register()) { |
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1452 const Register reg = in_regs[i].first()->as_Register(); |
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1453 __ xorptr(reg, reg); |
|
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1454 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1455 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1456 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1457 ShouldNotReachHere(); |
|
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1458 } else if (in_regs[i].first()->is_stack()) { |
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1459 // Nothing to do |
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1460 } else { |
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1461 ShouldNotReachHere(); |
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1462 } |
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1463 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
|
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1464 i++; |
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1465 } |
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1466 } |
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1467 |
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1468 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1469 arg_save_area, NULL, in_regs, in_sig_bt); |
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1470 } |
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1471 #endif |
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1472 } |
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1473 |
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1474 // Unpack an array argument into a pointer to the body and the length |
|
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1475 // if the array is non-null, otherwise pass 0 for both. |
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1476 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
|
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1477 Register tmp_reg = rax; |
|
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1478 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1479 "possible collision"); |
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1480 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1481 "possible collision"); |
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1482 |
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1483 __ block_comment("unpack_array_argument {"); |
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1484 |
|
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1485 // Pass the length, ptr pair |
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1486 Label is_null, done; |
|
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1487 VMRegPair tmp; |
|
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1488 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1489 if (reg.first()->is_stack()) { |
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1490 // Load the arg up from the stack |
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1491 move_ptr(masm, reg, tmp); |
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1492 reg = tmp; |
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1493 } |
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1494 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1495 __ jccb(Assembler::equal, is_null); |
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1496 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1497 move_ptr(masm, tmp, body_arg); |
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1498 // load the length relative to the body. |
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1499 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
|
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1500 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1501 move32_64(masm, tmp, length_arg); |
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1502 __ jmpb(done); |
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1503 __ bind(is_null); |
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1504 // Pass zeros |
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1505 __ xorptr(tmp_reg, tmp_reg); |
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1506 move_ptr(masm, tmp, body_arg); |
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1507 move32_64(masm, tmp, length_arg); |
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1508 __ bind(done); |
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1509 |
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1510 __ block_comment("} unpack_array_argument"); |
|
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1511 } |
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1512 |
| 5905 | 1513 |
|
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1514 // Different signatures may require very different orders for the move |
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1515 // to avoid clobbering other arguments. There's no simple way to |
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1516 // order them safely. Compute a safe order for issuing stores and |
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1517 // break any cycles in those stores. This code is fairly general but |
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1518 // it's not necessary on the other platforms so we keep it in the |
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1519 // platform dependent code instead of moving it into a shared file. |
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1520 // (See bugs 7013347 & 7145024.) |
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1521 // Note that this code is specific to LP64. |
| 5905 | 1522 class ComputeMoveOrder: public StackObj { |
| 1523 class MoveOperation: public ResourceObj { | |
| 1524 friend class ComputeMoveOrder; | |
| 1525 private: | |
| 1526 VMRegPair _src; | |
| 1527 VMRegPair _dst; | |
| 1528 int _src_index; | |
| 1529 int _dst_index; | |
| 1530 bool _processed; | |
| 1531 MoveOperation* _next; | |
| 1532 MoveOperation* _prev; | |
| 1533 | |
| 1534 static int get_id(VMRegPair r) { | |
| 1535 return r.first()->value(); | |
| 1536 } | |
| 1537 | |
| 1538 public: | |
| 1539 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
| 1540 _src(src) | |
| 1541 , _src_index(src_index) | |
| 1542 , _dst(dst) | |
| 1543 , _dst_index(dst_index) | |
| 1544 , _next(NULL) | |
| 1545 , _prev(NULL) | |
| 1546 , _processed(false) { | |
| 1547 } | |
| 1548 | |
| 1549 VMRegPair src() const { return _src; } | |
| 1550 int src_id() const { return get_id(src()); } | |
| 1551 int src_index() const { return _src_index; } | |
| 1552 VMRegPair dst() const { return _dst; } | |
| 1553 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
| 1554 int dst_index() const { return _dst_index; } | |
| 1555 int dst_id() const { return get_id(dst()); } | |
| 1556 MoveOperation* next() const { return _next; } | |
| 1557 MoveOperation* prev() const { return _prev; } | |
| 1558 void set_processed() { _processed = true; } | |
| 1559 bool is_processed() const { return _processed; } | |
| 1560 | |
| 1561 // insert | |
| 1562 void break_cycle(VMRegPair temp_register) { | |
| 1563 // create a new store following the last store | |
| 1564 // to move from the temp_register to the original | |
| 1565 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
| 1566 | |
| 1567 // break the cycle of links and insert new_store at the end | |
| 1568 // break the reverse link. | |
| 1569 MoveOperation* p = prev(); | |
| 1570 assert(p->next() == this, "must be"); | |
| 1571 _prev = NULL; | |
| 1572 p->_next = new_store; | |
| 1573 new_store->_prev = p; | |
| 1574 | |
| 1575 // change the original store to save it's value in the temp. | |
| 1576 set_dst(-1, temp_register); | |
| 1577 } | |
| 1578 | |
| 1579 void link(GrowableArray<MoveOperation*>& killer) { | |
| 1580 // link this store in front the store that it depends on | |
| 1581 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
| 1582 if (n != NULL) { | |
| 1583 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
| 1584 _next = n; | |
| 1585 n->_prev = this; | |
| 1586 } | |
| 1587 } | |
| 1588 }; | |
| 1589 | |
| 1590 private: | |
| 1591 GrowableArray<MoveOperation*> edges; | |
| 1592 | |
| 1593 public: | |
| 1594 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
| 1595 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
| 1596 // Move operations where the dest is the stack can all be | |
| 1597 // scheduled first since they can't interfere with the other moves. | |
| 1598 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 1599 if (in_sig_bt[i] == T_ARRAY) { | |
| 1600 c_arg--; | |
| 1601 if (out_regs[c_arg].first()->is_stack() && | |
| 1602 out_regs[c_arg + 1].first()->is_stack()) { | |
| 1603 arg_order.push(i); | |
| 1604 arg_order.push(c_arg); | |
| 1605 } else { | |
| 1606 if (out_regs[c_arg].first()->is_stack() || | |
| 1607 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1608 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
| 1609 } else { | |
| 1610 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1611 } | |
| 1612 } | |
| 1613 } else if (in_sig_bt[i] == T_VOID) { | |
| 1614 arg_order.push(i); | |
| 1615 arg_order.push(c_arg); | |
| 1616 } else { | |
| 1617 if (out_regs[c_arg].first()->is_stack() || | |
| 1618 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1619 arg_order.push(i); | |
| 1620 arg_order.push(c_arg); | |
| 1621 } else { | |
| 1622 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1623 } | |
| 1624 } | |
| 1625 } | |
| 1626 // Break any cycles in the register moves and emit the in the | |
| 1627 // proper order. | |
| 1628 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
| 1629 for (int i = 0; i < stores->length(); i++) { | |
| 1630 arg_order.push(stores->at(i)->src_index()); | |
| 1631 arg_order.push(stores->at(i)->dst_index()); | |
| 1632 } | |
| 1633 } | |
| 1634 | |
| 1635 // Collected all the move operations | |
| 1636 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
| 1637 if (src.first() == dst.first()) return; | |
| 1638 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
| 1639 } | |
| 1640 | |
| 1641 // Walk the edges breaking cycles between moves. The result list | |
| 1642 // can be walked in order to produce the proper set of loads | |
| 1643 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
| 1644 // Record which moves kill which values | |
| 1645 GrowableArray<MoveOperation*> killer; | |
| 1646 for (int i = 0; i < edges.length(); i++) { | |
| 1647 MoveOperation* s = edges.at(i); | |
| 1648 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
| 1649 killer.at_put_grow(s->dst_id(), s, NULL); | |
| 1650 } | |
| 1651 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
| 1652 "make sure temp isn't in the registers that are killed"); | |
| 1653 | |
| 1654 // create links between loads and stores | |
| 1655 for (int i = 0; i < edges.length(); i++) { | |
| 1656 edges.at(i)->link(killer); | |
| 1657 } | |
| 1658 | |
| 1659 // at this point, all the move operations are chained together | |
| 1660 // in a doubly linked list. Processing it backwards finds | |
| 1661 // the beginning of the chain, forwards finds the end. If there's | |
| 1662 // a cycle it can be broken at any point, so pick an edge and walk | |
| 1663 // backward until the list ends or we end where we started. | |
| 1664 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
| 1665 for (int e = 0; e < edges.length(); e++) { | |
| 1666 MoveOperation* s = edges.at(e); | |
| 1667 if (!s->is_processed()) { | |
| 1668 MoveOperation* start = s; | |
| 1669 // search for the beginning of the chain or cycle | |
| 1670 while (start->prev() != NULL && start->prev() != s) { | |
| 1671 start = start->prev(); | |
| 1672 } | |
| 1673 if (start->prev() == s) { | |
| 1674 start->break_cycle(temp_register); | |
| 1675 } | |
| 1676 // walk the chain forward inserting to store list | |
| 1677 while (start != NULL) { | |
| 1678 stores->append(start); | |
| 1679 start->set_processed(); | |
| 1680 start = start->next(); | |
| 1681 } | |
| 1682 } | |
| 1683 } | |
| 1684 return stores; | |
| 1685 } | |
| 1686 }; | |
| 1687 | |
|
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1688 static void verify_oop_args(MacroAssembler* masm, |
|
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1689 methodHandle method, |
|
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1690 const BasicType* sig_bt, |
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1691 const VMRegPair* regs) { |
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1692 Register temp_reg = rbx; // not part of any compiled calling seq |
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1693 if (VerifyOops) { |
|
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1694 for (int i = 0; i < method->size_of_parameters(); i++) { |
|
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1695 if (sig_bt[i] == T_OBJECT || |
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1696 sig_bt[i] == T_ARRAY) { |
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1697 VMReg r = regs[i].first(); |
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1698 assert(r->is_valid(), "bad oop arg"); |
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1699 if (r->is_stack()) { |
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1700 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1701 __ verify_oop(temp_reg); |
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1702 } else { |
|
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1703 __ verify_oop(r->as_Register()); |
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1704 } |
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1705 } |
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1706 } |
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1707 } |
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1708 } |
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1709 |
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1710 static void gen_special_dispatch(MacroAssembler* masm, |
|
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1711 methodHandle method, |
|
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1712 const BasicType* sig_bt, |
|
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1713 const VMRegPair* regs) { |
|
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1714 verify_oop_args(masm, method, sig_bt, regs); |
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1715 vmIntrinsics::ID iid = method->intrinsic_id(); |
|
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1716 |
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1717 // Now write the args into the outgoing interpreter space |
|
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1718 bool has_receiver = false; |
|
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1719 Register receiver_reg = noreg; |
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1720 int member_arg_pos = -1; |
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1721 Register member_reg = noreg; |
|
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1722 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
|
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1723 if (ref_kind != 0) { |
|
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1724 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
|
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1725 member_reg = rbx; // known to be free at this point |
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1726 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
|
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1727 } else if (iid == vmIntrinsics::_invokeBasic) { |
|
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1728 has_receiver = true; |
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1729 } else { |
|
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1730 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
|
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1731 } |
|
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1732 |
|
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1733 if (member_reg != noreg) { |
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1734 // Load the member_arg into register, if necessary. |
|
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1735 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
|
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1736 VMReg r = regs[member_arg_pos].first(); |
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1737 if (r->is_stack()) { |
|
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1738 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1739 } else { |
|
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1740 // no data motion is needed |
|
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|
1741 member_reg = r->as_Register(); |
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1742 } |
|
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1743 } |
|
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1744 |
|
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1745 if (has_receiver) { |
|
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1746 // Make sure the receiver is loaded into a register. |
|
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1747 assert(method->size_of_parameters() > 0, "oob"); |
|
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1748 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
|
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1749 VMReg r = regs[0].first(); |
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1750 assert(r->is_valid(), "bad receiver arg"); |
|
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1751 if (r->is_stack()) { |
|
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1752 // Porting note: This assumes that compiled calling conventions always |
|
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|
1753 // pass the receiver oop in a register. If this is not true on some |
|
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1754 // platform, pick a temp and load the receiver from stack. |
|
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1755 fatal("receiver always in a register"); |
|
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1756 receiver_reg = j_rarg0; // known to be free at this point |
|
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1757 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1758 } else { |
|
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1759 // no data motion is needed |
|
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|
1760 receiver_reg = r->as_Register(); |
|
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|
1761 } |
|
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|
1762 } |
|
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|
1763 |
|
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|
1764 // Figure out which address we are really jumping to: |
|
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1765 MethodHandles::generate_method_handle_dispatch(masm, iid, |
|
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1766 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
|
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1767 } |
| 5905 | 1768 |
| 0 | 1769 // --------------------------------------------------------------------------- |
| 1770 // Generate a native wrapper for a given method. The method takes arguments | |
| 1771 // in the Java compiled code convention, marshals them to the native | |
| 1772 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1773 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1774 // returns. | |
|
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1775 // |
|
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1776 // Critical native functions are a shorthand for the use of |
|
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1777 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
|
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1778 // functions. The wrapper is expected to unpack the arguments before |
|
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1779 // passing them to the callee and perform checks before and after the |
|
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1780 // native call to ensure that they GC_locker |
|
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1781 // lock_critical/unlock_critical semantics are followed. Some other |
|
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1782 // parts of JNI setup are skipped like the tear down of the JNI handle |
|
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|
1783 // block and the check for pending exceptions it's impossible for them |
|
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|
1784 // to be thrown. |
|
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|
1785 // |
|
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1786 // They are roughly structured like this: |
|
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|
1787 // if (GC_locker::needs_gc()) |
|
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|
1788 // SharedRuntime::block_for_jni_critical(); |
|
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|
1789 // tranistion to thread_in_native |
|
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|
1790 // unpack arrray arguments and call native entry point |
|
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|
1791 // check for safepoint in progress |
|
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|
1792 // check if any thread suspend flags are set |
|
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|
1793 // call into JVM and possible unlock the JNI critical |
|
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|
1794 // if a GC was suppressed while in the critical native. |
|
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|
1795 // transition back to thread_in_Java |
|
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|
1796 // return to caller |
|
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|
1797 // |
|
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|
1798 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
| 0 | 1799 methodHandle method, |
|
2405
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|
1800 int compile_id, |
|
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1801 BasicType* in_sig_bt, |
|
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|
1802 VMRegPair* in_regs, |
| 0 | 1803 BasicType ret_type) { |
|
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1804 if (method->is_method_handle_intrinsic()) { |
|
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|
1805 vmIntrinsics::ID iid = method->intrinsic_id(); |
|
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1806 intptr_t start = (intptr_t)__ pc(); |
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1807 int vep_offset = ((intptr_t)__ pc()) - start; |
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1808 gen_special_dispatch(masm, |
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1809 method, |
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1810 in_sig_bt, |
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1811 in_regs); |
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1812 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1813 __ flush(); |
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1814 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1815 return nmethod::new_native_nmethod(method, |
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1816 compile_id, |
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1817 masm->code(), |
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1818 vep_offset, |
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1819 frame_complete, |
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1820 stack_slots / VMRegImpl::slots_per_word, |
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1821 in_ByteSize(-1), |
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1822 in_ByteSize(-1), |
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1823 (OopMapSet*)NULL); |
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1824 } |
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1825 bool is_critical_native = true; |
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1826 address native_func = method->critical_native_function(); |
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1827 if (native_func == NULL) { |
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1828 native_func = method->native_function(); |
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1829 is_critical_native = false; |
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1830 } |
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1831 assert(native_func != NULL, "must have function"); |
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1832 |
| 0 | 1833 // An OopMap for lock (and class if static) |
| 1834 OopMapSet *oop_maps = new OopMapSet(); | |
| 1835 intptr_t start = (intptr_t)__ pc(); | |
| 1836 | |
| 1837 // We have received a description of where all the java arg are located | |
| 1838 // on entry to the wrapper. We need to convert these args to where | |
| 1839 // the jni function will expect them. To figure out where they go | |
| 1840 // we convert the java signature to a C signature by inserting | |
| 1841 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1842 | |
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1843 const int total_in_args = method->size_of_parameters(); |
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1844 int total_c_args = total_in_args; |
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1845 if (!is_critical_native) { |
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1846 total_c_args += 1; |
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1847 if (method->is_static()) { |
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1848 total_c_args++; |
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1849 } |
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1850 } else { |
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1851 for (int i = 0; i < total_in_args; i++) { |
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1852 if (in_sig_bt[i] == T_ARRAY) { |
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1853 total_c_args++; |
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1854 } |
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1855 } |
| 0 | 1856 } |
| 1857 | |
| 1858 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1859 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1860 BasicType* in_elem_bt = NULL; |
| 0 | 1861 |
| 1862 int argc = 0; | |
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1863 if (!is_critical_native) { |
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1864 out_sig_bt[argc++] = T_ADDRESS; |
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1865 if (method->is_static()) { |
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1866 out_sig_bt[argc++] = T_OBJECT; |
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1867 } |
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1868 |
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1869 for (int i = 0; i < total_in_args ; i++ ) { |
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1870 out_sig_bt[argc++] = in_sig_bt[i]; |
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1871 } |
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1872 } else { |
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1873 Thread* THREAD = Thread::current(); |
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1874 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1875 SignatureStream ss(method->signature()); |
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1876 for (int i = 0; i < total_in_args ; i++ ) { |
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1877 if (in_sig_bt[i] == T_ARRAY) { |
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1878 // Arrays are passed as int, elem* pair |
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1879 out_sig_bt[argc++] = T_INT; |
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1880 out_sig_bt[argc++] = T_ADDRESS; |
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1881 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1882 const char* at = atype->as_C_string(); |
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1883 if (strlen(at) == 2) { |
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1884 assert(at[0] == '[', "must be"); |
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1885 switch (at[1]) { |
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1886 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1887 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1888 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1889 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1890 case 'I': in_elem_bt[i] = T_INT; break; |
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1891 case 'J': in_elem_bt[i] = T_LONG; break; |
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1892 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1893 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1894 default: ShouldNotReachHere(); |
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1895 } |
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1896 } |
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1897 } else { |
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1898 out_sig_bt[argc++] = in_sig_bt[i]; |
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1899 in_elem_bt[i] = T_VOID; |
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1900 } |
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1901 if (in_sig_bt[i] != T_VOID) { |
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1902 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1903 ss.next(); |
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1904 } |
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1905 } |
| 0 | 1906 } |
| 1907 | |
| 1908 // Now figure out where the args must be stored and how much stack space | |
| 1909 // they require. | |
| 1910 int out_arg_slots; | |
| 14909 | 1911 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
| 0 | 1912 |
| 1913 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1914 // incoming registers | |
| 1915 | |
| 1916 // Calculate the total number of stack slots we will need. | |
| 1917 | |
| 1918 // First count the abi requirement plus all of the outgoing args | |
| 1919 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1920 | |
| 1921 // Now the space for the inbound oop handle area | |
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1922 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1923 if (is_critical_native) { |
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1924 // Critical natives may have to call out so they need a save area |
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1925 // for register arguments. |
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1926 int double_slots = 0; |
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1927 int single_slots = 0; |
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1928 for ( int i = 0; i < total_in_args; i++) { |
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1929 if (in_regs[i].first()->is_Register()) { |
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1930 const Register reg = in_regs[i].first()->as_Register(); |
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1931 switch (in_sig_bt[i]) { |
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1932 case T_BOOLEAN: |
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1933 case T_BYTE: |
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1934 case T_SHORT: |
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1935 case T_CHAR: |
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1936 case T_INT: single_slots++; break; |
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1937 case T_ARRAY: // specific to LP64 (7145024) |
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1938 case T_LONG: double_slots++; break; |
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1939 default: ShouldNotReachHere(); |
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1940 } |
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1941 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1942 switch (in_sig_bt[i]) { |
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1943 case T_FLOAT: single_slots++; break; |
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1944 case T_DOUBLE: double_slots++; break; |
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1945 default: ShouldNotReachHere(); |
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1946 } |
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1947 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1948 ShouldNotReachHere(); |
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1949 } |
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1950 } |
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1951 total_save_slots = double_slots * 2 + single_slots; |
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1952 // align the save area |
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1953 if (double_slots != 0) { |
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1954 stack_slots = round_to(stack_slots, 2); |
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1955 } |
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1956 } |
| 0 | 1957 |
| 1958 int oop_handle_offset = stack_slots; | |
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1959 stack_slots += total_save_slots; |
| 0 | 1960 |
| 1961 // Now any space we need for handlizing a klass if static method | |
| 1962 | |
| 1963 int klass_slot_offset = 0; | |
| 1964 int klass_offset = -1; | |
| 1965 int lock_slot_offset = 0; | |
| 1966 bool is_static = false; | |
| 1967 | |
| 1968 if (method->is_static()) { | |
| 1969 klass_slot_offset = stack_slots; | |
| 1970 stack_slots += VMRegImpl::slots_per_word; | |
| 1971 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1972 is_static = true; | |
| 1973 } | |
| 1974 | |
| 1975 // Plus a lock if needed | |
| 1976 | |
| 1977 if (method->is_synchronized()) { | |
| 1978 lock_slot_offset = stack_slots; | |
| 1979 stack_slots += VMRegImpl::slots_per_word; | |
| 1980 } | |
| 1981 | |
| 1982 // Now a place (+2) to save return values or temp during shuffling | |
| 1983 // + 4 for return address (which we own) and saved rbp | |
| 1984 stack_slots += 6; | |
| 1985 | |
| 1986 // Ok The space we have allocated will look like: | |
| 1987 // | |
| 1988 // | |
| 1989 // FP-> | | | |
| 1990 // |---------------------| | |
| 1991 // | 2 slots for moves | | |
| 1992 // |---------------------| | |
| 1993 // | lock box (if sync) | | |
| 1994 // |---------------------| <- lock_slot_offset | |
| 1995 // | klass (if static) | | |
| 1996 // |---------------------| <- klass_slot_offset | |
| 1997 // | oopHandle area | | |
| 1998 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
| 1999 // | outbound memory | | |
| 2000 // | based arguments | | |
| 2001 // | | | |
| 2002 // |---------------------| | |
| 2003 // | | | |
| 2004 // SP-> | out_preserved_slots | | |
| 2005 // | |
| 2006 // | |
| 2007 | |
| 2008 | |
| 2009 // Now compute actual number of stack words we need rounding to make | |
| 2010 // stack properly aligned. | |
|
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2011 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 2012 |
| 2013 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 2014 | |
| 2015 // First thing make an ic check to see if we should even be here | |
| 2016 | |
| 2017 // We are free to use all registers as temps without saving them and | |
| 2018 // restoring them except rbp. rbp is the only callee save register | |
| 2019 // as far as the interpreter and the compiler(s) are concerned. | |
| 2020 | |
| 2021 | |
| 2022 const Register ic_reg = rax; | |
| 2023 const Register receiver = j_rarg0; | |
| 2024 | |
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2025 Label hit; |
| 0 | 2026 Label exception_pending; |
| 2027 | |
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2028 assert_different_registers(ic_reg, receiver, rscratch1); |
| 0 | 2029 __ verify_oop(receiver); |
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2030 __ load_klass(rscratch1, receiver); |
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2031 __ cmpq(ic_reg, rscratch1); |
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2032 __ jcc(Assembler::equal, hit); |
| 0 | 2033 |
| 2034 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 2035 | |
| 2036 // Verified entry point must be aligned | |
| 2037 __ align(8); | |
| 2038 | |
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2039 __ bind(hit); |
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2040 |
| 0 | 2041 int vep_offset = ((intptr_t)__ pc()) - start; |
| 2042 | |
| 2043 // The instruction at the verified entry point must be 5 bytes or longer | |
| 2044 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 2045 // instruction fits that requirement. | |
| 2046 | |
| 2047 // Generate stack overflow check | |
| 2048 | |
| 2049 if (UseStackBanging) { | |
| 2050 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 2051 } else { | |
| 2052 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 2053 __ fat_nop(); | |
| 2054 } | |
| 2055 | |
| 2056 // Generate a new frame for the wrapper. | |
| 2057 __ enter(); | |
| 2058 // -2 because return address is already present and so is saved rbp | |
| 304 | 2059 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 2060 |
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2061 // Frame is now completed as far as size and linkage. |
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2062 int frame_complete = ((intptr_t)__ pc()) - start; |
| 0 | 2063 |
| 2064 #ifdef ASSERT | |
| 2065 { | |
| 2066 Label L; | |
| 304 | 2067 __ mov(rax, rsp); |
| 605 | 2068 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
| 304 | 2069 __ cmpptr(rax, rsp); |
| 0 | 2070 __ jcc(Assembler::equal, L); |
| 2071 __ stop("improperly aligned stack"); | |
| 2072 __ bind(L); | |
| 2073 } | |
| 2074 #endif /* ASSERT */ | |
| 2075 | |
| 2076 | |
| 2077 // We use r14 as the oop handle for the receiver/klass | |
| 2078 // It is callee save so it survives the call to native | |
| 2079 | |
| 2080 const Register oop_handle_reg = r14; | |
| 2081 | |
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2082 if (is_critical_native) { |
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2083 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2084 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2085 } |
| 0 | 2086 |
| 2087 // | |
| 2088 // We immediately shuffle the arguments so that any vm call we have to | |
| 2089 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 2090 // captured the oops from our caller and have a valid oopMap for | |
| 2091 // them. | |
| 2092 | |
| 2093 // ----------------- | |
| 2094 // The Grand Shuffle | |
| 2095 | |
| 2096 // The Java calling convention is either equal (linux) or denser (win64) than the | |
| 2097 // c calling convention. However the because of the jni_env argument the c calling | |
| 2098 // convention always has at least one more (and two for static) arguments than Java. | |
| 2099 // Therefore if we move the args from java -> c backwards then we will never have | |
| 2100 // a register->register conflict and we don't have to build a dependency graph | |
| 2101 // and figure out how to break any cycles. | |
| 2102 // | |
| 2103 | |
| 2104 // Record esp-based slot for receiver on stack for non-static methods | |
| 2105 int receiver_offset = -1; | |
| 2106 | |
| 2107 // This is a trick. We double the stack slots so we can claim | |
| 2108 // the oops in the caller's frame. Since we are sure to have | |
| 2109 // more args than the caller doubling is enough to make | |
| 2110 // sure we can capture all the incoming oop args from the | |
| 2111 // caller. | |
| 2112 // | |
| 2113 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 2114 | |
| 2115 // Mark location of rbp (someday) | |
| 2116 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
| 2117 | |
| 2118 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
| 2119 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
| 2120 | |
| 2121 | |
| 2122 #ifdef ASSERT | |
| 2123 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
| 2124 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
| 2125 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
| 2126 reg_destroyed[r] = false; | |
| 2127 } | |
| 2128 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
| 2129 freg_destroyed[f] = false; | |
| 2130 } | |
| 2131 | |
| 2132 #endif /* ASSERT */ | |
| 2133 | |
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2134 // This may iterate in two different directions depending on the |
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2135 // kind of native it is. The reason is that for regular JNI natives |
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2136 // the incoming and outgoing registers are offset upwards and for |
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2137 // critical natives they are offset down. |
| 5905 | 2138 GrowableArray<int> arg_order(2 * total_in_args); |
| 2139 VMRegPair tmp_vmreg; | |
| 2140 tmp_vmreg.set1(rbx->as_VMReg()); | |
| 2141 | |
| 2142 if (!is_critical_native) { | |
| 2143 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 2144 arg_order.push(i); | |
| 2145 arg_order.push(c_arg); | |
| 2146 } | |
| 2147 } else { | |
| 2148 // Compute a valid move order, using tmp_vmreg to break any cycles | |
| 2149 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
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2150 } |
| 5905 | 2151 |
| 2152 int temploc = -1; | |
| 2153 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
| 2154 int i = arg_order.at(ai); | |
| 2155 int c_arg = arg_order.at(ai + 1); | |
| 2156 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
| 2157 if (c_arg == -1) { | |
| 2158 assert(is_critical_native, "should only be required for critical natives"); | |
| 2159 // This arg needs to be moved to a temporary | |
| 2160 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
| 2161 in_regs[i] = tmp_vmreg; | |
| 2162 temploc = i; | |
| 2163 continue; | |
| 2164 } else if (i == -1) { | |
| 2165 assert(is_critical_native, "should only be required for critical natives"); | |
| 2166 // Read from the temporary location | |
| 2167 assert(temploc != -1, "must be valid"); | |
| 2168 i = temploc; | |
| 2169 temploc = -1; | |
| 2170 } | |
| 0 | 2171 #ifdef ASSERT |
| 2172 if (in_regs[i].first()->is_Register()) { | |
| 2173 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
| 2174 } else if (in_regs[i].first()->is_XMMRegister()) { | |
| 2175 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
| 2176 } | |
| 2177 if (out_regs[c_arg].first()->is_Register()) { | |
| 2178 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
| 2179 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
| 2180 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
| 2181 } | |
| 2182 #endif /* ASSERT */ | |
| 2183 switch (in_sig_bt[i]) { | |
| 2184 case T_ARRAY: | |
|
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2185 if (is_critical_native) { |
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2186 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2187 c_arg++; |
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2188 #ifdef ASSERT |
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2189 if (out_regs[c_arg].first()->is_Register()) { |
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2190 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2191 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2192 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2193 } |
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2194 #endif |
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2195 break; |
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2196 } |
| 0 | 2197 case T_OBJECT: |
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2198 assert(!is_critical_native, "no oop arguments"); |
| 0 | 2199 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
| 2200 ((i == 0) && (!is_static)), | |
| 2201 &receiver_offset); | |
| 2202 break; | |
| 2203 case T_VOID: | |
| 2204 break; | |
| 2205 | |
| 2206 case T_FLOAT: | |
| 2207 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2208 break; | |
| 2209 | |
| 2210 case T_DOUBLE: | |
| 2211 assert( i + 1 < total_in_args && | |
| 2212 in_sig_bt[i + 1] == T_VOID && | |
| 2213 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 2214 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2215 break; | |
| 2216 | |
| 2217 case T_LONG : | |
| 2218 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2219 break; | |
| 2220 | |
| 2221 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 2222 | |
| 2223 default: | |
| 2224 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
| 2225 } | |
| 2226 } | |
| 2227 | |
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2228 int c_arg; |
| 0 | 2229 |
| 2230 // Pre-load a static method's oop into r14. Used both by locking code and | |
| 2231 // the normal JNI call code. | |
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2232 if (!is_critical_native) { |
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2233 // point c_arg at the first arg that is already loaded in case we |
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2234 // need to spill before we call out |
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2235 c_arg = total_c_args - total_in_args; |
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2236 |
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2237 if (method->is_static()) { |
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2238 |
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2239 // load oop into a register |
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2240 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
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2241 |
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2242 // Now handlize the static class mirror it's known not-null. |
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2243 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
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2244 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
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2245 |
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2246 // Now get the handle |
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2247 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
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2248 // store the klass handle as second argument |
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2249 __ movptr(c_rarg1, oop_handle_reg); |
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2250 // and protect the arg if we must spill |
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2251 c_arg--; |
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2252 } |
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2253 } else { |
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2254 // For JNI critical methods we need to save all registers in save_args. |
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2255 c_arg = 0; |
| 0 | 2256 } |
| 2257 | |
| 2258 // Change state to native (we save the return address in the thread, since it might not | |
| 2259 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 2260 // points into the right code segment. It does not have to be the correct return pc. | |
| 2261 // We use the same pc/oopMap repeatedly when we call out | |
| 2262 | |
| 2263 intptr_t the_pc = (intptr_t) __ pc(); | |
| 2264 oop_maps->add_gc_map(the_pc - start, map); | |
| 2265 | |
| 2266 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
| 2267 | |
| 2268 | |
| 2269 // We have all of the arguments setup at this point. We must not touch any register | |
| 2270 // argument registers at this point (what if we save/restore them there are no oop? | |
| 2271 | |
| 2272 { | |
| 2273 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2274 // protect the args we've loaded | |
| 2275 save_args(masm, total_c_args, c_arg, out_regs); | |
|
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2276 __ mov_metadata(c_rarg1, method()); |
| 0 | 2277 __ call_VM_leaf( |
| 2278 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 2279 r15_thread, c_rarg1); | |
| 2280 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2281 } | |
| 2282 | |
|
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2283 // RedefineClasses() tracing support for obsolete method entry |
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2284 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2285 // protect the args we've loaded |
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2286 save_args(masm, total_c_args, c_arg, out_regs); |
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2287 __ mov_metadata(c_rarg1, method()); |
|
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2288 __ call_VM_leaf( |
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2289 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2290 r15_thread, c_rarg1); |
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2291 restore_args(masm, total_c_args, c_arg, out_regs); |
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2292 } |
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2293 |
| 0 | 2294 // Lock a synchronized method |
| 2295 | |
| 2296 // Register definitions used by locking and unlocking | |
| 2297 | |
| 2298 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
| 2299 const Register obj_reg = rbx; // Will contain the oop | |
| 2300 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
| 2301 const Register old_hdr = r13; // value of old header at unlock time | |
| 2302 | |
| 2303 Label slow_path_lock; | |
| 2304 Label lock_done; | |
| 2305 | |
| 2306 if (method->is_synchronized()) { | |
|
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2307 assert(!is_critical_native, "unhandled"); |
| 0 | 2308 |
| 2309 | |
| 2310 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 2311 | |
| 2312 // Get the handle (the 2nd argument) | |
| 304 | 2313 __ mov(oop_handle_reg, c_rarg1); |
| 0 | 2314 |
| 2315 // Get address of the box | |
| 2316 | |
| 304 | 2317 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2318 |
| 2319 // Load the oop from the handle | |
| 304 | 2320 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2321 |
| 2322 if (UseBiasedLocking) { | |
| 2323 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
| 2324 } | |
| 2325 | |
| 2326 // Load immediate 1 into swap_reg %rax | |
| 2327 __ movl(swap_reg, 1); | |
| 2328 | |
| 2329 // Load (object->mark() | 1) into swap_reg %rax | |
| 304 | 2330 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 2331 |
| 2332 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 2333 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2334 |
| 2335 if (os::is_MP()) { | |
| 2336 __ lock(); | |
| 2337 } | |
| 2338 | |
| 2339 // src -> dest iff dest == rax else rax <- dest | |
| 304 | 2340 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 2341 __ jcc(Assembler::equal, lock_done); |
| 2342 | |
| 2343 // Hmm should this move to the slow path code area??? | |
| 2344 | |
| 2345 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 2346 // 1) (mark & 3) == 0, and | |
| 2347 // 2) rsp <= mark < mark + os::pagesize() | |
| 2348 // These 3 tests can be done by evaluating the following | |
| 2349 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 2350 // assuming both stack pointer and pagesize have their | |
| 2351 // least significant 2 bits clear. | |
| 2352 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
| 2353 | |
| 304 | 2354 __ subptr(swap_reg, rsp); |
| 2355 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 2356 |
| 2357 // Save the test result, for recursive case, the result is zero | |
| 304 | 2358 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2359 __ jcc(Assembler::notEqual, slow_path_lock); |
| 2360 | |
| 2361 // Slow path will re-enter here | |
| 2362 | |
| 2363 __ bind(lock_done); | |
| 2364 } | |
| 2365 | |
| 2366 | |
| 2367 // Finally just about ready to make the JNI call | |
| 2368 | |
| 2369 | |
| 2370 // get JNIEnv* which is first argument to native | |
|
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2371 if (!is_critical_native) { |
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2372 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2373 } |
| 0 | 2374 |
| 2375 // Now set thread in native | |
| 304 | 2376 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
| 0 | 2377 |
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2378 __ call(RuntimeAddress(native_func)); |
| 0 | 2379 |
|
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2380 // Verify or restore cpu control state after JNI call |
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2381 __ restore_cpu_control_state_after_jni(); |
| 0 | 2382 |
| 2383 // Unpack native results. | |
| 2384 switch (ret_type) { | |
| 2385 case T_BOOLEAN: __ c2bool(rax); break; | |
| 2386 case T_CHAR : __ movzwl(rax, rax); break; | |
| 2387 case T_BYTE : __ sign_extend_byte (rax); break; | |
| 2388 case T_SHORT : __ sign_extend_short(rax); break; | |
| 2389 case T_INT : /* nothing to do */ break; | |
| 2390 case T_DOUBLE : | |
| 2391 case T_FLOAT : | |
| 2392 // Result is in xmm0 we'll save as needed | |
| 2393 break; | |
| 2394 case T_ARRAY: // Really a handle | |
| 2395 case T_OBJECT: // Really a handle | |
| 2396 break; // can't de-handlize until after safepoint check | |
| 2397 case T_VOID: break; | |
| 2398 case T_LONG: break; | |
| 2399 default : ShouldNotReachHere(); | |
| 2400 } | |
| 2401 | |
| 2402 // Switch thread to "native transition" state before reading the synchronization state. | |
| 2403 // This additional state is necessary because reading and testing the synchronization | |
| 2404 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 2405 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 2406 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 2407 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 2408 // didn't see any synchronization is progress, and escapes. | |
| 304 | 2409 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
| 0 | 2410 |
| 2411 if(os::is_MP()) { | |
| 2412 if (UseMembar) { | |
| 2413 // Force this write out before the read below | |
| 2414 __ membar(Assembler::Membar_mask_bits( | |
| 2415 Assembler::LoadLoad | Assembler::LoadStore | | |
| 2416 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 2417 } else { | |
| 2418 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 2419 // We use the current thread pointer to calculate a thread specific | |
| 2420 // offset to write to within the page. This minimizes bus traffic | |
| 2421 // due to cache line collision. | |
| 2422 __ serialize_memory(r15_thread, rcx); | |
| 2423 } | |
| 2424 } | |
| 2425 | |
|
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2426 Label after_transition; |
| 0 | 2427 |
| 2428 // check for safepoint operation in progress and/or pending suspend requests | |
| 2429 { | |
| 2430 Label Continue; | |
| 2431 | |
| 2432 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 2433 SafepointSynchronize::_not_synchronized); | |
| 2434 | |
| 2435 Label L; | |
| 2436 __ jcc(Assembler::notEqual, L); | |
| 2437 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
| 2438 __ jcc(Assembler::equal, Continue); | |
| 2439 __ bind(L); | |
| 2440 | |
| 2441 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 2442 // and never return here preventing us from clearing _last_native_pc down below. | |
| 2443 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 2444 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 2445 // by hand. | |
| 2446 // | |
| 2447 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2448 __ mov(c_rarg0, r15_thread); |
| 2449 __ mov(r12, rsp); // remember sp | |
| 2450 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2451 __ andptr(rsp, -16); // align stack as required by ABI | |
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2452 if (!is_critical_native) { |
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2453 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2454 } else { |
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2455 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2456 } |
| 304 | 2457 __ mov(rsp, r12); // restore sp |
|
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|
2458 __ reinit_heapbase(); |
| 0 | 2459 // Restore any method result value |
| 2460 restore_native_result(masm, ret_type, stack_slots); | |
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2461 |
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2462 if (is_critical_native) { |
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2463 // The call above performed the transition to thread_in_Java so |
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2464 // skip the transition logic below. |
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2465 __ jmpb(after_transition); |
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2466 } |
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|
2467 |
| 0 | 2468 __ bind(Continue); |
| 2469 } | |
| 2470 | |
| 2471 // change thread state | |
| 2472 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
|
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2473 __ bind(after_transition); |
| 0 | 2474 |
| 2475 Label reguard; | |
| 2476 Label reguard_done; | |
| 2477 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 2478 __ jcc(Assembler::equal, reguard); | |
| 2479 __ bind(reguard_done); | |
| 2480 | |
| 2481 // native result if any is live | |
| 2482 | |
| 2483 // Unlock | |
| 2484 Label unlock_done; | |
| 2485 Label slow_path_unlock; | |
| 2486 if (method->is_synchronized()) { | |
| 2487 | |
| 2488 // Get locked oop from the handle we passed to jni | |
| 304 | 2489 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2490 |
| 2491 Label done; | |
| 2492 | |
| 2493 if (UseBiasedLocking) { | |
| 2494 __ biased_locking_exit(obj_reg, old_hdr, done); | |
| 2495 } | |
| 2496 | |
| 2497 // Simple recursive lock? | |
| 2498 | |
| 304 | 2499 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
| 0 | 2500 __ jcc(Assembler::equal, done); |
| 2501 | |
| 2502 // Must save rax if if it is live now because cmpxchg must use it | |
| 2503 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2504 save_native_result(masm, ret_type, stack_slots); | |
| 2505 } | |
| 2506 | |
| 2507 | |
| 2508 // get address of the stack lock | |
| 304 | 2509 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2510 // get old displaced header |
| 304 | 2511 __ movptr(old_hdr, Address(rax, 0)); |
| 0 | 2512 |
| 2513 // Atomic swap old header if oop still contains the stack lock | |
| 2514 if (os::is_MP()) { | |
| 2515 __ lock(); | |
| 2516 } | |
| 304 | 2517 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
| 0 | 2518 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 2519 | |
| 2520 // slow path re-enters here | |
| 2521 __ bind(unlock_done); | |
| 2522 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2523 restore_native_result(masm, ret_type, stack_slots); | |
| 2524 } | |
| 2525 | |
| 2526 __ bind(done); | |
| 2527 | |
| 2528 } | |
| 2529 { | |
| 2530 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2531 save_native_result(masm, ret_type, stack_slots); | |
|
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2532 __ mov_metadata(c_rarg1, method()); |
| 0 | 2533 __ call_VM_leaf( |
| 2534 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 2535 r15_thread, c_rarg1); | |
| 2536 restore_native_result(masm, ret_type, stack_slots); | |
| 2537 } | |
| 2538 | |
| 2539 __ reset_last_Java_frame(false, true); | |
| 2540 | |
| 2541 // Unpack oop result | |
| 2542 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 2543 Label L; | |
| 304 | 2544 __ testptr(rax, rax); |
| 0 | 2545 __ jcc(Assembler::zero, L); |
| 304 | 2546 __ movptr(rax, Address(rax, 0)); |
| 0 | 2547 __ bind(L); |
| 2548 __ verify_oop(rax); | |
| 2549 } | |
| 2550 | |
|
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2551 if (!is_critical_native) { |
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2552 // reset handle block |
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2553 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2554 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2555 } |
| 0 | 2556 |
| 2557 // pop our frame | |
| 2558 | |
| 2559 __ leave(); | |
| 2560 | |
|
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2561 if (!is_critical_native) { |
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2562 // Any exception pending? |
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2563 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2564 __ jcc(Assembler::notEqual, exception_pending); |
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2565 } |
| 0 | 2566 |
| 2567 // Return | |
| 2568 | |
| 2569 __ ret(0); | |
| 2570 | |
| 2571 // Unexpected paths are out of line and go here | |
| 2572 | |
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2573 if (!is_critical_native) { |
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2574 // forward the exception |
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2575 __ bind(exception_pending); |
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2576 |
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2577 // and forward the exception |
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2578 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2579 } |
| 0 | 2580 |
| 2581 // Slow path locking & unlocking | |
| 2582 if (method->is_synchronized()) { | |
| 2583 | |
| 2584 // BEGIN Slow path lock | |
| 2585 __ bind(slow_path_lock); | |
| 2586 | |
| 2587 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 2588 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 2589 | |
| 2590 // protect the args we've loaded | |
| 2591 save_args(masm, total_c_args, c_arg, out_regs); | |
| 2592 | |
| 304 | 2593 __ mov(c_rarg0, obj_reg); |
| 2594 __ mov(c_rarg1, lock_reg); | |
| 2595 __ mov(c_rarg2, r15_thread); | |
| 0 | 2596 |
| 2597 // Not a leaf but we have last_Java_frame setup as we want | |
| 2598 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
| 2599 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2600 | |
| 2601 #ifdef ASSERT | |
| 2602 { Label L; | |
| 304 | 2603 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 2604 __ jcc(Assembler::equal, L); |
| 2605 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 2606 __ bind(L); | |
| 2607 } | |
| 2608 #endif | |
| 2609 __ jmp(lock_done); | |
| 2610 | |
| 2611 // END Slow path lock | |
| 2612 | |
| 2613 // BEGIN Slow path unlock | |
| 2614 __ bind(slow_path_unlock); | |
| 2615 | |
| 2616 // If we haven't already saved the native result we must save it now as xmm registers | |
| 2617 // are still exposed. | |
| 2618 | |
| 2619 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2620 save_native_result(masm, ret_type, stack_slots); | |
| 2621 } | |
| 2622 | |
| 304 | 2623 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 2624 | |
| 2625 __ mov(c_rarg0, obj_reg); | |
| 2626 __ mov(r12, rsp); // remember sp | |
| 2627 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2628 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2629 |
| 2630 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 2631 // NOTE that obj_reg == rbx currently | |
| 304 | 2632 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
| 2633 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
| 0 | 2634 |
| 2635 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
| 304 | 2636 __ mov(rsp, r12); // restore sp |
|
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2637 __ reinit_heapbase(); |
| 0 | 2638 #ifdef ASSERT |
| 2639 { | |
| 2640 Label L; | |
| 304 | 2641 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 2642 __ jcc(Assembler::equal, L); |
| 2643 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 2644 __ bind(L); | |
| 2645 } | |
| 2646 #endif /* ASSERT */ | |
| 2647 | |
| 304 | 2648 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
| 0 | 2649 |
| 2650 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2651 restore_native_result(masm, ret_type, stack_slots); | |
| 2652 } | |
| 2653 __ jmp(unlock_done); | |
| 2654 | |
| 2655 // END Slow path unlock | |
| 2656 | |
| 2657 } // synchronized | |
| 2658 | |
| 2659 // SLOW PATH Reguard the stack if needed | |
| 2660 | |
| 2661 __ bind(reguard); | |
| 2662 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2663 __ mov(r12, rsp); // remember sp |
| 2664 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2665 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2666 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
| 304 | 2667 __ mov(rsp, r12); // restore sp |
|
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2668 __ reinit_heapbase(); |
| 0 | 2669 restore_native_result(masm, ret_type, stack_slots); |
| 2670 // and continue | |
| 2671 __ jmp(reguard_done); | |
| 2672 | |
| 2673 | |
| 2674 | |
| 2675 __ flush(); | |
| 2676 | |
| 2677 nmethod *nm = nmethod::new_native_nmethod(method, | |
|
2405
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2678 compile_id, |
| 0 | 2679 masm->code(), |
| 2680 vep_offset, | |
| 2681 frame_complete, | |
| 2682 stack_slots / VMRegImpl::slots_per_word, | |
| 2683 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 2684 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 2685 oop_maps); | |
|
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2686 |
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2687 if (is_critical_native) { |
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2688 nm->set_lazy_critical_native(true); |
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2689 } |
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2690 |
| 0 | 2691 return nm; |
| 2692 | |
| 2693 } | |
| 2694 | |
|
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2695 #ifdef HAVE_DTRACE_H |
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2696 // --------------------------------------------------------------------------- |
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2697 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2698 // in the Java compiled code convention, marshals them to the native |
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2699 // abi and then leaves nops at the position you would expect to call a native |
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2700 // function. When the probe is enabled the nops are replaced with a trap |
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2701 // instruction that dtrace inserts and the trace will cause a notification |
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2702 // to dtrace. |
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2703 // |
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2704 // The probes are only able to take primitive types and java/lang/String as |
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2705 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2706 // strings so that from dtrace point of view java strings are converted to C |
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2707 // strings. There is an arbitrary fixed limit on the total space that a method |
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2708 // can use for converting the strings. (256 chars per string in the signature). |
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2709 // So any java string larger then this is truncated. |
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2710 |
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2711 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2712 static bool offsets_initialized = false; |
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2713 |
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2714 |
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2715 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2716 methodHandle method) { |
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2717 |
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2718 |
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2719 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2720 // be single threaded in this method. |
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2721 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2722 |
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2723 if (!offsets_initialized) { |
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2724 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2725 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2726 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2727 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2728 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2729 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2730 |
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2731 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2732 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2733 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2734 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2735 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2736 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2737 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2738 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2739 |
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2740 offsets_initialized = true; |
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2741 } |
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2742 // Fill in the signature array, for the calling-convention call. |
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2743 int total_args_passed = method->size_of_parameters(); |
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2744 |
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2745 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2746 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2747 |
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2748 // The signature we are going to use for the trap that dtrace will see |
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2749 // java/lang/String is converted. We drop "this" and any other object |
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2750 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2751 // is converted to a two-slot long, which is why we double the allocation). |
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2752 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2753 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2754 |
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2755 int i=0; |
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2756 int total_strings = 0; |
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2757 int first_arg_to_pass = 0; |
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2758 int total_c_args = 0; |
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2759 |
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2760 // Skip the receiver as dtrace doesn't want to see it |
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2761 if( !method->is_static() ) { |
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2762 in_sig_bt[i++] = T_OBJECT; |
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2763 first_arg_to_pass = 1; |
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2764 } |
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2765 |
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2766 // We need to convert the java args to where a native (non-jni) function |
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2767 // would expect them. To figure out where they go we convert the java |
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2768 // signature to a C signature. |
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2769 |
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2770 SignatureStream ss(method->signature()); |
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2771 for ( ; !ss.at_return_type(); ss.next()) { |
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2772 BasicType bt = ss.type(); |
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2773 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2774 out_sig_bt[total_c_args++] = bt; |
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2775 if( bt == T_OBJECT) { |
|
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2776 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
|
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2777 if (s == vmSymbols::java_lang_String()) { |
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2778 total_strings++; |
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2779 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2780 } else if (s == vmSymbols::java_lang_Boolean() || |
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2781 s == vmSymbols::java_lang_Character() || |
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2782 s == vmSymbols::java_lang_Byte() || |
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2783 s == vmSymbols::java_lang_Short() || |
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2784 s == vmSymbols::java_lang_Integer() || |
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2785 s == vmSymbols::java_lang_Float()) { |
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2786 out_sig_bt[total_c_args-1] = T_INT; |
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2787 } else if (s == vmSymbols::java_lang_Long() || |
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2788 s == vmSymbols::java_lang_Double()) { |
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2789 out_sig_bt[total_c_args-1] = T_LONG; |
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2790 out_sig_bt[total_c_args++] = T_VOID; |
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2791 } |
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2792 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2793 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2794 // We convert double to long |
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2795 out_sig_bt[total_c_args-1] = T_LONG; |
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2796 out_sig_bt[total_c_args++] = T_VOID; |
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2797 } else if ( bt == T_FLOAT) { |
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2798 // We convert float to int |
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2799 out_sig_bt[total_c_args-1] = T_INT; |
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2800 } |
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2801 } |
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2802 |
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2803 assert(i==total_args_passed, "validly parsed signature"); |
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2804 |
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2805 // Now get the compiled-Java layout as input arguments |
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2806 int comp_args_on_stack; |
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2807 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2808 in_sig_bt, in_regs, total_args_passed, false); |
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2809 |
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2810 // Now figure out where the args must be stored and how much stack space |
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2811 // they require (neglecting out_preserve_stack_slots but space for storing |
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2812 // the 1st six register arguments). It's weird see int_stk_helper. |
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2813 |
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2814 int out_arg_slots; |
| 14909 | 2815 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
|
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2816 |
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2817 // Calculate the total number of stack slots we will need. |
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2818 |
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2819 // First count the abi requirement plus all of the outgoing args |
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2820 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2821 |
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2822 // Now space for the string(s) we must convert |
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2823 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2824 for (i = 0; i < total_strings ; i++) { |
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2825 string_locs[i] = stack_slots; |
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2826 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2827 } |
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2828 |
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2829 // Plus the temps we might need to juggle register args |
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2830 // regs take two slots each |
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2831 stack_slots += (Argument::n_int_register_parameters_c + |
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2832 Argument::n_float_register_parameters_c) * 2; |
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2833 |
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2834 |
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2835 // + 4 for return address (which we own) and saved rbp, |
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2836 |
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2837 stack_slots += 4; |
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2838 |
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2839 // Ok The space we have allocated will look like: |
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2840 // |
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2841 // |
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2842 // FP-> | | |
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2843 // |---------------------| |
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2844 // | string[n] | |
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2845 // |---------------------| <- string_locs[n] |
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2846 // | string[n-1] | |
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2847 // |---------------------| <- string_locs[n-1] |
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2848 // | ... | |
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2849 // | ... | |
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2850 // |---------------------| <- string_locs[1] |
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2851 // | string[0] | |
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2852 // |---------------------| <- string_locs[0] |
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2853 // | outbound memory | |
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2854 // | based arguments | |
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2855 // | | |
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2856 // |---------------------| |
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2857 // | | |
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2858 // SP-> | out_preserved_slots | |
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2859 // |
|
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2860 // |
|
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2861 |
|
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2862 // Now compute actual number of stack words we need rounding to make |
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2863 // stack properly aligned. |
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2864 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2865 |
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2866 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2867 |
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2868 intptr_t start = (intptr_t)__ pc(); |
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2869 |
|
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2870 // First thing make an ic check to see if we should even be here |
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2871 |
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2872 // We are free to use all registers as temps without saving them and |
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2873 // restoring them except rbp. rbp, is the only callee save register |
|
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2874 // as far as the interpreter and the compiler(s) are concerned. |
|
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2875 |
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2876 const Register ic_reg = rax; |
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2877 const Register receiver = rcx; |
|
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2878 Label hit; |
|
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2879 Label exception_pending; |
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2880 |
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2881 |
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2882 __ verify_oop(receiver); |
|
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2883 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
|
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2884 __ jcc(Assembler::equal, hit); |
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2885 |
|
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2886 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
|
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2887 |
|
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2888 // verified entry must be aligned for code patching. |
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2889 // and the first 5 bytes must be in the same cache line |
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2890 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2891 __ align(8); |
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2892 |
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2893 __ bind(hit); |
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2894 |
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2895 int vep_offset = ((intptr_t)__ pc()) - start; |
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2896 |
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2897 |
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2898 // The instruction at the verified entry point must be 5 bytes or longer |
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2899 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2900 // instruction fits that requirement. |
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2901 |
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2902 // Generate stack overflow check |
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2903 |
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2904 if (UseStackBanging) { |
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2905 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2906 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2907 } else { |
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2908 __ movl(rax, stack_size); |
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2909 __ bang_stack_size(rax, rbx); |
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2910 } |
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2911 } else { |
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2912 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2913 __ fat_nop(); |
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2914 } |
|
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2915 |
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2916 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2917 "valid size for make_non_entrant"); |
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2918 |
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2919 // Generate a new frame for the wrapper. |
|
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2920 __ enter(); |
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2921 |
|
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2922 // -4 because return address is already present and so is saved rbp, |
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2923 if (stack_size - 2*wordSize != 0) { |
|
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2924 __ subq(rsp, stack_size - 2*wordSize); |
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2925 } |
|
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2926 |
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2927 // Frame is now completed as far a size and linkage. |
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2928 |
|
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2929 int frame_complete = ((intptr_t)__ pc()) - start; |
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2930 |
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2931 int c_arg, j_arg; |
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2932 |
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2933 // State of input register args |
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2934 |
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2935 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2936 |
|
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2937 live[j_rarg0->as_VMReg()->value()] = false; |
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2938 live[j_rarg1->as_VMReg()->value()] = false; |
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2939 live[j_rarg2->as_VMReg()->value()] = false; |
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2940 live[j_rarg3->as_VMReg()->value()] = false; |
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2941 live[j_rarg4->as_VMReg()->value()] = false; |
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2942 live[j_rarg5->as_VMReg()->value()] = false; |
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2943 |
|
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2944 live[j_farg0->as_VMReg()->value()] = false; |
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2945 live[j_farg1->as_VMReg()->value()] = false; |
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2946 live[j_farg2->as_VMReg()->value()] = false; |
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2947 live[j_farg3->as_VMReg()->value()] = false; |
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2948 live[j_farg4->as_VMReg()->value()] = false; |
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2949 live[j_farg5->as_VMReg()->value()] = false; |
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2950 live[j_farg6->as_VMReg()->value()] = false; |
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2951 live[j_farg7->as_VMReg()->value()] = false; |
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2952 |
|
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2953 |
|
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2954 bool rax_is_zero = false; |
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2955 |
|
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2956 // All args (except strings) destined for the stack are moved first |
|
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2957 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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2958 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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2959 VMRegPair src = in_regs[j_arg]; |
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2960 VMRegPair dst = out_regs[c_arg]; |
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2961 |
|
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2962 // Get the real reg value or a dummy (rsp) |
|
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2963 |
|
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2964 int src_reg = src.first()->is_reg() ? |
|
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2965 src.first()->value() : |
|
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2966 rsp->as_VMReg()->value(); |
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2967 |
|
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2968 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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2969 (in_sig_bt[j_arg] == T_OBJECT && |
|
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2970 out_sig_bt[c_arg] != T_INT && |
|
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2971 out_sig_bt[c_arg] != T_ADDRESS && |
|
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2972 out_sig_bt[c_arg] != T_LONG); |
|
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2973 |
|
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2974 live[src_reg] = !useless; |
|
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2975 |
|
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2976 if (dst.first()->is_stack()) { |
|
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2977 |
|
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|
2978 // Even though a string arg in a register is still live after this loop |
|
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2979 // after the string conversion loop (next) it will be dead so we take |
|
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2980 // advantage of that now for simpler code to manage live. |
|
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2981 |
|
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|
2982 live[src_reg] = false; |
|
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2983 switch (in_sig_bt[j_arg]) { |
|
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2984 |
|
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2985 case T_ARRAY: |
|
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2986 case T_OBJECT: |
|
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2987 { |
|
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2988 Address stack_dst(rsp, reg2offset_out(dst.first())); |
|
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2989 |
|
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2990 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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2991 // need to unbox a one-word value |
|
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2992 Register in_reg = rax; |
|
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2993 if ( src.first()->is_reg() ) { |
|
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2994 in_reg = src.first()->as_Register(); |
|
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2995 } else { |
|
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2996 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
|
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2997 rax_is_zero = false; |
|
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2998 } |
|
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2999 Label skipUnbox; |
|
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3000 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
|
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3001 (int32_t)NULL_WORD); |
|
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|
3002 __ testq(in_reg, in_reg); |
|
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diff
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|
3003 __ jcc(Assembler::zero, skipUnbox); |
|
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113
diff
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|
3004 |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
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116
diff
changeset
|
3005 BasicType bt = out_sig_bt[c_arg]; |
|
437d03ea40b1
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kvn
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116
diff
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|
3006 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
116
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|
3007 Address src1(in_reg, box_offset); |
|
165
437d03ea40b1
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diff
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|
3008 if ( bt == T_LONG ) { |
|
116
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|
3009 __ movq(in_reg, src1); |
|
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diff
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|
3010 __ movq(stack_dst, in_reg); |
|
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|
3011 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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|
3012 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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|
3013 } else { |
|
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|
3014 __ movl(in_reg, src1); |
|
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kamg
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diff
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|
3015 __ movl(stack_dst, in_reg); |
|
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kamg
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113
diff
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|
3016 } |
|
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kamg
parents:
113
diff
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|
3017 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3018 __ bind(skipUnbox); |
|
018d5b58dd4f
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kamg
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113
diff
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|
3019 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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|
3020 // Convert the arg to NULL |
|
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113
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|
3021 if (!rax_is_zero) { |
|
018d5b58dd4f
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113
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|
3022 __ xorq(rax, rax); |
|
018d5b58dd4f
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kamg
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|
3023 rax_is_zero = true; |
|
018d5b58dd4f
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kamg
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113
diff
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|
3024 } |
|
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kamg
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113
diff
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|
3025 __ movq(stack_dst, rax); |
|
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kamg
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diff
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|
3026 } |
|
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kamg
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113
diff
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|
3027 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3028 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3029 |
|
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113
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|
3030 case T_VOID: |
|
018d5b58dd4f
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kamg
parents:
113
diff
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|
3031 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3032 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3033 case T_FLOAT: |
|
018d5b58dd4f
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kamg
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113
diff
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|
3034 // This does the right thing since we know it is destined for the |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3035 // stack |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3036 float_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3037 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3038 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3039 case T_DOUBLE: |
|
018d5b58dd4f
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kamg
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113
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|
3040 // This does the right thing since we know it is destined for the |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3041 // stack |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3042 double_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3043 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3044 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3045 case T_LONG : |
|
018d5b58dd4f
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kamg
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113
diff
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|
3046 long_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3047 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3048 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3049 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3050 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3051 default: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3052 move32_64(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3053 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3054 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3055 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3056 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3057 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3058 // If we have any strings we must store any register based arg to the stack |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3059 // This includes any still live xmm registers too. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3060 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3061 int sid = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3062 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3063 if (total_strings > 0 ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3064 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3065 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3066 VMRegPair src = in_regs[j_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3067 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3068 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3069 if (src.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3070 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3071 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3072 // string oops were left untouched by the previous loop even if the |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3073 // eventual (converted) arg is destined for the stack so park them |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3074 // away now (except for first) |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3075 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3076 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3077 Address utf8_addr = Address( |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3078 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3079 if (sid != 1) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3080 // The first string arg won't be killed until after the utf8 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3081 // conversion |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3082 __ movq(utf8_addr, src.first()->as_Register()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3083 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3084 } else if (dst.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3085 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3086 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3087 // Convert the xmm register to an int and store it in the reserved |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3088 // location for the eventual c register arg |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3089 XMMRegister f = src.first()->as_XMMRegister(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3090 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3091 __ movflt(src_tmp, f); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3092 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3093 __ movdbl(src_tmp, f); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3094 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3095 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3096 // If the arg is an oop type we don't support don't bother to store |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3097 // it remember string was handled above. |
|
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kamg
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113
diff
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|
3098 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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kamg
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113
diff
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|
3099 (in_sig_bt[j_arg] == T_OBJECT && |
|
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kamg
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113
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|
3100 out_sig_bt[c_arg] != T_INT && |
|
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|
3101 out_sig_bt[c_arg] != T_LONG); |
|
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kamg
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113
diff
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|
3102 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3103 if (!useless) { |
|
018d5b58dd4f
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|
3104 __ movq(src_tmp, src.first()->as_Register()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3105 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3106 } |
|
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3107 } |
|
018d5b58dd4f
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kamg
parents:
113
diff
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|
3108 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3109 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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|
3110 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
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|
3111 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
018d5b58dd4f
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kamg
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113
diff
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|
3112 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3113 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3114 |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3115 // Now that the volatile registers are safe, convert all the strings |
|
018d5b58dd4f
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kamg
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diff
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|
3116 sid = 0; |
|
018d5b58dd4f
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kamg
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|
3117 |
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3118 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3119 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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3120 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
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3121 // It's a string |
|
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3122 Address utf8_addr = Address( |
|
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3123 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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3124 // The first string we find might still be in the original java arg |
|
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3125 // register |
|
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3126 |
|
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3127 VMReg src = in_regs[j_arg].first(); |
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3128 |
|
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3129 // We will need to eventually save the final argument to the trap |
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3130 // in the von-volatile location dedicated to src. This is the offset |
|
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3131 // from fp we will use. |
|
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3132 int src_off = src->is_reg() ? |
|
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3133 fp_offset[src->value()] : reg2offset_in(src); |
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3134 |
|
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3135 // This is where the argument will eventually reside |
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3136 VMRegPair dst = out_regs[c_arg]; |
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3137 |
|
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3138 if (src->is_reg()) { |
|
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3139 if (sid == 1) { |
|
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3140 __ movq(c_rarg0, src->as_Register()); |
|
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3141 } else { |
|
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3142 __ movq(c_rarg0, utf8_addr); |
|
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3143 } |
|
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3144 } else { |
|
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3145 // arg is still in the original location |
|
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3146 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
|
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3147 } |
|
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3148 Label done, convert; |
|
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|
3149 |
|
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3150 // see if the oop is NULL |
|
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3151 __ testq(c_rarg0, c_rarg0); |
|
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3152 __ jcc(Assembler::notEqual, convert); |
|
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|
3153 |
|
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|
3154 if (dst.first()->is_reg()) { |
|
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3155 // Save the ptr to utf string in the origina src loc or the tmp |
|
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3156 // dedicated to it |
|
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|
3157 __ movq(Address(rbp, src_off), c_rarg0); |
|
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|
3158 } else { |
|
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3159 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
|
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|
3160 } |
|
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|
3161 __ jmp(done); |
|
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|
3162 |
|
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|
3163 __ bind(convert); |
|
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|
3164 |
|
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|
3165 __ lea(c_rarg1, utf8_addr); |
|
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3166 if (dst.first()->is_reg()) { |
|
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3167 __ movq(Address(rbp, src_off), c_rarg1); |
|
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|
3168 } else { |
|
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3169 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
|
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|
3170 } |
|
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|
3171 // And do the conversion |
|
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|
3172 __ call(RuntimeAddress( |
|
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|
3173 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
|
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|
3174 |
|
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|
3175 __ bind(done); |
|
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|
3176 } |
|
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|
3177 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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|
3178 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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|
3179 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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|
3180 } |
|
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|
3181 } |
|
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|
3182 // The get_utf call killed all the c_arg registers |
|
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|
3183 live[c_rarg0->as_VMReg()->value()] = false; |
|
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|
3184 live[c_rarg1->as_VMReg()->value()] = false; |
|
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|
3185 live[c_rarg2->as_VMReg()->value()] = false; |
|
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|
3186 live[c_rarg3->as_VMReg()->value()] = false; |
|
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|
3187 live[c_rarg4->as_VMReg()->value()] = false; |
|
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|
3188 live[c_rarg5->as_VMReg()->value()] = false; |
|
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|
3189 |
|
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|
3190 live[c_farg0->as_VMReg()->value()] = false; |
|
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|
3191 live[c_farg1->as_VMReg()->value()] = false; |
|
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|
3192 live[c_farg2->as_VMReg()->value()] = false; |
|
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|
3193 live[c_farg3->as_VMReg()->value()] = false; |
|
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|
3194 live[c_farg4->as_VMReg()->value()] = false; |
|
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|
3195 live[c_farg5->as_VMReg()->value()] = false; |
|
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3196 live[c_farg6->as_VMReg()->value()] = false; |
|
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3197 live[c_farg7->as_VMReg()->value()] = false; |
|
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|
3198 } |
|
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|
3199 |
|
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|
3200 // Now we can finally move the register args to their desired locations |
|
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|
3201 |
|
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|
3202 rax_is_zero = false; |
|
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|
3203 |
|
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|
3204 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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3205 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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|
3206 |
|
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|
3207 VMRegPair src = in_regs[j_arg]; |
|
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3208 VMRegPair dst = out_regs[c_arg]; |
|
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|
3209 |
|
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|
3210 // Only need to look for args destined for the interger registers (since we |
|
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3211 // convert float/double args to look like int/long outbound) |
|
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3212 if (dst.first()->is_reg()) { |
|
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3213 Register r = dst.first()->as_Register(); |
|
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3214 |
|
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3215 // Check if the java arg is unsupported and thereofre useless |
|
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3216 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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3217 (in_sig_bt[j_arg] == T_OBJECT && |
|
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3218 out_sig_bt[c_arg] != T_INT && |
|
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3219 out_sig_bt[c_arg] != T_ADDRESS && |
|
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3220 out_sig_bt[c_arg] != T_LONG); |
|
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3221 |
|
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|
3222 |
|
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3223 // If we're going to kill an existing arg save it first |
|
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3224 if (live[dst.first()->value()]) { |
|
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3225 // you can't kill yourself |
|
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3226 if (src.first() != dst.first()) { |
|
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3227 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
|
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3228 } |
|
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3229 } |
|
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3230 if (src.first()->is_reg()) { |
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3231 if (live[src.first()->value()] ) { |
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3232 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3233 __ movdl(r, src.first()->as_XMMRegister()); |
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3234 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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3235 __ movdq(r, src.first()->as_XMMRegister()); |
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3236 } else if (r != src.first()->as_Register()) { |
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3237 if (!useless) { |
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3238 __ movq(r, src.first()->as_Register()); |
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3239 } |
|
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3240 } |
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3241 } else { |
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3242 // If the arg is an oop type we don't support don't bother to store |
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3243 // it |
|
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3244 if (!useless) { |
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3245 if (in_sig_bt[j_arg] == T_DOUBLE || |
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3246 in_sig_bt[j_arg] == T_LONG || |
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3247 in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3248 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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3249 } else { |
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3250 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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3251 } |
|
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3252 } |
|
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3253 } |
|
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3254 live[src.first()->value()] = false; |
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3255 } else if (!useless) { |
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3256 // full sized move even for int should be ok |
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3257 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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3258 } |
|
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3259 |
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3260 // At this point r has the original java arg in the final location |
|
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3261 // (assuming it wasn't useless). If the java arg was an oop |
|
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3262 // we have a bit more to do |
|
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3263 |
|
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3264 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3265 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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3266 // need to unbox a one-word value |
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3267 Label skip; |
|
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3268 __ testq(r, r); |
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3269 __ jcc(Assembler::equal, skip); |
|
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3270 BasicType bt = out_sig_bt[c_arg]; |
|
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3271 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
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3272 Address src1(r, box_offset); |
|
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3273 if ( bt == T_LONG ) { |
|
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3274 __ movq(r, src1); |
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3275 } else { |
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3276 __ movl(r, src1); |
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3277 } |
|
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3278 __ bind(skip); |
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3279 |
|
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3280 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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3281 // Convert the arg to NULL |
|
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3282 __ xorq(r, r); |
|
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3283 } |
|
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3284 } |
|
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3285 |
|
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3286 // dst can longer be holding an input value |
|
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3287 live[dst.first()->value()] = false; |
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3288 } |
|
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3289 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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3290 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3291 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3292 } |
|
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3293 } |
|
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3294 |
|
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3295 |
|
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3296 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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3297 // patch in the trap |
|
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3298 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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3299 |
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3300 __ nop(); |
|
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3301 |
|
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3302 |
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3303 // Return |
|
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3304 |
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3305 __ leave(); |
|
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3306 __ ret(0); |
|
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3307 |
|
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|
3308 __ flush(); |
|
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3309 |
|
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3310 nmethod *nm = nmethod::new_dtrace_nmethod( |
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3311 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3312 stack_slots / VMRegImpl::slots_per_word); |
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3313 return nm; |
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3314 |
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3315 } |
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3316 |
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3317 #endif // HAVE_DTRACE_H |
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3318 |
| 0 | 3319 // this function returns the adjust size (in number of words) to a c2i adapter |
| 3320 // activation for use during deoptimization | |
| 3321 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 3322 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 3323 } |
| 3324 | |
| 3325 | |
| 3326 uint SharedRuntime::out_preserve_stack_slots() { | |
| 3327 return 0; | |
| 3328 } | |
| 3329 | |
| 3330 //------------------------------generate_deopt_blob---------------------------- | |
| 3331 void SharedRuntime::generate_deopt_blob() { | |
| 3332 // Allocate space for the code | |
| 3333 ResourceMark rm; | |
| 3334 // Setup code generation tools | |
| 3335 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
| 3336 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3337 int frame_size_in_words; | |
| 3338 OopMap* map = NULL; | |
| 3339 OopMapSet *oop_maps = new OopMapSet(); | |
| 3340 | |
| 3341 // ------------- | |
| 3342 // This code enters when returning to a de-optimized nmethod. A return | |
| 3343 // address has been pushed on the the stack, and return values are in | |
| 3344 // registers. | |
| 3345 // If we are doing a normal deopt then we were called from the patched | |
| 3346 // nmethod from the point we returned to the nmethod. So the return | |
| 3347 // address on the stack is wrong by NativeCall::instruction_size | |
| 3348 // We will adjust the value so it looks like we have the original return | |
| 3349 // address on the stack (like when we eagerly deoptimized). | |
| 3350 // In the case of an exception pending when deoptimizing, we enter | |
| 3351 // with a return address on the stack that points after the call we patched | |
| 3352 // into the exception handler. We have the following register state from, | |
| 3353 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
| 3354 // rax: exception oop | |
| 3355 // rbx: exception handler | |
| 3356 // rdx: throwing pc | |
| 3357 // So in this case we simply jam rdx into the useless return address and | |
| 3358 // the stack looks just like we want. | |
| 3359 // | |
| 3360 // At this point we need to de-opt. We save the argument return | |
| 3361 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 3362 // routine captures the return values and returns a structure which | |
| 3363 // describes the current frame size and the sizes of all replacement frames. | |
| 3364 // The current frame is compiled code and may contain many inlined | |
| 3365 // functions, each with their own JVM state. We pop the current frame, then | |
| 3366 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 3367 // populate these frames. Finally unpack_frames() returns us the new target | |
| 3368 // address. Notice that callee-save registers are BLOWN here; they have | |
| 3369 // already been captured in the vframeArray at the time the return PC was | |
| 3370 // patched. | |
| 3371 address start = __ pc(); | |
| 3372 Label cont; | |
| 3373 | |
| 3374 // Prolog for non exception case! | |
| 3375 | |
| 3376 // Save everything in sight. | |
| 3377 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3378 | |
| 3379 // Normal deoptimization. Save exec mode for unpack_frames. | |
|
113
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diff
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|
3380 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
| 0 | 3381 __ jmp(cont); |
| 304 | 3382 |
| 3383 int reexecute_offset = __ pc() - start; | |
|
14124
7ad529321294
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|
3384 #if defined(COMPILERGRAAL) && !defined(COMPILER1) |
|
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|
3385 // Graal does not use this kind of deoptimization |
|
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|
3386 __ should_not_reach_here(); |
|
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|
3387 #endif |
| 304 | 3388 |
| 3389 // Reexecute case | |
| 3390 // return address is the pc describes what bci to do re-execute at | |
| 3391 | |
| 3392 // No need to update map as each call to save_live_registers will produce identical oopmap | |
| 3393 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3394 | |
| 3395 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
| 3396 __ jmp(cont); | |
| 3397 | |
|
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|
3398 #ifdef GRAAL |
|
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|
3399 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
| 15104 | 3400 |
| 10409 | 3401 __ pushptr(Address(r15_thread, in_bytes(JavaThread::graal_implicit_exception_pc_offset()))); |
|
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minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
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8883
diff
changeset
|
3402 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3403 // Save everything in sight. |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3404 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3405 // fetch_unroll_info needs to call last_java_frame() |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3406 __ set_last_Java_frame(noreg, noreg, NULL); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3407 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3408 __ movl(c_rarg1, Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset()))); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3409 __ movl(Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())), -1); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3410 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3411 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3412 __ mov(c_rarg0, r15_thread); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3413 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3414 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3415 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3416 __ reset_last_Java_frame(false, false); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3417 |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3418 Label after_fetch_unroll_info_call; |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3419 __ jmp(after_fetch_unroll_info_call); |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3420 #endif // GRAAL |
|
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3421 |
| 0 | 3422 int exception_offset = __ pc() - start; |
| 3423 | |
| 3424 // Prolog for exception case | |
| 3425 | |
| 304 | 3426 // all registers are dead at this entry point, except for rax, and |
| 3427 // rdx which contain the exception oop and exception pc | |
| 3428 // respectively. Set them in TLS and fall thru to the | |
| 3429 // unpack_with_exception_in_tls entry point. | |
| 3430 | |
| 3431 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 3432 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
| 3433 | |
| 3434 int exception_in_tls_offset = __ pc() - start; | |
| 3435 | |
| 3436 // new implementation because exception oop is now passed in JavaThread | |
| 3437 | |
| 3438 // Prolog for exception case | |
| 3439 // All registers must be preserved because they might be used by LinearScan | |
| 3440 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 3441 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 3442 // args are on the stack, no return address) | |
| 3443 | |
| 3444 // make room on stack for the return address | |
| 3445 // It will be patched later with the throwing pc. The correct value is not | |
| 3446 // available now because loading it from memory would destroy registers. | |
| 3447 __ push(0); | |
| 0 | 3448 |
| 3449 // Save everything in sight. | |
| 3450 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3451 | |
| 304 | 3452 // Now it is safe to overwrite any register |
| 3453 | |
| 0 | 3454 // Deopt during an exception. Save exec mode for unpack_frames. |
|
113
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6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
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parents:
0
diff
changeset
|
3455 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
| 0 | 3456 |
| 304 | 3457 // load throwing pc from JavaThread and patch it as the return address |
| 3458 // of the current frame. Then clear the field in JavaThread | |
| 3459 | |
| 3460 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3461 __ movptr(Address(rbp, wordSize), rdx); | |
| 3462 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3463 | |
| 3464 #ifdef ASSERT | |
| 3465 // verify that there is really an exception oop in JavaThread | |
| 3466 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3467 __ verify_oop(rax); | |
| 3468 | |
| 3469 // verify that there is no pending exception | |
| 3470 Label no_pending_exception; | |
| 3471 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
| 3472 __ testptr(rax, rax); | |
| 3473 __ jcc(Assembler::zero, no_pending_exception); | |
| 3474 __ stop("must not have pending exception here"); | |
| 3475 __ bind(no_pending_exception); | |
| 3476 #endif | |
| 3477 | |
| 0 | 3478 __ bind(cont); |
| 3479 | |
| 3480 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 3481 // crud. We cannot block on this call, no GC can happen. | |
| 3482 // | |
| 3483 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
| 3484 | |
| 3485 // fetch_unroll_info needs to call last_java_frame(). | |
| 3486 | |
| 3487 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3488 #ifdef ASSERT | |
| 3489 { Label L; | |
| 304 | 3490 __ cmpptr(Address(r15_thread, |
| 0 | 3491 JavaThread::last_Java_fp_offset()), |
| 304 | 3492 (int32_t)0); |
| 0 | 3493 __ jcc(Assembler::equal, L); |
| 3494 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
| 3495 __ bind(L); | |
| 3496 } | |
| 3497 #endif // ASSERT | |
| 304 | 3498 __ mov(c_rarg0, r15_thread); |
| 0 | 3499 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
| 3500 | |
| 3501 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 3502 // find any register it might need. | |
| 3503 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3504 | |
| 3505 __ reset_last_Java_frame(false, false); | |
| 3506 | |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3507 #ifdef GRAAL |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3508 __ bind(after_fetch_unroll_info_call); |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3509 #endif |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3510 |
| 0 | 3511 // Load UnrollBlock* into rdi |
| 304 | 3512 __ mov(rdi, rax); |
| 3513 | |
| 3514 Label noException; | |
|
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
3515 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
| 304 | 3516 __ jcc(Assembler::notEqual, noException); |
| 3517 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3518 // QQQ this is useless it was NULL above | |
| 3519 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3520 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
| 3521 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3522 | |
| 3523 __ verify_oop(rax); | |
| 3524 | |
| 3525 // Overwrite the result registers with the exception results. | |
| 3526 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 3527 // I think this is useless | |
| 3528 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
| 3529 | |
| 3530 __ bind(noException); | |
| 0 | 3531 |
| 3532 // Only register save data is on the stack. | |
| 3533 // Now restore the result registers. Everything else is either dead | |
| 3534 // or captured in the vframeArray. | |
| 3535 RegisterSaver::restore_result_registers(masm); | |
| 3536 | |
| 3537 // All of the register save area has been popped of the stack. Only the | |
| 3538 // return address remains. | |
| 3539 | |
| 3540 // Pop all the frames we must move/replace. | |
| 3541 // | |
| 3542 // Frame picture (youngest to oldest) | |
| 3543 // 1: self-frame (no frame link) | |
| 3544 // 2: deopting frame (no frame link) | |
| 3545 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3546 // | |
| 3547 // Note: by leaving the return address of self-frame on the stack | |
| 3548 // and using the size of frame 2 to adjust the stack | |
| 3549 // when we are done the return to frame 3 will still be on the stack. | |
| 3550 | |
| 3551 // Pop deoptimized frame | |
| 3552 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3553 __ addptr(rsp, rcx); |
| 0 | 3554 |
| 3555 // rsp should be pointing at the return address to the caller (3) | |
| 3556 | |
|
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3557 // Pick up the initial fp we should save |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3558 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3559 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
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parents:
10998
diff
changeset
|
3560 |
| 0 | 3561 // Stack bang to make sure there's enough room for these interpreter frames. |
| 3562 if (UseStackBanging) { | |
| 3563 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3564 __ bang_stack_size(rbx, rcx); | |
| 3565 } | |
| 3566 | |
| 3567 // Load address of array of frame pcs into rcx | |
| 304 | 3568 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 0 | 3569 |
| 3570 // Trash the old pc | |
| 304 | 3571 __ addptr(rsp, wordSize); |
| 0 | 3572 |
| 3573 // Load address of array of frame sizes into rsi | |
| 304 | 3574 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3575 |
| 3576 // Load counter into rdx | |
| 3577 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3578 | |
| 3579 // Now adjust the caller's stack to make up for the extra locals | |
| 3580 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3581 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3582 // value and not the "real" sp value. | |
| 3583 | |
| 3584 const Register sender_sp = r8; | |
| 3585 | |
| 304 | 3586 __ mov(sender_sp, rsp); |
| 0 | 3587 __ movl(rbx, Address(rdi, |
| 3588 Deoptimization::UnrollBlock:: | |
| 3589 caller_adjustment_offset_in_bytes())); | |
| 304 | 3590 __ subptr(rsp, rbx); |
| 0 | 3591 |
| 3592 // Push interpreter frames in a loop | |
| 3593 Label loop; | |
| 3594 __ bind(loop); | |
| 304 | 3595 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3596 #ifdef CC_INTERP | |
| 3597 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
| 3598 #ifdef ASSERT | |
| 3599 __ push(0xDEADDEAD); // Make a recognizable pattern | |
| 3600 __ push(0xDEADDEAD); | |
| 3601 #else /* ASSERT */ | |
| 3602 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
| 3603 #endif /* ASSERT */ | |
| 3604 #else | |
| 3605 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
| 3606 #endif // CC_INTERP | |
| 3607 __ pushptr(Address(rcx, 0)); // Save return address | |
| 0 | 3608 __ enter(); // Save old & set new ebp |
| 304 | 3609 __ subptr(rsp, rbx); // Prolog |
| 3610 #ifdef CC_INTERP | |
| 3611 __ movptr(Address(rbp, | |
| 3612 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
| 3613 sender_sp); // Make it walkable | |
| 3614 #else /* CC_INTERP */ | |
| 0 | 3615 // This value is corrected by layout_activation_impl |
| 304 | 3616 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
| 3617 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
| 3618 #endif /* CC_INTERP */ | |
| 3619 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
| 3620 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3621 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 0 | 3622 __ decrementl(rdx); // Decrement counter |
| 3623 __ jcc(Assembler::notZero, loop); | |
| 304 | 3624 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3625 |
| 3626 // Re-push self-frame | |
| 3627 __ enter(); // Save old & set new ebp | |
| 3628 | |
| 3629 // Allocate a full sized register save area. | |
| 3630 // Return address and rbp are in place, so we allocate two less words. | |
| 304 | 3631 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
| 0 | 3632 |
| 3633 // Restore frame locals after moving the frame | |
| 3634 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
| 304 | 3635 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
| 0 | 3636 |
| 3637 // Call C code. Need thread but NOT official VM entry | |
| 3638 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3639 // restore return values to their stack-slots with the new SP. | |
| 3640 // | |
| 3641 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
| 3642 | |
| 3643 // Use rbp because the frames look interpreted now | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3644 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3645 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3646 address the_pc = __ pc(); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3647 __ set_last_Java_frame(noreg, rbp, the_pc); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3648 |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3649 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
| 304 | 3650 __ mov(c_rarg0, r15_thread); |
|
113
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0
diff
changeset
|
3651 __ movl(c_rarg1, r14); // second arg: exec_mode |
| 0 | 3652 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3653 // Revert SP alignment after call since we're going to do some SP relative addressing below |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3654 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
| 0 | 3655 |
| 3656 // Set an oopmap for the call site | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3657 // Use the same PC we used for the last java frame |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3658 oop_maps->add_gc_map(the_pc - start, |
| 0 | 3659 new OopMap( frame_size_in_words, 0 )); |
| 3660 | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3661 // Clear fp AND pc |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3662 __ reset_last_Java_frame(true, true); |
| 0 | 3663 |
| 3664 // Collect return values | |
| 3665 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
| 304 | 3666 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
| 3667 // I think this is useless (throwing pc?) | |
| 3668 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
| 0 | 3669 |
| 3670 // Pop self-frame. | |
| 3671 __ leave(); // Epilog | |
| 3672 | |
| 3673 // Jump to interpreter | |
| 3674 __ ret(0); | |
| 3675 | |
| 3676 // Make sure all code is generated | |
| 3677 masm->flush(); | |
| 3678 | |
| 304 | 3679 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
| 3680 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
|
4985
0d2a2797a61f
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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diff
changeset
|
3681 #ifdef GRAAL |
|
5111
422c979ff392
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Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3682 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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4984
diff
changeset
|
3683 #endif |
| 0 | 3684 } |
| 3685 | |
| 3686 #ifdef COMPILER2 | |
| 3687 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 3688 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 3689 // Allocate space for the code | |
| 3690 ResourceMark rm; | |
| 3691 // Setup code generation tools | |
| 3692 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
| 3693 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3694 | |
| 3695 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 3696 | |
| 3697 address start = __ pc(); | |
| 3698 | |
| 3699 // Push self-frame. We get here with a return address on the | |
| 3700 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
| 304 | 3701 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
| 0 | 3702 |
| 3703 // No callee saved registers. rbp is assumed implicitly saved | |
| 304 | 3704 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 3705 |
| 3706 // compiler left unloaded_class_index in j_rarg0 move to where the | |
| 3707 // runtime expects it. | |
| 3708 __ movl(c_rarg1, j_rarg0); | |
| 3709 | |
| 3710 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3711 | |
| 3712 // Call C code. Need thread but NOT official VM entry | |
| 3713 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3714 // capture callee-saved registers as well as return values. | |
| 3715 // Thread is in rdi already. | |
| 3716 // | |
| 3717 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
| 3718 | |
| 304 | 3719 __ mov(c_rarg0, r15_thread); |
| 0 | 3720 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
| 3721 | |
| 3722 // Set an oopmap for the call site | |
| 3723 OopMapSet* oop_maps = new OopMapSet(); | |
| 3724 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
| 3725 | |
| 3726 // location of rbp is known implicitly by the frame sender code | |
| 3727 | |
| 3728 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3729 | |
| 3730 __ reset_last_Java_frame(false, false); | |
| 3731 | |
| 3732 // Load UnrollBlock* into rdi | |
| 304 | 3733 __ mov(rdi, rax); |
| 0 | 3734 |
| 3735 // Pop all the frames we must move/replace. | |
| 3736 // | |
| 3737 // Frame picture (youngest to oldest) | |
| 3738 // 1: self-frame (no frame link) | |
| 3739 // 2: deopting frame (no frame link) | |
| 3740 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3741 | |
| 3742 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
| 304 | 3743 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
| 0 | 3744 |
| 3745 // Pop deoptimized frame (int) | |
| 3746 __ movl(rcx, Address(rdi, | |
| 3747 Deoptimization::UnrollBlock:: | |
| 3748 size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3749 __ addptr(rsp, rcx); |
| 0 | 3750 |
| 3751 // rsp should be pointing at the return address to the caller (3) | |
| 3752 | |
|
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|
3753 // Pick up the initial fp we should save |
|
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8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
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|
3754 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
|
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|
3755 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
|
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|
3756 |
| 0 | 3757 // Stack bang to make sure there's enough room for these interpreter frames. |
| 3758 if (UseStackBanging) { | |
| 3759 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3760 __ bang_stack_size(rbx, rcx); | |
| 3761 } | |
| 3762 | |
| 3763 // Load address of array of frame pcs into rcx (address*) | |
|
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|
3764 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 0 | 3765 |
| 3766 // Trash the return pc | |
| 304 | 3767 __ addptr(rsp, wordSize); |
| 0 | 3768 |
| 3769 // Load address of array of frame sizes into rsi (intptr_t*) | |
|
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|
3770 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes())); |
| 0 | 3771 |
| 3772 // Counter | |
|
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|
3773 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int) |
| 0 | 3774 |
| 3775 // Now adjust the caller's stack to make up for the extra locals but | |
| 3776 // record the original sp so that we can save it in the skeletal | |
| 3777 // interpreter frame and the stack walking of interpreter_sender | |
| 3778 // will get the unextended sp value and not the "real" sp value. | |
| 3779 | |
| 3780 const Register sender_sp = r8; | |
| 3781 | |
| 304 | 3782 __ mov(sender_sp, rsp); |
|
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|
3783 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int) |
| 304 | 3784 __ subptr(rsp, rbx); |
| 0 | 3785 |
| 3786 // Push interpreter frames in a loop | |
| 3787 Label loop; | |
| 3788 __ bind(loop); | |
| 304 | 3789 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3790 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
| 3791 __ pushptr(Address(rcx, 0)); // Save return address | |
| 3792 __ enter(); // Save old & set new rbp | |
| 3793 __ subptr(rsp, rbx); // Prolog | |
|
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|
3794 #ifdef CC_INTERP |
|
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|
3795 __ movptr(Address(rbp, |
|
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diff
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|
3796 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
|
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|
3797 sender_sp); // Make it walkable |
|
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diff
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|
3798 #else // CC_INTERP |
| 304 | 3799 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
| 3800 sender_sp); // Make it walkable | |
| 0 | 3801 // This value is corrected by layout_activation_impl |
| 304 | 3802 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
|
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|
3803 #endif // CC_INTERP |
| 304 | 3804 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
| 3805 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3806 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3807 __ decrementl(rdx); // Decrement counter | |
| 0 | 3808 __ jcc(Assembler::notZero, loop); |
| 304 | 3809 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3810 |
| 3811 // Re-push self-frame | |
| 3812 __ enter(); // Save old & set new rbp | |
| 304 | 3813 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
| 0 | 3814 // Prolog |
| 3815 | |
| 3816 // Use rbp because the frames look interpreted now | |
|
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|
3817 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
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3931
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|
3818 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
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3931
diff
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|
3819 address the_pc = __ pc(); |
|
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3931
diff
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|
3820 __ set_last_Java_frame(noreg, rbp, the_pc); |
| 0 | 3821 |
| 3822 // Call C code. Need thread but NOT official VM entry | |
| 3823 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3824 // restore return values to their stack-slots with the new SP. | |
| 3825 // Thread is in rdi already. | |
| 3826 // | |
| 3827 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
| 3828 | |
|
4057
1feb272af3a7
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3931
diff
changeset
|
3829 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
| 304 | 3830 __ mov(c_rarg0, r15_thread); |
| 0 | 3831 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
| 3832 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3833 | |
| 3834 // Set an oopmap for the call site | |
|
4057
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|
3835 // Use the same PC we used for the last java frame |
|
1feb272af3a7
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diff
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|
3836 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
|
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|
3837 |
|
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|
3838 // Clear fp AND pc |
|
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diff
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|
3839 __ reset_last_Java_frame(true, true); |
| 0 | 3840 |
| 3841 // Pop self-frame. | |
| 3842 __ leave(); // Epilog | |
| 3843 | |
| 3844 // Jump to interpreter | |
| 3845 __ ret(0); | |
| 3846 | |
| 3847 // Make sure all code is generated | |
| 3848 masm->flush(); | |
| 3849 | |
| 3850 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
| 3851 SimpleRuntimeFrame::framesize >> 1); | |
| 3852 } | |
| 3853 #endif // COMPILER2 | |
| 3854 | |
| 3855 | |
| 3856 //------------------------------generate_handler_blob------ | |
| 3857 // | |
| 3858 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3859 // and setup oopmap. | |
| 3860 // | |
|
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diff
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|
3861 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
| 0 | 3862 assert(StubRoutines::forward_exception_entry() != NULL, |
| 3863 "must be generated before"); | |
| 3864 | |
| 3865 ResourceMark rm; | |
| 3866 OopMapSet *oop_maps = new OopMapSet(); | |
| 3867 OopMap* map; | |
| 3868 | |
| 3869 // Allocate space for the code. Setup code generation tools. | |
| 3870 CodeBuffer buffer("handler_blob", 2048, 1024); | |
| 3871 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3872 | |
| 3873 address start = __ pc(); | |
| 3874 address call_pc = NULL; | |
| 3875 int frame_size_in_words; | |
|
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diff
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|
3876 bool cause_return = (poll_type == POLL_AT_RETURN); |
|
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diff
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|
3877 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
| 0 | 3878 |
| 3879 // Make room for return address (or push it again) | |
| 3880 if (!cause_return) { | |
| 304 | 3881 __ push(rbx); |
| 0 | 3882 } |
| 3883 | |
| 3884 // Save registers, fpu state, and flags | |
|
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|
3885 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
| 0 | 3886 |
| 3887 // The following is basically a call_VM. However, we need the precise | |
| 3888 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3889 // work outselves. | |
| 3890 | |
| 3891 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3892 | |
| 3893 // The return address must always be correct so that frame constructor never | |
| 3894 // sees an invalid pc. | |
| 3895 | |
| 3896 if (!cause_return) { | |
| 3897 // overwrite the dummy value we pushed on entry | |
| 304 | 3898 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
| 3899 __ movptr(Address(rbp, wordSize), c_rarg0); | |
| 0 | 3900 } |
| 3901 | |
| 3902 // Do the call | |
| 304 | 3903 __ mov(c_rarg0, r15_thread); |
| 0 | 3904 __ call(RuntimeAddress(call_ptr)); |
| 3905 | |
| 3906 // Set an oopmap for the call site. This oopmap will map all | |
| 3907 // oop-registers and debug-info registers as callee-saved. This | |
| 3908 // will allow deoptimization at this safepoint to find all possible | |
| 3909 // debug-info recordings, as well as let GC find all oops. | |
| 3910 | |
| 3911 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3912 | |
| 3913 Label noException; | |
| 3914 | |
| 3915 __ reset_last_Java_frame(false, false); | |
| 3916 | |
| 304 | 3917 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3918 __ jcc(Assembler::equal, noException); |
| 3919 | |
| 3920 // Exception pending | |
| 3921 | |
|
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diff
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|
3922 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3923 |
| 3924 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3925 | |
| 3926 // No exception case | |
| 3927 __ bind(noException); | |
| 3928 | |
| 3929 // Normal exit, restore registers and exit. | |
|
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|
3930 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3931 |
| 3932 __ ret(0); | |
| 3933 | |
| 3934 // Make sure all code is generated | |
| 3935 masm->flush(); | |
| 3936 | |
| 3937 // Fill-out other meta info | |
| 3938 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 3939 } | |
| 3940 | |
| 3941 // | |
| 3942 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 3943 // | |
| 3944 // Generate a stub that calls into vm to find out the proper destination | |
| 3945 // of a java call. All the argument registers are live at this point | |
| 3946 // but since this is generic code we don't know what they are and the caller | |
| 3947 // must do any gc of the args. | |
| 3948 // | |
|
3442
f7d55ea6ee56
7045514: SPARC assembly code for JSR 292 ricochet frames
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3363
diff
changeset
|
3949 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 3950 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 3951 | |
| 3952 // allocate space for the code | |
| 3953 ResourceMark rm; | |
| 3954 | |
| 3955 CodeBuffer buffer(name, 1000, 512); | |
| 3956 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3957 | |
| 3958 int frame_size_in_words; | |
| 3959 | |
| 3960 OopMapSet *oop_maps = new OopMapSet(); | |
| 3961 OopMap* map = NULL; | |
| 3962 | |
| 3963 int start = __ offset(); | |
| 3964 | |
| 3965 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3966 | |
| 3967 int frame_complete = __ offset(); | |
| 3968 | |
| 3969 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3970 | |
| 304 | 3971 __ mov(c_rarg0, r15_thread); |
| 0 | 3972 |
| 3973 __ call(RuntimeAddress(destination)); | |
| 3974 | |
| 3975 | |
| 3976 // Set an oopmap for the call site. | |
| 3977 // We need this not only for callee-saved registers, but also for volatile | |
| 3978 // registers that the compiler might be keeping live across a safepoint. | |
| 3979 | |
| 3980 oop_maps->add_gc_map( __ offset() - start, map); | |
| 3981 | |
| 3982 // rax contains the address we are going to jump to assuming no exception got installed | |
| 3983 | |
| 3984 // clear last_Java_sp | |
| 3985 __ reset_last_Java_frame(false, false); | |
| 3986 // check for pending exceptions | |
| 3987 Label pending; | |
| 304 | 3988 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3989 __ jcc(Assembler::notEqual, pending); |
| 3990 | |
|
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|
3991 // get the returned Method* |
|
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|
3992 __ get_vm_result_2(rbx, r15_thread); |
| 304 | 3993 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
| 3994 | |
| 3995 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 0 | 3996 |
| 3997 RegisterSaver::restore_live_registers(masm); | |
| 3998 | |
| 3999 // We are back the the original state on entry and ready to go. | |
| 4000 | |
| 4001 __ jmp(rax); | |
| 4002 | |
| 4003 // Pending exception after the safepoint | |
| 4004 | |
| 4005 __ bind(pending); | |
| 4006 | |
| 4007 RegisterSaver::restore_live_registers(masm); | |
| 4008 | |
| 4009 // exception pending => remove activation and forward to exception handler | |
| 4010 | |
| 4011 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
| 4012 | |
| 304 | 4013 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
| 0 | 4014 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 4015 | |
| 4016 // ------------- | |
| 4017 // make sure all code is generated | |
| 4018 masm->flush(); | |
| 4019 | |
| 4020 // return the blob | |
| 4021 // frame_size_words or bytes?? | |
| 4022 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
| 4023 } | |
| 4024 | |
| 4025 | |
| 4026 #ifdef COMPILER2 | |
| 4027 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
| 4028 // | |
| 4029 //------------------------------generate_exception_blob--------------------------- | |
| 4030 // creates exception blob at the end | |
| 4031 // Using exception blob, this code is jumped from a compiled method. | |
| 4032 // (see emit_exception_handler in x86_64.ad file) | |
| 4033 // | |
| 4034 // Given an exception pc at a call we call into the runtime for the | |
| 4035 // handler in this method. This handler might merely restore state | |
| 4036 // (i.e. callee save registers) unwind the frame and jump to the | |
| 4037 // exception handler for the nmethod if there is no Java level handler | |
| 4038 // for the nmethod. | |
| 4039 // | |
| 4040 // This code is entered with a jmp. | |
| 4041 // | |
| 4042 // Arguments: | |
| 4043 // rax: exception oop | |
| 4044 // rdx: exception pc | |
| 4045 // | |
| 4046 // Results: | |
| 4047 // rax: exception oop | |
| 4048 // rdx: exception pc in caller or ??? | |
| 4049 // destination: exception handler of caller | |
| 4050 // | |
| 4051 // Note: the exception pc MUST be at a call (precise debug information) | |
| 4052 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
| 4053 // | |
| 4054 | |
| 4055 void OptoRuntime::generate_exception_blob() { | |
| 4056 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
| 4057 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
| 4058 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
| 4059 | |
| 4060 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 4061 | |
| 4062 // Allocate space for the code | |
| 4063 ResourceMark rm; | |
| 4064 // Setup code generation tools | |
| 4065 CodeBuffer buffer("exception_blob", 2048, 1024); | |
| 4066 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 4067 | |
| 4068 | |
| 4069 address start = __ pc(); | |
| 4070 | |
| 4071 // Exception pc is 'return address' for stack walker | |
| 304 | 4072 __ push(rdx); |
| 4073 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
| 0 | 4074 |
| 4075 // Save callee-saved registers. See x86_64.ad. | |
| 4076 | |
| 4077 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4078 // convention will save restore it in prolog/epilog) Other than that | |
| 4079 // there are no callee save registers now that adapter frames are gone. | |
| 4080 | |
| 304 | 4081 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 4082 |
| 4083 // Store exception in Thread object. We cannot pass any arguments to the | |
| 4084 // handle_exception call, since we do not want to make any assumption | |
| 4085 // about the size of the frame where the exception happened in. | |
| 4086 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
| 304 | 4087 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
| 4088 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 0 | 4089 |
| 4090 // This call does all the hard work. It checks if an exception handler | |
| 4091 // exists in the method. | |
| 4092 // If so, it returns the handler address. | |
| 4093 // If not, it prepares for stack-unwinding, restoring the callee-save | |
| 4094 // registers of the frame being removed. | |
| 4095 // | |
| 4096 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
| 4097 | |
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4098 // At a method handle call, the stack may not be properly aligned |
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4099 // when returning with an exception. |
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4100 address the_pc = __ pc(); |
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4101 __ set_last_Java_frame(noreg, noreg, the_pc); |
| 304 | 4102 __ mov(c_rarg0, r15_thread); |
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4103 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
| 0 | 4104 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
| 4105 | |
| 4106 // Set an oopmap for the call site. This oopmap will only be used if we | |
| 4107 // are unwinding the stack. Hence, all locations will be dead. | |
| 4108 // Callee-saved registers will be the same as the frame above (i.e., | |
| 4109 // handle_exception_stub), since they were restored when we got the | |
| 4110 // exception. | |
| 4111 | |
| 4112 OopMapSet* oop_maps = new OopMapSet(); | |
| 4113 | |
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4114 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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4115 |
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4116 __ reset_last_Java_frame(false, true); |
| 0 | 4117 |
| 4118 // Restore callee-saved registers | |
| 4119 | |
| 4120 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4121 // convention will save restore it in prolog/epilog) Other than that | |
| 4122 // there are no callee save registers no that adapter frames are gone. | |
| 4123 | |
| 304 | 4124 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
| 4125 | |
| 4126 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
| 4127 __ pop(rdx); // No need for exception pc anymore | |
| 0 | 4128 |
| 4129 // rax: exception handler | |
| 4130 | |
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4131 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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4132 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
| 1567 | 4133 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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4134 |
| 0 | 4135 // We have a handler in rax (could be deopt blob). |
| 304 | 4136 __ mov(r8, rax); |
| 0 | 4137 |
| 4138 // Get the exception oop | |
| 304 | 4139 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
| 0 | 4140 // Get the exception pc in case we are deoptimized |
| 304 | 4141 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
| 0 | 4142 #ifdef ASSERT |
| 4143 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
| 4144 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
| 4145 #endif | |
| 4146 // Clear the exception oop so GC no longer processes it as a root. | |
| 4147 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
| 4148 | |
| 4149 // rax: exception oop | |
| 4150 // r8: exception handler | |
| 4151 // rdx: exception pc | |
| 4152 // Jump to handler | |
| 4153 | |
| 4154 __ jmp(r8); | |
| 4155 | |
| 4156 // Make sure all code is generated | |
| 4157 masm->flush(); | |
| 4158 | |
| 4159 // Set exception blob | |
| 4160 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
| 4161 } | |
| 4162 #endif // COMPILER2 |