Mercurial > hg > truffle
annotate graal/com.oracle.jvmci.asm.sparc/src/com/oracle/jvmci/asm/sparc/SPARCMacroAssembler.java @ 21716:2f9e4d984d16
Give languages a chance to do implicit exports. Prefer explicit exports over implicit ones.
author | Jaroslav Tulach <jaroslav.tulach@oracle.com> |
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date | Thu, 04 Jun 2015 08:08:05 +0200 |
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rev | line source |
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1 /* |
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2 * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.oracle.jvmci.asm.sparc; |
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24 |
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25 import static com.oracle.jvmci.asm.sparc.SPARCAssembler.Annul.*; |
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26 import static com.oracle.jvmci.asm.sparc.SPARCAssembler.ConditionFlag.*; |
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27 import static com.oracle.jvmci.sparc.SPARC.*; |
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28 |
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29 import java.util.function.*; |
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30 |
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31 import com.oracle.jvmci.asm.*; |
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32 import com.oracle.jvmci.code.*; |
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33 |
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34 public class SPARCMacroAssembler extends SPARCAssembler { |
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35 |
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36 /** |
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37 * A sentinel value used as a place holder in an instruction stream for an address that will be |
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38 * patched. |
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39 */ |
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40 private static final SPARCAddress Placeholder = new SPARCAddress(g0, 0); |
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41 private final ScratchRegister[] scratchRegister = new ScratchRegister[]{new ScratchRegister(g1), new ScratchRegister(g3)}; |
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42 // Points to the next free scratch register |
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43 private int nextFreeScratchRegister = 0; |
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44 |
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45 public SPARCMacroAssembler(TargetDescription target, RegisterConfig registerConfig) { |
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46 super(target, registerConfig); |
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47 } |
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48 |
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50 public void align(int modulus) { | |
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51 while (position() % modulus != 0) { |
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52 nop(); |
10459 | 53 } |
54 } | |
55 | |
56 @Override | |
57 public void jmp(Label l) { | |
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58 bicc(Always, NOT_ANNUL, l); |
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59 nop(); // delay slot |
10459 | 60 } |
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61 |
10459 | 62 @Override |
63 protected final void patchJumpTarget(int branch, int branchTarget) { | |
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64 final int disp = (branchTarget - branch) / 4; |
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65 final int inst = getInt(branch); |
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66 Op2s op2 = Op2s.byValue((inst & OP2_MASK) >> OP2_SHIFT); |
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67 int maskBits; |
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68 int setBits; |
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69 switch (op2) { |
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70 case Br: |
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71 case Fb: |
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72 case Sethi: |
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73 case Illtrap: |
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74 // Disp 22 in the lower 22 bits |
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75 assert isSimm(disp, 22); |
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76 setBits = disp << DISP22_SHIFT; |
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77 maskBits = DISP22_MASK; |
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78 break; |
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79 case Fbp: |
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80 case Bp: |
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81 // Disp 19 in the lower 19 bits |
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82 assert isSimm(disp, 19); |
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83 setBits = disp << DISP19_SHIFT; |
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84 maskBits = DISP19_MASK; |
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85 break; |
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86 case Bpr: |
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87 boolean isCBcond = (inst & CBCOND_MASK) != 0; |
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88 if (isCBcond) { |
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89 assert isSimm10(disp) : String.format("%d: instruction: 0x%x", disp, inst); |
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90 int d10Split = 0; |
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91 d10Split |= (disp & 0b11_0000_0000) << D10HI_SHIFT - 8; |
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92 d10Split |= (disp & 0b00_1111_1111) << D10LO_SHIFT; |
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93 setBits = d10Split; |
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94 maskBits = D10LO_MASK | D10HI_MASK; |
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95 } else { |
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96 assert isSimm(disp, 16); |
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97 int d16Split = 0; |
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98 d16Split |= (disp & 0b1100_0000_0000_0000) << D16HI_SHIFT - 14; |
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99 d16Split |= (disp & 0b0011_1111_1111_1111) << D16LO_SHIFT; |
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100 setBits = d16Split; |
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101 maskBits = D16HI_MASK | D16LO_MASK; |
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102 } |
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103 break; |
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104 default: |
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105 throw new InternalError("Unknown op2 " + op2); |
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106 } |
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107 int newInst = ~maskBits & inst; |
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108 newInst |= setBits; |
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109 emitInt(newInst, branch); |
10459 | 110 } |
111 | |
112 @Override | |
113 public AbstractAddress makeAddress(Register base, int displacement) { | |
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114 return new SPARCAddress(base, displacement); |
10459 | 115 } |
116 | |
117 @Override | |
118 public AbstractAddress getPlaceholder() { | |
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119 return Placeholder; |
10459 | 120 } |
121 | |
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122 @Override |
11233 | 123 public final void ensureUniquePC() { |
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124 nop(); |
11233 | 125 } |
126 | |
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127 public void cas(Register rs1, Register rs2, Register rd) { |
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128 casa(rs1, rs2, rd, Asi.ASI_PRIMARY); |
10792 | 129 } |
130 | |
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131 public void casx(Register rs1, Register rs2, Register rd) { |
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132 casxa(rs1, rs2, rd, Asi.ASI_PRIMARY); |
10792 | 133 } |
134 | |
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135 public void clr(Register dst) { |
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136 or(g0, g0, dst); |
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137 } |
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138 |
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139 public void clrb(SPARCAddress addr) { |
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140 stb(g0, addr); |
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141 } |
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142 |
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143 public void clrh(SPARCAddress addr) { |
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144 sth(g0, addr); |
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145 } |
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146 |
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147 public void clrx(SPARCAddress addr) { |
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148 stx(g0, addr); |
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149 } |
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150 |
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151 public void cmp(Register rs1, Register rs2) { |
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152 subcc(rs1, rs2, g0); |
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153 } |
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154 |
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155 public void cmp(Register rs1, int simm13) { |
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156 subcc(rs1, simm13, g0); |
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157 } |
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158 |
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159 public void dec(Register rd) { |
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160 sub(rd, 1, rd); |
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161 } |
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162 |
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163 public void dec(int simm13, Register rd) { |
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164 sub(rd, simm13, rd); |
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165 } |
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166 |
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167 public void jmp(SPARCAddress address) { |
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168 jmpl(address.getBase(), address.getDisplacement(), g0); |
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169 } |
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170 |
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171 public void jmp(Register rd) { |
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172 jmpl(rd, 0, g0); |
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173 } |
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174 |
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175 public void neg(Register rs1, Register rd) { |
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176 sub(g0, rs1, rd); |
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177 } |
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178 |
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179 public void neg(Register rd) { |
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180 sub(g0, rd, rd); |
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181 } |
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182 |
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183 public void mov(Register rs, Register rd) { |
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184 or(g0, rs, rd); |
10459 | 185 } |
186 | |
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187 public void mov(int simm13, Register rd) { |
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188 or(g0, simm13, rd); |
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189 } |
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190 |
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191 public void not(Register rs1, Register rd) { |
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192 xnor(rs1, g0, rd); |
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193 } |
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194 |
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195 public void not(Register rd) { |
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196 xnor(rd, g0, rd); |
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197 } |
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198 |
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199 public void restoreWindow() { |
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200 restore(g0, g0, g0); |
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201 } |
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202 |
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203 public void ret() { |
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204 jmpl(i7, 8, g0); |
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205 } |
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206 |
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207 /** |
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208 * This instruction is like sethi but for 64-bit values. |
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209 */ |
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210 public static class Sethix { |
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211 |
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212 private static final int INSTRUCTION_SIZE = 7; |
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213 |
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214 private long value; |
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215 private Register dst; |
10792 | 216 private boolean forceRelocatable; |
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217 private boolean delayed = false; |
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218 private Consumer<SPARCAssembler> delayedInstructionEmitter; |
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219 |
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220 public Sethix(long value, Register dst, boolean forceRelocatable, boolean delayed) { |
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221 this(value, dst, forceRelocatable); |
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222 assert !(forceRelocatable && delayed) : "Relocatable sethix cannot be delayed"; |
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223 this.delayed = delayed; |
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224 } |
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225 |
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226 public Sethix(long value, Register dst, boolean forceRelocatable) { |
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227 this.value = value; |
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228 this.dst = dst; |
10792 | 229 this.forceRelocatable = forceRelocatable; |
230 } | |
231 | |
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232 public Sethix(long value, Register dst) { |
10792 | 233 this(value, dst, false); |
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234 } |
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235 |
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236 private void emitInstruction(Consumer<SPARCAssembler> cb, SPARCMacroAssembler masm) { |
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237 if (delayed) { |
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238 if (this.delayedInstructionEmitter != null) { |
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239 delayedInstructionEmitter.accept(masm); |
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240 } |
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241 delayedInstructionEmitter = cb; |
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242 } else { |
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243 cb.accept(masm); |
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244 } |
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245 } |
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246 |
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247 public void emit(SPARCMacroAssembler masm) { |
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248 final int hi = (int) (value >> 32); |
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249 final int lo = (int) (value & ~0); |
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250 |
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252 final int startPc = masm.position(); |
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254 if (hi == 0 && lo >= 0) { | |
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255 Consumer<SPARCAssembler> cb = eMasm -> eMasm.sethi(hi22(lo), dst); |
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256 emitInstruction(cb, masm); |
10792 | 257 } else if (hi == -1) { |
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258 Consumer<SPARCAssembler> cb = eMasm -> eMasm.sethi(hi22(~lo), dst); |
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259 emitInstruction(cb, masm); |
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260 cb = eMasm -> eMasm.xor(dst, ~lo10(~0), dst); |
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261 emitInstruction(cb, masm); |
10792 | 262 } else { |
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263 final int shiftcnt; |
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264 final int shiftcnt2; |
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265 Consumer<SPARCAssembler> cb = eMasm -> eMasm.sethi(hi22(hi), dst); |
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266 emitInstruction(cb, masm); |
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267 if ((hi & 0x3ff) != 0) { // Any bits? |
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268 // msb 32-bits are now in lsb 32 |
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269 cb = eMasm -> eMasm.or(dst, hi & 0x3ff, dst); |
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270 emitInstruction(cb, masm); |
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271 } |
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272 if ((lo & 0xFFFFFC00) != 0) { // done? |
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273 if (((lo >> 20) & 0xfff) != 0) { // Any bits set? |
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274 // Make room for next 12 bits |
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275 cb = eMasm -> eMasm.sllx(dst, 12, dst); |
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276 emitInstruction(cb, masm); |
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277 // Or in next 12 |
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278 cb = eMasm -> eMasm.or(dst, (lo >> 20) & 0xfff, dst); |
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279 emitInstruction(cb, masm); |
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280 shiftcnt = 0; // We already shifted |
10792 | 281 } else { |
282 shiftcnt = 12; | |
283 } | |
284 if (((lo >> 10) & 0x3ff) != 0) { | |
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285 // Make room for last 10 bits |
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286 cb = eMasm -> eMasm.sllx(dst, shiftcnt + 10, dst); |
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287 emitInstruction(cb, masm); |
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288 // Or in next 10 |
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289 cb = eMasm -> eMasm.or(dst, (lo >> 10) & 0x3ff, dst); |
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290 emitInstruction(cb, masm); |
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291 shiftcnt2 = 0; |
10792 | 292 } else { |
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293 shiftcnt2 = 10; |
10792 | 294 } |
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295 // Shift leaving disp field 0'd |
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296 cb = eMasm -> eMasm.sllx(dst, shiftcnt2 + 10, dst); |
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297 emitInstruction(cb, masm); |
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298 } else { |
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299 cb = eMasm -> eMasm.sllx(dst, 32, dst); |
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300 emitInstruction(cb, masm); |
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301 } |
10792 | 302 } |
303 // Pad out the instruction sequence so it can be patched later. | |
304 if (forceRelocatable) { | |
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305 while (masm.position() < (startPc + (INSTRUCTION_SIZE * 4))) { |
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306 Consumer<SPARCAssembler> cb = eMasm -> eMasm.nop(); |
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307 emitInstruction(cb, masm); |
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308 } |
10792 | 309 } |
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310 } |
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311 |
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312 public void emitDelayed(SPARCMacroAssembler masm) { |
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313 assert delayedInstructionEmitter != null; |
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314 delayedInstructionEmitter.accept(masm); |
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315 } |
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316 } |
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317 |
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318 public static class Setx { |
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319 |
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320 private long value; |
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321 private Register dst; |
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322 private boolean forceRelocatable; |
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323 private boolean delayed = false; |
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324 private boolean delayedFirstEmitted = false; |
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325 private Sethix sethix; |
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326 private Consumer<SPARCMacroAssembler> delayedAdd; |
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327 |
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328 public Setx(long value, Register dst, boolean forceRelocatable, boolean delayed) { |
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329 assert !(forceRelocatable && delayed) : "Cannot use relocatable setx as delayable"; |
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330 this.value = value; |
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331 this.dst = dst; |
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332 this.forceRelocatable = forceRelocatable; |
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333 this.delayed = delayed; |
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334 } |
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335 |
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336 public Setx(long value, Register dst, boolean forceRelocatable) { |
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337 this(value, dst, forceRelocatable, false); |
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338 } |
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339 |
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340 public Setx(long value, Register dst) { |
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341 this(value, dst, false); |
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342 } |
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343 |
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344 public void emit(SPARCMacroAssembler masm) { |
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345 assert !delayed; |
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346 doEmit(masm); |
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347 } |
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348 |
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349 private void doEmit(SPARCMacroAssembler masm) { |
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350 sethix = new Sethix(value, dst, forceRelocatable, delayed); |
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351 sethix.emit(masm); |
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352 int lo = (int) (value & ~0); |
10792 | 353 if (lo10(lo) != 0 || forceRelocatable) { |
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354 Consumer<SPARCMacroAssembler> add = eMasm -> eMasm.add(dst, lo10(lo), dst); |
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355 if (delayed) { |
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356 sethix.emitDelayed(masm); |
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357 sethix = null; |
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358 delayedAdd = add; |
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359 } else { |
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360 sethix = null; |
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361 add.accept(masm); |
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362 } |
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363 } |
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364 } |
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365 |
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366 public void emitFirstPartOfDelayed(SPARCMacroAssembler masm) { |
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367 assert !forceRelocatable : "Cannot use delayed mode with relocatable setx"; |
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368 assert delayed : "Can only be used in delayed mode"; |
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369 doEmit(masm); |
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370 delayedFirstEmitted = true; |
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371 } |
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372 |
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373 public void emitSecondPartOfDelayed(SPARCMacroAssembler masm) { |
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374 assert !forceRelocatable : "Cannot use delayed mode with relocatable setx"; |
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375 assert delayed : "Can only be used in delayed mode"; |
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376 assert delayedFirstEmitted : "First part has not been emitted so far."; |
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377 assert delayedAdd == null && sethix != null || delayedAdd != null && sethix == null : "Either add or sethix must be set"; |
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378 if (delayedAdd != null) { |
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379 delayedAdd.accept(masm); |
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380 } else { |
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381 sethix.emitDelayed(masm); |
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382 } |
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383 |
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384 } |
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385 } |
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386 |
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387 public void signx(Register rs, Register rd) { |
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388 sra(rs, g0, rd); |
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389 } |
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390 |
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391 public void signx(Register rd) { |
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392 sra(rd, g0, rd); |
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393 } |
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394 |
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395 public ScratchRegister getScratchRegister() { |
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396 return scratchRegister[nextFreeScratchRegister++]; |
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397 } |
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398 |
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399 public class ScratchRegister implements AutoCloseable { |
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400 private final Register register; |
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401 |
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402 public ScratchRegister(Register register) { |
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403 super(); |
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404 this.register = register; |
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405 } |
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406 |
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407 public Register getRegister() { |
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408 return register; |
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409 } |
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410 |
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411 public void close() { |
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412 assert nextFreeScratchRegister > 0 : "Close called too often"; |
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413 nextFreeScratchRegister--; |
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414 } |
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415 } |
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416 } |