Mercurial > hg > truffle
changeset 19677:00d7b0adaf66
[SPARC] Change ld/st ops of SPARC to functions
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--- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Mon Mar 02 18:44:14 2015 +0100 @@ -24,6 +24,7 @@ import static com.oracle.graal.asm.sparc.SPARCAssembler.CC.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.ConditionFlag.*; +import static com.oracle.graal.asm.sparc.SPARCAssembler.Op.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.Op3s.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.Opfs.*; import static com.oracle.graal.hotspot.HotSpotGraalRuntime.*; @@ -88,149 +89,6 @@ protected static final int D10LO_SHIFT = 5; protected static final int D10HI_SHIFT = 19; - // @formatter:off - /** - * Instruction format for Loads, Stores and Misc. - * <pre> - * | 11 | rd | op3 | rs1 | i| imm_asi | rs2 | - * | 11 | rd | op3 | rs1 | i| simm13 | - * |31 30|29 25|24 19|18 14|13|12 5|4 0| - * </pre> - */ - // @formatter:on - public static class Fmt11 { - - private static final int RD_SHIFT = 25; - private static final int OP3_SHIFT = 19; - private static final int RS1_SHIFT = 14; - private static final int I_SHIFT = 13; - private static final int IMM_ASI_SHIFT = 5; - private static final int RS2_SHIFT = 0; - private static final int SIMM13_SHIFT = 0; - - // @formatter:off - private static final int RD_MASK = 0b00111110000000000000000000000000; - private static final int OP3_MASK = 0b00000001111110000000000000000000; - private static final int RS1_MASK = 0b00000000000001111100000000000000; - private static final int I_MASK = 0b00000000000000000010000000000000; - private static final int IMM_ASI_MASK = 0b00000000000000000001111111100000; - private static final int RS2_MASK = 0b00000000000000000000000000011111; - private static final int SIMM13_MASK = 0b00000000000000000001111111111111; - // @formatter:on - - private int rd; - private int op3; - private int rs1; - private int i; - private int immAsi; - private int rs2; - private int simm13; - - private Fmt11(int rd, int op3, int rs1, int i, int immAsi, int rs2, int simm13) { - this.rd = rd; - this.op3 = op3; - this.rs1 = rs1; - this.i = i; - this.immAsi = immAsi; - this.rs2 = rs2; - this.simm13 = simm13; - verify(); - } - - public Fmt11(Op3s op3, Register rs1, Register rs2, Register rd) { - this(rd.encoding(), op3.getValue(), rs1.encoding(), 0, 0, rs2.encoding(), 0); - } - - public Fmt11(Op3s op3, Register rs1, int simm13, Register rd) { - this(rd.encoding(), op3.getValue(), rs1.encoding(), 1, 0, 0, simm13); - } - - public Fmt11(Op3s op3, Register rs1, Register rd) { - this(rd.encoding(), op3.getValue(), rs1.encoding(), 0, 0, 0, 0); - } - - /** - * Special constructor for {@link Casa} and {@link Casxa}. - */ - public Fmt11(Op3s op3, Register rs1, Register rs2, Register rd, Asi asi) { - this(rd.encoding(), op3.getValue(), rs1.encoding(), asi.isValid() ? 0 : 1, asi.isValid() ? asi.getValue() : 0, rs2.encoding(), 0); - assert asi.isValid() : "default asi is not supported yet"; - } - - /** - * Special constructor for loads and stores. - */ - public Fmt11(Op3s op3, SPARCAddress addr, Register rd) { - this(rd.encoding(), op3.getValue(), addr.getBase().encoding(), 0, 0, 0, 0); - decodeAddress(addr); - } - - /** - * Special constructor for {@link Prefetch} and Prefetcha. - */ - public Fmt11(Op3s op3, SPARCAddress addr, Prefetch.Fcn fcn) { - this(fcn.getValue(), op3.getValue(), addr.getBase().encoding(), 0, 0, 0, 0); - decodeAddress(addr); - } - - private void decodeAddress(SPARCAddress addr) { - if (!addr.getIndex().equals(Register.None)) { - this.rs2 = addr.getIndex().encoding(); - } else { - this.simm13 = addr.getDisplacement(); - this.i = 1; - } - verify(); - } - - private int getInstructionBits() { - if (i == 0) { - return Ops.LdstOp.getValue() << OP_SHIFT | rd << RD_SHIFT | op3 << OP3_SHIFT | rs1 << RS1_SHIFT | i << I_SHIFT | immAsi << IMM_ASI_SHIFT | rs2 << RS2_SHIFT; - } else { - return Ops.LdstOp.getValue() << OP_SHIFT | rd << RD_SHIFT | op3 << OP3_SHIFT | rs1 << RS1_SHIFT | i << I_SHIFT | ((simm13 << SIMM13_SHIFT) & SIMM13_MASK); - } - } - - public static Fmt11 read(SPARCAssembler masm, int pos) { - final int inst = masm.getInt(pos); - - // Make sure it's the right instruction: - final int op = (inst & OP_MASK) >> OP_SHIFT; - assert op == Ops.LdstOp.getValue(); - - // Get the instruction fields: - final int rd = (inst & RD_MASK) >> RD_SHIFT; - final int op3 = (inst & OP3_MASK) >> OP3_SHIFT; - final int rs1 = (inst & RS1_MASK) >> RS1_SHIFT; - final int i = (inst & I_MASK) >> I_SHIFT; - final int immAsi = (inst & IMM_ASI_MASK) >> IMM_ASI_SHIFT; - final int rs2 = (inst & RS2_MASK) >> RS2_SHIFT; - final int simm13 = (inst & SIMM13_MASK) >> SIMM13_SHIFT; - - return new Fmt11(rd, op3, rs1, i, immAsi, rs2, simm13); - } - - public void write(SPARCAssembler masm, int pos) { - verify(); - masm.emitInt(getInstructionBits(), pos); - } - - public void emit(SPARCAssembler masm) { - verify(); - masm.emitInt(getInstructionBits()); - } - - public void verify() { - assert ((rd << RD_SHIFT) & RD_MASK) == (rd << RD_SHIFT) : rd; - assert ((op3 << OP3_SHIFT) & OP3_MASK) == (op3 << OP3_SHIFT) : op3; - assert ((rs1 << RS1_SHIFT) & RS1_MASK) == (rs1 << RS1_SHIFT) : rs1; - assert ((i << I_SHIFT) & I_MASK) == (i << I_SHIFT); - assert ((immAsi << IMM_ASI_SHIFT) & IMM_ASI_MASK) == (immAsi << IMM_ASI_SHIFT); - assert ((rs2 << RS2_SHIFT) & RS2_MASK) == (rs2 << RS2_SHIFT); - assert isSimm13(simm13) : String.format("simm13: %d (%x)", simm13, simm13); - } - } - public enum Ops { // @formatter:off @@ -257,6 +115,18 @@ } } + public enum Op { + Op00(0b00), + Op01(0b01), + Op10(0b10), + Op11(0b11); + int op; + + Op(int op) { + this.op = op; + } + } + public enum Op2s { // @formatter:off @@ -295,117 +165,114 @@ public enum Op3s { // @formatter:off - Add(0x00, "add"), - And(0x01, "and"), - Or(0x02, "or"), - Xor(0x03, "xor"), - Sub(0x04, "sub"), - Andn(0x05, "andn"), - Orn(0x06, "orn"), - Xnor(0x07, "xnor"), - Addc(0x08, "addc"), - Mulx(0x09, "mulx"), - Umul(0x0A, "umul"), - Smul(0x0B, "smul"), - Subc(0x0C, "subc"), - Udivx(0x0D, "udivx"), - Udiv(0x0E, "udiv"), - Sdiv(0x0F, "sdiv"), + Add(0x00, "add", Op10), + And(0x01, "and", Op10), + Or(0x02, "or", Op10), + Xor(0x03, "xor", Op10), + Sub(0x04, "sub", Op10), + Andn(0x05, "andn", Op10), + Orn(0x06, "orn", Op10), + Xnor(0x07, "xnor", Op10), + Addc(0x08, "addc", Op10), + Mulx(0x09, "mulx", Op10), + Umul(0x0A, "umul", Op10), + Smul(0x0B, "smul", Op10), + Subc(0x0C, "subc", Op10), + Udivx(0x0D, "udivx", Op10), + Udiv(0x0E, "udiv", Op10), + Sdiv(0x0F, "sdiv", Op10), - Addcc(0x10, "addcc"), - Andcc(0x11, "andcc"), - Orcc(0x12, "orcc"), - Xorcc(0x13, "xorcc"), - Subcc(0x14, "subcc"), - Andncc(0x15, "andncc"), - Orncc(0x16, "orncc"), - Xnorcc(0x17, "xnorcc"), - Addccc(0x18, "addccc"), - // dos not exist - // Mulxcc(0x19, "mulxcc"), - Umulcc(0x1A, "umulcc"), - Smulcc(0x1B, "smulcc"), - Subccc(0x1C, "subccc"), - Udivcc(0x1E, "udivcc"), - Sdivcc(0x1F, "sdivcc"), + Addcc(0x10, "addcc", Op10), + Andcc(0x11, "andcc", Op10), + Orcc(0x12, "orcc", Op10), + Xorcc(0x13, "xorcc", Op10), + Subcc(0x14, "subcc", Op10), + Andncc(0x15, "andncc", Op10), + Orncc(0x16, "orncc", Op10), + Xnorcc(0x17, "xnorcc", Op10), + Addccc(0x18, "addccc", Op10), - Taddcc(0x20, "taddcc"), - Tsubcc(0x21, "tsubcc"), - Taddcctv(0x22, "taddcctv"), - Tsubcctv(0x23, "tsubcctv"), - Mulscc(0x24, "mulscc"), - Sll(0x25, "sll"), - Sllx(0x25, "sllx"), - Srl(0x26, "srl"), - Srlx(0x26, "srlx"), - Sra(0x27, "srax"), - Srax(0x27, "srax"), - Rdreg(0x28, "rdreg"), - Membar(0x28, "membar"), + Umulcc(0x1A, "umulcc", Op10), + Smulcc(0x1B, "smulcc", Op10), + Subccc(0x1C, "subccc", Op10), + Udivcc(0x1E, "udivcc", Op10), + Sdivcc(0x1F, "sdivcc", Op10), + + Taddcc(0x20, "taddcc", Op10), + Tsubcc(0x21, "tsubcc", Op10), + Taddcctv(0x22, "taddcctv", Op10), + Tsubcctv(0x23, "tsubcctv", Op10), + Mulscc(0x24, "mulscc", Op10), + Sll(0x25, "sll", Op10), + Sllx(0x25, "sllx", Op10), + Srl(0x26, "srl", Op10), + Srlx(0x26, "srlx", Op10), + Sra(0x27, "srax", Op10), + Srax(0x27, "srax", Op10), + Membar(0x28, "membar", Op10), - Flushw(0x2B, "flushw"), - Movcc(0x2C, "movcc"), - Sdivx(0x2D, "sdivx"), - Popc(0x2E, "popc"), - Movr(0x2F, "movr"), - - Sir(0x30, "sir"), - Wrreg(0x30, "wrreg"), - Saved(0x31, "saved"), + Flushw(0x2B, "flushw", Op10), + Movcc(0x2C, "movcc", Op10), + Sdivx(0x2D, "sdivx", Op10), + Popc(0x2E, "popc", Op10), + Movr(0x2F, "movr", Op10), - Fpop1(0b11_0100, "fpop1"), - Fpop2(0b11_0101, "fpop2"), - Impdep1(0b11_0110, "impdep1"), - Impdep2(0b11_0111, "impdep2"), - Jmpl(0x38, "jmpl"), - Rett(0x39, "rett"), - Trap(0x3a, "trap"), - Flush(0x3b, "flush"), - Save(0x3c, "save"), - Restore(0x3d, "restore"), - Done(0x3e, "done"), - Retry(0x3e, "retry"), - Casa(0b111100, "casa"), - Casxa(0b111110, "casxa"), - Prefetch(0b101101, "prefetch"), - Prefetcha(0b111101, "prefetcha"), + Fpop1(0b11_0100, "fpop1", Op10), + Fpop2(0b11_0101, "fpop2", Op10), + Impdep1(0b11_0110, "impdep1", Op10), + Impdep2(0b11_0111, "impdep2", Op10), + Jmpl(0x38, "jmpl", Op10), + Rett(0x39, "rett", Op10), + Trap(0x3a, "trap", Op10), + Flush(0x3b, "flush", Op10), + Save(0x3c, "save", Op10), + Restore(0x3d, "restore", Op10), + Retry(0x3e, "retry", Op10), + + + Casa(0b111100, "casa", Op11), + Casxa(0b111110, "casxa", Op11), + Prefetch(0b101101, "prefetch", Op11), + Prefetcha(0b111101, "prefetcha", Op11), - Lduw (0b00_0000, "lduw"), - Ldub (0b00_0001, "ldub"), - Lduh (0b00_0010, "lduh"), - Stw (0b00_0100, "stw"), - Stb (0b00_0101, "stb"), - Sth (0b00_0110, "sth"), - Ldsw (0b00_1000, "ldsw"), - Ldsb (0b00_1001, "ldsb"), - Ldsh (0b00_1010, "ldsh"), - Ldx (0b00_1011, "ldx"), - Stx (0b00_1110, "stx"), + Lduw (0b00_0000, "lduw", Op11), + Ldub (0b00_0001, "ldub", Op11), + Lduh (0b00_0010, "lduh", Op11), + Stw (0b00_0100, "stw", Op11), + Stb (0b00_0101, "stb", Op11), + Sth (0b00_0110, "sth", Op11), + Ldsw (0b00_1000, "ldsw", Op11), + Ldsb (0b00_1001, "ldsb", Op11), + Ldsh (0b00_1010, "ldsh", Op11), + Ldx (0b00_1011, "ldx", Op11), + Stx (0b00_1110, "stx", Op11), - Ldf (0b10_0000, "ldf"), - Ldfsr (0b10_0001, "ldfsr"), - Ldaf (0b10_0010, "ldaf"), - Lddf (0b10_0011, "lddf"), - Stf (0b10_0100, "stf"), - Stfsr (0b10_0101, "stfsr"), - Staf (0x10_0110, "staf"), - Rd (0b10_1000, "rd"), - Stdf (0b10_0111, "stdf"), + Ldf (0b10_0000, "ldf", Op11), + Ldfsr (0b10_0001, "ldfsr", Op11), + Ldaf (0b10_0010, "ldaf", Op11), + Lddf (0b10_0011, "lddf", Op11), + Stf (0b10_0100, "stf", Op11), + Stfsr (0b10_0101, "stfsr", Op11), + Staf (0x10_0110, "staf", Op11), + Stdf (0b10_0111, "stdf", Op11), - Wr (0b11_0000, "wr"), - Fcmp (0b11_0101, "fcmp"), + Rd (0b10_1000, "rd", Op10), + Wr (0b11_0000, "wr", Op10), + Fcmp (0b11_0101, "fcmp", Op10), - Ldxa (0b01_1011, "ldxa"), - Lduwa (0b01_0000, "lduwa"); + Ldxa (0b01_1011, "ldxa", Op11), + Lduwa (0b01_0000, "lduwa", Op11); // @formatter:on private final int value; private final String operator; + private final Op op; - private Op3s(int value, String op) { + private Op3s(int value, String name, Op op) { this.value = value; - this.operator = op; + this.operator = name; + this.op = op; } public int getValue() { @@ -1340,18 +1207,12 @@ emitInt(instr); } - public static class Casa extends Fmt11 { - - public Casa(Register src1, Register src2, Register dst, Asi asi) { - super(Casa, src1, src2, dst, asi); - } + public void casa(Register rs1, Register rs2, Register rd, Asi asi) { + ld(Casa, new SPARCAddress(rs1, rs2), rd, asi); } - public static class Casxa extends Fmt11 { - - public Casxa(Register src1, Register src2, Register dst, Asi asi) { - super(Casxa, src1, src2, dst, asi); - } + public void casxa(Register rs1, Register rs2, Register rd, Asi asi) { + ld(Casxa, new SPARCAddress(rs1, rs2), rd, asi); } public void cbcondw(ConditionFlag cf, Register rs1, Register rs2, Label lab) { @@ -1435,20 +1296,45 @@ private void op3(Op3s op3, Opfs opf, Register rs1, Register rs2, Register rd) { int b = opf.value << 5 | (rs2 == null ? 0 : rs2.encoding); - fmt10(rd.encoding, op3.value, rs1 == null ? 0 : rs1.encoding, b); + fmt(op3.op.op, rd.encoding, op3.value, rs1 == null ? 0 : rs1.encoding, b); + } + + protected void ld(Op3s op3, SPARCAddress addr, Register rd, Asi asi) { + Register rs1 = addr.getBase(); + if (!addr.getIndex().equals(Register.None)) { + Register rs2 = addr.getIndex(); + if (asi != null) { + int b = rs2.encoding; + b |= asi.value << 5; + fmt(op3.op.op, rd.encoding, op3.value, rs1.encoding, b); + } else { + op3(op3, rs1, rs2, rd); + } + } else { + int imm = addr.getDisplacement(); + op3(op3, rs1, imm, rd); + } + } + + protected void ld(Op3s op3, SPARCAddress addr, Register rd) { + ld(op3, addr, rd, null); + } + + protected void st(Op3s op3, Register rs1, SPARCAddress dest) { + ld(op3, dest, rs1); } protected void op3(Op3s op3, Register rs1, Register rs2, Register rd) { int b = rs2 == null ? 0 : rs2.encoding; int xBit = getXBit(op3); - fmt10(rd.encoding, op3.value, rs1 == null ? 0 : rs1.encoding, b | xBit); + fmt(op3.op.op, rd.encoding, op3.value, rs1 == null ? 0 : rs1.encoding, b | xBit); } protected void op3(Op3s op3, Register rs1, int simm13, Register rd) { assert isSimm13(simm13); int i = 1 << 13; int simm13WithX = simm13 | getXBit(op3); - fmt10(rd.encoding, op3.value, rs1.encoding, i | simm13WithX & ((1 << 13) - 1)); + fmt(op3.op.op, rd.encoding, op3.value, rs1.encoding, i | simm13WithX & ((1 << 13) - 1)); } /** @@ -1562,8 +1448,21 @@ */ // @formatter:on protected void fmt10(int rd, int op3, int rs1, int b) { + fmt(0b10, rd, op3, rs1, b); + } + + // @formatter:off + /** + * Instruction format for most arithmetic stuff. + * <pre> + * | op | rd | op3 | rs1 | b | + * |31 30|29 25|24 19|18 14|13 0| + * </pre> + */ + // @formatter:on + protected void fmt(int op, int rd, int op3, int rs1, int b) { assert isImm(rd, 5) && isImm(op3, 6) && isImm(b, 14) : String.format("rd: 0x%x op3: 0x%x b: 0x%x", rd, op3, b); - int instr = 1 << 31 | rd << 25 | op3 << 19 | rs1 << 14 | b; + int instr = op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | b; emitInt(instr); } @@ -1579,93 +1478,48 @@ op3(Jmpl, rs1, simm13, rd); } - public static class Lddf extends Fmt11 { + public void lddf(SPARCAddress src, Register dst) { + ld(Lddf, src, dst); + } - public Lddf(SPARCAddress src, Register dst) { - super(Lddf, src, dst); - assert dst == f0 || dst == f2 || dst == f4 || dst == f6 || isDoubleFloatRegister(dst); - } - - public Lddf(Register src, Register dst) { - super(Lddf, src, dst); - assert dst == f0 || dst == f2 || dst == f4 || dst == f6 || isDoubleFloatRegister(dst); - } + public void ldf(SPARCAddress src, Register dst) { + ld(Ldf, src, dst); } - public static class Ldf extends Fmt11 { - - public Ldf(SPARCAddress src, Register dst) { - super(Ldf, src, dst); - assert isSingleFloatRegister(dst); - } - - public Ldf(Register src, Register dst) { - super(Ldf, src, dst); - assert isSingleFloatRegister(dst); - } + public void lduh(SPARCAddress src, Register dst) { + ld(Lduh, src, dst); } - public static class Ldsb extends Fmt11 { - - public Ldsb(SPARCAddress src, Register dst) { - super(Ldsb, src, dst); - } + public void ldsh(SPARCAddress src, Register dst) { + ld(Ldsh, src, dst); } - public static class Ldsh extends Fmt11 { - - public Ldsh(SPARCAddress src, Register dst) { - super(Ldsh, src, dst); - } + public void ldub(SPARCAddress src, Register dst) { + ld(Ldub, src, dst); } - public static class Lduh extends Fmt11 { - - public Lduh(SPARCAddress src, Register dst) { - super(Lduh, src, dst); - } + public void ldsb(SPARCAddress src, Register dst) { + ld(Ldsb, src, dst); } - public static class Ldub extends Fmt11 { - - public Ldub(SPARCAddress src, Register dst) { - super(Ldub, src, dst); - } - } - - public static class Ldsw extends Fmt11 { - - public Ldsw(SPARCAddress src, Register dst) { - super(Ldsw, src, dst); - } + public void lduw(SPARCAddress src, Register dst) { + ld(Lduw, src, dst); } - public static class Lduw extends Fmt11 { - - public Lduw(SPARCAddress src, Register dst) { - super(Lduw, src, dst); - } + public void ldsw(SPARCAddress src, Register dst) { + ld(Ldsw, src, dst); } - public static class Ldx extends Fmt11 { - - public Ldx(SPARCAddress src, Register dst) { - super(Ldx, src, dst); - } + public void ldx(SPARCAddress src, Register dst) { + ld(Ldx, src, dst); } - public static class Ldxa extends Fmt11 { - - public Ldxa(Register src1, Register src2, Register dst, Asi asi) { - super(Ldxa, src1, src2, dst, asi); - } + public void ldxa(Register rs1, Register rs2, Register rd, Asi asi) { + ld(Ldxa, new SPARCAddress(rs1, rs2), rd, asi); } - public static class Lduwa extends Fmt11 { - - public Lduwa(Register src1, Register src2, Register dst, Asi asi) { - super(Lduwa, src1, src2, dst, asi); - } + public void lduwa(Register rs1, Register rs2, Register rd, Asi asi) { + ld(Lduwa, new SPARCAddress(rs1, rs2), rd, asi); } public void membar(int barriers) { @@ -1727,40 +1581,45 @@ op3(Popc, g0, simm13, rd); } - public static class Prefetch extends Fmt11 { + public void prefetch(SPARCAddress addr, Fcn fcn) { + Register rs1 = addr.getBase(); + if (addr.getIndex().equals(Register.None)) { + int dis = addr.getDisplacement(); + assert isSimm13(dis); + fmt(Prefetch.op.op, fcn.value, Prefetch.value, rs1.encoding, 1 << 13 | dis & ((1 << 13) - 1)); + } else { + Register rs2 = addr.getIndex(); + fmt(Prefetch.op.op, fcn.value, Prefetch.value, rs1.encoding, rs2.encoding); + } + } - public enum Fcn { - SeveralWritesAndPossiblyReads(2), - SeveralReadsWeak(0), - OneRead(1), - OneWrite(3), - Page(4), - NearestUnifiedCache(17), - SeveralReadsStrong(20), - OneReadStrong(21), - SeveralWritesAndPossiblyReadsStrong(22), - OneWriteStrong(23); + public enum Fcn { + SeveralWritesAndPossiblyReads(2), + SeveralReadsWeak(0), + OneRead(1), + OneWrite(3), + Page(4), + NearestUnifiedCache(17), + SeveralReadsStrong(20), + OneReadStrong(21), + SeveralWritesAndPossiblyReadsStrong(22), + OneWriteStrong(23); - private final int value; + private final int value; - private Fcn(int value) { - this.value = value; - } - - public int getValue() { - return value; - } + private Fcn(int value) { + this.value = value; } - public Prefetch(SPARCAddress addr, Prefetch.Fcn fcn) { - super(Prefetch, addr, fcn); + public int getValue() { + return value; } } // A.44 Read State Register public void rdpc(Register rd) { - op3(Rdreg, r5, g0, rd); + op3(Rd, r5, g0, rd); } public void restore(Register rs1, Register rs2, Register rd) { @@ -1845,46 +1704,28 @@ op3(Impdep1, Fandd, rs1, rs2, rd); } - public static class Stb extends Fmt11 { - - public Stb(Register dst, SPARCAddress addr) { - super(Stb, addr, dst); - } + public void stdf(Register rd, SPARCAddress addr) { + st(Stdf, rd, addr); } - public static class Stdf extends Fmt11 { - - public Stdf(Register dst, SPARCAddress src) { - super(Stdf, src, dst); - } + public void stf(Register rd, SPARCAddress addr) { + st(Stf, rd, addr); } - public static class Stf extends Fmt11 { - - public Stf(Register dst, SPARCAddress src) { - super(Stf, src, dst); - } + public void stb(Register rd, SPARCAddress addr) { + st(Stb, rd, addr); } - public static class Sth extends Fmt11 { - - public Sth(Register dst, SPARCAddress addr) { - super(Sth, addr, dst); - } + public void sth(Register rd, SPARCAddress addr) { + st(Sth, rd, addr); } - public static class Stw extends Fmt11 { - - public Stw(Register dst, SPARCAddress addr) { - super(Stw, addr, dst); - } + public void stw(Register rd, SPARCAddress addr) { + st(Stw, rd, addr); } - public static class Stx extends Fmt11 { - - public Stx(Register dst, SPARCAddress addr) { - super(Stx, addr, dst); - } + public void stx(Register rd, SPARCAddress addr) { + st(Stx, rd, addr); } public void sub(Register rs1, Register rs2, Register rd) { @@ -1939,11 +1780,11 @@ } public void wrccr(Register rs1, Register rs2) { - op3(Wrreg, rs1, rs2, r2); + op3(Wr, rs1, rs2, r2); } public void wrccr(Register rs1, int simm13) { - op3(Wrreg, rs1, simm13, r2); + op3(Wr, rs1, simm13, r2); } public void xor(Register rs1, Register rs2, Register rd) {
--- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java Mon Mar 02 18:44:14 2015 +0100 @@ -122,43 +122,28 @@ nop(); } - public static class Cas extends Casa { - - public Cas(Register src1, Register src2, Register dst) { - super(src1, src2, dst, Asi.ASI_PRIMARY); - } + public void cas(Register rs1, Register rs2, Register rd) { + casa(rs1, rs2, rd, Asi.ASI_PRIMARY); } - public static class Casx extends Casxa { - - public Casx(Register src1, Register src2, Register dst) { - super(src1, src2, dst, Asi.ASI_PRIMARY); - } + public void casx(Register rs1, Register rs2, Register rd) { + casxa(rs1, rs2, rd, Asi.ASI_PRIMARY); } public void clr(Register dst) { or(g0, g0, dst); } - public static class Clrb extends Stb { - - public Clrb(SPARCAddress addr) { - super(g0, addr); - } + public void clrb(SPARCAddress addr) { + stb(g0, addr); } - public static class Clrh extends Sth { - - public Clrh(SPARCAddress addr) { - super(g0, addr); - } + public void clrh(SPARCAddress addr) { + sth(g0, addr); } - public static class Clrx extends Stx { - - public Clrx(SPARCAddress addr) { - super(g0, addr); - } + public void clrx(SPARCAddress addr) { + stx(g0, addr); } public void cmp(Register rs1, Register rs2) {
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotBackend.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotBackend.java Mon Mar 02 18:44:14 2015 +0100 @@ -38,8 +38,6 @@ import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Setx; import com.oracle.graal.compiler.common.cfg.*; import com.oracle.graal.hotspot.*; @@ -113,12 +111,12 @@ // Use SPARCAddress to get the final displacement including the stack bias. SPARCAddress address = new SPARCAddress(sp, -disp); if (SPARCAssembler.isSimm13(address.getDisplacement())) { - new Stx(g0, address).emit(masm); + masm.stx(g0, address); } else { try (SPARCScratchRegister sc = SPARCScratchRegister.get()) { Register scratch = sc.getRegister(); new Setx(address.getDisplacement(), scratch).emit(masm); - new Stx(g0, new SPARCAddress(sp, scratch)).emit(masm); + masm.stx(g0, new SPARCAddress(sp, scratch)); } } } @@ -161,7 +159,7 @@ final int slotSize = 8; for (int i = 0; i < frameSize / slotSize; ++i) { // 0xC1C1C1C1 - new Stx(g0, new SPARCAddress(sp, i * slotSize)).emit(masm); + masm.stx(g0, new SPARCAddress(sp, i * slotSize)); } } } @@ -234,7 +232,7 @@ Register receiver = asRegister(cc.getArgument(0)); SPARCAddress src = new SPARCAddress(receiver, config.hubOffset); - new Ldx(src, scratch).emit(masm); + masm.ldx(src, scratch); masm.cmp(scratch, inlineCacheKlass); } masm.bpcc(NotEqual, NOT_ANNUL, unverifiedStub, Xcc, PREDICT_NOT_TAKEN);
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotCRuntimeCallEpilogueOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotCRuntimeCallEpilogueOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -28,8 +28,6 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.sparc.*; @@ -58,8 +56,8 @@ SPARCMove.move(crb, masm, thread.asValue(LIRKind.value(Kind.Long)), threadTemp, SPARCDelayedControlTransfer.DUMMY); // Reset last Java frame, last Java PC and flags. - new Stx(g0, new SPARCAddress(thread, threadLastJavaSpOffset)).emit(masm); - new Stx(g0, new SPARCAddress(thread, threadLastJavaPcOffset)).emit(masm); - new Stw(g0, new SPARCAddress(thread, threadJavaFrameAnchorFlagsOffset)).emit(masm); + masm.stx(g0, new SPARCAddress(thread, threadLastJavaSpOffset)); + masm.stx(g0, new SPARCAddress(thread, threadLastJavaPcOffset)); + masm.stw(g0, new SPARCAddress(thread, threadJavaFrameAnchorFlagsOffset)); } }
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotCRuntimeCallPrologueOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotCRuntimeCallPrologueOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -28,7 +28,6 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.sparc.*; @@ -52,7 +51,7 @@ public void emitCode(CompilationResultBuilder crb, SPARCMacroAssembler masm) { // Save last Java frame. masm.add(stackPointer, STACK_BIAS, g4); - new Stx(g4, new SPARCAddress(thread, threadLastJavaSpOffset)).emit(masm); + masm.stx(g4, new SPARCAddress(thread, threadLastJavaSpOffset)); // Save the thread register when calling out to the runtime. SPARCMove.move(crb, masm, threadTemp, thread.asValue(LIRKind.value(Kind.Long)), delayedControlTransfer);
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotEnterUnpackFramesStackFrameOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotEnterUnpackFramesStackFrameOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -22,18 +22,17 @@ */ package com.oracle.graal.hotspot.sparc; +import static com.oracle.graal.api.code.ValueUtil.*; +import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; import static com.oracle.graal.sparc.SPARC.*; -import static com.oracle.graal.api.code.ValueUtil.*; -import static com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; -import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; import com.oracle.graal.hotspot.*; import com.oracle.graal.lir.*; +import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.sparc.*; -import com.oracle.graal.lir.asm.*; /** * Emits code that enters a stack frame which is tailored to call the C++ method @@ -82,10 +81,10 @@ // Set up last Java values. masm.add(sp, STACK_BIAS, scratchRegister); - new Stx(scratchRegister, new SPARCAddress(thread, threadLastJavaSpOffset)).emit(masm); + masm.stx(scratchRegister, new SPARCAddress(thread, threadLastJavaSpOffset)); // Clear last Java PC. - new Stx(g0, new SPARCAddress(thread, threadLastJavaPcOffset)).emit(masm); + masm.stx(g0, new SPARCAddress(thread, threadLastJavaPcOffset)); /* * Safe thread register manually since we are not using LEAF_SP for {@link
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotJumpToExceptionHandlerInCallerOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotJumpToExceptionHandlerInCallerOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -31,7 +31,6 @@ import com.oracle.graal.asm.sparc.*; import com.oracle.graal.asm.sparc.SPARCAssembler.CC; import com.oracle.graal.asm.sparc.SPARCAssembler.ConditionFlag; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lduw; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.sparc.*; @@ -69,7 +68,7 @@ SPARCAddress dst = new SPARCAddress(thread, isMethodHandleReturnOffset); try (SPARCScratchRegister scratch = SPARCScratchRegister.get()) { Register scratchReg = scratch.getRegister(); - new Lduw(dst, scratchReg).emit(masm); + masm.lduw(dst, scratchReg); masm.cmp(scratchReg, scratchReg); masm.movcc(ConditionFlag.NotZero, CC.Icc, l7, sp); }
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotLeaveUnpackFramesStackFrameOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotLeaveUnpackFramesStackFrameOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -26,10 +26,6 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stdf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; import com.oracle.graal.hotspot.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; @@ -65,12 +61,12 @@ SPARCAddress lastJavaPc = new SPARCAddress(thread, threadLastJavaPcOffset); // We borrow the threads lastJavaPC to transfer the value from float to i0 - new Stdf(SPARCSaveRegistersOp.RETURN_REGISTER_STORAGE, lastJavaPc).emit(masm); - new Ldx(lastJavaPc, i0).emit(masm); + masm.stdf(SPARCSaveRegistersOp.RETURN_REGISTER_STORAGE, lastJavaPc); + masm.ldx(lastJavaPc, i0); // Clear last Java frame values. - new Stx(g0, lastJavaPc).emit(masm); - new Stx(g0, new SPARCAddress(thread, threadLastJavaSpOffset)).emit(masm); - new Stw(g0, new SPARCAddress(thread, threadJavaFrameAnchorFlagsOffset)).emit(masm); + masm.stx(g0, lastJavaPc); + masm.stx(g0, new SPARCAddress(thread, threadLastJavaSpOffset)); + masm.stw(g0, new SPARCAddress(thread, threadJavaFrameAnchorFlagsOffset)); } }
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotSafepointOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotSafepointOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -27,7 +27,6 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Setx; import com.oracle.graal.hotspot.*; import com.oracle.graal.hotspot.meta.HotSpotCodeCacheProvider.MarkId; @@ -65,7 +64,7 @@ new Setx(config.safepointPollingAddress, scratch).emit(masm); MarkId.recordMark(crb, atReturn ? MarkId.POLL_RETURN_FAR : MarkId.POLL_FAR); final int pos = masm.position(); - new Ldx(new SPARCAddress(scratch, 0), g0).emit(masm); + masm.ldx(new SPARCAddress(scratch, 0), g0); if (state != null) { crb.recordInfopoint(pos, state, InfopointReason.SAFEPOINT); }
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCPrefetchOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCPrefetchOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -25,7 +25,6 @@ import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Prefetch; import com.oracle.graal.asm.sparc.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.sparc.*; @@ -42,7 +41,7 @@ @Override public void emitCode(CompilationResultBuilder crb, SPARCMacroAssembler masm) { - assert instr >= 0 && instr < Prefetch.Fcn.values().length : instr; - new Prefetch(address.toAddress(), Prefetch.Fcn.values()[instr]).emit(masm); + assert instr >= 0 && instr < SPARCAssembler.Fcn.values().length : instr; + masm.prefetch(address.toAddress(), SPARCAssembler.Fcn.values()[instr]); } }
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArrayEqualsOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArrayEqualsOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -41,10 +41,6 @@ import com.oracle.graal.asm.sparc.*; import com.oracle.graal.asm.sparc.SPARCAssembler.CC; import com.oracle.graal.asm.sparc.SPARCAssembler.ConditionFlag; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldub; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lduh; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lduw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.gen.*; @@ -154,8 +150,8 @@ masm.sub(g0, length, length); // Compare the last element first - new Ldx(new SPARCAddress(array1, 0), tempReg1).emit(masm); - new Ldx(new SPARCAddress(array2, 0), tempReg2).emit(masm); + masm.ldx(new SPARCAddress(array1, 0), tempReg1); + masm.ldx(new SPARCAddress(array2, 0), tempReg2); if (hasCBcond) { masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); masm.nop(); // for optimal performance (see manual) @@ -170,16 +166,16 @@ } // Load the first value from array 1 (Later done in back branch delay-slot) - new Ldx(new SPARCAddress(array1, length), tempReg1).emit(masm); + masm.ldx(new SPARCAddress(array1, length), tempReg1); masm.bind(loop); - new Ldx(new SPARCAddress(array2, length), tempReg2).emit(masm); + masm.ldx(new SPARCAddress(array2, length), tempReg2); masm.cmp(tempReg1, tempReg2); masm.bpcc(NotEqual, NOT_ANNUL, falseLabel, Xcc, PREDICT_NOT_TAKEN); // Delay slot, not annul, add for next iteration masm.addcc(length, VECTOR_SIZE, length); // Annul, to prevent access past the array masm.bpcc(NotEqual, ANNUL, loop, Xcc, PREDICT_TAKEN); - new Ldx(new SPARCAddress(array1, length), tempReg1).emit(masm); // Load in delay slot + masm.ldx(new SPARCAddress(array1, length), tempReg1); // Load in delay slot // Tail count zero, therefore we can go to the end if (hasCBcond) { @@ -218,8 +214,8 @@ masm.nop(); } - new Lduw(new SPARCAddress(array1, 0), tempReg1).emit(masm); - new Lduw(new SPARCAddress(array2, 0), tempReg2).emit(masm); + masm.lduw(new SPARCAddress(array1, 0), tempReg1); + masm.lduw(new SPARCAddress(array2, 0), tempReg2); if (hasCBcond) { masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); @@ -246,8 +242,8 @@ masm.nop(); } - new Lduh(new SPARCAddress(array1, 0), tempReg1).emit(masm); - new Lduh(new SPARCAddress(array2, 0), tempReg2).emit(masm); + masm.lduh(new SPARCAddress(array1, 0), tempReg1); + masm.lduh(new SPARCAddress(array2, 0), tempReg2); if (hasCBcond) { masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); @@ -273,8 +269,8 @@ masm.bpcc(NotEqual, NOT_ANNUL, trueLabel, Xcc, PREDICT_TAKEN); masm.nop(); } - new Ldub(new SPARCAddress(array1, 0), tempReg1).emit(masm); - new Ldub(new SPARCAddress(array2, 0), tempReg2).emit(masm); + masm.ldub(new SPARCAddress(array1, 0), tempReg1); + masm.ldub(new SPARCAddress(array2, 0), tempReg2); if (hasCBcond) { masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); } else {
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCByteSwapOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCByteSwapOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -28,7 +28,7 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.*; +import com.oracle.graal.asm.sparc.SPARCAssembler.Asi; import com.oracle.graal.compiler.common.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; @@ -61,10 +61,10 @@ delayedControlTransfer.emitControlTransfer(crb, masm); switch (input.getKind()) { case Int: - new SPARCAssembler.Lduwa(addr.getBase(), addr.getIndex(), asIntReg(result), Asi.ASI_PRIMARY_LITTLE).emit(masm); + masm.lduwa(addr.getBase(), addr.getIndex(), asIntReg(result), Asi.ASI_PRIMARY_LITTLE); break; case Long: - new SPARCAssembler.Ldxa(addr.getBase(), addr.getIndex(), asLongReg(result), Asi.ASI_PRIMARY_LITTLE).emit(masm); + masm.ldxa(addr.getBase(), addr.getIndex(), asLongReg(result), Asi.ASI_PRIMARY_LITTLE); break; default: throw GraalInternalError.shouldNotReachHere();
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCMove.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCMove.java Mon Mar 02 18:44:14 2015 +0100 @@ -31,21 +31,6 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lddf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldsb; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldsh; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldsw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lduh; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stb; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stdf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Sth; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cas; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Casx; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Setx; import com.oracle.graal.compiler.common.*; import com.oracle.graal.lir.*; @@ -149,11 +134,11 @@ switch (inputKind) { case Float: assert resultKindSize == 4; - new Stf(asFloatReg(input), tempAddress).emit(masm); + masm.stf(asFloatReg(input), tempAddress); break; case Double: assert resultKindSize == 8; - new Stdf(asDoubleReg(input), tempAddress).emit(masm); + masm.stdf(asDoubleReg(input), tempAddress); break; case Long: case Int: @@ -161,13 +146,13 @@ case Char: case Byte: if (resultKindSize == 8) { - new Stx(asLongReg(input), tempAddress).emit(masm); + masm.stx(asLongReg(input), tempAddress); } else if (resultKindSize == 4) { - new Stw(asIntReg(input), tempAddress).emit(masm); + masm.stw(asIntReg(input), tempAddress); } else if (resultKindSize == 2) { - new Sth(asIntReg(input), tempAddress).emit(masm); + masm.sth(asIntReg(input), tempAddress); } else if (resultKindSize == 1) { - new Stb(asIntReg(input), tempAddress).emit(masm); + masm.stb(asIntReg(input), tempAddress); } else { throw GraalInternalError.shouldNotReachHere(); } @@ -178,25 +163,25 @@ delayedControlTransfer.emitControlTransfer(crb, masm); switch (resultKind) { case Long: - new Ldx(tempAddress, asLongReg(result)).emit(masm); + masm.ldx(tempAddress, asLongReg(result)); break; case Int: - new Ldsw(tempAddress, asIntReg(result)).emit(masm); + masm.ldsw(tempAddress, asIntReg(result)); break; case Short: - new Ldsh(tempAddress, asIntReg(input)).emit(masm); + masm.ldsh(tempAddress, asIntReg(input)); break; case Char: - new Lduh(tempAddress, asIntReg(input)).emit(masm); + masm.lduh(tempAddress, asIntReg(input)); break; case Byte: - new Ldsb(tempAddress, asIntReg(input)).emit(masm); + masm.ldsb(tempAddress, asIntReg(input)); break; case Float: - new Ldf(tempAddress, asFloatReg(result)).emit(masm); + masm.ldf(tempAddress, asFloatReg(result)); break; case Double: - new Lddf(tempAddress, asDoubleReg(result)).emit(masm); + masm.lddf(tempAddress, asDoubleReg(result)); break; default: GraalInternalError.shouldNotReachHere(); @@ -312,28 +297,28 @@ switch (kind) { case Boolean: case Byte: - new Ldsb(addr, dst).emit(masm); + masm.ldsb(addr, dst); break; case Short: - new Ldsh(addr, dst).emit(masm); + masm.ldsh(addr, dst); break; case Char: - new Lduh(addr, dst).emit(masm); + masm.lduh(addr, dst); break; case Int: - new Ldsw(addr, dst).emit(masm); + masm.ldsw(addr, dst); break; case Long: - new Ldx(addr, dst).emit(masm); + masm.ldx(addr, dst); break; case Float: - new Ldf(addr, dst).emit(masm); + masm.ldf(addr, dst); break; case Double: - new Lddf(addr, dst).emit(masm); + masm.lddf(addr, dst); break; case Object: - new Ldx(addr, dst).emit(masm); + masm.ldx(addr, dst); break; default: throw GraalInternalError.shouldNotReachHere(); @@ -407,7 +392,7 @@ public void emitCode(CompilationResultBuilder crb, SPARCMacroAssembler masm) { delayedControlTransfer.emitControlTransfer(crb, masm); crb.recordImplicitException(masm.position(), state); - new Ldx(new SPARCAddress(asRegister(input), 0), r0).emit(masm); + masm.ldx(new SPARCAddress(asRegister(input), 0), g0); } public Value getCheckedValue() { @@ -498,26 +483,26 @@ switch (kind) { case Boolean: case Byte: - new Stb(asRegister(input), addr).emit(masm); + masm.stb(asRegister(input), addr); break; case Short: case Char: - new Sth(asRegister(input), addr).emit(masm); + masm.sth(asRegister(input), addr); break; case Int: - new Stw(asRegister(input), addr).emit(masm); + masm.stw(asRegister(input), addr); break; case Long: - new Stx(asRegister(input), addr).emit(masm); + masm.stx(asRegister(input), addr); break; case Object: - new Stx(asRegister(input), addr).emit(masm); + masm.stx(asRegister(input), addr); break; case Float: - new Stf(asRegister(input), addr).emit(masm); + masm.stf(asRegister(input), addr); break; case Double: - new Stdf(asRegister(input), addr).emit(masm); + masm.stdf(asRegister(input), addr); break; default: throw GraalInternalError.shouldNotReachHere("missing: " + kind); @@ -550,18 +535,18 @@ switch (kind) { case Boolean: case Byte: - new Stb(g0, addr).emit(masm); + masm.stb(g0, addr); break; case Short: case Char: - new Sth(g0, addr).emit(masm); + masm.sth(g0, addr); break; case Int: - new Stw(g0, addr).emit(masm); + masm.stw(g0, addr); break; case Long: case Object: - new Stx(g0, addr).emit(masm); + masm.stx(g0, addr); break; case Float: case Double: @@ -681,24 +666,24 @@ switch (input.getKind()) { case Byte: case Boolean: - new Stb(src, dst).emit(masm); + masm.stb(src, dst); break; case Char: case Short: - new Sth(src, dst).emit(masm); + masm.sth(src, dst); break; case Int: - new Stw(src, dst).emit(masm); + masm.stw(src, dst); break; case Long: case Object: - new Stx(src, dst).emit(masm); + masm.stx(src, dst); break; case Float: - new Stf(src, dst).emit(masm); + masm.stf(src, dst); break; case Double: - new Stdf(src, dst).emit(masm); + masm.stdf(src, dst); break; default: throw GraalInternalError.shouldNotReachHere("Input is a: " + input.getKind() + "(" + input + ")"); @@ -716,26 +701,26 @@ switch (input.getKind()) { case Boolean: case Byte: - new Ldsb(src, dst).emit(masm); + masm.ldsb(src, dst); break; case Short: - new Ldsh(src, dst).emit(masm); + masm.ldsh(src, dst); break; case Char: - new Lduh(src, dst).emit(masm); + masm.lduh(src, dst); break; case Int: - new Ldsw(src, dst).emit(masm); + masm.ldsw(src, dst); break; case Long: case Object: - new Ldx(src, dst).emit(masm); + masm.ldx(src, dst); break; case Float: - new Ldf(src, dst).emit(masm); + masm.ldf(src, dst); break; case Double: - new Lddf(src, dst).emit(masm); + masm.lddf(src, dst); break; default: throw GraalInternalError.shouldNotReachHere("Input is a: " + input.getKind()); @@ -798,7 +783,7 @@ new Setx(0, scratch, true).emit(masm); // Now load the float value delaySlotLir.emitControlTransfer(crb, masm); - new Ldf(scratch, asFloatReg(result)).emit(masm); + masm.ldf(new SPARCAddress(scratch, 0), asFloatReg(result)); } } break; @@ -825,7 +810,7 @@ new Setx(0, scratch, true).emit(masm); delaySlotLir.emitControlTransfer(crb, masm); // Now load the float value - new Lddf(scratch, asDoubleReg(result)).emit(masm); + masm.lddf(new SPARCAddress(scratch, 0), asDoubleReg(result)); } } break; @@ -850,11 +835,11 @@ protected static void compareAndSwap(SPARCMacroAssembler masm, AllocatableValue address, AllocatableValue cmpValue, AllocatableValue newValue) { switch (cmpValue.getKind()) { case Int: - new Cas(asRegister(address), asRegister(cmpValue), asRegister(newValue)).emit(masm); + masm.cas(asRegister(address), asRegister(cmpValue), asRegister(newValue)); break; case Long: case Object: - new Casx(asRegister(address), asRegister(cmpValue), asRegister(newValue)).emit(masm); + masm.casx(asRegister(address), asRegister(cmpValue), asRegister(newValue)); break; default: throw GraalInternalError.shouldNotReachHere();
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCSaveRegistersOp.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCSaveRegistersOp.java Mon Mar 02 18:44:14 2015 +0100 @@ -29,8 +29,6 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lddf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; import com.oracle.graal.lir.*; import com.oracle.graal.lir.StandardOp.SaveRegistersOp; import com.oracle.graal.lir.asm.*; @@ -84,8 +82,8 @@ // We abuse the first stackslot for transferring i0 to return_register_storage // assert slots.length >= 1; SPARCAddress slot0Address = (SPARCAddress) crb.asAddress(slots[0]); - new Stx(SPARC.i0, slot0Address).emit(masm); - new Lddf(slot0Address, RETURN_REGISTER_STORAGE).emit(masm); + masm.stx(SPARC.i0, slot0Address); + masm.lddf(slot0Address, RETURN_REGISTER_STORAGE); // Now save the registers for (int i = 0; i < savedRegisters.length; i++) {
--- a/graal/com.oracle.graal.truffle.hotspot.sparc/src/com/oracle/graal/truffle/hotspot/sparc/SPARCOptimizedCallTargetInstumentationFactory.java Mon Mar 02 12:14:36 2015 +0100 +++ b/graal/com.oracle.graal.truffle.hotspot.sparc/src/com/oracle/graal/truffle/hotspot/sparc/SPARCOptimizedCallTargetInstumentationFactory.java Mon Mar 02 18:44:14 2015 +0100 @@ -35,7 +35,6 @@ import com.oracle.graal.api.runtime.*; import com.oracle.graal.asm.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; import com.oracle.graal.hotspot.*; import com.oracle.graal.hotspot.meta.*; import com.oracle.graal.lir.asm.*; @@ -61,7 +60,7 @@ SPARCAddress codeBlobAddress = new SPARCAddress(thisRegister, getFieldOffset("address", InstalledCode.class)); SPARCAddress verifiedEntryPointAddress = new SPARCAddress(spillRegister, config.nmethodEntryOffset); - new Ldx(codeBlobAddress, spillRegister).emit(asm); + asm.ldx(codeBlobAddress, spillRegister); if (asm.hasFeature(CBCOND)) { asm.cbcondx(Equal, spillRegister, 0, doProlog); } else { @@ -69,7 +68,7 @@ asm.bpcc(Equal, NOT_ANNUL, doProlog, Xcc, PREDICT_NOT_TAKEN); asm.nop(); } - new Ldx(verifiedEntryPointAddress, spillRegister).emit(asm); // in delay slot + asm.ldx(verifiedEntryPointAddress, spillRegister); // in delay slot asm.jmp(spillRegister); asm.nop(); asm.bind(doProlog);