Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_32.cpp @ 20347:3374ec4c4448
Merge
author | amurillo |
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date | Tue, 26 Aug 2014 13:38:33 -0700 |
parents | 0bf37f737702 |
children | 52b4284cb496 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
1972 | 28 #include "code/debugInfoRec.hpp" |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
44 #define __ masm-> | |
45 | |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class RegisterSaver { |
49 // Capture info about frame layout | |
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50 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off |
0 | 51 enum layout { |
52 fpu_state_off = 0, | |
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53 fpu_state_end = fpu_state_off+FPUStateSizeInWords, |
0 | 54 st0_off, st0H_off, |
55 st1_off, st1H_off, | |
56 st2_off, st2H_off, | |
57 st3_off, st3H_off, | |
58 st4_off, st4H_off, | |
59 st5_off, st5H_off, | |
60 st6_off, st6H_off, | |
61 st7_off, st7H_off, | |
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62 xmm_off, |
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63 DEF_XMM_OFFS(0), |
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64 DEF_XMM_OFFS(1), |
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65 DEF_XMM_OFFS(2), |
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66 DEF_XMM_OFFS(3), |
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67 DEF_XMM_OFFS(4), |
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68 DEF_XMM_OFFS(5), |
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69 DEF_XMM_OFFS(6), |
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70 DEF_XMM_OFFS(7), |
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71 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word |
0 | 72 rdi_off, |
73 rsi_off, | |
74 ignore_off, // extra copy of rbp, | |
75 rsp_off, | |
76 rbx_off, | |
77 rdx_off, | |
78 rcx_off, | |
79 rax_off, | |
80 // The frame sender code expects that rbp will be in the "natural" place and | |
81 // will override any oopMap setting for it. We must therefore force the layout | |
82 // so that it agrees with the frame sender code. | |
83 rbp_off, | |
84 return_off, // slot for return address | |
85 reg_save_size }; | |
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86 enum { FPU_regs_live = flags_off - fpu_state_end }; |
0 | 87 |
88 public: | |
89 | |
90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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91 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false); |
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92 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
0 | 93 |
94 static int rax_offset() { return rax_off; } | |
95 static int rbx_offset() { return rbx_off; } | |
96 | |
97 // Offsets into the register save area | |
98 // Used by deoptimization when it is managing result register | |
99 // values on its own | |
100 | |
101 static int raxOffset(void) { return rax_off; } | |
102 static int rdxOffset(void) { return rdx_off; } | |
103 static int rbxOffset(void) { return rbx_off; } | |
104 static int xmm0Offset(void) { return xmm0_off; } | |
105 // This really returns a slot in the fp save area, which one is not important | |
106 static int fpResultOffset(void) { return st0_off; } | |
107 | |
108 // During deoptimization only the result register need to be restored | |
109 // all the other values have already been extracted. | |
110 | |
111 static void restore_result_registers(MacroAssembler* masm); | |
112 | |
113 }; | |
114 | |
115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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116 int* total_frame_words, bool verify_fpu, bool save_vectors) { |
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117 int vect_words = 0; |
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118 #ifdef COMPILER2 |
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119 if (save_vectors) { |
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120 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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121 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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122 // Save upper half of YMM registes |
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123 vect_words = 8 * 16 / wordSize; |
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124 additional_frame_words += vect_words; |
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125 } |
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126 #else |
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127 assert(!save_vectors, "vectors are generated only by C2"); |
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128 #endif |
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129 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; |
0 | 130 int frame_words = frame_size_in_bytes / wordSize; |
131 *total_frame_words = frame_words; | |
132 | |
133 assert(FPUStateSizeInWords == 27, "update stack layout"); | |
134 | |
135 // save registers, fpu state, and flags | |
136 // We assume caller has already has return address slot on the stack | |
137 // We push epb twice in this sequence because we want the real rbp, | |
304 | 138 // to be under the return like a normal enter and we want to use pusha |
0 | 139 // We push by hand instead of pusing push |
140 __ enter(); | |
304 | 141 __ pusha(); |
142 __ pushf(); | |
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143 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space |
0 | 144 __ push_FPU_state(); // Save FPU state & init |
145 | |
146 if (verify_fpu) { | |
147 // Some stubs may have non standard FPU control word settings so | |
148 // only check and reset the value when it required to be the | |
149 // standard value. The safepoint blob in particular can be used | |
150 // in methods which are using the 24 bit control word for | |
151 // optimized float math. | |
152 | |
153 #ifdef ASSERT | |
154 // Make sure the control word has the expected value | |
155 Label ok; | |
156 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
157 __ jccb(Assembler::equal, ok); | |
158 __ stop("corrupted control word detected"); | |
159 __ bind(ok); | |
160 #endif | |
161 | |
162 // Reset the control word to guard against exceptions being unmasked | |
163 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
164 // into the on stack copy and then reload that to make sure that the | |
165 // current and future values are correct. | |
166 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
167 } | |
168 | |
169 __ frstor(Address(rsp, 0)); | |
170 if (!verify_fpu) { | |
171 // Set the control word so that exceptions are masked for the | |
172 // following code. | |
173 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
174 } | |
175 | |
176 // Save the FPU registers in de-opt-able form | |
177 | |
178 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0) | |
179 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1) | |
180 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2) | |
181 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3) | |
182 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4) | |
183 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5) | |
184 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6) | |
185 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7) | |
186 | |
187 if( UseSSE == 1 ) { // Save the XMM state | |
188 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0); | |
189 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1); | |
190 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2); | |
191 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3); | |
192 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4); | |
193 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5); | |
194 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6); | |
195 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7); | |
196 } else if( UseSSE >= 2 ) { | |
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197 // Save whole 128bit (16 bytes) XMM regiters |
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198 __ movdqu(Address(rsp,xmm0_off*wordSize),xmm0); |
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199 __ movdqu(Address(rsp,xmm1_off*wordSize),xmm1); |
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200 __ movdqu(Address(rsp,xmm2_off*wordSize),xmm2); |
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201 __ movdqu(Address(rsp,xmm3_off*wordSize),xmm3); |
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202 __ movdqu(Address(rsp,xmm4_off*wordSize),xmm4); |
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203 __ movdqu(Address(rsp,xmm5_off*wordSize),xmm5); |
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204 __ movdqu(Address(rsp,xmm6_off*wordSize),xmm6); |
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205 __ movdqu(Address(rsp,xmm7_off*wordSize),xmm7); |
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206 } |
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207 |
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208 if (vect_words > 0) { |
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209 assert(vect_words*wordSize == 128, ""); |
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210 __ subptr(rsp, 128); // Save upper half of YMM registes |
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211 __ vextractf128h(Address(rsp, 0),xmm0); |
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212 __ vextractf128h(Address(rsp, 16),xmm1); |
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213 __ vextractf128h(Address(rsp, 32),xmm2); |
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214 __ vextractf128h(Address(rsp, 48),xmm3); |
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215 __ vextractf128h(Address(rsp, 64),xmm4); |
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216 __ vextractf128h(Address(rsp, 80),xmm5); |
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217 __ vextractf128h(Address(rsp, 96),xmm6); |
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218 __ vextractf128h(Address(rsp,112),xmm7); |
0 | 219 } |
220 | |
221 // Set an oopmap for the call site. This oopmap will map all | |
222 // oop-registers and debug-info registers as callee-saved. This | |
223 // will allow deoptimization at this safepoint to find all possible | |
224 // debug-info recordings, as well as let GC find all oops. | |
225 | |
226 OopMapSet *oop_maps = new OopMapSet(); | |
227 OopMap* map = new OopMap( frame_words, 0 ); | |
228 | |
229 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) | |
230 | |
231 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg()); | |
232 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg()); | |
233 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg()); | |
234 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg()); | |
235 // rbp, location is known implicitly, no oopMap | |
236 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg()); | |
237 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg()); | |
238 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg()); | |
239 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg()); | |
240 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg()); | |
241 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg()); | |
242 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg()); | |
243 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg()); | |
244 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg()); | |
245 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg()); | |
246 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg()); | |
247 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg()); | |
248 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg()); | |
249 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg()); | |
250 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg()); | |
251 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg()); | |
252 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg()); | |
253 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg()); | |
254 // %%% This is really a waste but we'll keep things as they were for now | |
255 if (true) { | |
256 #define NEXTREG(x) (x)->as_VMReg()->next() | |
257 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0))); | |
258 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1))); | |
259 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2))); | |
260 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3))); | |
261 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4))); | |
262 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5))); | |
263 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6))); | |
264 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7))); | |
265 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0)); | |
266 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1)); | |
267 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2)); | |
268 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3)); | |
269 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4)); | |
270 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5)); | |
271 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6)); | |
272 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7)); | |
273 #undef NEXTREG | |
274 #undef STACK_OFFSET | |
275 } | |
276 | |
277 return map; | |
278 | |
279 } | |
280 | |
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281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
0 | 282 // Recover XMM & FPU state |
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283 int additional_frame_bytes = 0; |
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284 #ifdef COMPILER2 |
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285 if (restore_vectors) { |
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286 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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287 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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288 additional_frame_bytes = 128; |
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289 } |
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290 #else |
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291 assert(!restore_vectors, "vectors are generated only by C2"); |
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292 #endif |
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293 if (UseSSE == 1) { |
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294 assert(additional_frame_bytes == 0, ""); |
0 | 295 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize)); |
296 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize)); | |
297 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize)); | |
298 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize)); | |
299 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize)); | |
300 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize)); | |
301 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize)); | |
302 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize)); | |
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303 } else if (UseSSE >= 2) { |
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304 #define STACK_ADDRESS(x) Address(rsp,(x)*wordSize + additional_frame_bytes) |
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305 __ movdqu(xmm0,STACK_ADDRESS(xmm0_off)); |
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306 __ movdqu(xmm1,STACK_ADDRESS(xmm1_off)); |
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307 __ movdqu(xmm2,STACK_ADDRESS(xmm2_off)); |
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308 __ movdqu(xmm3,STACK_ADDRESS(xmm3_off)); |
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309 __ movdqu(xmm4,STACK_ADDRESS(xmm4_off)); |
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310 __ movdqu(xmm5,STACK_ADDRESS(xmm5_off)); |
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311 __ movdqu(xmm6,STACK_ADDRESS(xmm6_off)); |
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312 __ movdqu(xmm7,STACK_ADDRESS(xmm7_off)); |
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313 #undef STACK_ADDRESS |
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314 } |
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315 if (restore_vectors) { |
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316 // Restore upper half of YMM registes. |
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317 assert(additional_frame_bytes == 128, ""); |
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318 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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319 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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320 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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321 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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322 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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323 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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324 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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325 __ vinsertf128h(xmm7, Address(rsp,112)); |
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326 __ addptr(rsp, additional_frame_bytes); |
0 | 327 } |
328 __ pop_FPU_state(); | |
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329 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers |
304 | 330 |
331 __ popf(); | |
332 __ popa(); | |
0 | 333 // Get the rbp, described implicitly by the frame sender code (no oopMap) |
304 | 334 __ pop(rbp); |
0 | 335 |
336 } | |
337 | |
338 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
339 | |
340 // Just restore result register. Only used by deoptimization. By | |
341 // now any callee save register that needs to be restore to a c2 | |
342 // caller of the deoptee has been extracted into the vframeArray | |
343 // and will be stuffed into the c2i adapter we create for later | |
344 // restoration so only result registers need to be restored here. | |
345 // | |
346 | |
347 __ frstor(Address(rsp, 0)); // Restore fpu state | |
348 | |
349 // Recover XMM & FPU state | |
350 if( UseSSE == 1 ) { | |
351 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); | |
352 } else if( UseSSE >= 2 ) { | |
353 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); | |
354 } | |
304 | 355 __ movptr(rax, Address(rsp, rax_off*wordSize)); |
356 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); | |
0 | 357 // Pop all of the register save are off the stack except the return address |
304 | 358 __ addptr(rsp, return_off * wordSize); |
0 | 359 } |
360 | |
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361 // Is vector's size (in bytes) bigger than a size saved by default? |
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362 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions. |
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363 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated. |
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364 bool SharedRuntime::is_wide_vector(int size) { |
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365 return size > 16; |
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366 } |
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367 |
0 | 368 // The java_calling_convention describes stack locations as ideal slots on |
369 // a frame with no abi restrictions. Since we must observe abi restrictions | |
370 // (like the placement of the register window) the slots must be biased by | |
371 // the following value. | |
372 static int reg2offset_in(VMReg r) { | |
373 // Account for saved rbp, and return address | |
374 // This should really be in_preserve_stack_slots | |
375 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; | |
376 } | |
377 | |
378 static int reg2offset_out(VMReg r) { | |
379 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
380 } | |
381 | |
382 // --------------------------------------------------------------------------- | |
383 // Read the array of BasicTypes from a signature, and compute where the | |
384 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
385 // quantities. Values less than SharedInfo::stack0 are registers, those above | |
386 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
387 // as framesizes are fixed. | |
388 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
390 // up to RegisterImpl::number_of_registers) are the 32-bit | |
391 // integer registers. | |
392 | |
393 // Pass first two oop/int args in registers ECX and EDX. | |
394 // Pass first two float/double args in registers XMM0 and XMM1. | |
395 // Doubles have precedence, so if you pass a mix of floats and doubles | |
396 // the doubles will grab the registers before the floats will. | |
397 | |
398 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
399 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
400 // units regardless of build. Of course for i486 there is no 64 bit build | |
401 | |
402 | |
403 // --------------------------------------------------------------------------- | |
404 // The compiled Java calling convention. | |
405 // Pass first two oop/int args in registers ECX and EDX. | |
406 // Pass first two float/double args in registers XMM0 and XMM1. | |
407 // Doubles have precedence, so if you pass a mix of floats and doubles | |
408 // the doubles will grab the registers before the floats will. | |
409 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
410 VMRegPair *regs, | |
411 int total_args_passed, | |
412 int is_outgoing) { | |
413 uint stack = 0; // Starting stack position for args on stack | |
414 | |
415 | |
416 // Pass first two oop/int args in registers ECX and EDX. | |
417 uint reg_arg0 = 9999; | |
418 uint reg_arg1 = 9999; | |
419 | |
420 // Pass first two float/double args in registers XMM0 and XMM1. | |
421 // Doubles have precedence, so if you pass a mix of floats and doubles | |
422 // the doubles will grab the registers before the floats will. | |
423 // CNC - TURNED OFF FOR non-SSE. | |
424 // On Intel we have to round all doubles (and most floats) at | |
425 // call sites by storing to the stack in any case. | |
426 // UseSSE=0 ==> Don't Use ==> 9999+0 | |
427 // UseSSE=1 ==> Floats only ==> 9999+1 | |
428 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 | |
429 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; | |
430 uint fargs = (UseSSE>=2) ? 2 : UseSSE; | |
431 uint freg_arg0 = 9999+fargs; | |
432 uint freg_arg1 = 9999+fargs; | |
433 | |
434 // Pass doubles & longs aligned on the stack. First count stack slots for doubles | |
435 int i; | |
436 for( i = 0; i < total_args_passed; i++) { | |
437 if( sig_bt[i] == T_DOUBLE ) { | |
438 // first 2 doubles go in registers | |
439 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; | |
440 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; | |
441 else // Else double is passed low on the stack to be aligned. | |
442 stack += 2; | |
443 } else if( sig_bt[i] == T_LONG ) { | |
444 stack += 2; | |
445 } | |
446 } | |
447 int dstack = 0; // Separate counter for placing doubles | |
448 | |
449 // Now pick where all else goes. | |
450 for( i = 0; i < total_args_passed; i++) { | |
451 // From the type and the argument number (count) compute the location | |
452 switch( sig_bt[i] ) { | |
453 case T_SHORT: | |
454 case T_CHAR: | |
455 case T_BYTE: | |
456 case T_BOOLEAN: | |
457 case T_INT: | |
458 case T_ARRAY: | |
459 case T_OBJECT: | |
460 case T_ADDRESS: | |
461 if( reg_arg0 == 9999 ) { | |
462 reg_arg0 = i; | |
463 regs[i].set1(rcx->as_VMReg()); | |
464 } else if( reg_arg1 == 9999 ) { | |
465 reg_arg1 = i; | |
466 regs[i].set1(rdx->as_VMReg()); | |
467 } else { | |
468 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
469 } | |
470 break; | |
471 case T_FLOAT: | |
472 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { | |
473 freg_arg0 = i; | |
474 regs[i].set1(xmm0->as_VMReg()); | |
475 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { | |
476 freg_arg1 = i; | |
477 regs[i].set1(xmm1->as_VMReg()); | |
478 } else { | |
479 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
480 } | |
481 break; | |
482 case T_LONG: | |
483 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
484 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
485 dstack += 2; | |
486 break; | |
487 case T_DOUBLE: | |
488 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
489 if( freg_arg0 == (uint)i ) { | |
490 regs[i].set2(xmm0->as_VMReg()); | |
491 } else if( freg_arg1 == (uint)i ) { | |
492 regs[i].set2(xmm1->as_VMReg()); | |
493 } else { | |
494 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
495 dstack += 2; | |
496 } | |
497 break; | |
498 case T_VOID: regs[i].set_bad(); break; | |
499 break; | |
500 default: | |
501 ShouldNotReachHere(); | |
502 break; | |
503 } | |
504 } | |
505 | |
506 // return value can be odd number of VMRegImpl stack slots make multiple of 2 | |
507 return round_to(stack, 2); | |
508 } | |
509 | |
510 // Patch the callers callsite with entry to compiled code if it exists. | |
511 static void patch_callers_callsite(MacroAssembler *masm) { | |
512 Label L; | |
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513 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 514 __ jcc(Assembler::equal, L); |
515 // Schedule the branch target address early. | |
516 // Call into the VM to patch the caller, then jump to compiled callee | |
517 // rax, isn't live so capture return address while we easily can | |
304 | 518 __ movptr(rax, Address(rsp, 0)); |
519 __ pusha(); | |
520 __ pushf(); | |
0 | 521 |
522 if (UseSSE == 1) { | |
304 | 523 __ subptr(rsp, 2*wordSize); |
0 | 524 __ movflt(Address(rsp, 0), xmm0); |
525 __ movflt(Address(rsp, wordSize), xmm1); | |
526 } | |
527 if (UseSSE >= 2) { | |
304 | 528 __ subptr(rsp, 4*wordSize); |
0 | 529 __ movdbl(Address(rsp, 0), xmm0); |
530 __ movdbl(Address(rsp, 2*wordSize), xmm1); | |
531 } | |
532 #ifdef COMPILER2 | |
533 // C2 may leave the stack dirty if not in SSE2+ mode | |
534 if (UseSSE >= 2) { | |
535 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
536 } else { | |
537 __ empty_FPU_stack(); | |
538 } | |
539 #endif /* COMPILER2 */ | |
540 | |
541 // VM needs caller's callsite | |
304 | 542 __ push(rax); |
0 | 543 // VM needs target method |
304 | 544 __ push(rbx); |
0 | 545 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
304 | 546 __ addptr(rsp, 2*wordSize); |
0 | 547 |
548 if (UseSSE == 1) { | |
549 __ movflt(xmm0, Address(rsp, 0)); | |
550 __ movflt(xmm1, Address(rsp, wordSize)); | |
304 | 551 __ addptr(rsp, 2*wordSize); |
0 | 552 } |
553 if (UseSSE >= 2) { | |
554 __ movdbl(xmm0, Address(rsp, 0)); | |
555 __ movdbl(xmm1, Address(rsp, 2*wordSize)); | |
304 | 556 __ addptr(rsp, 4*wordSize); |
0 | 557 } |
558 | |
304 | 559 __ popf(); |
560 __ popa(); | |
0 | 561 __ bind(L); |
562 } | |
563 | |
564 | |
565 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { | |
1506 | 566 int next_off = st_off - Interpreter::stackElementSize; |
567 __ movdbl(Address(rsp, next_off), r); | |
0 | 568 } |
569 | |
570 static void gen_c2i_adapter(MacroAssembler *masm, | |
571 int total_args_passed, | |
572 int comp_args_on_stack, | |
573 const BasicType *sig_bt, | |
574 const VMRegPair *regs, | |
575 Label& skip_fixup) { | |
576 // Before we get into the guts of the C2I adapter, see if we should be here | |
577 // at all. We've come from compiled code and are attempting to jump to the | |
578 // interpreter, which means the caller made a static call to get here | |
579 // (vcalls always get a compiled target if there is one). Check for a | |
580 // compiled target. If there is one, we need to patch the caller's call. | |
581 patch_callers_callsite(masm); | |
582 | |
583 __ bind(skip_fixup); | |
584 | |
585 #ifdef COMPILER2 | |
586 // C2 may leave the stack dirty if not in SSE2+ mode | |
587 if (UseSSE >= 2) { | |
588 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
589 } else { | |
590 __ empty_FPU_stack(); | |
591 } | |
592 #endif /* COMPILER2 */ | |
593 | |
594 // Since all args are passed on the stack, total_args_passed * interpreter_ | |
595 // stack_element_size is the | |
596 // space we need. | |
1506 | 597 int extraspace = total_args_passed * Interpreter::stackElementSize; |
0 | 598 |
599 // Get return address | |
304 | 600 __ pop(rax); |
0 | 601 |
602 // set senderSP value | |
304 | 603 __ movptr(rsi, rsp); |
604 | |
605 __ subptr(rsp, extraspace); | |
0 | 606 |
607 // Now write the args into the outgoing interpreter space | |
608 for (int i = 0; i < total_args_passed; i++) { | |
609 if (sig_bt[i] == T_VOID) { | |
610 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
611 continue; | |
612 } | |
613 | |
614 // st_off points to lowest address on stack. | |
1506 | 615 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; |
616 int next_off = st_off - Interpreter::stackElementSize; | |
304 | 617 |
0 | 618 // Say 4 args: |
619 // i st_off | |
620 // 0 12 T_LONG | |
621 // 1 8 T_VOID | |
622 // 2 4 T_OBJECT | |
623 // 3 0 T_BOOL | |
624 VMReg r_1 = regs[i].first(); | |
625 VMReg r_2 = regs[i].second(); | |
626 if (!r_1->is_valid()) { | |
627 assert(!r_2->is_valid(), ""); | |
628 continue; | |
629 } | |
630 | |
631 if (r_1->is_stack()) { | |
632 // memory to memory use fpu stack top | |
633 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
634 | |
635 if (!r_2->is_valid()) { | |
636 __ movl(rdi, Address(rsp, ld_off)); | |
304 | 637 __ movptr(Address(rsp, st_off), rdi); |
0 | 638 } else { |
639 | |
640 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW | |
641 // st_off == MSW, st_off-wordSize == LSW | |
642 | |
304 | 643 __ movptr(rdi, Address(rsp, ld_off)); |
644 __ movptr(Address(rsp, next_off), rdi); | |
645 #ifndef _LP64 | |
646 __ movptr(rdi, Address(rsp, ld_off + wordSize)); | |
647 __ movptr(Address(rsp, st_off), rdi); | |
648 #else | |
649 #ifdef ASSERT | |
650 // Overwrite the unused slot with known junk | |
651 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
652 __ movptr(Address(rsp, st_off), rax); | |
653 #endif /* ASSERT */ | |
654 #endif // _LP64 | |
0 | 655 } |
656 } else if (r_1->is_Register()) { | |
657 Register r = r_1->as_Register(); | |
658 if (!r_2->is_valid()) { | |
659 __ movl(Address(rsp, st_off), r); | |
660 } else { | |
661 // long/double in gpr | |
304 | 662 NOT_LP64(ShouldNotReachHere()); |
663 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
664 // T_DOUBLE and T_LONG use two slots in the interpreter | |
665 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
666 // long/double in gpr | |
667 #ifdef ASSERT | |
668 // Overwrite the unused slot with known junk | |
669 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); | |
670 __ movptr(Address(rsp, st_off), rax); | |
671 #endif /* ASSERT */ | |
672 __ movptr(Address(rsp, next_off), r); | |
673 } else { | |
674 __ movptr(Address(rsp, st_off), r); | |
675 } | |
0 | 676 } |
677 } else { | |
678 assert(r_1->is_XMMRegister(), ""); | |
679 if (!r_2->is_valid()) { | |
680 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
681 } else { | |
682 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); | |
683 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); | |
684 } | |
685 } | |
686 } | |
687 | |
688 // Schedule the branch target address early. | |
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689 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
0 | 690 // And repush original return address |
304 | 691 __ push(rax); |
0 | 692 __ jmp(rcx); |
693 } | |
694 | |
695 | |
696 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { | |
1506 | 697 int next_val_off = ld_off - Interpreter::stackElementSize; |
698 __ movdbl(r, Address(saved_sp, next_val_off)); | |
0 | 699 } |
700 | |
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701 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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702 address code_start, address code_end, |
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703 Label& L_ok) { |
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704 Label L_fail; |
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705 __ lea(temp_reg, ExternalAddress(code_start)); |
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706 __ cmpptr(pc_reg, temp_reg); |
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707 __ jcc(Assembler::belowEqual, L_fail); |
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708 __ lea(temp_reg, ExternalAddress(code_end)); |
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709 __ cmpptr(pc_reg, temp_reg); |
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710 __ jcc(Assembler::below, L_ok); |
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711 __ bind(L_fail); |
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712 } |
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713 |
0 | 714 static void gen_i2c_adapter(MacroAssembler *masm, |
715 int total_args_passed, | |
716 int comp_args_on_stack, | |
717 const BasicType *sig_bt, | |
718 const VMRegPair *regs) { | |
719 | |
720 // Note: rsi contains the senderSP on entry. We must preserve it since | |
721 // we may do a i2c -> c2i transition if we lose a race where compiled | |
722 // code goes non-entrant while we get args ready. | |
723 | |
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724 // Adapters can be frameless because they do not require the caller |
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725 // to perform additional cleanup work, such as correcting the stack pointer. |
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726 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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727 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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728 // even if a callee has modified the stack pointer. |
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729 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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730 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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731 // up via the senderSP register). |
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732 // In other words, if *either* the caller or callee is interpreted, we can |
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733 // get the stack pointer repaired after a call. |
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734 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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735 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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736 // both caller and callee would be compiled methods, and neither would |
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737 // clean up the stack pointer changes performed by the two adapters. |
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738 // If this happens, control eventually transfers back to the compiled |
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739 // caller, but with an uncorrected stack, causing delayed havoc. |
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740 |
0 | 741 // Pick up the return address |
304 | 742 __ movptr(rax, Address(rsp, 0)); |
0 | 743 |
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744 if (VerifyAdapterCalls && |
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745 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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746 // So, let's test for cascading c2i/i2c adapters right now. |
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747 // assert(Interpreter::contains($return_addr) || |
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748 // StubRoutines::contains($return_addr), |
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749 // "i2c adapter must return to an interpreter frame"); |
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750 __ block_comment("verify_i2c { "); |
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751 Label L_ok; |
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752 if (Interpreter::code() != NULL) |
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753 range_check(masm, rax, rdi, |
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754 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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755 L_ok); |
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756 if (StubRoutines::code1() != NULL) |
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757 range_check(masm, rax, rdi, |
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758 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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759 L_ok); |
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760 if (StubRoutines::code2() != NULL) |
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761 range_check(masm, rax, rdi, |
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762 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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763 L_ok); |
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764 const char* msg = "i2c adapter must return to an interpreter frame"; |
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765 __ block_comment(msg); |
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766 __ stop(msg); |
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767 __ bind(L_ok); |
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768 __ block_comment("} verify_i2ce "); |
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769 } |
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770 |
0 | 771 // Must preserve original SP for loading incoming arguments because |
772 // we need to align the outgoing SP for compiled code. | |
304 | 773 __ movptr(rdi, rsp); |
0 | 774 |
775 // Cut-out for having no stack args. Since up to 2 int/oop args are passed | |
776 // in registers, we will occasionally have no stack args. | |
777 int comp_words_on_stack = 0; | |
778 if (comp_args_on_stack) { | |
779 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
780 // registers are below. By subtracting stack0, we either get a negative | |
781 // number (all values in registers) or the maximum stack slot accessed. | |
782 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); | |
783 // Convert 4-byte stack slots to words. | |
784 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; | |
785 // Round up to miminum stack alignment, in wordSize | |
786 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 787 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 788 } |
789 | |
790 // Align the outgoing SP | |
304 | 791 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 792 |
793 // push the return address on the stack (note that pushing, rather | |
794 // than storing it, yields the correct frame alignment for the callee) | |
304 | 795 __ push(rax); |
0 | 796 |
797 // Put saved SP in another register | |
798 const Register saved_sp = rax; | |
304 | 799 __ movptr(saved_sp, rdi); |
0 | 800 |
801 | |
802 // Will jump to the compiled code just as if compiled code was doing it. | |
803 // Pre-load the register-jump target early, to schedule it better. | |
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804 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
0 | 805 |
806 // Now generate the shuffle code. Pick up all register args and move the | |
807 // rest through the floating point stack top. | |
808 for (int i = 0; i < total_args_passed; i++) { | |
809 if (sig_bt[i] == T_VOID) { | |
810 // Longs and doubles are passed in native word order, but misaligned | |
811 // in the 32-bit build. | |
812 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
813 continue; | |
814 } | |
815 | |
816 // Pick up 0, 1 or 2 words from SP+offset. | |
817 | |
818 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
819 "scrambled load targets?"); | |
820 // Load in argument order going down. | |
1506 | 821 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
0 | 822 // Point to interpreter value (vs. tag) |
1506 | 823 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 824 // |
825 // | |
826 // | |
827 VMReg r_1 = regs[i].first(); | |
828 VMReg r_2 = regs[i].second(); | |
829 if (!r_1->is_valid()) { | |
830 assert(!r_2->is_valid(), ""); | |
831 continue; | |
832 } | |
833 if (r_1->is_stack()) { | |
834 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
835 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
836 | |
837 // We can use rsi as a temp here because compiled code doesn't need rsi as an input | |
838 // and if we end up going thru a c2i because of a miss a reasonable value of rsi | |
839 // we be generated. | |
840 if (!r_2->is_valid()) { | |
841 // __ fld_s(Address(saved_sp, ld_off)); | |
842 // __ fstp_s(Address(rsp, st_off)); | |
843 __ movl(rsi, Address(saved_sp, ld_off)); | |
304 | 844 __ movptr(Address(rsp, st_off), rsi); |
0 | 845 } else { |
846 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
847 // are accessed as negative so LSW is at LOW address | |
848 | |
849 // ld_off is MSW so get LSW | |
850 // st_off is LSW (i.e. reg.first()) | |
851 // __ fld_d(Address(saved_sp, next_off)); | |
852 // __ fstp_d(Address(rsp, st_off)); | |
304 | 853 // |
854 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
855 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
856 // So we must adjust where to pick up the data to match the interpreter. | |
857 // | |
858 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
859 // are accessed as negative so LSW is at LOW address | |
860 | |
861 // ld_off is MSW so get LSW | |
862 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
863 next_off : ld_off; | |
864 __ movptr(rsi, Address(saved_sp, offset)); | |
865 __ movptr(Address(rsp, st_off), rsi); | |
866 #ifndef _LP64 | |
867 __ movptr(rsi, Address(saved_sp, ld_off)); | |
868 __ movptr(Address(rsp, st_off + wordSize), rsi); | |
869 #endif // _LP64 | |
0 | 870 } |
871 } else if (r_1->is_Register()) { // Register argument | |
872 Register r = r_1->as_Register(); | |
873 assert(r != rax, "must be different"); | |
874 if (r_2->is_valid()) { | |
304 | 875 // |
876 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
877 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
878 // So we must adjust where to pick up the data to match the interpreter. | |
879 | |
880 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
881 next_off : ld_off; | |
882 | |
883 // this can be a misaligned move | |
884 __ movptr(r, Address(saved_sp, offset)); | |
885 #ifndef _LP64 | |
0 | 886 assert(r_2->as_Register() != rax, "need another temporary register"); |
887 // Remember r_1 is low address (and LSB on x86) | |
888 // So r_2 gets loaded from high address regardless of the platform | |
304 | 889 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); |
890 #endif // _LP64 | |
0 | 891 } else { |
892 __ movl(r, Address(saved_sp, ld_off)); | |
893 } | |
894 } else { | |
895 assert(r_1->is_XMMRegister(), ""); | |
896 if (!r_2->is_valid()) { | |
897 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); | |
898 } else { | |
899 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); | |
900 } | |
901 } | |
902 } | |
903 | |
904 // 6243940 We might end up in handle_wrong_method if | |
905 // the callee is deoptimized as we race thru here. If that | |
906 // happens we don't want to take a safepoint because the | |
907 // caller frame will look interpreted and arguments are now | |
908 // "compiled" so it is much better to make this transition | |
909 // invisible to the stack walking code. Unfortunately if | |
910 // we try and find the callee by normal means a safepoint | |
911 // is possible. So we stash the desired callee in the thread | |
912 // and the vm will find there should this case occur. | |
913 | |
914 __ get_thread(rax); | |
304 | 915 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); |
0 | 916 |
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917 // move Method* to rax, in case we end up in an c2i adapter. |
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918 // the c2i adapters expect Method* in rax, (c2) because c2's |
0 | 919 // resolve stubs return the result (the method) in rax,. |
920 // I'd love to fix this. | |
304 | 921 __ mov(rax, rbx); |
0 | 922 |
923 __ jmp(rdi); | |
924 } | |
925 | |
926 // --------------------------------------------------------------- | |
927 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
928 int total_args_passed, | |
929 int comp_args_on_stack, | |
930 const BasicType *sig_bt, | |
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931 const VMRegPair *regs, |
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932 AdapterFingerPrint* fingerprint) { |
0 | 933 address i2c_entry = __ pc(); |
934 | |
935 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
936 | |
937 // ------------------------------------------------------------------------- | |
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938 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls |
0 | 939 // to the interpreter. The args start out packed in the compiled layout. They |
940 // need to be unpacked into the interpreter layout. This will almost always | |
941 // require some stack space. We grow the current (compiled) stack, then repack | |
942 // the args. We finally end in a jump to the generic interpreter entry point. | |
943 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
944 // compiled code, which relys solely on SP and not EBP, get sick). | |
945 | |
946 address c2i_unverified_entry = __ pc(); | |
947 Label skip_fixup; | |
948 | |
949 Register holder = rax; | |
950 Register receiver = rcx; | |
951 Register temp = rbx; | |
952 | |
953 { | |
954 | |
955 Label missed; | |
304 | 956 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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957 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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958 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
0 | 959 __ jcc(Assembler::notEqual, missed); |
960 // Method might have been compiled since the call site was patched to | |
961 // interpreted if that is the case treat it as a miss so we can get | |
962 // the call site corrected. | |
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963 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 964 __ jcc(Assembler::equal, skip_fixup); |
965 | |
966 __ bind(missed); | |
967 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
968 } | |
969 | |
970 address c2i_entry = __ pc(); | |
971 | |
972 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
973 | |
974 __ flush(); | |
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975 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 976 } |
977 | |
978 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
979 VMRegPair *regs, | |
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980 VMRegPair *regs2, |
0 | 981 int total_args_passed) { |
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982 assert(regs2 == NULL, "not needed on x86"); |
0 | 983 // We return the amount of VMRegImpl stack slots we need to reserve for all |
984 // the arguments NOT counting out_preserve_stack_slots. | |
985 | |
986 uint stack = 0; // All arguments on stack | |
987 | |
988 for( int i = 0; i < total_args_passed; i++) { | |
989 // From the type and the argument number (count) compute the location | |
990 switch( sig_bt[i] ) { | |
991 case T_BOOLEAN: | |
992 case T_CHAR: | |
993 case T_FLOAT: | |
994 case T_BYTE: | |
995 case T_SHORT: | |
996 case T_INT: | |
997 case T_OBJECT: | |
998 case T_ARRAY: | |
999 case T_ADDRESS: | |
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1000 case T_METADATA: |
0 | 1001 regs[i].set1(VMRegImpl::stack2reg(stack++)); |
1002 break; | |
1003 case T_LONG: | |
1004 case T_DOUBLE: // The stack numbering is reversed from Java | |
1005 // Since C arguments do not get reversed, the ordering for | |
1006 // doubles on the stack must be opposite the Java convention | |
1007 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
1008 regs[i].set2(VMRegImpl::stack2reg(stack)); | |
1009 stack += 2; | |
1010 break; | |
1011 case T_VOID: regs[i].set_bad(); break; | |
1012 default: | |
1013 ShouldNotReachHere(); | |
1014 break; | |
1015 } | |
1016 } | |
1017 return stack; | |
1018 } | |
1019 | |
1020 // A simple move of integer like type | |
1021 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1022 if (src.first()->is_stack()) { | |
1023 if (dst.first()->is_stack()) { | |
1024 // stack to stack | |
1025 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1026 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
304 | 1027 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); |
1028 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
0 | 1029 } else { |
1030 // stack to reg | |
304 | 1031 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
0 | 1032 } |
1033 } else if (dst.first()->is_stack()) { | |
1034 // reg to stack | |
304 | 1035 // no need to sign extend on 64bit |
1036 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
0 | 1037 } else { |
304 | 1038 if (dst.first() != src.first()) { |
1039 __ mov(dst.first()->as_Register(), src.first()->as_Register()); | |
1040 } | |
0 | 1041 } |
1042 } | |
1043 | |
1044 // An oop arg. Must pass a handle not the oop itself | |
1045 static void object_move(MacroAssembler* masm, | |
1046 OopMap* map, | |
1047 int oop_handle_offset, | |
1048 int framesize_in_slots, | |
1049 VMRegPair src, | |
1050 VMRegPair dst, | |
1051 bool is_receiver, | |
1052 int* receiver_offset) { | |
1053 | |
1054 // Because of the calling conventions we know that src can be a | |
1055 // register or a stack location. dst can only be a stack location. | |
1056 | |
1057 assert(dst.first()->is_stack(), "must be stack"); | |
1058 // must pass a handle. First figure out the location we use as a handle | |
1059 | |
1060 if (src.first()->is_stack()) { | |
1061 // Oop is already on the stack as an argument | |
1062 Register rHandle = rax; | |
1063 Label nil; | |
304 | 1064 __ xorptr(rHandle, rHandle); |
1065 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); | |
0 | 1066 __ jcc(Assembler::equal, nil); |
304 | 1067 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1068 __ bind(nil); |
304 | 1069 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1070 |
1071 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1072 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1073 if (is_receiver) { | |
1074 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1075 } | |
1076 } else { | |
1077 // Oop is in an a register we must store it to the space we reserve | |
1078 // on the stack for oop_handles | |
1079 const Register rOop = src.first()->as_Register(); | |
1080 const Register rHandle = rax; | |
1081 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; | |
1082 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1083 Label skip; | |
304 | 1084 __ movptr(Address(rsp, offset), rOop); |
0 | 1085 map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
304 | 1086 __ xorptr(rHandle, rHandle); |
1087 __ cmpptr(rOop, (int32_t)NULL_WORD); | |
0 | 1088 __ jcc(Assembler::equal, skip); |
304 | 1089 __ lea(rHandle, Address(rsp, offset)); |
0 | 1090 __ bind(skip); |
1091 // Store the handle parameter | |
304 | 1092 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1093 if (is_receiver) { |
1094 *receiver_offset = offset; | |
1095 } | |
1096 } | |
1097 } | |
1098 | |
1099 // A float arg may have to do float reg int reg conversion | |
1100 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1101 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1102 | |
1103 // Because of the calling convention we know that src is either a stack location | |
1104 // or an xmm register. dst can only be a stack location. | |
1105 | |
1106 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); | |
1107 | |
1108 if (src.first()->is_stack()) { | |
1109 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1110 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1111 } else { |
1112 // reg to stack | |
1113 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1114 } | |
1115 } | |
1116 | |
1117 // A long move | |
1118 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1119 | |
1120 // The only legal possibility for a long_move VMRegPair is: | |
1121 // 1: two stack slots (possibly unaligned) | |
1122 // as neither the java or C calling convention will use registers | |
1123 // for longs. | |
1124 | |
1125 if (src.first()->is_stack() && dst.first()->is_stack()) { | |
1126 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); | |
304 | 1127 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
1128 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
1129 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
1130 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
0 | 1131 } else { |
1132 ShouldNotReachHere(); | |
1133 } | |
1134 } | |
1135 | |
1136 // A double move | |
1137 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1138 | |
1139 // The only legal possibilities for a double_move VMRegPair are: | |
1140 // The painful thing here is that like long_move a VMRegPair might be | |
1141 | |
1142 // Because of the calling convention we know that src is either | |
1143 // 1: a single physical register (xmm registers only) | |
1144 // 2: two stack slots (possibly unaligned) | |
1145 // dst can only be a pair of stack slots. | |
1146 | |
1147 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); | |
1148 | |
1149 if (src.first()->is_stack()) { | |
1150 // source is all stack | |
304 | 1151 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
1152 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
1153 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
1154 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
0 | 1155 } else { |
1156 // reg to stack | |
1157 // No worries about stack alignment | |
1158 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1159 } | |
1160 } | |
1161 | |
1162 | |
1163 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1164 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1165 // which by this time is free to use | |
1166 switch (ret_type) { | |
1167 case T_FLOAT: | |
1168 __ fstp_s(Address(rbp, -wordSize)); | |
1169 break; | |
1170 case T_DOUBLE: | |
1171 __ fstp_d(Address(rbp, -2*wordSize)); | |
1172 break; | |
1173 case T_VOID: break; | |
1174 case T_LONG: | |
304 | 1175 __ movptr(Address(rbp, -wordSize), rax); |
1176 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); | |
0 | 1177 break; |
1178 default: { | |
304 | 1179 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1180 } |
1181 } | |
1182 } | |
1183 | |
1184 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1185 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1186 // which by this time is free to use | |
1187 switch (ret_type) { | |
1188 case T_FLOAT: | |
1189 __ fld_s(Address(rbp, -wordSize)); | |
1190 break; | |
1191 case T_DOUBLE: | |
1192 __ fld_d(Address(rbp, -2*wordSize)); | |
1193 break; | |
1194 case T_LONG: | |
304 | 1195 __ movptr(rax, Address(rbp, -wordSize)); |
1196 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); | |
0 | 1197 break; |
1198 case T_VOID: break; | |
1199 default: { | |
304 | 1200 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1201 } |
1202 } | |
1203 } | |
1204 | |
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1205 |
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1206 static void save_or_restore_arguments(MacroAssembler* masm, |
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1207 const int stack_slots, |
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1208 const int total_in_args, |
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1209 const int arg_save_area, |
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1210 OopMap* map, |
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1211 VMRegPair* in_regs, |
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1212 BasicType* in_sig_bt) { |
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1213 // if map is non-NULL then the code should store the values, |
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1214 // otherwise it should load them. |
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1215 int handle_index = 0; |
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1216 // Save down double word first |
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1217 for ( int i = 0; i < total_in_args; i++) { |
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1218 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1219 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1220 int offset = slot * VMRegImpl::stack_slot_size; |
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1221 handle_index += 2; |
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1222 assert(handle_index <= stack_slots, "overflow"); |
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1223 if (map != NULL) { |
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1224 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1225 } else { |
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1226 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1227 } |
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1228 } |
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1229 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) { |
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1230 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1231 int offset = slot * VMRegImpl::stack_slot_size; |
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1232 handle_index += 2; |
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1233 assert(handle_index <= stack_slots, "overflow"); |
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1234 if (map != NULL) { |
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1235 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1236 if (in_regs[i].second()->is_Register()) { |
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1237 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register()); |
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1238 } |
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1239 } else { |
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1240 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1241 if (in_regs[i].second()->is_Register()) { |
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1242 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4)); |
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1243 } |
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1244 } |
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1245 } |
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1246 } |
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1247 // Save or restore single word registers |
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1248 for ( int i = 0; i < total_in_args; i++) { |
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1249 if (in_regs[i].first()->is_Register()) { |
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1250 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1251 int offset = slot * VMRegImpl::stack_slot_size; |
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1252 assert(handle_index <= stack_slots, "overflow"); |
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1253 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1254 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1255 } |
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1256 |
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1257 // Value is in an input register pass we must flush it to the stack |
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1258 const Register reg = in_regs[i].first()->as_Register(); |
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1259 switch (in_sig_bt[i]) { |
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1260 case T_ARRAY: |
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1261 if (map != NULL) { |
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1262 __ movptr(Address(rsp, offset), reg); |
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1263 } else { |
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1264 __ movptr(reg, Address(rsp, offset)); |
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1265 } |
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1266 break; |
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1267 case T_BOOLEAN: |
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1268 case T_CHAR: |
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1269 case T_BYTE: |
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1270 case T_SHORT: |
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1271 case T_INT: |
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1272 if (map != NULL) { |
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1273 __ movl(Address(rsp, offset), reg); |
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1274 } else { |
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1275 __ movl(reg, Address(rsp, offset)); |
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1276 } |
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1277 break; |
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1278 case T_OBJECT: |
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1279 default: ShouldNotReachHere(); |
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1280 } |
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1281 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1282 if (in_sig_bt[i] == T_FLOAT) { |
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1283 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1284 int offset = slot * VMRegImpl::stack_slot_size; |
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1285 assert(handle_index <= stack_slots, "overflow"); |
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1286 if (map != NULL) { |
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1287 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1288 } else { |
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1289 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1290 } |
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1291 } |
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1292 } else if (in_regs[i].first()->is_stack()) { |
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1293 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1294 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1295 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1296 } |
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1297 } |
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1298 } |
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1299 } |
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1300 |
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1301 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1302 // keeps a new JNI critical region from starting until a GC has been |
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1303 // forced. Save down any oops in registers and describe them in an |
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1304 // OopMap. |
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1305 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1306 Register thread, |
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1307 int stack_slots, |
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1308 int total_c_args, |
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1309 int total_in_args, |
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1310 int arg_save_area, |
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1311 OopMapSet* oop_maps, |
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1312 VMRegPair* in_regs, |
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1313 BasicType* in_sig_bt) { |
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1314 __ block_comment("check GC_locker::needs_gc"); |
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1315 Label cont; |
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1316 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1317 __ jcc(Assembler::equal, cont); |
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1318 |
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1319 // Save down any incoming oops and call into the runtime to halt for a GC |
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1320 |
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1321 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1322 |
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1323 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1324 arg_save_area, map, in_regs, in_sig_bt); |
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1325 |
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1326 address the_pc = __ pc(); |
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1327 oop_maps->add_gc_map( __ offset(), map); |
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1328 __ set_last_Java_frame(thread, rsp, noreg, the_pc); |
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1329 |
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1330 __ block_comment("block_for_jni_critical"); |
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1331 __ push(thread); |
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1332 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1333 __ increment(rsp, wordSize); |
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1334 |
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1335 __ get_thread(thread); |
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1336 __ reset_last_Java_frame(thread, false, true); |
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1337 |
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1338 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1339 arg_save_area, NULL, in_regs, in_sig_bt); |
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1340 |
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1341 __ bind(cont); |
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1342 #ifdef ASSERT |
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1343 if (StressCriticalJNINatives) { |
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1344 // Stress register saving |
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1345 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1346 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1347 arg_save_area, map, in_regs, in_sig_bt); |
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1348 // Destroy argument registers |
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1349 for (int i = 0; i < total_in_args - 1; i++) { |
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1350 if (in_regs[i].first()->is_Register()) { |
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1351 const Register reg = in_regs[i].first()->as_Register(); |
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1352 __ xorptr(reg, reg); |
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1353 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1354 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1355 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1356 ShouldNotReachHere(); |
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1357 } else if (in_regs[i].first()->is_stack()) { |
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1358 // Nothing to do |
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1359 } else { |
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1360 ShouldNotReachHere(); |
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1361 } |
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1362 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1363 i++; |
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1364 } |
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1365 } |
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1366 |
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1367 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1368 arg_save_area, NULL, in_regs, in_sig_bt); |
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1369 } |
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1370 #endif |
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1371 } |
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1372 |
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1373 // Unpack an array argument into a pointer to the body and the length |
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1374 // if the array is non-null, otherwise pass 0 for both. |
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1375 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1376 Register tmp_reg = rax; |
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1377 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1378 "possible collision"); |
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1379 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1380 "possible collision"); |
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1381 |
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1382 // Pass the length, ptr pair |
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1383 Label is_null, done; |
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1384 VMRegPair tmp(tmp_reg->as_VMReg()); |
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1385 if (reg.first()->is_stack()) { |
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1386 // Load the arg up from the stack |
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1387 simple_move32(masm, reg, tmp); |
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1388 reg = tmp; |
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1389 } |
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1390 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1391 __ jccb(Assembler::equal, is_null); |
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1392 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1393 simple_move32(masm, tmp, body_arg); |
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1394 // load the length relative to the body. |
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1395 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1396 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1397 simple_move32(masm, tmp, length_arg); |
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1398 __ jmpb(done); |
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1399 __ bind(is_null); |
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1400 // Pass zeros |
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1401 __ xorptr(tmp_reg, tmp_reg); |
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1402 simple_move32(masm, tmp, body_arg); |
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1403 simple_move32(masm, tmp, length_arg); |
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1404 __ bind(done); |
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1405 } |
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1406 |
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1407 static void verify_oop_args(MacroAssembler* masm, |
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1408 methodHandle method, |
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1409 const BasicType* sig_bt, |
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1410 const VMRegPair* regs) { |
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1411 Register temp_reg = rbx; // not part of any compiled calling seq |
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1412 if (VerifyOops) { |
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1413 for (int i = 0; i < method->size_of_parameters(); i++) { |
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1414 if (sig_bt[i] == T_OBJECT || |
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1415 sig_bt[i] == T_ARRAY) { |
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1416 VMReg r = regs[i].first(); |
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1417 assert(r->is_valid(), "bad oop arg"); |
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1418 if (r->is_stack()) { |
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1419 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1420 __ verify_oop(temp_reg); |
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1421 } else { |
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1422 __ verify_oop(r->as_Register()); |
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1423 } |
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1424 } |
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1425 } |
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1426 } |
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1427 } |
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1428 |
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1429 static void gen_special_dispatch(MacroAssembler* masm, |
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1430 methodHandle method, |
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1431 const BasicType* sig_bt, |
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1432 const VMRegPair* regs) { |
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1433 verify_oop_args(masm, method, sig_bt, regs); |
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1434 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1435 |
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1436 // Now write the args into the outgoing interpreter space |
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1437 bool has_receiver = false; |
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1438 Register receiver_reg = noreg; |
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1439 int member_arg_pos = -1; |
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1440 Register member_reg = noreg; |
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1441 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
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1442 if (ref_kind != 0) { |
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1443 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
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1444 member_reg = rbx; // known to be free at this point |
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1445 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1446 } else if (iid == vmIntrinsics::_invokeBasic) { |
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1447 has_receiver = true; |
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1448 } else { |
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1449 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
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1450 } |
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1451 |
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1452 if (member_reg != noreg) { |
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1453 // Load the member_arg into register, if necessary. |
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1454 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1455 VMReg r = regs[member_arg_pos].first(); |
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1456 if (r->is_stack()) { |
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1457 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1458 } else { |
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1459 // no data motion is needed |
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1460 member_reg = r->as_Register(); |
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1461 } |
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1462 } |
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1463 |
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1464 if (has_receiver) { |
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1465 // Make sure the receiver is loaded into a register. |
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1466 assert(method->size_of_parameters() > 0, "oob"); |
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1467 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1468 VMReg r = regs[0].first(); |
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1469 assert(r->is_valid(), "bad receiver arg"); |
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1470 if (r->is_stack()) { |
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1471 // Porting note: This assumes that compiled calling conventions always |
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1472 // pass the receiver oop in a register. If this is not true on some |
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1473 // platform, pick a temp and load the receiver from stack. |
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1474 fatal("receiver always in a register"); |
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1475 receiver_reg = rcx; // known to be free at this point |
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1476 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1477 } else { |
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1478 // no data motion is needed |
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1479 receiver_reg = r->as_Register(); |
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1480 } |
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1481 } |
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1482 |
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1483 // Figure out which address we are really jumping to: |
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1484 MethodHandles::generate_method_handle_dispatch(masm, iid, |
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1485 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1486 } |
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1487 |
0 | 1488 // --------------------------------------------------------------------------- |
1489 // Generate a native wrapper for a given method. The method takes arguments | |
1490 // in the Java compiled code convention, marshals them to the native | |
1491 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1492 // returns to java state (possibly blocking), unhandlizes any result and | |
1493 // returns. | |
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1494 // |
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1495 // Critical native functions are a shorthand for the use of |
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1496 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1497 // functions. The wrapper is expected to unpack the arguments before |
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1498 // passing them to the callee and perform checks before and after the |
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1499 // native call to ensure that they GC_locker |
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1500 // lock_critical/unlock_critical semantics are followed. Some other |
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1501 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1502 // block and the check for pending exceptions it's impossible for them |
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1503 // to be thrown. |
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1504 // |
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1505 // They are roughly structured like this: |
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1506 // if (GC_locker::needs_gc()) |
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1507 // SharedRuntime::block_for_jni_critical(); |
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1508 // tranistion to thread_in_native |
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1509 // unpack arrray arguments and call native entry point |
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1510 // check for safepoint in progress |
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1511 // check if any thread suspend flags are set |
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1512 // call into JVM and possible unlock the JNI critical |
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1513 // if a GC was suppressed while in the critical native. |
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1514 // transition back to thread_in_Java |
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1515 // return to caller |
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1516 // |
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1517 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1518 methodHandle method, |
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1519 int compile_id, |
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1520 BasicType* in_sig_bt, |
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1521 VMRegPair* in_regs, |
0 | 1522 BasicType ret_type) { |
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1523 if (method->is_method_handle_intrinsic()) { |
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1524 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1525 intptr_t start = (intptr_t)__ pc(); |
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1526 int vep_offset = ((intptr_t)__ pc()) - start; |
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1527 gen_special_dispatch(masm, |
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1528 method, |
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1529 in_sig_bt, |
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1530 in_regs); |
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1531 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1532 __ flush(); |
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1533 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1534 return nmethod::new_native_nmethod(method, |
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1535 compile_id, |
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1536 masm->code(), |
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1537 vep_offset, |
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1538 frame_complete, |
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1539 stack_slots / VMRegImpl::slots_per_word, |
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1540 in_ByteSize(-1), |
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1541 in_ByteSize(-1), |
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1542 (OopMapSet*)NULL); |
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1543 } |
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1544 bool is_critical_native = true; |
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1545 address native_func = method->critical_native_function(); |
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1546 if (native_func == NULL) { |
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1547 native_func = method->native_function(); |
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1548 is_critical_native = false; |
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1549 } |
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1550 assert(native_func != NULL, "must have function"); |
0 | 1551 |
1552 // An OopMap for lock (and class if static) | |
1553 OopMapSet *oop_maps = new OopMapSet(); | |
1554 | |
1555 // We have received a description of where all the java arg are located | |
1556 // on entry to the wrapper. We need to convert these args to where | |
1557 // the jni function will expect them. To figure out where they go | |
1558 // we convert the java signature to a C signature by inserting | |
1559 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1560 | |
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1561 const int total_in_args = method->size_of_parameters(); |
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1562 int total_c_args = total_in_args; |
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1563 if (!is_critical_native) { |
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1564 total_c_args += 1; |
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1565 if (method->is_static()) { |
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1566 total_c_args++; |
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1567 } |
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1568 } else { |
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1569 for (int i = 0; i < total_in_args; i++) { |
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1570 if (in_sig_bt[i] == T_ARRAY) { |
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1571 total_c_args++; |
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1572 } |
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1573 } |
0 | 1574 } |
1575 | |
1576 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1577 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1578 BasicType* in_elem_bt = NULL; |
0 | 1579 |
1580 int argc = 0; | |
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1581 if (!is_critical_native) { |
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1582 out_sig_bt[argc++] = T_ADDRESS; |
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1583 if (method->is_static()) { |
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1584 out_sig_bt[argc++] = T_OBJECT; |
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1585 } |
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|
1586 |
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1587 for (int i = 0; i < total_in_args ; i++ ) { |
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1588 out_sig_bt[argc++] = in_sig_bt[i]; |
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1589 } |
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1590 } else { |
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1591 Thread* THREAD = Thread::current(); |
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1592 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1593 SignatureStream ss(method->signature()); |
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1594 for (int i = 0; i < total_in_args ; i++ ) { |
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1595 if (in_sig_bt[i] == T_ARRAY) { |
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1596 // Arrays are passed as int, elem* pair |
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1597 out_sig_bt[argc++] = T_INT; |
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1598 out_sig_bt[argc++] = T_ADDRESS; |
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1599 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1600 const char* at = atype->as_C_string(); |
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1601 if (strlen(at) == 2) { |
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|
1602 assert(at[0] == '[', "must be"); |
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1603 switch (at[1]) { |
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1604 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1605 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1606 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1607 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1608 case 'I': in_elem_bt[i] = T_INT; break; |
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1609 case 'J': in_elem_bt[i] = T_LONG; break; |
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1610 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1611 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1612 default: ShouldNotReachHere(); |
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1613 } |
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1614 } |
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1615 } else { |
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1616 out_sig_bt[argc++] = in_sig_bt[i]; |
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1617 in_elem_bt[i] = T_VOID; |
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1618 } |
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1619 if (in_sig_bt[i] != T_VOID) { |
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1620 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1621 ss.next(); |
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1622 } |
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1623 } |
0 | 1624 } |
1625 | |
1626 // Now figure out where the args must be stored and how much stack space | |
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1627 // they require. |
0 | 1628 int out_arg_slots; |
14416
6a936747b569
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|
1629 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
0 | 1630 |
1631 // Compute framesize for the wrapper. We need to handlize all oops in | |
1632 // registers a max of 2 on x86. | |
1633 | |
1634 // Calculate the total number of stack slots we will need. | |
1635 | |
1636 // First count the abi requirement plus all of the outgoing args | |
1637 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1638 | |
1639 // Now the space for the inbound oop handle area | |
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1640 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers |
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1641 if (is_critical_native) { |
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1642 // Critical natives may have to call out so they need a save area |
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1643 // for register arguments. |
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|
1644 int double_slots = 0; |
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1645 int single_slots = 0; |
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1646 for ( int i = 0; i < total_in_args; i++) { |
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1647 if (in_regs[i].first()->is_Register()) { |
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1648 const Register reg = in_regs[i].first()->as_Register(); |
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1649 switch (in_sig_bt[i]) { |
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1650 case T_ARRAY: // critical array (uses 2 slots on LP64) |
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1651 case T_BOOLEAN: |
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1652 case T_BYTE: |
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1653 case T_SHORT: |
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1654 case T_CHAR: |
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1655 case T_INT: single_slots++; break; |
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1656 case T_LONG: double_slots++; break; |
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1657 default: ShouldNotReachHere(); |
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1658 } |
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1659 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1660 switch (in_sig_bt[i]) { |
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1661 case T_FLOAT: single_slots++; break; |
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1662 case T_DOUBLE: double_slots++; break; |
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1663 default: ShouldNotReachHere(); |
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1664 } |
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1665 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1666 ShouldNotReachHere(); |
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1667 } |
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1668 } |
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1669 total_save_slots = double_slots * 2 + single_slots; |
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1670 // align the save area |
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1671 if (double_slots != 0) { |
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1672 stack_slots = round_to(stack_slots, 2); |
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1673 } |
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1674 } |
0 | 1675 |
1676 int oop_handle_offset = stack_slots; | |
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1677 stack_slots += total_save_slots; |
0 | 1678 |
1679 // Now any space we need for handlizing a klass if static method | |
1680 | |
1681 int klass_slot_offset = 0; | |
1682 int klass_offset = -1; | |
1683 int lock_slot_offset = 0; | |
1684 bool is_static = false; | |
1685 | |
1686 if (method->is_static()) { | |
1687 klass_slot_offset = stack_slots; | |
1688 stack_slots += VMRegImpl::slots_per_word; | |
1689 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1690 is_static = true; | |
1691 } | |
1692 | |
1693 // Plus a lock if needed | |
1694 | |
1695 if (method->is_synchronized()) { | |
1696 lock_slot_offset = stack_slots; | |
1697 stack_slots += VMRegImpl::slots_per_word; | |
1698 } | |
1699 | |
1700 // Now a place (+2) to save return values or temp during shuffling | |
1701 // + 2 for return address (which we own) and saved rbp, | |
1702 stack_slots += 4; | |
1703 | |
1704 // Ok The space we have allocated will look like: | |
1705 // | |
1706 // | |
1707 // FP-> | | | |
1708 // |---------------------| | |
1709 // | 2 slots for moves | | |
1710 // |---------------------| | |
1711 // | lock box (if sync) | | |
1712 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) | |
1713 // | klass (if static) | | |
1714 // |---------------------| <- klass_slot_offset | |
1715 // | oopHandle area | | |
1716 // |---------------------| <- oop_handle_offset (a max of 2 registers) | |
1717 // | outbound memory | | |
1718 // | based arguments | | |
1719 // | | | |
1720 // |---------------------| | |
1721 // | | | |
1722 // SP-> | out_preserved_slots | | |
1723 // | |
1724 // | |
1725 // **************************************************************************** | |
1726 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
1727 // arguments off of the stack after the jni call. Before the call we can use | |
1728 // instructions that are SP relative. After the jni call we switch to FP | |
1729 // relative instructions instead of re-adjusting the stack on windows. | |
1730 // **************************************************************************** | |
1731 | |
1732 | |
1733 // Now compute actual number of stack words we need rounding to make | |
1734 // stack properly aligned. | |
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1735 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1736 |
1737 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1738 | |
1739 intptr_t start = (intptr_t)__ pc(); | |
1740 | |
1741 // First thing make an ic check to see if we should even be here | |
1742 | |
1743 // We are free to use all registers as temps without saving them and | |
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1744 // restoring them except rbp. rbp is the only callee save register |
0 | 1745 // as far as the interpreter and the compiler(s) are concerned. |
1746 | |
1747 | |
1748 const Register ic_reg = rax; | |
1749 const Register receiver = rcx; | |
1750 Label hit; | |
1751 Label exception_pending; | |
1752 | |
1753 __ verify_oop(receiver); | |
304 | 1754 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
0 | 1755 __ jcc(Assembler::equal, hit); |
1756 | |
1757 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1758 | |
1759 // verified entry must be aligned for code patching. | |
1760 // and the first 5 bytes must be in the same cache line | |
1761 // if we align at 8 then we will be sure 5 bytes are in the same line | |
1762 __ align(8); | |
1763 | |
1764 __ bind(hit); | |
1765 | |
1766 int vep_offset = ((intptr_t)__ pc()) - start; | |
1767 | |
1768 #ifdef COMPILER1 | |
1769 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
1770 // Object.hashCode can pull the hashCode from the header word | |
1771 // instead of doing a full VM transition once it's been computed. | |
1772 // Since hashCode is usually polymorphic at call sites we can't do | |
1773 // this optimization at the call site without a lot of work. | |
1774 Label slowCase; | |
1775 Register receiver = rcx; | |
1776 Register result = rax; | |
304 | 1777 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
0 | 1778 |
1779 // check if locked | |
304 | 1780 __ testptr(result, markOopDesc::unlocked_value); |
0 | 1781 __ jcc (Assembler::zero, slowCase); |
1782 | |
1783 if (UseBiasedLocking) { | |
1784 // Check if biased and fall through to runtime if so | |
304 | 1785 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
0 | 1786 __ jcc (Assembler::notZero, slowCase); |
1787 } | |
1788 | |
1789 // get hash | |
304 | 1790 __ andptr(result, markOopDesc::hash_mask_in_place); |
0 | 1791 // test if hashCode exists |
1792 __ jcc (Assembler::zero, slowCase); | |
304 | 1793 __ shrptr(result, markOopDesc::hash_shift); |
0 | 1794 __ ret(0); |
1795 __ bind (slowCase); | |
1796 } | |
1797 #endif // COMPILER1 | |
1798 | |
1799 // The instruction at the verified entry point must be 5 bytes or longer | |
1800 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1801 // instruction fits that requirement. | |
1802 | |
1803 // Generate stack overflow check | |
1804 | |
1805 if (UseStackBanging) { | |
1806 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
1807 } else { | |
1808 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
1809 __ fat_nop(); | |
1810 } | |
1811 | |
1812 // Generate a new frame for the wrapper. | |
1813 __ enter(); | |
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1814 // -2 because return address is already present and so is saved rbp |
304 | 1815 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 1816 |
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1817 // Frame is now completed as far as size and linkage. |
0 | 1818 int frame_complete = ((intptr_t)__ pc()) - start; |
1819 | |
17780 | 1820 if (UseRTMLocking) { |
1821 // Abort RTM transaction before calling JNI | |
1822 // because critical section will be large and will be | |
1823 // aborted anyway. Also nmethod could be deoptimized. | |
1824 __ xabort(0); | |
1825 } | |
1826 | |
0 | 1827 // Calculate the difference between rsp and rbp,. We need to know it |
1828 // after the native call because on windows Java Natives will pop | |
1829 // the arguments and it is painful to do rsp relative addressing | |
1830 // in a platform independent way. So after the call we switch to | |
1831 // rbp, relative addressing. | |
1832 | |
1833 int fp_adjustment = stack_size - 2*wordSize; | |
1834 | |
1835 #ifdef COMPILER2 | |
1836 // C2 may leave the stack dirty if not in SSE2+ mode | |
1837 if (UseSSE >= 2) { | |
1838 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
1839 } else { | |
1840 __ empty_FPU_stack(); | |
1841 } | |
1842 #endif /* COMPILER2 */ | |
1843 | |
1844 // Compute the rbp, offset for any slots used after the jni call | |
1845 | |
1846 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; | |
1847 | |
1848 // We use rdi as a thread pointer because it is callee save and | |
1849 // if we load it once it is usable thru the entire wrapper | |
1850 const Register thread = rdi; | |
1851 | |
1852 // We use rsi as the oop handle for the receiver/klass | |
1853 // It is callee save so it survives the call to native | |
1854 | |
1855 const Register oop_handle_reg = rsi; | |
1856 | |
1857 __ get_thread(thread); | |
1858 | |
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1859 if (is_critical_native) { |
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1860 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args, |
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1861 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1862 } |
0 | 1863 |
1864 // | |
1865 // We immediately shuffle the arguments so that any vm call we have to | |
1866 // make from here on out (sync slow path, jvmti, etc.) we will have | |
1867 // captured the oops from our caller and have a valid oopMap for | |
1868 // them. | |
1869 | |
1870 // ----------------- | |
1871 // The Grand Shuffle | |
1872 // | |
1873 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
1874 // and, if static, the class mirror instead of a receiver. This pretty much | |
1875 // guarantees that register layout will not match (and x86 doesn't use reg | |
1876 // parms though amd does). Since the native abi doesn't use register args | |
1877 // and the java conventions does we don't have to worry about collisions. | |
1878 // All of our moved are reg->stack or stack->stack. | |
1879 // We ignore the extra arguments during the shuffle and handle them at the | |
1880 // last moment. The shuffle is described by the two calling convention | |
1881 // vectors we have in our possession. We simply walk the java vector to | |
1882 // get the source locations and the c vector to get the destinations. | |
1883 | |
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1884 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 ); |
0 | 1885 |
1886 // Record rsp-based slot for receiver on stack for non-static methods | |
1887 int receiver_offset = -1; | |
1888 | |
1889 // This is a trick. We double the stack slots so we can claim | |
1890 // the oops in the caller's frame. Since we are sure to have | |
1891 // more args than the caller doubling is enough to make | |
1892 // sure we can capture all the incoming oop args from the | |
1893 // caller. | |
1894 // | |
1895 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
1896 | |
1897 // Mark location of rbp, | |
1898 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); | |
1899 | |
1900 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx | |
1901 // Are free to temporaries if we have to do stack to steck moves. | |
1902 // All inbound args are referenced based on rbp, and all outbound args via rsp. | |
1903 | |
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1904 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { |
0 | 1905 switch (in_sig_bt[i]) { |
1906 case T_ARRAY: | |
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1907 if (is_critical_native) { |
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1908 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1909 c_arg++; |
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1910 break; |
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1911 } |
0 | 1912 case T_OBJECT: |
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1913 assert(!is_critical_native, "no oop arguments"); |
0 | 1914 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
1915 ((i == 0) && (!is_static)), | |
1916 &receiver_offset); | |
1917 break; | |
1918 case T_VOID: | |
1919 break; | |
1920 | |
1921 case T_FLOAT: | |
1922 float_move(masm, in_regs[i], out_regs[c_arg]); | |
1923 break; | |
1924 | |
1925 case T_DOUBLE: | |
1926 assert( i + 1 < total_in_args && | |
1927 in_sig_bt[i + 1] == T_VOID && | |
1928 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
1929 double_move(masm, in_regs[i], out_regs[c_arg]); | |
1930 break; | |
1931 | |
1932 case T_LONG : | |
1933 long_move(masm, in_regs[i], out_regs[c_arg]); | |
1934 break; | |
1935 | |
1936 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
1937 | |
1938 default: | |
1939 simple_move32(masm, in_regs[i], out_regs[c_arg]); | |
1940 } | |
1941 } | |
1942 | |
1943 // Pre-load a static method's oop into rsi. Used both by locking code and | |
1944 // the normal JNI call code. | |
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1945 if (method->is_static() && !is_critical_native) { |
0 | 1946 |
1947 // load opp into a register | |
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1948 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
0 | 1949 |
1950 // Now handlize the static class mirror it's known not-null. | |
304 | 1951 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 1952 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
1953 | |
1954 // Now get the handle | |
304 | 1955 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 1956 // store the klass handle as second argument |
304 | 1957 __ movptr(Address(rsp, wordSize), oop_handle_reg); |
0 | 1958 } |
1959 | |
1960 // Change state to native (we save the return address in the thread, since it might not | |
1961 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
1962 // points into the right code segment. It does not have to be the correct return pc. | |
1963 // We use the same pc/oopMap repeatedly when we call out | |
1964 | |
1965 intptr_t the_pc = (intptr_t) __ pc(); | |
1966 oop_maps->add_gc_map(the_pc - start, map); | |
1967 | |
1968 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); | |
1969 | |
1970 | |
1971 // We have all of the arguments setup at this point. We must not touch any register | |
1972 // argument registers at this point (what if we save/restore them there are no oop? | |
1973 | |
1974 { | |
1975 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
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1976 __ mov_metadata(rax, method()); |
0 | 1977 __ call_VM_leaf( |
1978 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
1979 thread, rax); | |
1980 } | |
1981 | |
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1982 // RedefineClasses() tracing support for obsolete method entry |
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1983 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1984 __ mov_metadata(rax, method()); |
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1985 __ call_VM_leaf( |
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1986 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1987 thread, rax); |
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1988 } |
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1989 |
0 | 1990 // These are register definitions we need for locking/unlocking |
1991 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction | |
1992 const Register obj_reg = rcx; // Will contain the oop | |
1993 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) | |
1994 | |
1995 Label slow_path_lock; | |
1996 Label lock_done; | |
1997 | |
1998 // Lock a synchronized method | |
1999 if (method->is_synchronized()) { | |
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2000 assert(!is_critical_native, "unhandled"); |
0 | 2001 |
2002 | |
2003 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
2004 | |
2005 // Get the handle (the 2nd argument) | |
304 | 2006 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
0 | 2007 |
2008 // Get address of the box | |
2009 | |
304 | 2010 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); |
0 | 2011 |
2012 // Load the oop from the handle | |
304 | 2013 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2014 |
2015 if (UseBiasedLocking) { | |
2016 // Note that oop_handle_reg is trashed during this call | |
2017 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); | |
2018 } | |
2019 | |
2020 // Load immediate 1 into swap_reg %rax, | |
304 | 2021 __ movptr(swap_reg, 1); |
0 | 2022 |
2023 // Load (object->mark() | 1) into swap_reg %rax, | |
304 | 2024 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 2025 |
2026 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 2027 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2028 |
2029 if (os::is_MP()) { | |
2030 __ lock(); | |
2031 } | |
2032 | |
2033 // src -> dest iff dest == rax, else rax, <- dest | |
2034 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) | |
304 | 2035 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 2036 __ jcc(Assembler::equal, lock_done); |
2037 | |
2038 // Test if the oopMark is an obvious stack pointer, i.e., | |
2039 // 1) (mark & 3) == 0, and | |
2040 // 2) rsp <= mark < mark + os::pagesize() | |
2041 // These 3 tests can be done by evaluating the following | |
2042 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
2043 // assuming both stack pointer and pagesize have their | |
2044 // least significant 2 bits clear. | |
2045 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg | |
2046 | |
304 | 2047 __ subptr(swap_reg, rsp); |
2048 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 2049 |
2050 // Save the test result, for recursive case, the result is zero | |
304 | 2051 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2052 __ jcc(Assembler::notEqual, slow_path_lock); |
2053 // Slow path will re-enter here | |
2054 __ bind(lock_done); | |
2055 | |
2056 if (UseBiasedLocking) { | |
2057 // Re-fetch oop_handle_reg as we trashed it above | |
304 | 2058 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
0 | 2059 } |
2060 } | |
2061 | |
2062 | |
2063 // Finally just about ready to make the JNI call | |
2064 | |
2065 | |
2066 // get JNIEnv* which is first argument to native | |
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2067 if (!is_critical_native) { |
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2068 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2069 __ movptr(Address(rsp, 0), rdx); |
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2070 } |
0 | 2071 |
2072 // Now set thread in native | |
2073 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); | |
2074 | |
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2075 __ call(RuntimeAddress(native_func)); |
0 | 2076 |
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2077 // Verify or restore cpu control state after JNI call |
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2078 __ restore_cpu_control_state_after_jni(); |
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2079 |
0 | 2080 // WARNING - on Windows Java Natives use pascal calling convention and pop the |
2081 // arguments off of the stack. We could just re-adjust the stack pointer here | |
2082 // and continue to do SP relative addressing but we instead switch to FP | |
2083 // relative addressing. | |
2084 | |
2085 // Unpack native results. | |
2086 switch (ret_type) { | |
2087 case T_BOOLEAN: __ c2bool(rax); break; | |
304 | 2088 case T_CHAR : __ andptr(rax, 0xFFFF); break; |
0 | 2089 case T_BYTE : __ sign_extend_byte (rax); break; |
2090 case T_SHORT : __ sign_extend_short(rax); break; | |
2091 case T_INT : /* nothing to do */ break; | |
2092 case T_DOUBLE : | |
2093 case T_FLOAT : | |
2094 // Result is in st0 we'll save as needed | |
2095 break; | |
2096 case T_ARRAY: // Really a handle | |
2097 case T_OBJECT: // Really a handle | |
2098 break; // can't de-handlize until after safepoint check | |
2099 case T_VOID: break; | |
2100 case T_LONG: break; | |
2101 default : ShouldNotReachHere(); | |
2102 } | |
2103 | |
2104 // Switch thread to "native transition" state before reading the synchronization state. | |
2105 // This additional state is necessary because reading and testing the synchronization | |
2106 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2107 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2108 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2109 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2110 // didn't see any synchronization is progress, and escapes. | |
2111 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); | |
2112 | |
2113 if(os::is_MP()) { | |
2114 if (UseMembar) { | |
304 | 2115 // Force this write out before the read below |
2116 __ membar(Assembler::Membar_mask_bits( | |
2117 Assembler::LoadLoad | Assembler::LoadStore | | |
2118 Assembler::StoreLoad | Assembler::StoreStore)); | |
0 | 2119 } else { |
2120 // Write serialization page so VM thread can do a pseudo remote membar. | |
2121 // We use the current thread pointer to calculate a thread specific | |
2122 // offset to write to within the page. This minimizes bus traffic | |
2123 // due to cache line collision. | |
2124 __ serialize_memory(thread, rcx); | |
2125 } | |
2126 } | |
2127 | |
2128 if (AlwaysRestoreFPU) { | |
2129 // Make sure the control word is correct. | |
2130 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
2131 } | |
2132 | |
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2133 Label after_transition; |
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2134 |
0 | 2135 // check for safepoint operation in progress and/or pending suspend requests |
2136 { Label Continue; | |
2137 | |
2138 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2139 SafepointSynchronize::_not_synchronized); | |
2140 | |
2141 Label L; | |
2142 __ jcc(Assembler::notEqual, L); | |
2143 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); | |
2144 __ jcc(Assembler::equal, Continue); | |
2145 __ bind(L); | |
2146 | |
2147 // Don't use call_VM as it will see a possible pending exception and forward it | |
2148 // and never return here preventing us from clearing _last_native_pc down below. | |
2149 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2150 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2151 // by hand. | |
2152 // | |
2153 save_native_result(masm, ret_type, stack_slots); | |
304 | 2154 __ push(thread); |
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2155 if (!is_critical_native) { |
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2156 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2157 JavaThread::check_special_condition_for_native_trans))); |
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2158 } else { |
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2159 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2160 JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2161 } |
0 | 2162 __ increment(rsp, wordSize); |
2163 // Restore any method result value | |
2164 restore_native_result(masm, ret_type, stack_slots); | |
2165 | |
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2166 if (is_critical_native) { |
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2167 // The call above performed the transition to thread_in_Java so |
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2168 // skip the transition logic below. |
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2169 __ jmpb(after_transition); |
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2170 } |
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2171 |
0 | 2172 __ bind(Continue); |
2173 } | |
2174 | |
2175 // change thread state | |
2176 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2177 __ bind(after_transition); |
0 | 2178 |
2179 Label reguard; | |
2180 Label reguard_done; | |
2181 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2182 __ jcc(Assembler::equal, reguard); | |
2183 | |
2184 // slow path reguard re-enters here | |
2185 __ bind(reguard_done); | |
2186 | |
2187 // Handle possible exception (will unlock if necessary) | |
2188 | |
2189 // native result if any is live | |
2190 | |
2191 // Unlock | |
2192 Label slow_path_unlock; | |
2193 Label unlock_done; | |
2194 if (method->is_synchronized()) { | |
2195 | |
2196 Label done; | |
2197 | |
2198 // Get locked oop from the handle we passed to jni | |
304 | 2199 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2200 |
2201 if (UseBiasedLocking) { | |
2202 __ biased_locking_exit(obj_reg, rbx, done); | |
2203 } | |
2204 | |
2205 // Simple recursive lock? | |
2206 | |
304 | 2207 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); |
0 | 2208 __ jcc(Assembler::equal, done); |
2209 | |
2210 // Must save rax, if if it is live now because cmpxchg must use it | |
2211 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2212 save_native_result(masm, ret_type, stack_slots); | |
2213 } | |
2214 | |
2215 // get old displaced header | |
304 | 2216 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); |
0 | 2217 |
2218 // get address of the stack lock | |
304 | 2219 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
0 | 2220 |
2221 // Atomic swap old header if oop still contains the stack lock | |
2222 if (os::is_MP()) { | |
2223 __ lock(); | |
2224 } | |
2225 | |
2226 // src -> dest iff dest == rax, else rax, <- dest | |
2227 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) | |
304 | 2228 __ cmpxchgptr(rbx, Address(obj_reg, 0)); |
0 | 2229 __ jcc(Assembler::notEqual, slow_path_unlock); |
2230 | |
2231 // slow path re-enters here | |
2232 __ bind(unlock_done); | |
2233 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2234 restore_native_result(masm, ret_type, stack_slots); | |
2235 } | |
2236 | |
2237 __ bind(done); | |
2238 | |
2239 } | |
2240 | |
2241 { | |
2242 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
2243 // Tell dtrace about this method exit | |
2244 save_native_result(masm, ret_type, stack_slots); | |
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2245 __ mov_metadata(rax, method()); |
0 | 2246 __ call_VM_leaf( |
2247 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2248 thread, rax); | |
2249 restore_native_result(masm, ret_type, stack_slots); | |
2250 } | |
2251 | |
2252 // We can finally stop using that last_Java_frame we setup ages ago | |
2253 | |
2254 __ reset_last_Java_frame(thread, false, true); | |
2255 | |
2256 // Unpack oop result | |
2257 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2258 Label L; | |
304 | 2259 __ cmpptr(rax, (int32_t)NULL_WORD); |
0 | 2260 __ jcc(Assembler::equal, L); |
304 | 2261 __ movptr(rax, Address(rax, 0)); |
0 | 2262 __ bind(L); |
2263 __ verify_oop(rax); | |
2264 } | |
2265 | |
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2266 if (!is_critical_native) { |
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2267 // reset handle block |
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2268 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); |
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2269 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); |
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2270 |
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2271 // Any exception pending? |
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2272 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2273 __ jcc(Assembler::notEqual, exception_pending); |
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2274 } |
0 | 2275 |
2276 // no exception, we're almost done | |
2277 | |
2278 // check that only result value is on FPU stack | |
2279 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); | |
2280 | |
2281 // Fixup floating pointer results so that result looks like a return from a compiled method | |
2282 if (ret_type == T_FLOAT) { | |
2283 if (UseSSE >= 1) { | |
2284 // Pop st0 and store as float and reload into xmm register | |
2285 __ fstp_s(Address(rbp, -4)); | |
2286 __ movflt(xmm0, Address(rbp, -4)); | |
2287 } | |
2288 } else if (ret_type == T_DOUBLE) { | |
2289 if (UseSSE >= 2) { | |
2290 // Pop st0 and store as double and reload into xmm register | |
2291 __ fstp_d(Address(rbp, -8)); | |
2292 __ movdbl(xmm0, Address(rbp, -8)); | |
2293 } | |
2294 } | |
2295 | |
2296 // Return | |
2297 | |
2298 __ leave(); | |
2299 __ ret(0); | |
2300 | |
2301 // Unexpected paths are out of line and go here | |
2302 | |
2303 // Slow path locking & unlocking | |
2304 if (method->is_synchronized()) { | |
2305 | |
2306 // BEGIN Slow path lock | |
2307 | |
2308 __ bind(slow_path_lock); | |
2309 | |
2310 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2311 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
304 | 2312 __ push(thread); |
2313 __ push(lock_reg); | |
2314 __ push(obj_reg); | |
0 | 2315 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); |
304 | 2316 __ addptr(rsp, 3*wordSize); |
0 | 2317 |
2318 #ifdef ASSERT | |
2319 { Label L; | |
304 | 2320 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2321 __ jcc(Assembler::equal, L); |
2322 __ stop("no pending exception allowed on exit from monitorenter"); | |
2323 __ bind(L); | |
2324 } | |
2325 #endif | |
2326 __ jmp(lock_done); | |
2327 | |
2328 // END Slow path lock | |
2329 | |
2330 // BEGIN Slow path unlock | |
2331 __ bind(slow_path_unlock); | |
2332 | |
2333 // Slow path unlock | |
2334 | |
2335 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2336 save_native_result(masm, ret_type, stack_slots); | |
2337 } | |
2338 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2339 | |
304 | 2340 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
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2341 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); |
0 | 2342 |
2343 | |
2344 // should be a peal | |
2345 // +wordSize because of the push above | |
304 | 2346 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
2347 __ push(rax); | |
2348 | |
2349 __ push(obj_reg); | |
0 | 2350 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); |
304 | 2351 __ addptr(rsp, 2*wordSize); |
0 | 2352 #ifdef ASSERT |
2353 { | |
2354 Label L; | |
304 | 2355 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2356 __ jcc(Assembler::equal, L); |
2357 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2358 __ bind(L); | |
2359 } | |
2360 #endif /* ASSERT */ | |
2361 | |
304 | 2362 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
0 | 2363 |
2364 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2365 restore_native_result(masm, ret_type, stack_slots); | |
2366 } | |
2367 __ jmp(unlock_done); | |
2368 // END Slow path unlock | |
2369 | |
2370 } | |
2371 | |
2372 // SLOW PATH Reguard the stack if needed | |
2373 | |
2374 __ bind(reguard); | |
2375 save_native_result(masm, ret_type, stack_slots); | |
2376 { | |
2377 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); | |
2378 } | |
2379 restore_native_result(masm, ret_type, stack_slots); | |
2380 __ jmp(reguard_done); | |
2381 | |
2382 | |
2383 // BEGIN EXCEPTION PROCESSING | |
2384 | |
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2385 if (!is_critical_native) { |
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2386 // Forward the exception |
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2387 __ bind(exception_pending); |
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2388 |
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2389 // remove possible return value from FPU register stack |
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2390 __ empty_FPU_stack(); |
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2391 |
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2392 // pop our frame |
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2393 __ leave(); |
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2394 // and forward the exception |
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2395 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2396 } |
0 | 2397 |
2398 __ flush(); | |
2399 | |
2400 nmethod *nm = nmethod::new_native_nmethod(method, | |
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2401 compile_id, |
0 | 2402 masm->code(), |
2403 vep_offset, | |
2404 frame_complete, | |
2405 stack_slots / VMRegImpl::slots_per_word, | |
2406 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2407 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2408 oop_maps); | |
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changeset
|
2409 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
3931
diff
changeset
|
2410 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
3931
diff
changeset
|
2411 nm->set_lazy_critical_native(true); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
3931
diff
changeset
|
2412 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
3931
diff
changeset
|
2413 |
0 | 2414 return nm; |
2415 | |
2416 } | |
2417 | |
116
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kamg
parents:
0
diff
changeset
|
2418 #ifdef HAVE_DTRACE_H |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2419 // --------------------------------------------------------------------------- |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2420 // Generate a dtrace nmethod for a given signature. The method takes arguments |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2421 // in the Java compiled code convention, marshals them to the native |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2422 // abi and then leaves nops at the position you would expect to call a native |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2423 // function. When the probe is enabled the nops are replaced with a trap |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2424 // instruction that dtrace inserts and the trace will cause a notification |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2425 // to dtrace. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2426 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2427 // The probes are only able to take primitive types and java/lang/String as |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2428 // arguments. No other java types are allowed. Strings are converted to utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2429 // strings so that from dtrace point of view java strings are converted to C |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2430 // strings. There is an arbitrary fixed limit on the total space that a method |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2431 // can use for converting the strings. (256 chars per string in the signature). |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2432 // So any java string larger then this is truncated. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2433 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2434 nmethod *SharedRuntime::generate_dtrace_nmethod( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2435 MacroAssembler *masm, methodHandle method) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2436 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2437 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2438 // be single threaded in this method. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2439 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2440 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2441 // Fill in the signature array, for the calling-convention call. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2442 int total_args_passed = method->size_of_parameters(); |
018d5b58dd4f
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kamg
parents:
0
diff
changeset
|
2443 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
changeset
|
2444 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2445 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2446 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2447 // The signature we are going to use for the trap that dtrace will see |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2448 // java/lang/String is converted. We drop "this" and any other object |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2449 // is converted to NULL. (A one-slot java/lang/Long object reference |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2450 // is converted to a two-slot long, which is why we double the allocation). |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2451 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2452 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2453 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2454 int i=0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2455 int total_strings = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2456 int first_arg_to_pass = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2457 int total_c_args = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2458 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2459 if( !method->is_static() ) { // Pass in receiver first |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2460 in_sig_bt[i++] = T_OBJECT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2461 first_arg_to_pass = 1; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2462 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2463 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2464 // We need to convert the java args to where a native (non-jni) function |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2465 // would expect them. To figure out where they go we convert the java |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2466 // signature to a C signature. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2467 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2468 SignatureStream ss(method->signature()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2469 for ( ; !ss.at_return_type(); ss.next()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2470 BasicType bt = ss.type(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2471 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2472 out_sig_bt[total_c_args++] = bt; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2473 if( bt == T_OBJECT) { |
2177
3582bf76420e
6990754: Use native memory and reference counting to implement SymbolTable
coleenp
parents:
1972
diff
changeset
|
2474 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2475 if (s == vmSymbols::java_lang_String()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2476 total_strings++; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2477 out_sig_bt[total_c_args-1] = T_ADDRESS; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2478 } else if (s == vmSymbols::java_lang_Boolean() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2479 s == vmSymbols::java_lang_Character() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2480 s == vmSymbols::java_lang_Byte() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2481 s == vmSymbols::java_lang_Short() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2482 s == vmSymbols::java_lang_Integer() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2483 s == vmSymbols::java_lang_Float()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2484 out_sig_bt[total_c_args-1] = T_INT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2485 } else if (s == vmSymbols::java_lang_Long() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2486 s == vmSymbols::java_lang_Double()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2487 out_sig_bt[total_c_args-1] = T_LONG; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2488 out_sig_bt[total_c_args++] = T_VOID; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2489 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2490 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2491 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2492 out_sig_bt[total_c_args++] = T_VOID; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2493 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2494 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2495 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2496 assert(i==total_args_passed, "validly parsed signature"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2497 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2498 // Now get the compiled-Java layout as input arguments |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2499 int comp_args_on_stack; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2500 comp_args_on_stack = SharedRuntime::java_calling_convention( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2501 in_sig_bt, in_regs, total_args_passed, false); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2502 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2503 // Now figure out where the args must be stored and how much stack space |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2504 // they require (neglecting out_preserve_stack_slots). |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2505 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2506 int out_arg_slots; |
14416
6a936747b569
8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents:
8873
diff
changeset
|
2507 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
116
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0
diff
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|
2508 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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parents:
0
diff
changeset
|
2509 // Calculate the total number of stack slots we will need. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2510 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2511 // First count the abi requirement plus all of the outgoing args |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2512 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2513 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2514 // Now space for the string(s) we must convert |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2515 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2516 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2517 for (i = 0; i < total_strings ; i++) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2518 string_locs[i] = stack_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2519 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2520 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2521 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2522 // + 2 for return address (which we own) and saved rbp, |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2523 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2524 stack_slots += 2; |
018d5b58dd4f
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kamg
parents:
0
diff
changeset
|
2525 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2526 // Ok The space we have allocated will look like: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2527 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2528 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2529 // FP-> | | |
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2530 // |---------------------| |
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2531 // | string[n] | |
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2532 // |---------------------| <- string_locs[n] |
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2533 // | string[n-1] | |
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2534 // |---------------------| <- string_locs[n-1] |
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2535 // | ... | |
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2536 // | ... | |
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2537 // |---------------------| <- string_locs[1] |
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2538 // | string[0] | |
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2539 // |---------------------| <- string_locs[0] |
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2540 // | outbound memory | |
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2541 // | based arguments | |
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2542 // | | |
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2543 // |---------------------| |
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2544 // | | |
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2545 // SP-> | out_preserved_slots | |
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2546 // |
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2547 // |
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2548 |
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2549 // Now compute actual number of stack words we need rounding to make |
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2550 // stack properly aligned. |
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2551 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
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2552 |
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2553 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2554 |
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2555 intptr_t start = (intptr_t)__ pc(); |
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2556 |
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2557 // First thing make an ic check to see if we should even be here |
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2558 |
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2559 // We are free to use all registers as temps without saving them and |
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2560 // restoring them except rbp. rbp, is the only callee save register |
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2561 // as far as the interpreter and the compiler(s) are concerned. |
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2562 |
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2563 const Register ic_reg = rax; |
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2564 const Register receiver = rcx; |
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2565 Label hit; |
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2566 Label exception_pending; |
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2567 |
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2568 |
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2569 __ verify_oop(receiver); |
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2570 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2571 __ jcc(Assembler::equal, hit); |
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2572 |
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2573 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2574 |
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2575 // verified entry must be aligned for code patching. |
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2576 // and the first 5 bytes must be in the same cache line |
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2577 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2578 __ align(8); |
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2579 |
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2580 __ bind(hit); |
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2581 |
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2582 int vep_offset = ((intptr_t)__ pc()) - start; |
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2583 |
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2584 |
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2585 // The instruction at the verified entry point must be 5 bytes or longer |
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2586 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2587 // instruction fits that requirement. |
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2588 |
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2589 // Generate stack overflow check |
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2590 |
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2591 |
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2592 if (UseStackBanging) { |
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2593 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2594 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2595 } else { |
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2596 __ movl(rax, stack_size); |
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2597 __ bang_stack_size(rax, rbx); |
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2598 } |
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2599 } else { |
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2600 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2601 __ fat_nop(); |
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2602 } |
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2603 |
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2604 assert(((int)__ pc() - start - vep_offset) >= 5, |
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2605 "valid size for make_non_entrant"); |
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2606 |
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2607 // Generate a new frame for the wrapper. |
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2608 __ enter(); |
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2609 |
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2610 // -2 because return address is already present and so is saved rbp, |
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2611 if (stack_size - 2*wordSize != 0) { |
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2612 __ subl(rsp, stack_size - 2*wordSize); |
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2613 } |
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2614 |
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2615 // Frame is now completed as far a size and linkage. |
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2616 |
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2617 int frame_complete = ((intptr_t)__ pc()) - start; |
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2618 |
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2619 // First thing we do store all the args as if we are doing the call. |
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2620 // Since the C calling convention is stack based that ensures that |
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2621 // all the Java register args are stored before we need to convert any |
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2622 // string we might have. |
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2623 |
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2624 int sid = 0; |
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2625 int c_arg, j_arg; |
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2626 int string_reg = 0; |
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2627 |
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2628 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2629 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2630 |
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2631 VMRegPair src = in_regs[j_arg]; |
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2632 VMRegPair dst = out_regs[c_arg]; |
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2633 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID, |
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2634 "stack based abi assumed"); |
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2635 |
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2636 switch (in_sig_bt[j_arg]) { |
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2637 |
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2638 case T_ARRAY: |
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2639 case T_OBJECT: |
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2640 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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2641 // Any register based arg for a java string after the first |
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2642 // will be destroyed by the call to get_utf so we store |
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2643 // the original value in the location the utf string address |
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2644 // will eventually be stored. |
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2645 if (src.first()->is_reg()) { |
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2646 if (string_reg++ != 0) { |
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2647 simple_move32(masm, src, dst); |
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2648 } |
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2649 } |
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2650 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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diff
changeset
|
2651 // need to unbox a one-word value |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2652 Register in_reg = rax; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2653 if ( src.first()->is_reg() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2654 in_reg = src.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2655 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2656 simple_move32(masm, src, in_reg->as_VMReg()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2657 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2658 Label skipUnbox; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2659 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2660 if ( out_sig_bt[c_arg] == T_LONG ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2661 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2662 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2663 __ testl(in_reg, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2664 __ jcc(Assembler::zero, skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2665 assert(dst.first()->is_stack() && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2666 (!dst.second()->is_valid() || dst.second()->is_stack()), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2667 "value(s) must go into stack slots"); |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2668 |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2669 BasicType bt = out_sig_bt[c_arg]; |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2670 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2671 if ( bt == T_LONG ) { |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2672 __ movl(rbx, Address(in_reg, |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2673 box_offset + VMRegImpl::stack_slot_size)); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2674 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2675 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2676 __ movl(in_reg, Address(in_reg, box_offset)); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2677 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2678 __ bind(skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2679 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2680 // Convert the arg to NULL |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2681 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2682 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2683 if (out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2684 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2685 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2686 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2687 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2688 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2689 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2690 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2691 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2692 case T_FLOAT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2693 float_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2694 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2695 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2696 case T_DOUBLE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2697 assert( j_arg + 1 < total_args_passed && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2698 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2699 double_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2700 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2701 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2702 case T_LONG : |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2703 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2704 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2705 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2706 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2707 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2708 default: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2709 simple_move32(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2710 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2711 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2712 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2713 // Now we must convert any string we have to utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2714 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2715 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2716 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2717 sid < total_strings ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2718 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2719 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2720 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2721 Address utf8_addr = Address( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2722 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2723 __ leal(rax, utf8_addr); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2724 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2725 // The first string we find might still be in the original java arg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2726 // register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2727 VMReg orig_loc = in_regs[j_arg].first(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2728 Register string_oop; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2729 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2730 // This is where the argument will eventually reside |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2731 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first())); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2732 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2733 if (sid == 1 && orig_loc->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2734 string_oop = orig_loc->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2735 assert(string_oop != rax, "smashed arg"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2736 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2737 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2738 if (orig_loc->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2739 // Get the copy of the jls object |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2740 __ movl(rcx, dest); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2741 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2742 // arg is still in the original location |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2743 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc))); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2744 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2745 string_oop = rcx; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2746 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2747 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2748 Label nullString; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2749 __ movl(dest, NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2750 __ testl(string_oop, string_oop); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2751 __ jcc(Assembler::zero, nullString); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2752 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2753 // Now we can store the address of the utf string as the argument |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2754 __ movl(dest, rax); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2755 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2756 // And do the conversion |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2757 __ call_VM_leaf(CAST_FROM_FN_PTR( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2758 address, SharedRuntime::get_utf), string_oop, rax); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2759 __ bind(nullString); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2760 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2761 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2762 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2763 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2764 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2765 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2766 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2767 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2768 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2769 // Ok now we are done. Need to place the nop that dtrace wants in order to |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2770 // patch in the trap |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2771 |
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2772 int patch_offset = ((intptr_t)__ pc()) - start; |
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2773 |
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2774 __ nop(); |
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2775 |
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2776 |
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2777 // Return |
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2778 |
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2779 __ leave(); |
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2780 __ ret(0); |
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2781 |
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2782 __ flush(); |
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2783 |
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2784 nmethod *nm = nmethod::new_dtrace_nmethod( |
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2785 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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2786 stack_slots / VMRegImpl::slots_per_word); |
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2787 return nm; |
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2788 |
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2789 } |
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2790 |
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2791 #endif // HAVE_DTRACE_H |
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2792 |
0 | 2793 // this function returns the adjust size (in number of words) to a c2i adapter |
2794 // activation for use during deoptimization | |
2795 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 2796 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 2797 } |
2798 | |
2799 | |
2800 uint SharedRuntime::out_preserve_stack_slots() { | |
2801 return 0; | |
2802 } | |
2803 | |
2804 //------------------------------generate_deopt_blob---------------------------- | |
2805 void SharedRuntime::generate_deopt_blob() { | |
2806 // allocate space for the code | |
2807 ResourceMark rm; | |
2808 // setup code generation tools | |
2809 CodeBuffer buffer("deopt_blob", 1024, 1024); | |
2810 MacroAssembler* masm = new MacroAssembler(&buffer); | |
2811 int frame_size_in_words; | |
2812 OopMap* map = NULL; | |
2813 // Account for the extra args we place on the stack | |
2814 // by the time we call fetch_unroll_info | |
2815 const int additional_words = 2; // deopt kind, thread | |
2816 | |
2817 OopMapSet *oop_maps = new OopMapSet(); | |
2818 | |
2819 // ------------- | |
2820 // This code enters when returning to a de-optimized nmethod. A return | |
2821 // address has been pushed on the the stack, and return values are in | |
2822 // registers. | |
2823 // If we are doing a normal deopt then we were called from the patched | |
2824 // nmethod from the point we returned to the nmethod. So the return | |
2825 // address on the stack is wrong by NativeCall::instruction_size | |
2826 // We will adjust the value to it looks like we have the original return | |
2827 // address on the stack (like when we eagerly deoptimized). | |
2828 // In the case of an exception pending with deoptimized then we enter | |
2829 // with a return address on the stack that points after the call we patched | |
2830 // into the exception handler. We have the following register state: | |
2831 // rax,: exception | |
2832 // rbx,: exception handler | |
2833 // rdx: throwing pc | |
2834 // So in this case we simply jam rdx into the useless return address and | |
2835 // the stack looks just like we want. | |
2836 // | |
2837 // At this point we need to de-opt. We save the argument return | |
2838 // registers. We call the first C routine, fetch_unroll_info(). This | |
2839 // routine captures the return values and returns a structure which | |
2840 // describes the current frame size and the sizes of all replacement frames. | |
2841 // The current frame is compiled code and may contain many inlined | |
2842 // functions, each with their own JVM state. We pop the current frame, then | |
2843 // push all the new frames. Then we call the C routine unpack_frames() to | |
2844 // populate these frames. Finally unpack_frames() returns us the new target | |
2845 // address. Notice that callee-save registers are BLOWN here; they have | |
2846 // already been captured in the vframeArray at the time the return PC was | |
2847 // patched. | |
2848 address start = __ pc(); | |
2849 Label cont; | |
2850 | |
2851 // Prolog for non exception case! | |
2852 | |
2853 // Save everything in sight. | |
2854 | |
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2855 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
0 | 2856 // Normal deoptimization |
304 | 2857 __ push(Deoptimization::Unpack_deopt); |
0 | 2858 __ jmp(cont); |
2859 | |
2860 int reexecute_offset = __ pc() - start; | |
2861 | |
2862 // Reexecute case | |
2863 // return address is the pc describes what bci to do re-execute at | |
2864 | |
2865 // No need to update map as each call to save_live_registers will produce identical oopmap | |
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2866 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
0 | 2867 |
304 | 2868 __ push(Deoptimization::Unpack_reexecute); |
0 | 2869 __ jmp(cont); |
2870 | |
2871 int exception_offset = __ pc() - start; | |
2872 | |
2873 // Prolog for exception case | |
2874 | |
2875 // all registers are dead at this entry point, except for rax, and | |
2876 // rdx which contain the exception oop and exception pc | |
2877 // respectively. Set them in TLS and fall thru to the | |
2878 // unpack_with_exception_in_tls entry point. | |
2879 | |
2880 __ get_thread(rdi); | |
304 | 2881 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); |
2882 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); | |
0 | 2883 |
2884 int exception_in_tls_offset = __ pc() - start; | |
2885 | |
2886 // new implementation because exception oop is now passed in JavaThread | |
2887 | |
2888 // Prolog for exception case | |
2889 // All registers must be preserved because they might be used by LinearScan | |
2890 // Exceptiop oop and throwing PC are passed in JavaThread | |
2891 // tos: stack at point of call to method that threw the exception (i.e. only | |
2892 // args are on the stack, no return address) | |
2893 | |
2894 // make room on stack for the return address | |
2895 // It will be patched later with the throwing pc. The correct value is not | |
2896 // available now because loading it from memory would destroy registers. | |
304 | 2897 __ push(0); |
0 | 2898 |
2899 // Save everything in sight. | |
2900 | |
2901 // No need to update map as each call to save_live_registers will produce identical oopmap | |
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2902 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
0 | 2903 |
2904 // Now it is safe to overwrite any register | |
2905 | |
2906 // store the correct deoptimization type | |
304 | 2907 __ push(Deoptimization::Unpack_exception); |
0 | 2908 |
2909 // load throwing pc from JavaThread and patch it as the return address | |
2910 // of the current frame. Then clear the field in JavaThread | |
2911 __ get_thread(rdi); | |
304 | 2912 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); |
2913 __ movptr(Address(rbp, wordSize), rdx); | |
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2914 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); |
0 | 2915 |
2916 #ifdef ASSERT | |
2917 // verify that there is really an exception oop in JavaThread | |
304 | 2918 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); |
0 | 2919 __ verify_oop(rax); |
2920 | |
2921 // verify that there is no pending exception | |
2922 Label no_pending_exception; | |
304 | 2923 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); |
2924 __ testptr(rax, rax); | |
0 | 2925 __ jcc(Assembler::zero, no_pending_exception); |
2926 __ stop("must not have pending exception here"); | |
2927 __ bind(no_pending_exception); | |
2928 #endif | |
2929 | |
2930 __ bind(cont); | |
2931 | |
2932 // Compiled code leaves the floating point stack dirty, empty it. | |
2933 __ empty_FPU_stack(); | |
2934 | |
2935 | |
2936 // Call C code. Need thread and this frame, but NOT official VM entry | |
2937 // crud. We cannot block on this call, no GC can happen. | |
2938 __ get_thread(rcx); | |
304 | 2939 __ push(rcx); |
0 | 2940 // fetch_unroll_info needs to call last_java_frame() |
2941 __ set_last_Java_frame(rcx, noreg, noreg, NULL); | |
2942 | |
2943 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); | |
2944 | |
2945 // Need to have an oopmap that tells fetch_unroll_info where to | |
2946 // find any register it might need. | |
2947 | |
2948 oop_maps->add_gc_map( __ pc()-start, map); | |
2949 | |
2950 // Discard arg to fetch_unroll_info | |
304 | 2951 __ pop(rcx); |
0 | 2952 |
2953 __ get_thread(rcx); | |
2954 __ reset_last_Java_frame(rcx, false, false); | |
2955 | |
2956 // Load UnrollBlock into EDI | |
304 | 2957 __ mov(rdi, rax); |
0 | 2958 |
2959 // Move the unpack kind to a safe place in the UnrollBlock because | |
2960 // we are very short of registers | |
2961 | |
2962 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); | |
2963 // retrieve the deopt kind from where we left it. | |
304 | 2964 __ pop(rax); |
0 | 2965 __ movl(unpack_kind, rax); // save the unpack_kind value |
2966 | |
2967 Label noException; | |
2968 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? | |
2969 __ jcc(Assembler::notEqual, noException); | |
304 | 2970 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); |
2971 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); | |
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2972 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); |
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2973 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); |
0 | 2974 |
2975 __ verify_oop(rax); | |
2976 | |
2977 // Overwrite the result registers with the exception results. | |
304 | 2978 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
2979 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
0 | 2980 |
2981 __ bind(noException); | |
2982 | |
2983 // Stack is back to only having register save data on the stack. | |
2984 // Now restore the result registers. Everything else is either dead or captured | |
2985 // in the vframeArray. | |
2986 | |
2987 RegisterSaver::restore_result_registers(masm); | |
2988 | |
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2989 // Non standard control word may be leaked out through a safepoint blob, and we can |
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2990 // deopt at a poll point with the non standard control word. However, we should make |
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2991 // sure the control word is correct after restore_result_registers. |
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2992 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); |
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2993 |
0 | 2994 // All of the register save area has been popped of the stack. Only the |
2995 // return address remains. | |
2996 | |
2997 // Pop all the frames we must move/replace. | |
2998 // | |
2999 // Frame picture (youngest to oldest) | |
3000 // 1: self-frame (no frame link) | |
3001 // 2: deopting frame (no frame link) | |
3002 // 3: caller of deopting frame (could be compiled/interpreted). | |
3003 // | |
3004 // Note: by leaving the return address of self-frame on the stack | |
3005 // and using the size of frame 2 to adjust the stack | |
3006 // when we are done the return to frame 3 will still be on the stack. | |
3007 | |
3008 // Pop deoptimized frame | |
304 | 3009 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
0 | 3010 |
3011 // sp should be pointing at the return address to the caller (3) | |
3012 | |
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3013 // Pick up the initial fp we should save |
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3014 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3015 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3016 |
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3017 #ifdef ASSERT |
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3018 // Compilers generate code that bang the stack by as much as the |
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3019 // interpreter would need. So this stack banging should never |
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3020 // trigger a fault. Verify that it does not on non product builds. |
0 | 3021 if (UseStackBanging) { |
3022 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3023 __ bang_stack_size(rbx, rcx); | |
3024 } | |
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3025 #endif |
0 | 3026 |
3027 // Load array of frame pcs into ECX | |
304 | 3028 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
3029 | |
3030 __ pop(rsi); // trash the old pc | |
0 | 3031 |
3032 // Load array of frame sizes into ESI | |
304 | 3033 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3034 |
3035 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
3036 | |
3037 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3038 __ movl(counter, rbx); | |
3039 | |
3040 // Now adjust the caller's stack to make up for the extra locals | |
3041 // but record the original sp so that we can save it in the skeletal interpreter | |
3042 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3043 // value and not the "real" sp value. | |
3044 | |
3045 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
304 | 3046 __ movptr(sp_temp, rsp); |
3047 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
3048 __ subptr(rsp, rbx); | |
0 | 3049 |
3050 // Push interpreter frames in a loop | |
3051 Label loop; | |
3052 __ bind(loop); | |
304 | 3053 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
0 | 3054 #ifdef CC_INTERP |
304 | 3055 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
0 | 3056 #ifdef ASSERT |
304 | 3057 __ push(0xDEADDEAD); // Make a recognizable pattern |
3058 __ push(0xDEADDEAD); | |
0 | 3059 #else /* ASSERT */ |
304 | 3060 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
0 | 3061 #endif /* ASSERT */ |
3062 #else /* CC_INTERP */ | |
304 | 3063 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
0 | 3064 #endif /* CC_INTERP */ |
304 | 3065 __ pushptr(Address(rcx, 0)); // save return address |
0 | 3066 __ enter(); // save old & set new rbp, |
304 | 3067 __ subptr(rsp, rbx); // Prolog! |
3068 __ movptr(rbx, sp_temp); // sender's sp | |
0 | 3069 #ifdef CC_INTERP |
304 | 3070 __ movptr(Address(rbp, |
0 | 3071 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
3072 rbx); // Make it walkable | |
3073 #else /* CC_INTERP */ | |
3074 // This value is corrected by layout_activation_impl | |
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3075 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); |
304 | 3076 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
0 | 3077 #endif /* CC_INTERP */ |
304 | 3078 __ movptr(sp_temp, rsp); // pass to next frame |
3079 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3080 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3081 __ decrementl(counter); // decrement counter | |
0 | 3082 __ jcc(Assembler::notZero, loop); |
304 | 3083 __ pushptr(Address(rcx, 0)); // save final return address |
0 | 3084 |
3085 // Re-push self-frame | |
3086 __ enter(); // save old & set new rbp, | |
3087 | |
3088 // Return address and rbp, are in place | |
3089 // We'll push additional args later. Just allocate a full sized | |
3090 // register save area | |
304 | 3091 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); |
0 | 3092 |
3093 // Restore frame locals after moving the frame | |
304 | 3094 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
3095 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
0 | 3096 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local |
3097 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
3098 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
3099 | |
3100 // Set up the args to unpack_frame | |
3101 | |
3102 __ pushl(unpack_kind); // get the unpack_kind value | |
3103 __ get_thread(rcx); | |
304 | 3104 __ push(rcx); |
0 | 3105 |
3106 // set last_Java_sp, last_Java_fp | |
3107 __ set_last_Java_frame(rcx, noreg, rbp, NULL); | |
3108 | |
3109 // Call C code. Need thread but NOT official VM entry | |
3110 // crud. We cannot block on this call, no GC can happen. Call should | |
3111 // restore return values to their stack-slots with the new SP. | |
3112 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3113 // Set an oopmap for the call site | |
3114 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); | |
3115 | |
3116 // rax, contains the return result type | |
304 | 3117 __ push(rax); |
0 | 3118 |
3119 __ get_thread(rcx); | |
3120 __ reset_last_Java_frame(rcx, false, false); | |
3121 | |
3122 // Collect return values | |
304 | 3123 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); |
3124 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); | |
0 | 3125 |
3126 // Clear floating point stack before returning to interpreter | |
3127 __ empty_FPU_stack(); | |
3128 | |
3129 // Check if we should push the float or double return value. | |
3130 Label results_done, yes_double_value; | |
3131 __ cmpl(Address(rsp, 0), T_DOUBLE); | |
3132 __ jcc (Assembler::zero, yes_double_value); | |
3133 __ cmpl(Address(rsp, 0), T_FLOAT); | |
3134 __ jcc (Assembler::notZero, results_done); | |
3135 | |
3136 // return float value as expected by interpreter | |
3137 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
3138 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
3139 __ jmp(results_done); | |
3140 | |
3141 // return double value as expected by interpreter | |
3142 __ bind(yes_double_value); | |
3143 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
3144 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
3145 | |
3146 __ bind(results_done); | |
3147 | |
3148 // Pop self-frame. | |
3149 __ leave(); // Epilog! | |
3150 | |
3151 // Jump to interpreter | |
3152 __ ret(0); | |
3153 | |
3154 // ------------- | |
3155 // make sure all code is generated | |
3156 masm->flush(); | |
3157 | |
3158 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); | |
3159 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
3160 } | |
3161 | |
3162 | |
3163 #ifdef COMPILER2 | |
3164 //------------------------------generate_uncommon_trap_blob-------------------- | |
3165 void SharedRuntime::generate_uncommon_trap_blob() { | |
3166 // allocate space for the code | |
3167 ResourceMark rm; | |
3168 // setup code generation tools | |
3169 CodeBuffer buffer("uncommon_trap_blob", 512, 512); | |
3170 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3171 | |
3172 enum frame_layout { | |
3173 arg0_off, // thread sp + 0 // Arg location for | |
3174 arg1_off, // unloaded_class_index sp + 1 // calling C | |
3175 // The frame sender code expects that rbp will be in the "natural" place and | |
3176 // will override any oopMap setting for it. We must therefore force the layout | |
3177 // so that it agrees with the frame sender code. | |
3178 rbp_off, // callee saved register sp + 2 | |
3179 return_off, // slot for return address sp + 3 | |
3180 framesize | |
3181 }; | |
3182 | |
3183 address start = __ pc(); | |
17780 | 3184 |
3185 if (UseRTMLocking) { | |
3186 // Abort RTM transaction before possible nmethod deoptimization. | |
3187 __ xabort(0); | |
3188 } | |
3189 | |
0 | 3190 // Push self-frame. |
304 | 3191 __ subptr(rsp, return_off*wordSize); // Epilog! |
0 | 3192 |
3193 // rbp, is an implicitly saved callee saved register (i.e. the calling | |
3194 // convention will save restore it in prolog/epilog) Other than that | |
3195 // there are no callee save registers no that adapter frames are gone. | |
304 | 3196 __ movptr(Address(rsp, rbp_off*wordSize), rbp); |
0 | 3197 |
3198 // Clear the floating point exception stack | |
3199 __ empty_FPU_stack(); | |
3200 | |
3201 // set last_Java_sp | |
3202 __ get_thread(rdx); | |
3203 __ set_last_Java_frame(rdx, noreg, noreg, NULL); | |
3204 | |
3205 // Call C code. Need thread but NOT official VM entry | |
3206 // crud. We cannot block on this call, no GC can happen. Call should | |
3207 // capture callee-saved registers as well as return values. | |
304 | 3208 __ movptr(Address(rsp, arg0_off*wordSize), rdx); |
0 | 3209 // argument already in ECX |
3210 __ movl(Address(rsp, arg1_off*wordSize),rcx); | |
3211 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); | |
3212 | |
3213 // Set an oopmap for the call site | |
3214 OopMapSet *oop_maps = new OopMapSet(); | |
3215 OopMap* map = new OopMap( framesize, 0 ); | |
3216 // No oopMap for rbp, it is known implicitly | |
3217 | |
3218 oop_maps->add_gc_map( __ pc()-start, map); | |
3219 | |
3220 __ get_thread(rcx); | |
3221 | |
3222 __ reset_last_Java_frame(rcx, false, false); | |
3223 | |
3224 // Load UnrollBlock into EDI | |
304 | 3225 __ movptr(rdi, rax); |
0 | 3226 |
3227 // Pop all the frames we must move/replace. | |
3228 // | |
3229 // Frame picture (youngest to oldest) | |
3230 // 1: self-frame (no frame link) | |
3231 // 2: deopting frame (no frame link) | |
3232 // 3: caller of deopting frame (could be compiled/interpreted). | |
3233 | |
3234 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. | |
304 | 3235 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! |
0 | 3236 |
3237 // Pop deoptimized frame | |
304 | 3238 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
3239 __ addptr(rsp, rcx); | |
0 | 3240 |
3241 // sp should be pointing at the return address to the caller (3) | |
3242 | |
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3243 // Pick up the initial fp we should save |
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3244 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3245 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3246 |
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3247 #ifdef ASSERT |
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3248 // Compilers generate code that bang the stack by as much as the |
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3249 // interpreter would need. So this stack banging should never |
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3250 // trigger a fault. Verify that it does not on non product builds. |
0 | 3251 if (UseStackBanging) { |
3252 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3253 __ bang_stack_size(rbx, rcx); | |
3254 } | |
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3255 #endif |
0 | 3256 |
3257 // Load array of frame pcs into ECX | |
3258 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
3259 | |
304 | 3260 __ pop(rsi); // trash the pc |
0 | 3261 |
3262 // Load array of frame sizes into ESI | |
304 | 3263 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3264 |
3265 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
3266 | |
3267 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3268 __ movl(counter, rbx); | |
3269 | |
3270 // Now adjust the caller's stack to make up for the extra locals | |
3271 // but record the original sp so that we can save it in the skeletal interpreter | |
3272 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3273 // value and not the "real" sp value. | |
3274 | |
3275 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
304 | 3276 __ movptr(sp_temp, rsp); |
3277 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
3278 __ subptr(rsp, rbx); | |
0 | 3279 |
3280 // Push interpreter frames in a loop | |
3281 Label loop; | |
3282 __ bind(loop); | |
304 | 3283 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
0 | 3284 #ifdef CC_INTERP |
304 | 3285 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
0 | 3286 #ifdef ASSERT |
304 | 3287 __ push(0xDEADDEAD); // Make a recognizable pattern |
3288 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...) | |
0 | 3289 #else /* ASSERT */ |
304 | 3290 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
0 | 3291 #endif /* ASSERT */ |
3292 #else /* CC_INTERP */ | |
304 | 3293 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
0 | 3294 #endif /* CC_INTERP */ |
304 | 3295 __ pushptr(Address(rcx, 0)); // save return address |
0 | 3296 __ enter(); // save old & set new rbp, |
304 | 3297 __ subptr(rsp, rbx); // Prolog! |
3298 __ movptr(rbx, sp_temp); // sender's sp | |
0 | 3299 #ifdef CC_INTERP |
304 | 3300 __ movptr(Address(rbp, |
0 | 3301 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
3302 rbx); // Make it walkable | |
3303 #else /* CC_INTERP */ | |
3304 // This value is corrected by layout_activation_impl | |
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3305 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); |
304 | 3306 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
0 | 3307 #endif /* CC_INTERP */ |
304 | 3308 __ movptr(sp_temp, rsp); // pass to next frame |
3309 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3310 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3311 __ decrementl(counter); // decrement counter | |
0 | 3312 __ jcc(Assembler::notZero, loop); |
304 | 3313 __ pushptr(Address(rcx, 0)); // save final return address |
0 | 3314 |
3315 // Re-push self-frame | |
3316 __ enter(); // save old & set new rbp, | |
304 | 3317 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! |
0 | 3318 |
3319 | |
3320 // set last_Java_sp, last_Java_fp | |
3321 __ get_thread(rdi); | |
3322 __ set_last_Java_frame(rdi, noreg, rbp, NULL); | |
3323 | |
3324 // Call C code. Need thread but NOT official VM entry | |
3325 // crud. We cannot block on this call, no GC can happen. Call should | |
3326 // restore return values to their stack-slots with the new SP. | |
304 | 3327 __ movptr(Address(rsp,arg0_off*wordSize),rdi); |
0 | 3328 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); |
3329 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3330 // Set an oopmap for the call site | |
3331 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); | |
3332 | |
3333 __ get_thread(rdi); | |
3334 __ reset_last_Java_frame(rdi, true, false); | |
3335 | |
3336 // Pop self-frame. | |
3337 __ leave(); // Epilog! | |
3338 | |
3339 // Jump to interpreter | |
3340 __ ret(0); | |
3341 | |
3342 // ------------- | |
3343 // make sure all code is generated | |
3344 masm->flush(); | |
3345 | |
3346 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); | |
3347 } | |
3348 #endif // COMPILER2 | |
3349 | |
3350 //------------------------------generate_handler_blob------ | |
3351 // | |
3352 // Generate a special Compile2Runtime blob that saves all registers, | |
3353 // setup oopmap, and calls safepoint code to stop the compiled code for | |
3354 // a safepoint. | |
3355 // | |
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3356 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
0 | 3357 |
3358 // Account for thread arg in our frame | |
3359 const int additional_words = 1; | |
3360 int frame_size_in_words; | |
3361 | |
3362 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); | |
3363 | |
3364 ResourceMark rm; | |
3365 OopMapSet *oop_maps = new OopMapSet(); | |
3366 OopMap* map; | |
3367 | |
3368 // allocate space for the code | |
3369 // setup code generation tools | |
3370 CodeBuffer buffer("handler_blob", 1024, 512); | |
3371 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3372 | |
3373 const Register java_thread = rdi; // callee-saved for VC++ | |
3374 address start = __ pc(); | |
3375 address call_pc = NULL; | |
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3376 bool cause_return = (poll_type == POLL_AT_RETURN); |
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3377 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
17780 | 3378 |
3379 if (UseRTMLocking) { | |
3380 // Abort RTM transaction before calling runtime | |
3381 // because critical section will be large and will be | |
3382 // aborted anyway. Also nmethod could be deoptimized. | |
3383 __ xabort(0); | |
3384 } | |
3385 | |
0 | 3386 // If cause_return is true we are at a poll_return and there is |
3387 // the return address on the stack to the caller on the nmethod | |
3388 // that is safepoint. We can leave this return on the stack and | |
3389 // effectively complete the return and safepoint in the caller. | |
3390 // Otherwise we push space for a return address that the safepoint | |
3391 // handler will install later to make the stack walking sensible. | |
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3392 if (!cause_return) |
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3393 __ push(rbx); // Make room for return address (or push it again) |
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3394 |
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3395 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors); |
0 | 3396 |
3397 // The following is basically a call_VM. However, we need the precise | |
3398 // address of the call in order to generate an oopmap. Hence, we do all the | |
3399 // work ourselves. | |
3400 | |
3401 // Push thread argument and setup last_Java_sp | |
3402 __ get_thread(java_thread); | |
304 | 3403 __ push(java_thread); |
0 | 3404 __ set_last_Java_frame(java_thread, noreg, noreg, NULL); |
3405 | |
3406 // if this was not a poll_return then we need to correct the return address now. | |
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3407 if (!cause_return) { |
304 | 3408 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset())); |
3409 __ movptr(Address(rbp, wordSize), rax); | |
0 | 3410 } |
3411 | |
3412 // do the call | |
3413 __ call(RuntimeAddress(call_ptr)); | |
3414 | |
3415 // Set an oopmap for the call site. This oopmap will map all | |
3416 // oop-registers and debug-info registers as callee-saved. This | |
3417 // will allow deoptimization at this safepoint to find all possible | |
3418 // debug-info recordings, as well as let GC find all oops. | |
3419 | |
3420 oop_maps->add_gc_map( __ pc() - start, map); | |
3421 | |
3422 // Discard arg | |
304 | 3423 __ pop(rcx); |
0 | 3424 |
3425 Label noException; | |
3426 | |
3427 // Clear last_Java_sp again | |
3428 __ get_thread(java_thread); | |
3429 __ reset_last_Java_frame(java_thread, false, false); | |
3430 | |
304 | 3431 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3432 __ jcc(Assembler::equal, noException); |
3433 | |
3434 // Exception pending | |
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3435 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3436 |
3437 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3438 | |
3439 __ bind(noException); | |
3440 | |
3441 // Normal exit, register restoring and exit | |
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3442 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3443 |
3444 __ ret(0); | |
3445 | |
3446 // make sure all code is generated | |
3447 masm->flush(); | |
3448 | |
3449 // Fill-out other meta info | |
3450 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3451 } | |
3452 | |
3453 // | |
3454 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3455 // | |
3456 // Generate a stub that calls into vm to find out the proper destination | |
3457 // of a java call. All the argument registers are live at this point | |
3458 // but since this is generic code we don't know what they are and the caller | |
3459 // must do any gc of the args. | |
3460 // | |
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3461 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3462 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3463 | |
3464 // allocate space for the code | |
3465 ResourceMark rm; | |
3466 | |
3467 CodeBuffer buffer(name, 1000, 512); | |
3468 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3469 | |
3470 int frame_size_words; | |
3471 enum frame_layout { | |
3472 thread_off, | |
3473 extra_words }; | |
3474 | |
3475 OopMapSet *oop_maps = new OopMapSet(); | |
3476 OopMap* map = NULL; | |
3477 | |
3478 int start = __ offset(); | |
3479 | |
3480 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); | |
3481 | |
3482 int frame_complete = __ offset(); | |
3483 | |
3484 const Register thread = rdi; | |
3485 __ get_thread(rdi); | |
3486 | |
304 | 3487 __ push(thread); |
0 | 3488 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
3489 | |
3490 __ call(RuntimeAddress(destination)); | |
3491 | |
3492 | |
3493 // Set an oopmap for the call site. | |
3494 // We need this not only for callee-saved registers, but also for volatile | |
3495 // registers that the compiler might be keeping live across a safepoint. | |
3496 | |
3497 oop_maps->add_gc_map( __ offset() - start, map); | |
3498 | |
3499 // rax, contains the address we are going to jump to assuming no exception got installed | |
3500 | |
304 | 3501 __ addptr(rsp, wordSize); |
0 | 3502 |
3503 // clear last_Java_sp | |
3504 __ reset_last_Java_frame(thread, true, false); | |
3505 // check for pending exceptions | |
3506 Label pending; | |
304 | 3507 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3508 __ jcc(Assembler::notEqual, pending); |
3509 | |
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3510 // get the returned Method* |
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3511 __ get_vm_result_2(rbx, thread); |
304 | 3512 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); |
3513 | |
3514 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); | |
0 | 3515 |
3516 RegisterSaver::restore_live_registers(masm); | |
3517 | |
3518 // We are back the the original state on entry and ready to go. | |
3519 | |
3520 __ jmp(rax); | |
3521 | |
3522 // Pending exception after the safepoint | |
3523 | |
3524 __ bind(pending); | |
3525 | |
3526 RegisterSaver::restore_live_registers(masm); | |
3527 | |
3528 // exception pending => remove activation and forward to exception handler | |
3529 | |
3530 __ get_thread(thread); | |
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3531 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
304 | 3532 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
0 | 3533 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3534 | |
3535 // ------------- | |
3536 // make sure all code is generated | |
3537 masm->flush(); | |
3538 | |
3539 // return the blob | |
3540 // frame_size_words or bytes?? | |
3541 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
3542 } |