Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_32.cpp @ 13384:fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
Summary: rbp not restored when stack overflow is thrown from deopt/uncommon trap blobs
Reviewed-by: kvn, iveresov
| author | roland |
|---|---|
| date | Wed, 20 Nov 2013 12:46:08 +0100 |
| parents | e961c11b85fe |
| children | 02f27ecb4f3a de6a9e811145 1174c8abbdb6 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 28 #include "code/debugInfoRec.hpp" |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
| 1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
| 0 | 43 |
| 44 #define __ masm-> | |
| 45 | |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
| 0 | 48 class RegisterSaver { |
| 49 // Capture info about frame layout | |
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50 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off |
| 0 | 51 enum layout { |
| 52 fpu_state_off = 0, | |
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53 fpu_state_end = fpu_state_off+FPUStateSizeInWords, |
| 0 | 54 st0_off, st0H_off, |
| 55 st1_off, st1H_off, | |
| 56 st2_off, st2H_off, | |
| 57 st3_off, st3H_off, | |
| 58 st4_off, st4H_off, | |
| 59 st5_off, st5H_off, | |
| 60 st6_off, st6H_off, | |
| 61 st7_off, st7H_off, | |
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62 xmm_off, |
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63 DEF_XMM_OFFS(0), |
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64 DEF_XMM_OFFS(1), |
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65 DEF_XMM_OFFS(2), |
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66 DEF_XMM_OFFS(3), |
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67 DEF_XMM_OFFS(4), |
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68 DEF_XMM_OFFS(5), |
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69 DEF_XMM_OFFS(6), |
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70 DEF_XMM_OFFS(7), |
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71 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word |
| 0 | 72 rdi_off, |
| 73 rsi_off, | |
| 74 ignore_off, // extra copy of rbp, | |
| 75 rsp_off, | |
| 76 rbx_off, | |
| 77 rdx_off, | |
| 78 rcx_off, | |
| 79 rax_off, | |
| 80 // The frame sender code expects that rbp will be in the "natural" place and | |
| 81 // will override any oopMap setting for it. We must therefore force the layout | |
| 82 // so that it agrees with the frame sender code. | |
| 83 rbp_off, | |
| 84 return_off, // slot for return address | |
| 85 reg_save_size }; | |
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86 enum { FPU_regs_live = flags_off - fpu_state_end }; |
| 0 | 87 |
| 88 public: | |
| 89 | |
| 90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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91 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false); |
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92 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
| 0 | 93 |
| 94 static int rax_offset() { return rax_off; } | |
| 95 static int rbx_offset() { return rbx_off; } | |
| 96 | |
| 97 // Offsets into the register save area | |
| 98 // Used by deoptimization when it is managing result register | |
| 99 // values on its own | |
| 100 | |
| 101 static int raxOffset(void) { return rax_off; } | |
| 102 static int rdxOffset(void) { return rdx_off; } | |
| 103 static int rbxOffset(void) { return rbx_off; } | |
| 104 static int xmm0Offset(void) { return xmm0_off; } | |
| 105 // This really returns a slot in the fp save area, which one is not important | |
| 106 static int fpResultOffset(void) { return st0_off; } | |
| 107 | |
| 108 // During deoptimization only the result register need to be restored | |
| 109 // all the other values have already been extracted. | |
| 110 | |
| 111 static void restore_result_registers(MacroAssembler* masm); | |
| 112 | |
| 113 }; | |
| 114 | |
| 115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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116 int* total_frame_words, bool verify_fpu, bool save_vectors) { |
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117 int vect_words = 0; |
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118 #ifdef COMPILER2 |
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119 if (save_vectors) { |
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120 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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121 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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122 // Save upper half of YMM registes |
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123 vect_words = 8 * 16 / wordSize; |
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124 additional_frame_words += vect_words; |
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125 } |
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126 #else |
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127 assert(!save_vectors, "vectors are generated only by C2"); |
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128 #endif |
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129 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; |
| 0 | 130 int frame_words = frame_size_in_bytes / wordSize; |
| 131 *total_frame_words = frame_words; | |
| 132 | |
| 133 assert(FPUStateSizeInWords == 27, "update stack layout"); | |
| 134 | |
| 135 // save registers, fpu state, and flags | |
| 136 // We assume caller has already has return address slot on the stack | |
| 137 // We push epb twice in this sequence because we want the real rbp, | |
| 304 | 138 // to be under the return like a normal enter and we want to use pusha |
| 0 | 139 // We push by hand instead of pusing push |
| 140 __ enter(); | |
| 304 | 141 __ pusha(); |
| 142 __ pushf(); | |
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143 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space |
| 0 | 144 __ push_FPU_state(); // Save FPU state & init |
| 145 | |
| 146 if (verify_fpu) { | |
| 147 // Some stubs may have non standard FPU control word settings so | |
| 148 // only check and reset the value when it required to be the | |
| 149 // standard value. The safepoint blob in particular can be used | |
| 150 // in methods which are using the 24 bit control word for | |
| 151 // optimized float math. | |
| 152 | |
| 153 #ifdef ASSERT | |
| 154 // Make sure the control word has the expected value | |
| 155 Label ok; | |
| 156 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 157 __ jccb(Assembler::equal, ok); | |
| 158 __ stop("corrupted control word detected"); | |
| 159 __ bind(ok); | |
| 160 #endif | |
| 161 | |
| 162 // Reset the control word to guard against exceptions being unmasked | |
| 163 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
| 164 // into the on stack copy and then reload that to make sure that the | |
| 165 // current and future values are correct. | |
| 166 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 167 } | |
| 168 | |
| 169 __ frstor(Address(rsp, 0)); | |
| 170 if (!verify_fpu) { | |
| 171 // Set the control word so that exceptions are masked for the | |
| 172 // following code. | |
| 173 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 174 } | |
| 175 | |
| 176 // Save the FPU registers in de-opt-able form | |
| 177 | |
| 178 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0) | |
| 179 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1) | |
| 180 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2) | |
| 181 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3) | |
| 182 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4) | |
| 183 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5) | |
| 184 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6) | |
| 185 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7) | |
| 186 | |
| 187 if( UseSSE == 1 ) { // Save the XMM state | |
| 188 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0); | |
| 189 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1); | |
| 190 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2); | |
| 191 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3); | |
| 192 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4); | |
| 193 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5); | |
| 194 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6); | |
| 195 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7); | |
| 196 } else if( UseSSE >= 2 ) { | |
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197 // Save whole 128bit (16 bytes) XMM regiters |
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198 __ movdqu(Address(rsp,xmm0_off*wordSize),xmm0); |
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199 __ movdqu(Address(rsp,xmm1_off*wordSize),xmm1); |
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200 __ movdqu(Address(rsp,xmm2_off*wordSize),xmm2); |
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201 __ movdqu(Address(rsp,xmm3_off*wordSize),xmm3); |
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202 __ movdqu(Address(rsp,xmm4_off*wordSize),xmm4); |
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203 __ movdqu(Address(rsp,xmm5_off*wordSize),xmm5); |
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204 __ movdqu(Address(rsp,xmm6_off*wordSize),xmm6); |
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205 __ movdqu(Address(rsp,xmm7_off*wordSize),xmm7); |
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206 } |
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207 |
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208 if (vect_words > 0) { |
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209 assert(vect_words*wordSize == 128, ""); |
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210 __ subptr(rsp, 128); // Save upper half of YMM registes |
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211 __ vextractf128h(Address(rsp, 0),xmm0); |
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212 __ vextractf128h(Address(rsp, 16),xmm1); |
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213 __ vextractf128h(Address(rsp, 32),xmm2); |
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214 __ vextractf128h(Address(rsp, 48),xmm3); |
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215 __ vextractf128h(Address(rsp, 64),xmm4); |
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216 __ vextractf128h(Address(rsp, 80),xmm5); |
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217 __ vextractf128h(Address(rsp, 96),xmm6); |
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218 __ vextractf128h(Address(rsp,112),xmm7); |
| 0 | 219 } |
| 220 | |
| 221 // Set an oopmap for the call site. This oopmap will map all | |
| 222 // oop-registers and debug-info registers as callee-saved. This | |
| 223 // will allow deoptimization at this safepoint to find all possible | |
| 224 // debug-info recordings, as well as let GC find all oops. | |
| 225 | |
| 226 OopMapSet *oop_maps = new OopMapSet(); | |
| 227 OopMap* map = new OopMap( frame_words, 0 ); | |
| 228 | |
| 229 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) | |
| 230 | |
| 231 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg()); | |
| 232 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg()); | |
| 233 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg()); | |
| 234 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg()); | |
| 235 // rbp, location is known implicitly, no oopMap | |
| 236 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg()); | |
| 237 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg()); | |
| 238 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg()); | |
| 239 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg()); | |
| 240 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg()); | |
| 241 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg()); | |
| 242 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg()); | |
| 243 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg()); | |
| 244 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg()); | |
| 245 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg()); | |
| 246 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg()); | |
| 247 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg()); | |
| 248 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg()); | |
| 249 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg()); | |
| 250 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg()); | |
| 251 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg()); | |
| 252 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg()); | |
| 253 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg()); | |
| 254 // %%% This is really a waste but we'll keep things as they were for now | |
| 255 if (true) { | |
| 256 #define NEXTREG(x) (x)->as_VMReg()->next() | |
| 257 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0))); | |
| 258 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1))); | |
| 259 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2))); | |
| 260 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3))); | |
| 261 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4))); | |
| 262 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5))); | |
| 263 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6))); | |
| 264 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7))); | |
| 265 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0)); | |
| 266 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1)); | |
| 267 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2)); | |
| 268 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3)); | |
| 269 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4)); | |
| 270 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5)); | |
| 271 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6)); | |
| 272 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7)); | |
| 273 #undef NEXTREG | |
| 274 #undef STACK_OFFSET | |
| 275 } | |
| 276 | |
| 277 return map; | |
| 278 | |
| 279 } | |
| 280 | |
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281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
| 0 | 282 // Recover XMM & FPU state |
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283 int additional_frame_bytes = 0; |
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284 #ifdef COMPILER2 |
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285 if (restore_vectors) { |
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286 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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287 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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288 additional_frame_bytes = 128; |
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289 } |
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290 #else |
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291 assert(!restore_vectors, "vectors are generated only by C2"); |
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292 #endif |
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293 if (UseSSE == 1) { |
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294 assert(additional_frame_bytes == 0, ""); |
| 0 | 295 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize)); |
| 296 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize)); | |
| 297 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize)); | |
| 298 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize)); | |
| 299 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize)); | |
| 300 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize)); | |
| 301 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize)); | |
| 302 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize)); | |
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303 } else if (UseSSE >= 2) { |
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304 #define STACK_ADDRESS(x) Address(rsp,(x)*wordSize + additional_frame_bytes) |
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305 __ movdqu(xmm0,STACK_ADDRESS(xmm0_off)); |
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306 __ movdqu(xmm1,STACK_ADDRESS(xmm1_off)); |
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307 __ movdqu(xmm2,STACK_ADDRESS(xmm2_off)); |
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308 __ movdqu(xmm3,STACK_ADDRESS(xmm3_off)); |
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309 __ movdqu(xmm4,STACK_ADDRESS(xmm4_off)); |
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310 __ movdqu(xmm5,STACK_ADDRESS(xmm5_off)); |
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311 __ movdqu(xmm6,STACK_ADDRESS(xmm6_off)); |
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312 __ movdqu(xmm7,STACK_ADDRESS(xmm7_off)); |
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313 #undef STACK_ADDRESS |
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314 } |
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315 if (restore_vectors) { |
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316 // Restore upper half of YMM registes. |
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317 assert(additional_frame_bytes == 128, ""); |
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318 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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319 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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320 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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321 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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322 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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323 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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324 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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325 __ vinsertf128h(xmm7, Address(rsp,112)); |
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326 __ addptr(rsp, additional_frame_bytes); |
| 0 | 327 } |
| 328 __ pop_FPU_state(); | |
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329 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers |
| 304 | 330 |
| 331 __ popf(); | |
| 332 __ popa(); | |
| 0 | 333 // Get the rbp, described implicitly by the frame sender code (no oopMap) |
| 304 | 334 __ pop(rbp); |
| 0 | 335 |
| 336 } | |
| 337 | |
| 338 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 339 | |
| 340 // Just restore result register. Only used by deoptimization. By | |
| 341 // now any callee save register that needs to be restore to a c2 | |
| 342 // caller of the deoptee has been extracted into the vframeArray | |
| 343 // and will be stuffed into the c2i adapter we create for later | |
| 344 // restoration so only result registers need to be restored here. | |
| 345 // | |
| 346 | |
| 347 __ frstor(Address(rsp, 0)); // Restore fpu state | |
| 348 | |
| 349 // Recover XMM & FPU state | |
| 350 if( UseSSE == 1 ) { | |
| 351 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 352 } else if( UseSSE >= 2 ) { | |
| 353 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 354 } | |
| 304 | 355 __ movptr(rax, Address(rsp, rax_off*wordSize)); |
| 356 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); | |
| 0 | 357 // Pop all of the register save are off the stack except the return address |
| 304 | 358 __ addptr(rsp, return_off * wordSize); |
| 0 | 359 } |
| 360 | |
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361 // Is vector's size (in bytes) bigger than a size saved by default? |
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362 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions. |
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363 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated. |
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364 bool SharedRuntime::is_wide_vector(int size) { |
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365 return size > 16; |
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366 } |
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367 |
| 0 | 368 // The java_calling_convention describes stack locations as ideal slots on |
| 369 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 370 // (like the placement of the register window) the slots must be biased by | |
| 371 // the following value. | |
| 372 static int reg2offset_in(VMReg r) { | |
| 373 // Account for saved rbp, and return address | |
| 374 // This should really be in_preserve_stack_slots | |
| 375 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; | |
| 376 } | |
| 377 | |
| 378 static int reg2offset_out(VMReg r) { | |
| 379 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 380 } | |
| 381 | |
| 382 // --------------------------------------------------------------------------- | |
| 383 // Read the array of BasicTypes from a signature, and compute where the | |
| 384 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 385 // quantities. Values less than SharedInfo::stack0 are registers, those above | |
| 386 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 387 // as framesizes are fixed. | |
| 388 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 390 // up to RegisterImpl::number_of_registers) are the 32-bit | |
| 391 // integer registers. | |
| 392 | |
| 393 // Pass first two oop/int args in registers ECX and EDX. | |
| 394 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 395 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 396 // the doubles will grab the registers before the floats will. | |
| 397 | |
| 398 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 399 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 400 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 401 | |
| 402 | |
| 403 // --------------------------------------------------------------------------- | |
| 404 // The compiled Java calling convention. | |
| 405 // Pass first two oop/int args in registers ECX and EDX. | |
| 406 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 407 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 408 // the doubles will grab the registers before the floats will. | |
| 409 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 410 VMRegPair *regs, | |
| 411 int total_args_passed, | |
| 412 int is_outgoing) { | |
| 413 uint stack = 0; // Starting stack position for args on stack | |
| 414 | |
| 415 | |
| 416 // Pass first two oop/int args in registers ECX and EDX. | |
| 417 uint reg_arg0 = 9999; | |
| 418 uint reg_arg1 = 9999; | |
| 419 | |
| 420 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 421 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 422 // the doubles will grab the registers before the floats will. | |
| 423 // CNC - TURNED OFF FOR non-SSE. | |
| 424 // On Intel we have to round all doubles (and most floats) at | |
| 425 // call sites by storing to the stack in any case. | |
| 426 // UseSSE=0 ==> Don't Use ==> 9999+0 | |
| 427 // UseSSE=1 ==> Floats only ==> 9999+1 | |
| 428 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 | |
| 429 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; | |
| 430 uint fargs = (UseSSE>=2) ? 2 : UseSSE; | |
| 431 uint freg_arg0 = 9999+fargs; | |
| 432 uint freg_arg1 = 9999+fargs; | |
| 433 | |
| 434 // Pass doubles & longs aligned on the stack. First count stack slots for doubles | |
| 435 int i; | |
| 436 for( i = 0; i < total_args_passed; i++) { | |
| 437 if( sig_bt[i] == T_DOUBLE ) { | |
| 438 // first 2 doubles go in registers | |
| 439 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; | |
| 440 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; | |
| 441 else // Else double is passed low on the stack to be aligned. | |
| 442 stack += 2; | |
| 443 } else if( sig_bt[i] == T_LONG ) { | |
| 444 stack += 2; | |
| 445 } | |
| 446 } | |
| 447 int dstack = 0; // Separate counter for placing doubles | |
| 448 | |
| 449 // Now pick where all else goes. | |
| 450 for( i = 0; i < total_args_passed; i++) { | |
| 451 // From the type and the argument number (count) compute the location | |
| 452 switch( sig_bt[i] ) { | |
| 453 case T_SHORT: | |
| 454 case T_CHAR: | |
| 455 case T_BYTE: | |
| 456 case T_BOOLEAN: | |
| 457 case T_INT: | |
| 458 case T_ARRAY: | |
| 459 case T_OBJECT: | |
| 460 case T_ADDRESS: | |
| 461 if( reg_arg0 == 9999 ) { | |
| 462 reg_arg0 = i; | |
| 463 regs[i].set1(rcx->as_VMReg()); | |
| 464 } else if( reg_arg1 == 9999 ) { | |
| 465 reg_arg1 = i; | |
| 466 regs[i].set1(rdx->as_VMReg()); | |
| 467 } else { | |
| 468 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 469 } | |
| 470 break; | |
| 471 case T_FLOAT: | |
| 472 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { | |
| 473 freg_arg0 = i; | |
| 474 regs[i].set1(xmm0->as_VMReg()); | |
| 475 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { | |
| 476 freg_arg1 = i; | |
| 477 regs[i].set1(xmm1->as_VMReg()); | |
| 478 } else { | |
| 479 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 480 } | |
| 481 break; | |
| 482 case T_LONG: | |
| 483 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 484 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 485 dstack += 2; | |
| 486 break; | |
| 487 case T_DOUBLE: | |
| 488 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 489 if( freg_arg0 == (uint)i ) { | |
| 490 regs[i].set2(xmm0->as_VMReg()); | |
| 491 } else if( freg_arg1 == (uint)i ) { | |
| 492 regs[i].set2(xmm1->as_VMReg()); | |
| 493 } else { | |
| 494 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 495 dstack += 2; | |
| 496 } | |
| 497 break; | |
| 498 case T_VOID: regs[i].set_bad(); break; | |
| 499 break; | |
| 500 default: | |
| 501 ShouldNotReachHere(); | |
| 502 break; | |
| 503 } | |
| 504 } | |
| 505 | |
| 506 // return value can be odd number of VMRegImpl stack slots make multiple of 2 | |
| 507 return round_to(stack, 2); | |
| 508 } | |
| 509 | |
| 510 // Patch the callers callsite with entry to compiled code if it exists. | |
| 511 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 512 Label L; | |
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513 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 514 __ jcc(Assembler::equal, L); |
| 515 // Schedule the branch target address early. | |
| 516 // Call into the VM to patch the caller, then jump to compiled callee | |
| 517 // rax, isn't live so capture return address while we easily can | |
| 304 | 518 __ movptr(rax, Address(rsp, 0)); |
| 519 __ pusha(); | |
| 520 __ pushf(); | |
| 0 | 521 |
| 522 if (UseSSE == 1) { | |
| 304 | 523 __ subptr(rsp, 2*wordSize); |
| 0 | 524 __ movflt(Address(rsp, 0), xmm0); |
| 525 __ movflt(Address(rsp, wordSize), xmm1); | |
| 526 } | |
| 527 if (UseSSE >= 2) { | |
| 304 | 528 __ subptr(rsp, 4*wordSize); |
| 0 | 529 __ movdbl(Address(rsp, 0), xmm0); |
| 530 __ movdbl(Address(rsp, 2*wordSize), xmm1); | |
| 531 } | |
| 532 #ifdef COMPILER2 | |
| 533 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 534 if (UseSSE >= 2) { | |
| 535 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 536 } else { | |
| 537 __ empty_FPU_stack(); | |
| 538 } | |
| 539 #endif /* COMPILER2 */ | |
| 540 | |
| 541 // VM needs caller's callsite | |
| 304 | 542 __ push(rax); |
| 0 | 543 // VM needs target method |
| 304 | 544 __ push(rbx); |
| 0 | 545 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 304 | 546 __ addptr(rsp, 2*wordSize); |
| 0 | 547 |
| 548 if (UseSSE == 1) { | |
| 549 __ movflt(xmm0, Address(rsp, 0)); | |
| 550 __ movflt(xmm1, Address(rsp, wordSize)); | |
| 304 | 551 __ addptr(rsp, 2*wordSize); |
| 0 | 552 } |
| 553 if (UseSSE >= 2) { | |
| 554 __ movdbl(xmm0, Address(rsp, 0)); | |
| 555 __ movdbl(xmm1, Address(rsp, 2*wordSize)); | |
| 304 | 556 __ addptr(rsp, 4*wordSize); |
| 0 | 557 } |
| 558 | |
| 304 | 559 __ popf(); |
| 560 __ popa(); | |
| 0 | 561 __ bind(L); |
| 562 } | |
| 563 | |
| 564 | |
| 565 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { | |
| 1506 | 566 int next_off = st_off - Interpreter::stackElementSize; |
| 567 __ movdbl(Address(rsp, next_off), r); | |
| 0 | 568 } |
| 569 | |
| 570 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 571 int total_args_passed, | |
| 572 int comp_args_on_stack, | |
| 573 const BasicType *sig_bt, | |
| 574 const VMRegPair *regs, | |
| 575 Label& skip_fixup) { | |
| 576 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 577 // at all. We've come from compiled code and are attempting to jump to the | |
| 578 // interpreter, which means the caller made a static call to get here | |
| 579 // (vcalls always get a compiled target if there is one). Check for a | |
| 580 // compiled target. If there is one, we need to patch the caller's call. | |
| 581 patch_callers_callsite(masm); | |
| 582 | |
| 583 __ bind(skip_fixup); | |
| 584 | |
| 585 #ifdef COMPILER2 | |
| 586 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 587 if (UseSSE >= 2) { | |
| 588 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 589 } else { | |
| 590 __ empty_FPU_stack(); | |
| 591 } | |
| 592 #endif /* COMPILER2 */ | |
| 593 | |
| 594 // Since all args are passed on the stack, total_args_passed * interpreter_ | |
| 595 // stack_element_size is the | |
| 596 // space we need. | |
| 1506 | 597 int extraspace = total_args_passed * Interpreter::stackElementSize; |
| 0 | 598 |
| 599 // Get return address | |
| 304 | 600 __ pop(rax); |
| 0 | 601 |
| 602 // set senderSP value | |
| 304 | 603 __ movptr(rsi, rsp); |
| 604 | |
| 605 __ subptr(rsp, extraspace); | |
| 0 | 606 |
| 607 // Now write the args into the outgoing interpreter space | |
| 608 for (int i = 0; i < total_args_passed; i++) { | |
| 609 if (sig_bt[i] == T_VOID) { | |
| 610 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 611 continue; | |
| 612 } | |
| 613 | |
| 614 // st_off points to lowest address on stack. | |
| 1506 | 615 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; |
| 616 int next_off = st_off - Interpreter::stackElementSize; | |
| 304 | 617 |
| 0 | 618 // Say 4 args: |
| 619 // i st_off | |
| 620 // 0 12 T_LONG | |
| 621 // 1 8 T_VOID | |
| 622 // 2 4 T_OBJECT | |
| 623 // 3 0 T_BOOL | |
| 624 VMReg r_1 = regs[i].first(); | |
| 625 VMReg r_2 = regs[i].second(); | |
| 626 if (!r_1->is_valid()) { | |
| 627 assert(!r_2->is_valid(), ""); | |
| 628 continue; | |
| 629 } | |
| 630 | |
| 631 if (r_1->is_stack()) { | |
| 632 // memory to memory use fpu stack top | |
| 633 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 634 | |
| 635 if (!r_2->is_valid()) { | |
| 636 __ movl(rdi, Address(rsp, ld_off)); | |
| 304 | 637 __ movptr(Address(rsp, st_off), rdi); |
| 0 | 638 } else { |
| 639 | |
| 640 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW | |
| 641 // st_off == MSW, st_off-wordSize == LSW | |
| 642 | |
| 304 | 643 __ movptr(rdi, Address(rsp, ld_off)); |
| 644 __ movptr(Address(rsp, next_off), rdi); | |
| 645 #ifndef _LP64 | |
| 646 __ movptr(rdi, Address(rsp, ld_off + wordSize)); | |
| 647 __ movptr(Address(rsp, st_off), rdi); | |
| 648 #else | |
| 649 #ifdef ASSERT | |
| 650 // Overwrite the unused slot with known junk | |
| 651 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 652 __ movptr(Address(rsp, st_off), rax); | |
| 653 #endif /* ASSERT */ | |
| 654 #endif // _LP64 | |
| 0 | 655 } |
| 656 } else if (r_1->is_Register()) { | |
| 657 Register r = r_1->as_Register(); | |
| 658 if (!r_2->is_valid()) { | |
| 659 __ movl(Address(rsp, st_off), r); | |
| 660 } else { | |
| 661 // long/double in gpr | |
| 304 | 662 NOT_LP64(ShouldNotReachHere()); |
| 663 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 664 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 665 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 666 // long/double in gpr | |
| 667 #ifdef ASSERT | |
| 668 // Overwrite the unused slot with known junk | |
| 669 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); | |
| 670 __ movptr(Address(rsp, st_off), rax); | |
| 671 #endif /* ASSERT */ | |
| 672 __ movptr(Address(rsp, next_off), r); | |
| 673 } else { | |
| 674 __ movptr(Address(rsp, st_off), r); | |
| 675 } | |
| 0 | 676 } |
| 677 } else { | |
| 678 assert(r_1->is_XMMRegister(), ""); | |
| 679 if (!r_2->is_valid()) { | |
| 680 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 681 } else { | |
| 682 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); | |
| 683 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); | |
| 684 } | |
| 685 } | |
| 686 } | |
| 687 | |
| 688 // Schedule the branch target address early. | |
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689 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
| 0 | 690 // And repush original return address |
| 304 | 691 __ push(rax); |
| 0 | 692 __ jmp(rcx); |
| 693 } | |
| 694 | |
| 695 | |
| 696 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { | |
| 1506 | 697 int next_val_off = ld_off - Interpreter::stackElementSize; |
| 698 __ movdbl(r, Address(saved_sp, next_val_off)); | |
| 0 | 699 } |
| 700 | |
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701 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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702 address code_start, address code_end, |
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703 Label& L_ok) { |
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704 Label L_fail; |
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705 __ lea(temp_reg, ExternalAddress(code_start)); |
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706 __ cmpptr(pc_reg, temp_reg); |
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707 __ jcc(Assembler::belowEqual, L_fail); |
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708 __ lea(temp_reg, ExternalAddress(code_end)); |
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709 __ cmpptr(pc_reg, temp_reg); |
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710 __ jcc(Assembler::below, L_ok); |
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711 __ bind(L_fail); |
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712 } |
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713 |
| 0 | 714 static void gen_i2c_adapter(MacroAssembler *masm, |
| 715 int total_args_passed, | |
| 716 int comp_args_on_stack, | |
| 717 const BasicType *sig_bt, | |
| 718 const VMRegPair *regs) { | |
| 719 | |
| 720 // Note: rsi contains the senderSP on entry. We must preserve it since | |
| 721 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 722 // code goes non-entrant while we get args ready. | |
| 723 | |
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724 // Adapters can be frameless because they do not require the caller |
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725 // to perform additional cleanup work, such as correcting the stack pointer. |
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726 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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727 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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728 // even if a callee has modified the stack pointer. |
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729 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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730 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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731 // up via the senderSP register). |
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732 // In other words, if *either* the caller or callee is interpreted, we can |
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733 // get the stack pointer repaired after a call. |
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734 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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735 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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736 // both caller and callee would be compiled methods, and neither would |
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737 // clean up the stack pointer changes performed by the two adapters. |
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738 // If this happens, control eventually transfers back to the compiled |
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739 // caller, but with an uncorrected stack, causing delayed havoc. |
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740 |
| 0 | 741 // Pick up the return address |
| 304 | 742 __ movptr(rax, Address(rsp, 0)); |
| 0 | 743 |
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744 if (VerifyAdapterCalls && |
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745 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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746 // So, let's test for cascading c2i/i2c adapters right now. |
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747 // assert(Interpreter::contains($return_addr) || |
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748 // StubRoutines::contains($return_addr), |
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749 // "i2c adapter must return to an interpreter frame"); |
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750 __ block_comment("verify_i2c { "); |
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751 Label L_ok; |
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752 if (Interpreter::code() != NULL) |
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753 range_check(masm, rax, rdi, |
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754 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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755 L_ok); |
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756 if (StubRoutines::code1() != NULL) |
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757 range_check(masm, rax, rdi, |
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758 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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759 L_ok); |
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760 if (StubRoutines::code2() != NULL) |
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761 range_check(masm, rax, rdi, |
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762 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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763 L_ok); |
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764 const char* msg = "i2c adapter must return to an interpreter frame"; |
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765 __ block_comment(msg); |
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766 __ stop(msg); |
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767 __ bind(L_ok); |
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768 __ block_comment("} verify_i2ce "); |
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769 } |
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770 |
| 0 | 771 // Must preserve original SP for loading incoming arguments because |
| 772 // we need to align the outgoing SP for compiled code. | |
| 304 | 773 __ movptr(rdi, rsp); |
| 0 | 774 |
| 775 // Cut-out for having no stack args. Since up to 2 int/oop args are passed | |
| 776 // in registers, we will occasionally have no stack args. | |
| 777 int comp_words_on_stack = 0; | |
| 778 if (comp_args_on_stack) { | |
| 779 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 780 // registers are below. By subtracting stack0, we either get a negative | |
| 781 // number (all values in registers) or the maximum stack slot accessed. | |
| 782 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); | |
| 783 // Convert 4-byte stack slots to words. | |
| 784 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; | |
| 785 // Round up to miminum stack alignment, in wordSize | |
| 786 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 787 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 788 } |
| 789 | |
| 790 // Align the outgoing SP | |
| 304 | 791 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 792 |
| 793 // push the return address on the stack (note that pushing, rather | |
| 794 // than storing it, yields the correct frame alignment for the callee) | |
| 304 | 795 __ push(rax); |
| 0 | 796 |
| 797 // Put saved SP in another register | |
| 798 const Register saved_sp = rax; | |
| 304 | 799 __ movptr(saved_sp, rdi); |
| 0 | 800 |
| 801 | |
| 802 // Will jump to the compiled code just as if compiled code was doing it. | |
| 803 // Pre-load the register-jump target early, to schedule it better. | |
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804 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
| 0 | 805 |
| 806 // Now generate the shuffle code. Pick up all register args and move the | |
| 807 // rest through the floating point stack top. | |
| 808 for (int i = 0; i < total_args_passed; i++) { | |
| 809 if (sig_bt[i] == T_VOID) { | |
| 810 // Longs and doubles are passed in native word order, but misaligned | |
| 811 // in the 32-bit build. | |
| 812 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 813 continue; | |
| 814 } | |
| 815 | |
| 816 // Pick up 0, 1 or 2 words from SP+offset. | |
| 817 | |
| 818 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 819 "scrambled load targets?"); | |
| 820 // Load in argument order going down. | |
| 1506 | 821 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 0 | 822 // Point to interpreter value (vs. tag) |
| 1506 | 823 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 824 // |
| 825 // | |
| 826 // | |
| 827 VMReg r_1 = regs[i].first(); | |
| 828 VMReg r_2 = regs[i].second(); | |
| 829 if (!r_1->is_valid()) { | |
| 830 assert(!r_2->is_valid(), ""); | |
| 831 continue; | |
| 832 } | |
| 833 if (r_1->is_stack()) { | |
| 834 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 835 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
| 836 | |
| 837 // We can use rsi as a temp here because compiled code doesn't need rsi as an input | |
| 838 // and if we end up going thru a c2i because of a miss a reasonable value of rsi | |
| 839 // we be generated. | |
| 840 if (!r_2->is_valid()) { | |
| 841 // __ fld_s(Address(saved_sp, ld_off)); | |
| 842 // __ fstp_s(Address(rsp, st_off)); | |
| 843 __ movl(rsi, Address(saved_sp, ld_off)); | |
| 304 | 844 __ movptr(Address(rsp, st_off), rsi); |
| 0 | 845 } else { |
| 846 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 847 // are accessed as negative so LSW is at LOW address | |
| 848 | |
| 849 // ld_off is MSW so get LSW | |
| 850 // st_off is LSW (i.e. reg.first()) | |
| 851 // __ fld_d(Address(saved_sp, next_off)); | |
| 852 // __ fstp_d(Address(rsp, st_off)); | |
| 304 | 853 // |
| 854 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 855 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 856 // So we must adjust where to pick up the data to match the interpreter. | |
| 857 // | |
| 858 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 859 // are accessed as negative so LSW is at LOW address | |
| 860 | |
| 861 // ld_off is MSW so get LSW | |
| 862 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 863 next_off : ld_off; | |
| 864 __ movptr(rsi, Address(saved_sp, offset)); | |
| 865 __ movptr(Address(rsp, st_off), rsi); | |
| 866 #ifndef _LP64 | |
| 867 __ movptr(rsi, Address(saved_sp, ld_off)); | |
| 868 __ movptr(Address(rsp, st_off + wordSize), rsi); | |
| 869 #endif // _LP64 | |
| 0 | 870 } |
| 871 } else if (r_1->is_Register()) { // Register argument | |
| 872 Register r = r_1->as_Register(); | |
| 873 assert(r != rax, "must be different"); | |
| 874 if (r_2->is_valid()) { | |
| 304 | 875 // |
| 876 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 877 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 878 // So we must adjust where to pick up the data to match the interpreter. | |
| 879 | |
| 880 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 881 next_off : ld_off; | |
| 882 | |
| 883 // this can be a misaligned move | |
| 884 __ movptr(r, Address(saved_sp, offset)); | |
| 885 #ifndef _LP64 | |
| 0 | 886 assert(r_2->as_Register() != rax, "need another temporary register"); |
| 887 // Remember r_1 is low address (and LSB on x86) | |
| 888 // So r_2 gets loaded from high address regardless of the platform | |
| 304 | 889 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); |
| 890 #endif // _LP64 | |
| 0 | 891 } else { |
| 892 __ movl(r, Address(saved_sp, ld_off)); | |
| 893 } | |
| 894 } else { | |
| 895 assert(r_1->is_XMMRegister(), ""); | |
| 896 if (!r_2->is_valid()) { | |
| 897 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); | |
| 898 } else { | |
| 899 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); | |
| 900 } | |
| 901 } | |
| 902 } | |
| 903 | |
| 904 // 6243940 We might end up in handle_wrong_method if | |
| 905 // the callee is deoptimized as we race thru here. If that | |
| 906 // happens we don't want to take a safepoint because the | |
| 907 // caller frame will look interpreted and arguments are now | |
| 908 // "compiled" so it is much better to make this transition | |
| 909 // invisible to the stack walking code. Unfortunately if | |
| 910 // we try and find the callee by normal means a safepoint | |
| 911 // is possible. So we stash the desired callee in the thread | |
| 912 // and the vm will find there should this case occur. | |
| 913 | |
| 914 __ get_thread(rax); | |
| 304 | 915 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); |
| 0 | 916 |
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917 // move Method* to rax, in case we end up in an c2i adapter. |
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918 // the c2i adapters expect Method* in rax, (c2) because c2's |
| 0 | 919 // resolve stubs return the result (the method) in rax,. |
| 920 // I'd love to fix this. | |
| 304 | 921 __ mov(rax, rbx); |
| 0 | 922 |
| 923 __ jmp(rdi); | |
| 924 } | |
| 925 | |
| 926 // --------------------------------------------------------------- | |
| 927 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 928 int total_args_passed, | |
| 929 int comp_args_on_stack, | |
| 930 const BasicType *sig_bt, | |
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931 const VMRegPair *regs, |
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932 AdapterFingerPrint* fingerprint) { |
| 0 | 933 address i2c_entry = __ pc(); |
| 934 | |
| 935 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 936 | |
| 937 // ------------------------------------------------------------------------- | |
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938 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls |
| 0 | 939 // to the interpreter. The args start out packed in the compiled layout. They |
| 940 // need to be unpacked into the interpreter layout. This will almost always | |
| 941 // require some stack space. We grow the current (compiled) stack, then repack | |
| 942 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 943 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 944 // compiled code, which relys solely on SP and not EBP, get sick). | |
| 945 | |
| 946 address c2i_unverified_entry = __ pc(); | |
| 947 Label skip_fixup; | |
| 948 | |
| 949 Register holder = rax; | |
| 950 Register receiver = rcx; | |
| 951 Register temp = rbx; | |
| 952 | |
| 953 { | |
| 954 | |
| 955 Label missed; | |
| 304 | 956 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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957 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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958 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
| 0 | 959 __ jcc(Assembler::notEqual, missed); |
| 960 // Method might have been compiled since the call site was patched to | |
| 961 // interpreted if that is the case treat it as a miss so we can get | |
| 962 // the call site corrected. | |
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963 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 964 __ jcc(Assembler::equal, skip_fixup); |
| 965 | |
| 966 __ bind(missed); | |
| 967 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 968 } | |
| 969 | |
| 970 address c2i_entry = __ pc(); | |
| 971 | |
| 972 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 973 | |
| 974 __ flush(); | |
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975 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 976 } |
| 977 | |
| 978 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 979 VMRegPair *regs, | |
| 980 int total_args_passed) { | |
| 981 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
| 982 // the arguments NOT counting out_preserve_stack_slots. | |
| 983 | |
| 984 uint stack = 0; // All arguments on stack | |
| 985 | |
| 986 for( int i = 0; i < total_args_passed; i++) { | |
| 987 // From the type and the argument number (count) compute the location | |
| 988 switch( sig_bt[i] ) { | |
| 989 case T_BOOLEAN: | |
| 990 case T_CHAR: | |
| 991 case T_FLOAT: | |
| 992 case T_BYTE: | |
| 993 case T_SHORT: | |
| 994 case T_INT: | |
| 995 case T_OBJECT: | |
| 996 case T_ARRAY: | |
| 997 case T_ADDRESS: | |
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998 case T_METADATA: |
| 0 | 999 regs[i].set1(VMRegImpl::stack2reg(stack++)); |
| 1000 break; | |
| 1001 case T_LONG: | |
| 1002 case T_DOUBLE: // The stack numbering is reversed from Java | |
| 1003 // Since C arguments do not get reversed, the ordering for | |
| 1004 // doubles on the stack must be opposite the Java convention | |
| 1005 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 1006 regs[i].set2(VMRegImpl::stack2reg(stack)); | |
| 1007 stack += 2; | |
| 1008 break; | |
| 1009 case T_VOID: regs[i].set_bad(); break; | |
| 1010 default: | |
| 1011 ShouldNotReachHere(); | |
| 1012 break; | |
| 1013 } | |
| 1014 } | |
| 1015 return stack; | |
| 1016 } | |
| 1017 | |
| 1018 // A simple move of integer like type | |
| 1019 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1020 if (src.first()->is_stack()) { | |
| 1021 if (dst.first()->is_stack()) { | |
| 1022 // stack to stack | |
| 1023 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
| 1024 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
| 304 | 1025 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1026 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 0 | 1027 } else { |
| 1028 // stack to reg | |
| 304 | 1029 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1030 } |
| 1031 } else if (dst.first()->is_stack()) { | |
| 1032 // reg to stack | |
| 304 | 1033 // no need to sign extend on 64bit |
| 1034 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 0 | 1035 } else { |
| 304 | 1036 if (dst.first() != src.first()) { |
| 1037 __ mov(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1038 } | |
| 0 | 1039 } |
| 1040 } | |
| 1041 | |
| 1042 // An oop arg. Must pass a handle not the oop itself | |
| 1043 static void object_move(MacroAssembler* masm, | |
| 1044 OopMap* map, | |
| 1045 int oop_handle_offset, | |
| 1046 int framesize_in_slots, | |
| 1047 VMRegPair src, | |
| 1048 VMRegPair dst, | |
| 1049 bool is_receiver, | |
| 1050 int* receiver_offset) { | |
| 1051 | |
| 1052 // Because of the calling conventions we know that src can be a | |
| 1053 // register or a stack location. dst can only be a stack location. | |
| 1054 | |
| 1055 assert(dst.first()->is_stack(), "must be stack"); | |
| 1056 // must pass a handle. First figure out the location we use as a handle | |
| 1057 | |
| 1058 if (src.first()->is_stack()) { | |
| 1059 // Oop is already on the stack as an argument | |
| 1060 Register rHandle = rax; | |
| 1061 Label nil; | |
| 304 | 1062 __ xorptr(rHandle, rHandle); |
| 1063 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); | |
| 0 | 1064 __ jcc(Assembler::equal, nil); |
| 304 | 1065 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1066 __ bind(nil); |
| 304 | 1067 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1068 |
| 1069 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1070 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1071 if (is_receiver) { | |
| 1072 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1073 } | |
| 1074 } else { | |
| 1075 // Oop is in an a register we must store it to the space we reserve | |
| 1076 // on the stack for oop_handles | |
| 1077 const Register rOop = src.first()->as_Register(); | |
| 1078 const Register rHandle = rax; | |
| 1079 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1080 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1081 Label skip; | |
| 304 | 1082 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1083 map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
| 304 | 1084 __ xorptr(rHandle, rHandle); |
| 1085 __ cmpptr(rOop, (int32_t)NULL_WORD); | |
| 0 | 1086 __ jcc(Assembler::equal, skip); |
| 304 | 1087 __ lea(rHandle, Address(rsp, offset)); |
| 0 | 1088 __ bind(skip); |
| 1089 // Store the handle parameter | |
| 304 | 1090 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1091 if (is_receiver) { |
| 1092 *receiver_offset = offset; | |
| 1093 } | |
| 1094 } | |
| 1095 } | |
| 1096 | |
| 1097 // A float arg may have to do float reg int reg conversion | |
| 1098 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1099 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1100 | |
| 1101 // Because of the calling convention we know that src is either a stack location | |
| 1102 // or an xmm register. dst can only be a stack location. | |
| 1103 | |
| 1104 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); | |
| 1105 | |
| 1106 if (src.first()->is_stack()) { | |
| 1107 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1108 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1109 } else { |
| 1110 // reg to stack | |
| 1111 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1112 } | |
| 1113 } | |
| 1114 | |
| 1115 // A long move | |
| 1116 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1117 | |
| 1118 // The only legal possibility for a long_move VMRegPair is: | |
| 1119 // 1: two stack slots (possibly unaligned) | |
| 1120 // as neither the java or C calling convention will use registers | |
| 1121 // for longs. | |
| 1122 | |
| 1123 if (src.first()->is_stack() && dst.first()->is_stack()) { | |
| 1124 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); | |
| 304 | 1125 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1126 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1127 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1128 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1129 } else { |
| 1130 ShouldNotReachHere(); | |
| 1131 } | |
| 1132 } | |
| 1133 | |
| 1134 // A double move | |
| 1135 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1136 | |
| 1137 // The only legal possibilities for a double_move VMRegPair are: | |
| 1138 // The painful thing here is that like long_move a VMRegPair might be | |
| 1139 | |
| 1140 // Because of the calling convention we know that src is either | |
| 1141 // 1: a single physical register (xmm registers only) | |
| 1142 // 2: two stack slots (possibly unaligned) | |
| 1143 // dst can only be a pair of stack slots. | |
| 1144 | |
| 1145 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); | |
| 1146 | |
| 1147 if (src.first()->is_stack()) { | |
| 1148 // source is all stack | |
| 304 | 1149 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1150 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1151 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1152 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1153 } else { |
| 1154 // reg to stack | |
| 1155 // No worries about stack alignment | |
| 1156 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1157 } | |
| 1158 } | |
| 1159 | |
| 1160 | |
| 1161 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1162 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1163 // which by this time is free to use | |
| 1164 switch (ret_type) { | |
| 1165 case T_FLOAT: | |
| 1166 __ fstp_s(Address(rbp, -wordSize)); | |
| 1167 break; | |
| 1168 case T_DOUBLE: | |
| 1169 __ fstp_d(Address(rbp, -2*wordSize)); | |
| 1170 break; | |
| 1171 case T_VOID: break; | |
| 1172 case T_LONG: | |
| 304 | 1173 __ movptr(Address(rbp, -wordSize), rax); |
| 1174 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); | |
| 0 | 1175 break; |
| 1176 default: { | |
| 304 | 1177 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1178 } |
| 1179 } | |
| 1180 } | |
| 1181 | |
| 1182 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1183 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1184 // which by this time is free to use | |
| 1185 switch (ret_type) { | |
| 1186 case T_FLOAT: | |
| 1187 __ fld_s(Address(rbp, -wordSize)); | |
| 1188 break; | |
| 1189 case T_DOUBLE: | |
| 1190 __ fld_d(Address(rbp, -2*wordSize)); | |
| 1191 break; | |
| 1192 case T_LONG: | |
| 304 | 1193 __ movptr(rax, Address(rbp, -wordSize)); |
| 1194 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); | |
| 0 | 1195 break; |
| 1196 case T_VOID: break; | |
| 1197 default: { | |
| 304 | 1198 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1199 } |
| 1200 } | |
| 1201 } | |
| 1202 | |
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1203 |
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1204 static void save_or_restore_arguments(MacroAssembler* masm, |
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1205 const int stack_slots, |
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1206 const int total_in_args, |
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1207 const int arg_save_area, |
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1208 OopMap* map, |
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1209 VMRegPair* in_regs, |
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1210 BasicType* in_sig_bt) { |
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1211 // if map is non-NULL then the code should store the values, |
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1212 // otherwise it should load them. |
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1213 int handle_index = 0; |
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1214 // Save down double word first |
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1215 for ( int i = 0; i < total_in_args; i++) { |
|
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1216 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1217 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1218 int offset = slot * VMRegImpl::stack_slot_size; |
|
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1219 handle_index += 2; |
|
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1220 assert(handle_index <= stack_slots, "overflow"); |
|
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1221 if (map != NULL) { |
|
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1222 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1223 } else { |
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1224 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1225 } |
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1226 } |
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1227 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) { |
|
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1228 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1229 int offset = slot * VMRegImpl::stack_slot_size; |
|
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1230 handle_index += 2; |
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1231 assert(handle_index <= stack_slots, "overflow"); |
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1232 if (map != NULL) { |
|
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1233 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1234 if (in_regs[i].second()->is_Register()) { |
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1235 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register()); |
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1236 } |
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1237 } else { |
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1238 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1239 if (in_regs[i].second()->is_Register()) { |
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1240 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4)); |
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1241 } |
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1242 } |
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1243 } |
|
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1244 } |
|
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1245 // Save or restore single word registers |
|
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1246 for ( int i = 0; i < total_in_args; i++) { |
|
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1247 if (in_regs[i].first()->is_Register()) { |
|
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1248 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
|
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1249 int offset = slot * VMRegImpl::stack_slot_size; |
|
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|
1250 assert(handle_index <= stack_slots, "overflow"); |
|
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1251 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
|
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|
1252 map->set_oop(VMRegImpl::stack2reg(slot));; |
|
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1253 } |
|
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|
1254 |
|
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|
1255 // Value is in an input register pass we must flush it to the stack |
|
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1256 const Register reg = in_regs[i].first()->as_Register(); |
|
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|
1257 switch (in_sig_bt[i]) { |
|
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1258 case T_ARRAY: |
|
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1259 if (map != NULL) { |
|
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|
1260 __ movptr(Address(rsp, offset), reg); |
|
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|
1261 } else { |
|
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|
1262 __ movptr(reg, Address(rsp, offset)); |
|
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|
1263 } |
|
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|
1264 break; |
|
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|
1265 case T_BOOLEAN: |
|
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|
1266 case T_CHAR: |
|
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|
1267 case T_BYTE: |
|
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|
1268 case T_SHORT: |
|
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|
1269 case T_INT: |
|
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|
1270 if (map != NULL) { |
|
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|
1271 __ movl(Address(rsp, offset), reg); |
|
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|
1272 } else { |
|
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|
1273 __ movl(reg, Address(rsp, offset)); |
|
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|
1274 } |
|
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|
1275 break; |
|
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|
1276 case T_OBJECT: |
|
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|
1277 default: ShouldNotReachHere(); |
|
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|
1278 } |
|
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|
1279 } else if (in_regs[i].first()->is_XMMRegister()) { |
|
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|
1280 if (in_sig_bt[i] == T_FLOAT) { |
|
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|
1281 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
|
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|
1282 int offset = slot * VMRegImpl::stack_slot_size; |
|
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|
1283 assert(handle_index <= stack_slots, "overflow"); |
|
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|
1284 if (map != NULL) { |
|
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|
1285 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
|
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|
1286 } else { |
|
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|
1287 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
|
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|
1288 } |
|
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|
1289 } |
|
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|
1290 } else if (in_regs[i].first()->is_stack()) { |
|
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|
1291 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
|
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|
1292 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
|
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|
1293 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
|
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|
1294 } |
|
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|
1295 } |
|
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|
1296 } |
|
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|
1297 } |
|
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|
1298 |
|
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|
1299 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
|
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|
1300 // keeps a new JNI critical region from starting until a GC has been |
|
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|
1301 // forced. Save down any oops in registers and describe them in an |
|
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|
1302 // OopMap. |
|
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|
1303 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
|
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|
1304 Register thread, |
|
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|
1305 int stack_slots, |
|
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|
1306 int total_c_args, |
|
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|
1307 int total_in_args, |
|
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|
1308 int arg_save_area, |
|
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|
1309 OopMapSet* oop_maps, |
|
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|
1310 VMRegPair* in_regs, |
|
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|
1311 BasicType* in_sig_bt) { |
|
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|
1312 __ block_comment("check GC_locker::needs_gc"); |
|
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|
1313 Label cont; |
|
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|
1314 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
|
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|
1315 __ jcc(Assembler::equal, cont); |
|
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|
1316 |
|
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|
1317 // Save down any incoming oops and call into the runtime to halt for a GC |
|
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|
1318 |
|
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|
1319 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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|
1320 |
|
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|
1321 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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|
1322 arg_save_area, map, in_regs, in_sig_bt); |
|
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|
1323 |
|
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|
1324 address the_pc = __ pc(); |
|
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|
1325 oop_maps->add_gc_map( __ offset(), map); |
|
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|
1326 __ set_last_Java_frame(thread, rsp, noreg, the_pc); |
|
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|
1327 |
|
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|
1328 __ block_comment("block_for_jni_critical"); |
|
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1329 __ push(thread); |
|
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|
1330 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
|
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|
1331 __ increment(rsp, wordSize); |
|
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|
1332 |
|
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|
1333 __ get_thread(thread); |
|
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|
1334 __ reset_last_Java_frame(thread, false, true); |
|
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|
1335 |
|
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|
1336 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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|
1337 arg_save_area, NULL, in_regs, in_sig_bt); |
|
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1338 |
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1339 __ bind(cont); |
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1340 #ifdef ASSERT |
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1341 if (StressCriticalJNINatives) { |
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1342 // Stress register saving |
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1343 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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1344 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1345 arg_save_area, map, in_regs, in_sig_bt); |
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1346 // Destroy argument registers |
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1347 for (int i = 0; i < total_in_args - 1; i++) { |
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1348 if (in_regs[i].first()->is_Register()) { |
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1349 const Register reg = in_regs[i].first()->as_Register(); |
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1350 __ xorptr(reg, reg); |
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1351 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1352 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1353 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1354 ShouldNotReachHere(); |
|
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1355 } else if (in_regs[i].first()->is_stack()) { |
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1356 // Nothing to do |
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1357 } else { |
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1358 ShouldNotReachHere(); |
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1359 } |
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1360 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1361 i++; |
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1362 } |
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1363 } |
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1364 |
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1365 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1366 arg_save_area, NULL, in_regs, in_sig_bt); |
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1367 } |
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1368 #endif |
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1369 } |
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1370 |
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1371 // Unpack an array argument into a pointer to the body and the length |
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1372 // if the array is non-null, otherwise pass 0 for both. |
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1373 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
|
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1374 Register tmp_reg = rax; |
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1375 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1376 "possible collision"); |
|
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1377 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1378 "possible collision"); |
|
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1379 |
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1380 // Pass the length, ptr pair |
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1381 Label is_null, done; |
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1382 VMRegPair tmp(tmp_reg->as_VMReg()); |
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1383 if (reg.first()->is_stack()) { |
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1384 // Load the arg up from the stack |
|
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1385 simple_move32(masm, reg, tmp); |
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1386 reg = tmp; |
|
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1387 } |
|
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1388 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1389 __ jccb(Assembler::equal, is_null); |
|
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1390 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1391 simple_move32(masm, tmp, body_arg); |
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1392 // load the length relative to the body. |
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1393 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
|
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1394 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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|
1395 simple_move32(masm, tmp, length_arg); |
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1396 __ jmpb(done); |
|
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1397 __ bind(is_null); |
|
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1398 // Pass zeros |
|
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1399 __ xorptr(tmp_reg, tmp_reg); |
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|
1400 simple_move32(masm, tmp, body_arg); |
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|
1401 simple_move32(masm, tmp, length_arg); |
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1402 __ bind(done); |
|
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1403 } |
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1404 |
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1405 static void verify_oop_args(MacroAssembler* masm, |
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1406 methodHandle method, |
|
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1407 const BasicType* sig_bt, |
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1408 const VMRegPair* regs) { |
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1409 Register temp_reg = rbx; // not part of any compiled calling seq |
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1410 if (VerifyOops) { |
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1411 for (int i = 0; i < method->size_of_parameters(); i++) { |
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1412 if (sig_bt[i] == T_OBJECT || |
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1413 sig_bt[i] == T_ARRAY) { |
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1414 VMReg r = regs[i].first(); |
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1415 assert(r->is_valid(), "bad oop arg"); |
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1416 if (r->is_stack()) { |
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1417 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1418 __ verify_oop(temp_reg); |
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1419 } else { |
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1420 __ verify_oop(r->as_Register()); |
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1421 } |
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1422 } |
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1423 } |
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1424 } |
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1425 } |
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1426 |
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1427 static void gen_special_dispatch(MacroAssembler* masm, |
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1428 methodHandle method, |
|
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1429 const BasicType* sig_bt, |
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1430 const VMRegPair* regs) { |
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1431 verify_oop_args(masm, method, sig_bt, regs); |
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1432 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1433 |
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1434 // Now write the args into the outgoing interpreter space |
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1435 bool has_receiver = false; |
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1436 Register receiver_reg = noreg; |
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1437 int member_arg_pos = -1; |
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1438 Register member_reg = noreg; |
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1439 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
|
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1440 if (ref_kind != 0) { |
|
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1441 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
|
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|
1442 member_reg = rbx; // known to be free at this point |
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1443 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
|
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1444 } else if (iid == vmIntrinsics::_invokeBasic) { |
|
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|
1445 has_receiver = true; |
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1446 } else { |
|
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1447 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
|
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1448 } |
|
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1449 |
|
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1450 if (member_reg != noreg) { |
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|
1451 // Load the member_arg into register, if necessary. |
|
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1452 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
|
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1453 VMReg r = regs[member_arg_pos].first(); |
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1454 if (r->is_stack()) { |
|
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|
1455 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1456 } else { |
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1457 // no data motion is needed |
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1458 member_reg = r->as_Register(); |
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1459 } |
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1460 } |
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1461 |
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1462 if (has_receiver) { |
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1463 // Make sure the receiver is loaded into a register. |
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1464 assert(method->size_of_parameters() > 0, "oob"); |
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1465 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1466 VMReg r = regs[0].first(); |
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1467 assert(r->is_valid(), "bad receiver arg"); |
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1468 if (r->is_stack()) { |
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1469 // Porting note: This assumes that compiled calling conventions always |
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1470 // pass the receiver oop in a register. If this is not true on some |
|
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1471 // platform, pick a temp and load the receiver from stack. |
|
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1472 fatal("receiver always in a register"); |
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1473 receiver_reg = rcx; // known to be free at this point |
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1474 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1475 } else { |
|
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1476 // no data motion is needed |
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1477 receiver_reg = r->as_Register(); |
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1478 } |
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1479 } |
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1480 |
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1481 // Figure out which address we are really jumping to: |
|
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1482 MethodHandles::generate_method_handle_dispatch(masm, iid, |
|
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1483 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1484 } |
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1485 |
| 0 | 1486 // --------------------------------------------------------------------------- |
| 1487 // Generate a native wrapper for a given method. The method takes arguments | |
| 1488 // in the Java compiled code convention, marshals them to the native | |
| 1489 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1490 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1491 // returns. | |
|
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1492 // |
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1493 // Critical native functions are a shorthand for the use of |
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1494 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1495 // functions. The wrapper is expected to unpack the arguments before |
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1496 // passing them to the callee and perform checks before and after the |
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1497 // native call to ensure that they GC_locker |
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1498 // lock_critical/unlock_critical semantics are followed. Some other |
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1499 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1500 // block and the check for pending exceptions it's impossible for them |
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1501 // to be thrown. |
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1502 // |
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1503 // They are roughly structured like this: |
|
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1504 // if (GC_locker::needs_gc()) |
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1505 // SharedRuntime::block_for_jni_critical(); |
|
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1506 // tranistion to thread_in_native |
|
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1507 // unpack arrray arguments and call native entry point |
|
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1508 // check for safepoint in progress |
|
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|
1509 // check if any thread suspend flags are set |
|
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1510 // call into JVM and possible unlock the JNI critical |
|
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1511 // if a GC was suppressed while in the critical native. |
|
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1512 // transition back to thread_in_Java |
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1513 // return to caller |
|
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1514 // |
|
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1515 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
| 0 | 1516 methodHandle method, |
|
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|
1517 int compile_id, |
|
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1518 BasicType* in_sig_bt, |
|
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|
1519 VMRegPair* in_regs, |
| 0 | 1520 BasicType ret_type) { |
|
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1521 if (method->is_method_handle_intrinsic()) { |
|
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1522 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1523 intptr_t start = (intptr_t)__ pc(); |
|
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1524 int vep_offset = ((intptr_t)__ pc()) - start; |
|
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1525 gen_special_dispatch(masm, |
|
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|
1526 method, |
|
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|
1527 in_sig_bt, |
|
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|
1528 in_regs); |
|
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|
1529 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
|
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|
1530 __ flush(); |
|
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|
1531 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
|
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|
1532 return nmethod::new_native_nmethod(method, |
|
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|
1533 compile_id, |
|
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|
1534 masm->code(), |
|
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|
1535 vep_offset, |
|
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|
1536 frame_complete, |
|
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|
1537 stack_slots / VMRegImpl::slots_per_word, |
|
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|
1538 in_ByteSize(-1), |
|
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|
1539 in_ByteSize(-1), |
|
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|
1540 (OopMapSet*)NULL); |
|
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|
1541 } |
|
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|
1542 bool is_critical_native = true; |
|
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|
1543 address native_func = method->critical_native_function(); |
|
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|
1544 if (native_func == NULL) { |
|
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|
1545 native_func = method->native_function(); |
|
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|
1546 is_critical_native = false; |
|
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|
1547 } |
|
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|
1548 assert(native_func != NULL, "must have function"); |
| 0 | 1549 |
| 1550 // An OopMap for lock (and class if static) | |
| 1551 OopMapSet *oop_maps = new OopMapSet(); | |
| 1552 | |
| 1553 // We have received a description of where all the java arg are located | |
| 1554 // on entry to the wrapper. We need to convert these args to where | |
| 1555 // the jni function will expect them. To figure out where they go | |
| 1556 // we convert the java signature to a C signature by inserting | |
| 1557 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1558 | |
|
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1559 const int total_in_args = method->size_of_parameters(); |
|
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|
1560 int total_c_args = total_in_args; |
|
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|
1561 if (!is_critical_native) { |
|
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|
1562 total_c_args += 1; |
|
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|
1563 if (method->is_static()) { |
|
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|
1564 total_c_args++; |
|
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|
1565 } |
|
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|
1566 } else { |
|
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|
1567 for (int i = 0; i < total_in_args; i++) { |
|
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|
1568 if (in_sig_bt[i] == T_ARRAY) { |
|
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|
1569 total_c_args++; |
|
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|
1570 } |
|
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|
1571 } |
| 0 | 1572 } |
| 1573 | |
| 1574 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
|
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|
1575 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
|
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|
1576 BasicType* in_elem_bt = NULL; |
| 0 | 1577 |
| 1578 int argc = 0; | |
|
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|
1579 if (!is_critical_native) { |
|
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|
1580 out_sig_bt[argc++] = T_ADDRESS; |
|
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|
1581 if (method->is_static()) { |
|
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|
1582 out_sig_bt[argc++] = T_OBJECT; |
|
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|
1583 } |
|
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|
1584 |
|
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|
1585 for (int i = 0; i < total_in_args ; i++ ) { |
|
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|
1586 out_sig_bt[argc++] = in_sig_bt[i]; |
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|
1587 } |
|
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1588 } else { |
|
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|
1589 Thread* THREAD = Thread::current(); |
|
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|
1590 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
|
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|
1591 SignatureStream ss(method->signature()); |
|
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|
1592 for (int i = 0; i < total_in_args ; i++ ) { |
|
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|
1593 if (in_sig_bt[i] == T_ARRAY) { |
|
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|
1594 // Arrays are passed as int, elem* pair |
|
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1595 out_sig_bt[argc++] = T_INT; |
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1596 out_sig_bt[argc++] = T_ADDRESS; |
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1597 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1598 const char* at = atype->as_C_string(); |
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1599 if (strlen(at) == 2) { |
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1600 assert(at[0] == '[', "must be"); |
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1601 switch (at[1]) { |
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1602 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1603 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1604 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1605 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1606 case 'I': in_elem_bt[i] = T_INT; break; |
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1607 case 'J': in_elem_bt[i] = T_LONG; break; |
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1608 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1609 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1610 default: ShouldNotReachHere(); |
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1611 } |
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1612 } |
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1613 } else { |
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1614 out_sig_bt[argc++] = in_sig_bt[i]; |
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1615 in_elem_bt[i] = T_VOID; |
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1616 } |
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1617 if (in_sig_bt[i] != T_VOID) { |
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1618 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1619 ss.next(); |
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1620 } |
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1621 } |
| 0 | 1622 } |
| 1623 | |
| 1624 // Now figure out where the args must be stored and how much stack space | |
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1625 // they require. |
| 0 | 1626 int out_arg_slots; |
| 1627 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
| 1628 | |
| 1629 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1630 // registers a max of 2 on x86. | |
| 1631 | |
| 1632 // Calculate the total number of stack slots we will need. | |
| 1633 | |
| 1634 // First count the abi requirement plus all of the outgoing args | |
| 1635 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1636 | |
| 1637 // Now the space for the inbound oop handle area | |
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1638 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers |
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1639 if (is_critical_native) { |
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1640 // Critical natives may have to call out so they need a save area |
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1641 // for register arguments. |
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1642 int double_slots = 0; |
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1643 int single_slots = 0; |
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1644 for ( int i = 0; i < total_in_args; i++) { |
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1645 if (in_regs[i].first()->is_Register()) { |
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1646 const Register reg = in_regs[i].first()->as_Register(); |
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1647 switch (in_sig_bt[i]) { |
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1648 case T_ARRAY: // critical array (uses 2 slots on LP64) |
|
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1649 case T_BOOLEAN: |
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1650 case T_BYTE: |
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1651 case T_SHORT: |
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1652 case T_CHAR: |
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1653 case T_INT: single_slots++; break; |
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1654 case T_LONG: double_slots++; break; |
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1655 default: ShouldNotReachHere(); |
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1656 } |
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1657 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1658 switch (in_sig_bt[i]) { |
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1659 case T_FLOAT: single_slots++; break; |
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1660 case T_DOUBLE: double_slots++; break; |
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1661 default: ShouldNotReachHere(); |
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1662 } |
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1663 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1664 ShouldNotReachHere(); |
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1665 } |
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1666 } |
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1667 total_save_slots = double_slots * 2 + single_slots; |
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1668 // align the save area |
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1669 if (double_slots != 0) { |
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1670 stack_slots = round_to(stack_slots, 2); |
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1671 } |
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1672 } |
| 0 | 1673 |
| 1674 int oop_handle_offset = stack_slots; | |
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1675 stack_slots += total_save_slots; |
| 0 | 1676 |
| 1677 // Now any space we need for handlizing a klass if static method | |
| 1678 | |
| 1679 int klass_slot_offset = 0; | |
| 1680 int klass_offset = -1; | |
| 1681 int lock_slot_offset = 0; | |
| 1682 bool is_static = false; | |
| 1683 | |
| 1684 if (method->is_static()) { | |
| 1685 klass_slot_offset = stack_slots; | |
| 1686 stack_slots += VMRegImpl::slots_per_word; | |
| 1687 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1688 is_static = true; | |
| 1689 } | |
| 1690 | |
| 1691 // Plus a lock if needed | |
| 1692 | |
| 1693 if (method->is_synchronized()) { | |
| 1694 lock_slot_offset = stack_slots; | |
| 1695 stack_slots += VMRegImpl::slots_per_word; | |
| 1696 } | |
| 1697 | |
| 1698 // Now a place (+2) to save return values or temp during shuffling | |
| 1699 // + 2 for return address (which we own) and saved rbp, | |
| 1700 stack_slots += 4; | |
| 1701 | |
| 1702 // Ok The space we have allocated will look like: | |
| 1703 // | |
| 1704 // | |
| 1705 // FP-> | | | |
| 1706 // |---------------------| | |
| 1707 // | 2 slots for moves | | |
| 1708 // |---------------------| | |
| 1709 // | lock box (if sync) | | |
| 1710 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) | |
| 1711 // | klass (if static) | | |
| 1712 // |---------------------| <- klass_slot_offset | |
| 1713 // | oopHandle area | | |
| 1714 // |---------------------| <- oop_handle_offset (a max of 2 registers) | |
| 1715 // | outbound memory | | |
| 1716 // | based arguments | | |
| 1717 // | | | |
| 1718 // |---------------------| | |
| 1719 // | | | |
| 1720 // SP-> | out_preserved_slots | | |
| 1721 // | |
| 1722 // | |
| 1723 // **************************************************************************** | |
| 1724 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
| 1725 // arguments off of the stack after the jni call. Before the call we can use | |
| 1726 // instructions that are SP relative. After the jni call we switch to FP | |
| 1727 // relative instructions instead of re-adjusting the stack on windows. | |
| 1728 // **************************************************************************** | |
| 1729 | |
| 1730 | |
| 1731 // Now compute actual number of stack words we need rounding to make | |
| 1732 // stack properly aligned. | |
|
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1733 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 1734 |
| 1735 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 1736 | |
| 1737 intptr_t start = (intptr_t)__ pc(); | |
| 1738 | |
| 1739 // First thing make an ic check to see if we should even be here | |
| 1740 | |
| 1741 // We are free to use all registers as temps without saving them and | |
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1742 // restoring them except rbp. rbp is the only callee save register |
| 0 | 1743 // as far as the interpreter and the compiler(s) are concerned. |
| 1744 | |
| 1745 | |
| 1746 const Register ic_reg = rax; | |
| 1747 const Register receiver = rcx; | |
| 1748 Label hit; | |
| 1749 Label exception_pending; | |
| 1750 | |
| 1751 __ verify_oop(receiver); | |
| 304 | 1752 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
| 0 | 1753 __ jcc(Assembler::equal, hit); |
| 1754 | |
| 1755 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 1756 | |
| 1757 // verified entry must be aligned for code patching. | |
| 1758 // and the first 5 bytes must be in the same cache line | |
| 1759 // if we align at 8 then we will be sure 5 bytes are in the same line | |
| 1760 __ align(8); | |
| 1761 | |
| 1762 __ bind(hit); | |
| 1763 | |
| 1764 int vep_offset = ((intptr_t)__ pc()) - start; | |
| 1765 | |
| 1766 #ifdef COMPILER1 | |
| 1767 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
| 1768 // Object.hashCode can pull the hashCode from the header word | |
| 1769 // instead of doing a full VM transition once it's been computed. | |
| 1770 // Since hashCode is usually polymorphic at call sites we can't do | |
| 1771 // this optimization at the call site without a lot of work. | |
| 1772 Label slowCase; | |
| 1773 Register receiver = rcx; | |
| 1774 Register result = rax; | |
| 304 | 1775 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
| 0 | 1776 |
| 1777 // check if locked | |
| 304 | 1778 __ testptr(result, markOopDesc::unlocked_value); |
| 0 | 1779 __ jcc (Assembler::zero, slowCase); |
| 1780 | |
| 1781 if (UseBiasedLocking) { | |
| 1782 // Check if biased and fall through to runtime if so | |
| 304 | 1783 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
| 0 | 1784 __ jcc (Assembler::notZero, slowCase); |
| 1785 } | |
| 1786 | |
| 1787 // get hash | |
| 304 | 1788 __ andptr(result, markOopDesc::hash_mask_in_place); |
| 0 | 1789 // test if hashCode exists |
| 1790 __ jcc (Assembler::zero, slowCase); | |
| 304 | 1791 __ shrptr(result, markOopDesc::hash_shift); |
| 0 | 1792 __ ret(0); |
| 1793 __ bind (slowCase); | |
| 1794 } | |
| 1795 #endif // COMPILER1 | |
| 1796 | |
| 1797 // The instruction at the verified entry point must be 5 bytes or longer | |
| 1798 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 1799 // instruction fits that requirement. | |
| 1800 | |
| 1801 // Generate stack overflow check | |
| 1802 | |
| 1803 if (UseStackBanging) { | |
| 1804 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 1805 } else { | |
| 1806 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 1807 __ fat_nop(); | |
| 1808 } | |
| 1809 | |
| 1810 // Generate a new frame for the wrapper. | |
| 1811 __ enter(); | |
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1812 // -2 because return address is already present and so is saved rbp |
| 304 | 1813 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 1814 |
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1815 // Frame is now completed as far as size and linkage. |
| 0 | 1816 int frame_complete = ((intptr_t)__ pc()) - start; |
| 1817 | |
| 1818 // Calculate the difference between rsp and rbp,. We need to know it | |
| 1819 // after the native call because on windows Java Natives will pop | |
| 1820 // the arguments and it is painful to do rsp relative addressing | |
| 1821 // in a platform independent way. So after the call we switch to | |
| 1822 // rbp, relative addressing. | |
| 1823 | |
| 1824 int fp_adjustment = stack_size - 2*wordSize; | |
| 1825 | |
| 1826 #ifdef COMPILER2 | |
| 1827 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 1828 if (UseSSE >= 2) { | |
| 1829 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 1830 } else { | |
| 1831 __ empty_FPU_stack(); | |
| 1832 } | |
| 1833 #endif /* COMPILER2 */ | |
| 1834 | |
| 1835 // Compute the rbp, offset for any slots used after the jni call | |
| 1836 | |
| 1837 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; | |
| 1838 | |
| 1839 // We use rdi as a thread pointer because it is callee save and | |
| 1840 // if we load it once it is usable thru the entire wrapper | |
| 1841 const Register thread = rdi; | |
| 1842 | |
| 1843 // We use rsi as the oop handle for the receiver/klass | |
| 1844 // It is callee save so it survives the call to native | |
| 1845 | |
| 1846 const Register oop_handle_reg = rsi; | |
| 1847 | |
| 1848 __ get_thread(thread); | |
| 1849 | |
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1850 if (is_critical_native) { |
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1851 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args, |
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1852 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1853 } |
| 0 | 1854 |
| 1855 // | |
| 1856 // We immediately shuffle the arguments so that any vm call we have to | |
| 1857 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 1858 // captured the oops from our caller and have a valid oopMap for | |
| 1859 // them. | |
| 1860 | |
| 1861 // ----------------- | |
| 1862 // The Grand Shuffle | |
| 1863 // | |
| 1864 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
| 1865 // and, if static, the class mirror instead of a receiver. This pretty much | |
| 1866 // guarantees that register layout will not match (and x86 doesn't use reg | |
| 1867 // parms though amd does). Since the native abi doesn't use register args | |
| 1868 // and the java conventions does we don't have to worry about collisions. | |
| 1869 // All of our moved are reg->stack or stack->stack. | |
| 1870 // We ignore the extra arguments during the shuffle and handle them at the | |
| 1871 // last moment. The shuffle is described by the two calling convention | |
| 1872 // vectors we have in our possession. We simply walk the java vector to | |
| 1873 // get the source locations and the c vector to get the destinations. | |
| 1874 | |
|
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1875 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 ); |
| 0 | 1876 |
| 1877 // Record rsp-based slot for receiver on stack for non-static methods | |
| 1878 int receiver_offset = -1; | |
| 1879 | |
| 1880 // This is a trick. We double the stack slots so we can claim | |
| 1881 // the oops in the caller's frame. Since we are sure to have | |
| 1882 // more args than the caller doubling is enough to make | |
| 1883 // sure we can capture all the incoming oop args from the | |
| 1884 // caller. | |
| 1885 // | |
| 1886 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 1887 | |
| 1888 // Mark location of rbp, | |
| 1889 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); | |
| 1890 | |
| 1891 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx | |
| 1892 // Are free to temporaries if we have to do stack to steck moves. | |
| 1893 // All inbound args are referenced based on rbp, and all outbound args via rsp. | |
| 1894 | |
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1895 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { |
| 0 | 1896 switch (in_sig_bt[i]) { |
| 1897 case T_ARRAY: | |
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1898 if (is_critical_native) { |
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1899 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1900 c_arg++; |
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1901 break; |
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1902 } |
| 0 | 1903 case T_OBJECT: |
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1904 assert(!is_critical_native, "no oop arguments"); |
| 0 | 1905 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
| 1906 ((i == 0) && (!is_static)), | |
| 1907 &receiver_offset); | |
| 1908 break; | |
| 1909 case T_VOID: | |
| 1910 break; | |
| 1911 | |
| 1912 case T_FLOAT: | |
| 1913 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1914 break; | |
| 1915 | |
| 1916 case T_DOUBLE: | |
| 1917 assert( i + 1 < total_in_args && | |
| 1918 in_sig_bt[i + 1] == T_VOID && | |
| 1919 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 1920 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1921 break; | |
| 1922 | |
| 1923 case T_LONG : | |
| 1924 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1925 break; | |
| 1926 | |
| 1927 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 1928 | |
| 1929 default: | |
| 1930 simple_move32(masm, in_regs[i], out_regs[c_arg]); | |
| 1931 } | |
| 1932 } | |
| 1933 | |
| 1934 // Pre-load a static method's oop into rsi. Used both by locking code and | |
| 1935 // the normal JNI call code. | |
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1936 if (method->is_static() && !is_critical_native) { |
| 0 | 1937 |
| 1938 // load opp into a register | |
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1939 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
| 0 | 1940 |
| 1941 // Now handlize the static class mirror it's known not-null. | |
| 304 | 1942 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
| 0 | 1943 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
| 1944 | |
| 1945 // Now get the handle | |
| 304 | 1946 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
| 0 | 1947 // store the klass handle as second argument |
| 304 | 1948 __ movptr(Address(rsp, wordSize), oop_handle_reg); |
| 0 | 1949 } |
| 1950 | |
| 1951 // Change state to native (we save the return address in the thread, since it might not | |
| 1952 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 1953 // points into the right code segment. It does not have to be the correct return pc. | |
| 1954 // We use the same pc/oopMap repeatedly when we call out | |
| 1955 | |
| 1956 intptr_t the_pc = (intptr_t) __ pc(); | |
| 1957 oop_maps->add_gc_map(the_pc - start, map); | |
| 1958 | |
| 1959 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); | |
| 1960 | |
| 1961 | |
| 1962 // We have all of the arguments setup at this point. We must not touch any register | |
| 1963 // argument registers at this point (what if we save/restore them there are no oop? | |
| 1964 | |
| 1965 { | |
| 1966 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
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1967 __ mov_metadata(rax, method()); |
| 0 | 1968 __ call_VM_leaf( |
| 1969 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 1970 thread, rax); | |
| 1971 } | |
| 1972 | |
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1973 // RedefineClasses() tracing support for obsolete method entry |
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1974 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1975 __ mov_metadata(rax, method()); |
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1976 __ call_VM_leaf( |
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1977 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1978 thread, rax); |
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1979 } |
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1980 |
| 0 | 1981 // These are register definitions we need for locking/unlocking |
| 1982 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction | |
| 1983 const Register obj_reg = rcx; // Will contain the oop | |
| 1984 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) | |
| 1985 | |
| 1986 Label slow_path_lock; | |
| 1987 Label lock_done; | |
| 1988 | |
| 1989 // Lock a synchronized method | |
| 1990 if (method->is_synchronized()) { | |
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1991 assert(!is_critical_native, "unhandled"); |
| 0 | 1992 |
| 1993 | |
| 1994 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 1995 | |
| 1996 // Get the handle (the 2nd argument) | |
| 304 | 1997 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 1998 |
| 1999 // Get address of the box | |
| 2000 | |
| 304 | 2001 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2002 |
| 2003 // Load the oop from the handle | |
| 304 | 2004 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2005 |
| 2006 if (UseBiasedLocking) { | |
| 2007 // Note that oop_handle_reg is trashed during this call | |
| 2008 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); | |
| 2009 } | |
| 2010 | |
| 2011 // Load immediate 1 into swap_reg %rax, | |
| 304 | 2012 __ movptr(swap_reg, 1); |
| 0 | 2013 |
| 2014 // Load (object->mark() | 1) into swap_reg %rax, | |
| 304 | 2015 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 2016 |
| 2017 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 2018 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2019 |
| 2020 if (os::is_MP()) { | |
| 2021 __ lock(); | |
| 2022 } | |
| 2023 | |
| 2024 // src -> dest iff dest == rax, else rax, <- dest | |
| 2025 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 2026 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 2027 __ jcc(Assembler::equal, lock_done); |
| 2028 | |
| 2029 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 2030 // 1) (mark & 3) == 0, and | |
| 2031 // 2) rsp <= mark < mark + os::pagesize() | |
| 2032 // These 3 tests can be done by evaluating the following | |
| 2033 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 2034 // assuming both stack pointer and pagesize have their | |
| 2035 // least significant 2 bits clear. | |
| 2036 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg | |
| 2037 | |
| 304 | 2038 __ subptr(swap_reg, rsp); |
| 2039 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 2040 |
| 2041 // Save the test result, for recursive case, the result is zero | |
| 304 | 2042 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2043 __ jcc(Assembler::notEqual, slow_path_lock); |
| 2044 // Slow path will re-enter here | |
| 2045 __ bind(lock_done); | |
| 2046 | |
| 2047 if (UseBiasedLocking) { | |
| 2048 // Re-fetch oop_handle_reg as we trashed it above | |
| 304 | 2049 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 2050 } |
| 2051 } | |
| 2052 | |
| 2053 | |
| 2054 // Finally just about ready to make the JNI call | |
| 2055 | |
| 2056 | |
| 2057 // get JNIEnv* which is first argument to native | |
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2058 if (!is_critical_native) { |
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2059 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2060 __ movptr(Address(rsp, 0), rdx); |
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2061 } |
| 0 | 2062 |
| 2063 // Now set thread in native | |
| 2064 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); | |
| 2065 | |
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2066 __ call(RuntimeAddress(native_func)); |
| 0 | 2067 |
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2068 // Verify or restore cpu control state after JNI call |
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2069 __ restore_cpu_control_state_after_jni(); |
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2070 |
| 0 | 2071 // WARNING - on Windows Java Natives use pascal calling convention and pop the |
| 2072 // arguments off of the stack. We could just re-adjust the stack pointer here | |
| 2073 // and continue to do SP relative addressing but we instead switch to FP | |
| 2074 // relative addressing. | |
| 2075 | |
| 2076 // Unpack native results. | |
| 2077 switch (ret_type) { | |
| 2078 case T_BOOLEAN: __ c2bool(rax); break; | |
| 304 | 2079 case T_CHAR : __ andptr(rax, 0xFFFF); break; |
| 0 | 2080 case T_BYTE : __ sign_extend_byte (rax); break; |
| 2081 case T_SHORT : __ sign_extend_short(rax); break; | |
| 2082 case T_INT : /* nothing to do */ break; | |
| 2083 case T_DOUBLE : | |
| 2084 case T_FLOAT : | |
| 2085 // Result is in st0 we'll save as needed | |
| 2086 break; | |
| 2087 case T_ARRAY: // Really a handle | |
| 2088 case T_OBJECT: // Really a handle | |
| 2089 break; // can't de-handlize until after safepoint check | |
| 2090 case T_VOID: break; | |
| 2091 case T_LONG: break; | |
| 2092 default : ShouldNotReachHere(); | |
| 2093 } | |
| 2094 | |
| 2095 // Switch thread to "native transition" state before reading the synchronization state. | |
| 2096 // This additional state is necessary because reading and testing the synchronization | |
| 2097 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 2098 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 2099 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 2100 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 2101 // didn't see any synchronization is progress, and escapes. | |
| 2102 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); | |
| 2103 | |
| 2104 if(os::is_MP()) { | |
| 2105 if (UseMembar) { | |
| 304 | 2106 // Force this write out before the read below |
| 2107 __ membar(Assembler::Membar_mask_bits( | |
| 2108 Assembler::LoadLoad | Assembler::LoadStore | | |
| 2109 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 0 | 2110 } else { |
| 2111 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 2112 // We use the current thread pointer to calculate a thread specific | |
| 2113 // offset to write to within the page. This minimizes bus traffic | |
| 2114 // due to cache line collision. | |
| 2115 __ serialize_memory(thread, rcx); | |
| 2116 } | |
| 2117 } | |
| 2118 | |
| 2119 if (AlwaysRestoreFPU) { | |
| 2120 // Make sure the control word is correct. | |
| 2121 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 2122 } | |
| 2123 | |
|
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2124 Label after_transition; |
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2125 |
| 0 | 2126 // check for safepoint operation in progress and/or pending suspend requests |
| 2127 { Label Continue; | |
| 2128 | |
| 2129 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 2130 SafepointSynchronize::_not_synchronized); | |
| 2131 | |
| 2132 Label L; | |
| 2133 __ jcc(Assembler::notEqual, L); | |
| 2134 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); | |
| 2135 __ jcc(Assembler::equal, Continue); | |
| 2136 __ bind(L); | |
| 2137 | |
| 2138 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 2139 // and never return here preventing us from clearing _last_native_pc down below. | |
| 2140 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 2141 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 2142 // by hand. | |
| 2143 // | |
| 2144 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2145 __ push(thread); |
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2146 if (!is_critical_native) { |
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2147 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2148 JavaThread::check_special_condition_for_native_trans))); |
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2149 } else { |
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2150 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2151 JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2152 } |
| 0 | 2153 __ increment(rsp, wordSize); |
| 2154 // Restore any method result value | |
| 2155 restore_native_result(masm, ret_type, stack_slots); | |
| 2156 | |
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2157 if (is_critical_native) { |
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2158 // The call above performed the transition to thread_in_Java so |
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2159 // skip the transition logic below. |
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2160 __ jmpb(after_transition); |
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2161 } |
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2162 |
| 0 | 2163 __ bind(Continue); |
| 2164 } | |
| 2165 | |
| 2166 // change thread state | |
| 2167 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2168 __ bind(after_transition); |
| 0 | 2169 |
| 2170 Label reguard; | |
| 2171 Label reguard_done; | |
| 2172 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 2173 __ jcc(Assembler::equal, reguard); | |
| 2174 | |
| 2175 // slow path reguard re-enters here | |
| 2176 __ bind(reguard_done); | |
| 2177 | |
| 2178 // Handle possible exception (will unlock if necessary) | |
| 2179 | |
| 2180 // native result if any is live | |
| 2181 | |
| 2182 // Unlock | |
| 2183 Label slow_path_unlock; | |
| 2184 Label unlock_done; | |
| 2185 if (method->is_synchronized()) { | |
| 2186 | |
| 2187 Label done; | |
| 2188 | |
| 2189 // Get locked oop from the handle we passed to jni | |
| 304 | 2190 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2191 |
| 2192 if (UseBiasedLocking) { | |
| 2193 __ biased_locking_exit(obj_reg, rbx, done); | |
| 2194 } | |
| 2195 | |
| 2196 // Simple recursive lock? | |
| 2197 | |
| 304 | 2198 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); |
| 0 | 2199 __ jcc(Assembler::equal, done); |
| 2200 | |
| 2201 // Must save rax, if if it is live now because cmpxchg must use it | |
| 2202 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2203 save_native_result(masm, ret_type, stack_slots); | |
| 2204 } | |
| 2205 | |
| 2206 // get old displaced header | |
| 304 | 2207 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2208 |
| 2209 // get address of the stack lock | |
| 304 | 2210 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2211 |
| 2212 // Atomic swap old header if oop still contains the stack lock | |
| 2213 if (os::is_MP()) { | |
| 2214 __ lock(); | |
| 2215 } | |
| 2216 | |
| 2217 // src -> dest iff dest == rax, else rax, <- dest | |
| 2218 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 2219 __ cmpxchgptr(rbx, Address(obj_reg, 0)); |
| 0 | 2220 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 2221 | |
| 2222 // slow path re-enters here | |
| 2223 __ bind(unlock_done); | |
| 2224 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2225 restore_native_result(masm, ret_type, stack_slots); | |
| 2226 } | |
| 2227 | |
| 2228 __ bind(done); | |
| 2229 | |
| 2230 } | |
| 2231 | |
| 2232 { | |
| 2233 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
| 2234 // Tell dtrace about this method exit | |
| 2235 save_native_result(masm, ret_type, stack_slots); | |
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2236 __ mov_metadata(rax, method()); |
| 0 | 2237 __ call_VM_leaf( |
| 2238 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 2239 thread, rax); | |
| 2240 restore_native_result(masm, ret_type, stack_slots); | |
| 2241 } | |
| 2242 | |
| 2243 // We can finally stop using that last_Java_frame we setup ages ago | |
| 2244 | |
| 2245 __ reset_last_Java_frame(thread, false, true); | |
| 2246 | |
| 2247 // Unpack oop result | |
| 2248 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 2249 Label L; | |
| 304 | 2250 __ cmpptr(rax, (int32_t)NULL_WORD); |
| 0 | 2251 __ jcc(Assembler::equal, L); |
| 304 | 2252 __ movptr(rax, Address(rax, 0)); |
| 0 | 2253 __ bind(L); |
| 2254 __ verify_oop(rax); | |
| 2255 } | |
| 2256 | |
|
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2257 if (!is_critical_native) { |
|
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|
2258 // reset handle block |
|
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|
2259 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); |
|
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2260 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); |
|
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|
2261 |
|
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|
2262 // Any exception pending? |
|
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|
2263 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
|
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2264 __ jcc(Assembler::notEqual, exception_pending); |
|
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|
2265 } |
| 0 | 2266 |
| 2267 // no exception, we're almost done | |
| 2268 | |
| 2269 // check that only result value is on FPU stack | |
| 2270 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); | |
| 2271 | |
| 2272 // Fixup floating pointer results so that result looks like a return from a compiled method | |
| 2273 if (ret_type == T_FLOAT) { | |
| 2274 if (UseSSE >= 1) { | |
| 2275 // Pop st0 and store as float and reload into xmm register | |
| 2276 __ fstp_s(Address(rbp, -4)); | |
| 2277 __ movflt(xmm0, Address(rbp, -4)); | |
| 2278 } | |
| 2279 } else if (ret_type == T_DOUBLE) { | |
| 2280 if (UseSSE >= 2) { | |
| 2281 // Pop st0 and store as double and reload into xmm register | |
| 2282 __ fstp_d(Address(rbp, -8)); | |
| 2283 __ movdbl(xmm0, Address(rbp, -8)); | |
| 2284 } | |
| 2285 } | |
| 2286 | |
| 2287 // Return | |
| 2288 | |
| 2289 __ leave(); | |
| 2290 __ ret(0); | |
| 2291 | |
| 2292 // Unexpected paths are out of line and go here | |
| 2293 | |
| 2294 // Slow path locking & unlocking | |
| 2295 if (method->is_synchronized()) { | |
| 2296 | |
| 2297 // BEGIN Slow path lock | |
| 2298 | |
| 2299 __ bind(slow_path_lock); | |
| 2300 | |
| 2301 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 2302 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 304 | 2303 __ push(thread); |
| 2304 __ push(lock_reg); | |
| 2305 __ push(obj_reg); | |
| 0 | 2306 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); |
| 304 | 2307 __ addptr(rsp, 3*wordSize); |
| 0 | 2308 |
| 2309 #ifdef ASSERT | |
| 2310 { Label L; | |
| 304 | 2311 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 2312 __ jcc(Assembler::equal, L); |
| 2313 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 2314 __ bind(L); | |
| 2315 } | |
| 2316 #endif | |
| 2317 __ jmp(lock_done); | |
| 2318 | |
| 2319 // END Slow path lock | |
| 2320 | |
| 2321 // BEGIN Slow path unlock | |
| 2322 __ bind(slow_path_unlock); | |
| 2323 | |
| 2324 // Slow path unlock | |
| 2325 | |
| 2326 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2327 save_native_result(masm, ret_type, stack_slots); | |
| 2328 } | |
| 2329 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 2330 | |
| 304 | 2331 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
|
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2332 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); |
| 0 | 2333 |
| 2334 | |
| 2335 // should be a peal | |
| 2336 // +wordSize because of the push above | |
| 304 | 2337 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 2338 __ push(rax); | |
| 2339 | |
| 2340 __ push(obj_reg); | |
| 0 | 2341 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); |
| 304 | 2342 __ addptr(rsp, 2*wordSize); |
| 0 | 2343 #ifdef ASSERT |
| 2344 { | |
| 2345 Label L; | |
| 304 | 2346 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 2347 __ jcc(Assembler::equal, L); |
| 2348 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 2349 __ bind(L); | |
| 2350 } | |
| 2351 #endif /* ASSERT */ | |
| 2352 | |
| 304 | 2353 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
| 0 | 2354 |
| 2355 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2356 restore_native_result(masm, ret_type, stack_slots); | |
| 2357 } | |
| 2358 __ jmp(unlock_done); | |
| 2359 // END Slow path unlock | |
| 2360 | |
| 2361 } | |
| 2362 | |
| 2363 // SLOW PATH Reguard the stack if needed | |
| 2364 | |
| 2365 __ bind(reguard); | |
| 2366 save_native_result(masm, ret_type, stack_slots); | |
| 2367 { | |
| 2368 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); | |
| 2369 } | |
| 2370 restore_native_result(masm, ret_type, stack_slots); | |
| 2371 __ jmp(reguard_done); | |
| 2372 | |
| 2373 | |
| 2374 // BEGIN EXCEPTION PROCESSING | |
| 2375 | |
|
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|
2376 if (!is_critical_native) { |
|
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|
2377 // Forward the exception |
|
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|
2378 __ bind(exception_pending); |
|
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|
2379 |
|
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|
2380 // remove possible return value from FPU register stack |
|
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|
2381 __ empty_FPU_stack(); |
|
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|
2382 |
|
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|
2383 // pop our frame |
|
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|
2384 __ leave(); |
|
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|
2385 // and forward the exception |
|
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|
2386 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
|
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|
2387 } |
| 0 | 2388 |
| 2389 __ flush(); | |
| 2390 | |
| 2391 nmethod *nm = nmethod::new_native_nmethod(method, | |
|
2405
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|
2392 compile_id, |
| 0 | 2393 masm->code(), |
| 2394 vep_offset, | |
| 2395 frame_complete, | |
| 2396 stack_slots / VMRegImpl::slots_per_word, | |
| 2397 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 2398 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 2399 oop_maps); | |
|
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|
2400 |
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|
2401 if (is_critical_native) { |
|
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|
2402 nm->set_lazy_critical_native(true); |
|
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|
2403 } |
|
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|
2404 |
| 0 | 2405 return nm; |
| 2406 | |
| 2407 } | |
| 2408 | |
|
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2409 #ifdef HAVE_DTRACE_H |
|
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2410 // --------------------------------------------------------------------------- |
|
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2411 // Generate a dtrace nmethod for a given signature. The method takes arguments |
|
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2412 // in the Java compiled code convention, marshals them to the native |
|
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2413 // abi and then leaves nops at the position you would expect to call a native |
|
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2414 // function. When the probe is enabled the nops are replaced with a trap |
|
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2415 // instruction that dtrace inserts and the trace will cause a notification |
|
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|
2416 // to dtrace. |
|
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|
2417 // |
|
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|
2418 // The probes are only able to take primitive types and java/lang/String as |
|
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|
2419 // arguments. No other java types are allowed. Strings are converted to utf8 |
|
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|
2420 // strings so that from dtrace point of view java strings are converted to C |
|
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|
2421 // strings. There is an arbitrary fixed limit on the total space that a method |
|
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|
2422 // can use for converting the strings. (256 chars per string in the signature). |
|
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|
2423 // So any java string larger then this is truncated. |
|
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|
2424 |
|
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|
2425 nmethod *SharedRuntime::generate_dtrace_nmethod( |
|
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|
2426 MacroAssembler *masm, methodHandle method) { |
|
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|
2427 |
|
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|
2428 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
|
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|
2429 // be single threaded in this method. |
|
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|
2430 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
|
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|
2431 |
|
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|
2432 // Fill in the signature array, for the calling-convention call. |
|
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|
2433 int total_args_passed = method->size_of_parameters(); |
|
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|
2434 |
|
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|
2435 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
|
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|
2436 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
|
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|
2437 |
|
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|
2438 // The signature we are going to use for the trap that dtrace will see |
|
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|
2439 // java/lang/String is converted. We drop "this" and any other object |
|
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|
2440 // is converted to NULL. (A one-slot java/lang/Long object reference |
|
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|
2441 // is converted to a two-slot long, which is why we double the allocation). |
|
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|
2442 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
|
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|
2443 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
|
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|
2444 |
|
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|
2445 int i=0; |
|
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|
2446 int total_strings = 0; |
|
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|
2447 int first_arg_to_pass = 0; |
|
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|
2448 int total_c_args = 0; |
|
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|
2449 |
|
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|
2450 if( !method->is_static() ) { // Pass in receiver first |
|
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|
2451 in_sig_bt[i++] = T_OBJECT; |
|
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|
2452 first_arg_to_pass = 1; |
|
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|
2453 } |
|
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|
2454 |
|
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|
2455 // We need to convert the java args to where a native (non-jni) function |
|
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|
2456 // would expect them. To figure out where they go we convert the java |
|
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|
2457 // signature to a C signature. |
|
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|
2458 |
|
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|
2459 SignatureStream ss(method->signature()); |
|
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|
2460 for ( ; !ss.at_return_type(); ss.next()) { |
|
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|
2461 BasicType bt = ss.type(); |
|
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|
2462 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
|
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|
2463 out_sig_bt[total_c_args++] = bt; |
|
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|
2464 if( bt == T_OBJECT) { |
|
2177
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6990754: Use native memory and reference counting to implement SymbolTable
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2465 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
|
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2466 if (s == vmSymbols::java_lang_String()) { |
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2467 total_strings++; |
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2468 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2469 } else if (s == vmSymbols::java_lang_Boolean() || |
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2470 s == vmSymbols::java_lang_Character() || |
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2471 s == vmSymbols::java_lang_Byte() || |
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2472 s == vmSymbols::java_lang_Short() || |
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2473 s == vmSymbols::java_lang_Integer() || |
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2474 s == vmSymbols::java_lang_Float()) { |
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2475 out_sig_bt[total_c_args-1] = T_INT; |
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2476 } else if (s == vmSymbols::java_lang_Long() || |
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2477 s == vmSymbols::java_lang_Double()) { |
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2478 out_sig_bt[total_c_args-1] = T_LONG; |
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2479 out_sig_bt[total_c_args++] = T_VOID; |
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2480 } |
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2481 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2482 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2483 out_sig_bt[total_c_args++] = T_VOID; |
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2484 } |
|
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2485 } |
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2486 |
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2487 assert(i==total_args_passed, "validly parsed signature"); |
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2488 |
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2489 // Now get the compiled-Java layout as input arguments |
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2490 int comp_args_on_stack; |
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2491 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2492 in_sig_bt, in_regs, total_args_passed, false); |
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2493 |
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2494 // Now figure out where the args must be stored and how much stack space |
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2495 // they require (neglecting out_preserve_stack_slots). |
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2496 |
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2497 int out_arg_slots; |
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2498 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2499 |
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2500 // Calculate the total number of stack slots we will need. |
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2501 |
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2502 // First count the abi requirement plus all of the outgoing args |
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2503 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2504 |
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2505 // Now space for the string(s) we must convert |
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2506 |
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2507 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2508 for (i = 0; i < total_strings ; i++) { |
|
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2509 string_locs[i] = stack_slots; |
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2510 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2511 } |
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2512 |
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2513 // + 2 for return address (which we own) and saved rbp, |
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2514 |
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2515 stack_slots += 2; |
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2516 |
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2517 // Ok The space we have allocated will look like: |
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2518 // |
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2519 // |
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2520 // FP-> | | |
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2521 // |---------------------| |
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2522 // | string[n] | |
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2523 // |---------------------| <- string_locs[n] |
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2524 // | string[n-1] | |
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2525 // |---------------------| <- string_locs[n-1] |
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2526 // | ... | |
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2527 // | ... | |
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2528 // |---------------------| <- string_locs[1] |
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2529 // | string[0] | |
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2530 // |---------------------| <- string_locs[0] |
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2531 // | outbound memory | |
|
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2532 // | based arguments | |
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2533 // | | |
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2534 // |---------------------| |
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2535 // | | |
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2536 // SP-> | out_preserved_slots | |
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2537 // |
|
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2538 // |
|
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2539 |
|
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|
2540 // Now compute actual number of stack words we need rounding to make |
|
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2541 // stack properly aligned. |
|
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2542 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
|
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2543 |
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2544 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
|
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2545 |
|
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2546 intptr_t start = (intptr_t)__ pc(); |
|
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2547 |
|
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2548 // First thing make an ic check to see if we should even be here |
|
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2549 |
|
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2550 // We are free to use all registers as temps without saving them and |
|
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2551 // restoring them except rbp. rbp, is the only callee save register |
|
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2552 // as far as the interpreter and the compiler(s) are concerned. |
|
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2553 |
|
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2554 const Register ic_reg = rax; |
|
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2555 const Register receiver = rcx; |
|
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2556 Label hit; |
|
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2557 Label exception_pending; |
|
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2558 |
|
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2559 |
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2560 __ verify_oop(receiver); |
|
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2561 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
|
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2562 __ jcc(Assembler::equal, hit); |
|
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2563 |
|
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2564 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
|
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2565 |
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2566 // verified entry must be aligned for code patching. |
|
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2567 // and the first 5 bytes must be in the same cache line |
|
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2568 // if we align at 8 then we will be sure 5 bytes are in the same line |
|
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2569 __ align(8); |
|
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2570 |
|
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2571 __ bind(hit); |
|
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2572 |
|
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|
2573 int vep_offset = ((intptr_t)__ pc()) - start; |
|
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2574 |
|
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2575 |
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2576 // The instruction at the verified entry point must be 5 bytes or longer |
|
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2577 // because it can be patched on the fly by make_non_entrant. The stack bang |
|
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2578 // instruction fits that requirement. |
|
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2579 |
|
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parents:
0
diff
changeset
|
2580 // Generate stack overflow check |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2581 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2582 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2583 if (UseStackBanging) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2584 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2585 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2586 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2587 __ movl(rax, stack_size); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2588 __ bang_stack_size(rax, rbx); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2589 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2590 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2591 // need a 5 byte instruction to allow MT safe patching to non-entrant |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2592 __ fat_nop(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2593 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2594 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2595 assert(((int)__ pc() - start - vep_offset) >= 5, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2596 "valid size for make_non_entrant"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2597 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2598 // Generate a new frame for the wrapper. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2599 __ enter(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2600 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2601 // -2 because return address is already present and so is saved rbp, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2602 if (stack_size - 2*wordSize != 0) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2603 __ subl(rsp, stack_size - 2*wordSize); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2604 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2605 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2606 // Frame is now completed as far a size and linkage. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2607 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2608 int frame_complete = ((intptr_t)__ pc()) - start; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2609 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2610 // First thing we do store all the args as if we are doing the call. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2611 // Since the C calling convention is stack based that ensures that |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2612 // all the Java register args are stored before we need to convert any |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2613 // string we might have. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2614 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2615 int sid = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2616 int c_arg, j_arg; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2617 int string_reg = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2618 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2619 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2620 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2621 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2622 VMRegPair src = in_regs[j_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2623 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2624 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2625 "stack based abi assumed"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2626 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2627 switch (in_sig_bt[j_arg]) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2628 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2629 case T_ARRAY: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2630 case T_OBJECT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2631 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2632 // Any register based arg for a java string after the first |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2633 // will be destroyed by the call to get_utf so we store |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2634 // the original value in the location the utf string address |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2635 // will eventually be stored. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2636 if (src.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2637 if (string_reg++ != 0) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2638 simple_move32(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2639 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2640 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2641 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2642 // need to unbox a one-word value |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2643 Register in_reg = rax; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2644 if ( src.first()->is_reg() ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2645 in_reg = src.first()->as_Register(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2646 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2647 simple_move32(masm, src, in_reg->as_VMReg()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2648 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2649 Label skipUnbox; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2650 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2651 if ( out_sig_bt[c_arg] == T_LONG ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2652 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2653 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2654 __ testl(in_reg, in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2655 __ jcc(Assembler::zero, skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2656 assert(dst.first()->is_stack() && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2657 (!dst.second()->is_valid() || dst.second()->is_stack()), |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2658 "value(s) must go into stack slots"); |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2659 |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2660 BasicType bt = out_sig_bt[c_arg]; |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2661 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2662 if ( bt == T_LONG ) { |
|
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2663 __ movl(rbx, Address(in_reg, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2664 box_offset + VMRegImpl::stack_slot_size)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2665 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2666 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2667 __ movl(in_reg, Address(in_reg, box_offset)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2668 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2669 __ bind(skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2670 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2671 // Convert the arg to NULL |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2672 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2673 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2674 if (out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2675 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2676 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2677 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2678 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2679 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2680 case T_VOID: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2681 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2682 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2683 case T_FLOAT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2684 float_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2685 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2686 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2687 case T_DOUBLE: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2688 assert( j_arg + 1 < total_args_passed && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2689 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2690 double_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2691 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2692 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2693 case T_LONG : |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2694 long_move(masm, src, dst); |
|
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2695 break; |
|
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|
2696 |
|
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2697 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
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2698 |
|
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2699 default: |
|
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|
2700 simple_move32(masm, src, dst); |
|
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2701 } |
|
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|
2702 } |
|
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|
2703 |
|
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2704 // Now we must convert any string we have to utf8 |
|
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2705 // |
|
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2706 |
|
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2707 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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2708 sid < total_strings ; j_arg++, c_arg++ ) { |
|
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2709 |
|
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2710 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
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2711 |
|
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2712 Address utf8_addr = Address( |
|
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2713 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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2714 __ leal(rax, utf8_addr); |
|
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2715 |
|
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2716 // The first string we find might still be in the original java arg |
|
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2717 // register |
|
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2718 VMReg orig_loc = in_regs[j_arg].first(); |
|
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2719 Register string_oop; |
|
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2720 |
|
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2721 // This is where the argument will eventually reside |
|
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2722 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first())); |
|
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2723 |
|
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2724 if (sid == 1 && orig_loc->is_reg()) { |
|
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2725 string_oop = orig_loc->as_Register(); |
|
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2726 assert(string_oop != rax, "smashed arg"); |
|
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2727 } else { |
|
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2728 |
|
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2729 if (orig_loc->is_reg()) { |
|
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2730 // Get the copy of the jls object |
|
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2731 __ movl(rcx, dest); |
|
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2732 } else { |
|
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2733 // arg is still in the original location |
|
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2734 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc))); |
|
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2735 } |
|
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2736 string_oop = rcx; |
|
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2737 |
|
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|
2738 } |
|
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2739 Label nullString; |
|
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2740 __ movl(dest, NULL_WORD); |
|
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2741 __ testl(string_oop, string_oop); |
|
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2742 __ jcc(Assembler::zero, nullString); |
|
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2743 |
|
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2744 // Now we can store the address of the utf string as the argument |
|
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2745 __ movl(dest, rax); |
|
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2746 |
|
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2747 // And do the conversion |
|
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2748 __ call_VM_leaf(CAST_FROM_FN_PTR( |
|
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2749 address, SharedRuntime::get_utf), string_oop, rax); |
|
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2750 __ bind(nullString); |
|
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|
2751 } |
|
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|
2752 |
|
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2753 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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2754 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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2755 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
|
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2756 } |
|
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|
2757 } |
|
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|
2758 |
|
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|
2759 |
|
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2760 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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2761 // patch in the trap |
|
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|
2762 |
|
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|
2763 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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2764 |
|
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|
2765 __ nop(); |
|
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2766 |
|
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|
2767 |
|
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|
2768 // Return |
|
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|
2769 |
|
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|
2770 __ leave(); |
|
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2771 __ ret(0); |
|
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|
2772 |
|
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|
2773 __ flush(); |
|
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2774 |
|
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|
2775 nmethod *nm = nmethod::new_dtrace_nmethod( |
|
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2776 method, masm->code(), vep_offset, patch_offset, frame_complete, |
|
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2777 stack_slots / VMRegImpl::slots_per_word); |
|
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2778 return nm; |
|
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|
2779 |
|
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|
2780 } |
|
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|
2781 |
|
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|
2782 #endif // HAVE_DTRACE_H |
|
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2783 |
| 0 | 2784 // this function returns the adjust size (in number of words) to a c2i adapter |
| 2785 // activation for use during deoptimization | |
| 2786 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 2787 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 2788 } |
| 2789 | |
| 2790 | |
| 2791 uint SharedRuntime::out_preserve_stack_slots() { | |
| 2792 return 0; | |
| 2793 } | |
| 2794 | |
| 2795 //------------------------------generate_deopt_blob---------------------------- | |
| 2796 void SharedRuntime::generate_deopt_blob() { | |
| 2797 // allocate space for the code | |
| 2798 ResourceMark rm; | |
| 2799 // setup code generation tools | |
| 2800 CodeBuffer buffer("deopt_blob", 1024, 1024); | |
| 2801 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2802 int frame_size_in_words; | |
| 2803 OopMap* map = NULL; | |
| 2804 // Account for the extra args we place on the stack | |
| 2805 // by the time we call fetch_unroll_info | |
| 2806 const int additional_words = 2; // deopt kind, thread | |
| 2807 | |
| 2808 OopMapSet *oop_maps = new OopMapSet(); | |
| 2809 | |
| 2810 // ------------- | |
| 2811 // This code enters when returning to a de-optimized nmethod. A return | |
| 2812 // address has been pushed on the the stack, and return values are in | |
| 2813 // registers. | |
| 2814 // If we are doing a normal deopt then we were called from the patched | |
| 2815 // nmethod from the point we returned to the nmethod. So the return | |
| 2816 // address on the stack is wrong by NativeCall::instruction_size | |
| 2817 // We will adjust the value to it looks like we have the original return | |
| 2818 // address on the stack (like when we eagerly deoptimized). | |
| 2819 // In the case of an exception pending with deoptimized then we enter | |
| 2820 // with a return address on the stack that points after the call we patched | |
| 2821 // into the exception handler. We have the following register state: | |
| 2822 // rax,: exception | |
| 2823 // rbx,: exception handler | |
| 2824 // rdx: throwing pc | |
| 2825 // So in this case we simply jam rdx into the useless return address and | |
| 2826 // the stack looks just like we want. | |
| 2827 // | |
| 2828 // At this point we need to de-opt. We save the argument return | |
| 2829 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 2830 // routine captures the return values and returns a structure which | |
| 2831 // describes the current frame size and the sizes of all replacement frames. | |
| 2832 // The current frame is compiled code and may contain many inlined | |
| 2833 // functions, each with their own JVM state. We pop the current frame, then | |
| 2834 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 2835 // populate these frames. Finally unpack_frames() returns us the new target | |
| 2836 // address. Notice that callee-save registers are BLOWN here; they have | |
| 2837 // already been captured in the vframeArray at the time the return PC was | |
| 2838 // patched. | |
| 2839 address start = __ pc(); | |
| 2840 Label cont; | |
| 2841 | |
| 2842 // Prolog for non exception case! | |
| 2843 | |
| 2844 // Save everything in sight. | |
| 2845 | |
|
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2846 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2847 // Normal deoptimization |
| 304 | 2848 __ push(Deoptimization::Unpack_deopt); |
| 0 | 2849 __ jmp(cont); |
| 2850 | |
| 2851 int reexecute_offset = __ pc() - start; | |
| 2852 | |
| 2853 // Reexecute case | |
| 2854 // return address is the pc describes what bci to do re-execute at | |
| 2855 | |
| 2856 // No need to update map as each call to save_live_registers will produce identical oopmap | |
|
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|
2857 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2858 |
| 304 | 2859 __ push(Deoptimization::Unpack_reexecute); |
| 0 | 2860 __ jmp(cont); |
| 2861 | |
| 2862 int exception_offset = __ pc() - start; | |
| 2863 | |
| 2864 // Prolog for exception case | |
| 2865 | |
| 2866 // all registers are dead at this entry point, except for rax, and | |
| 2867 // rdx which contain the exception oop and exception pc | |
| 2868 // respectively. Set them in TLS and fall thru to the | |
| 2869 // unpack_with_exception_in_tls entry point. | |
| 2870 | |
| 2871 __ get_thread(rdi); | |
| 304 | 2872 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); |
| 2873 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); | |
| 0 | 2874 |
| 2875 int exception_in_tls_offset = __ pc() - start; | |
| 2876 | |
| 2877 // new implementation because exception oop is now passed in JavaThread | |
| 2878 | |
| 2879 // Prolog for exception case | |
| 2880 // All registers must be preserved because they might be used by LinearScan | |
| 2881 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 2882 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 2883 // args are on the stack, no return address) | |
| 2884 | |
| 2885 // make room on stack for the return address | |
| 2886 // It will be patched later with the throwing pc. The correct value is not | |
| 2887 // available now because loading it from memory would destroy registers. | |
| 304 | 2888 __ push(0); |
| 0 | 2889 |
| 2890 // Save everything in sight. | |
| 2891 | |
| 2892 // No need to update map as each call to save_live_registers will produce identical oopmap | |
|
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2893 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2894 |
| 2895 // Now it is safe to overwrite any register | |
| 2896 | |
| 2897 // store the correct deoptimization type | |
| 304 | 2898 __ push(Deoptimization::Unpack_exception); |
| 0 | 2899 |
| 2900 // load throwing pc from JavaThread and patch it as the return address | |
| 2901 // of the current frame. Then clear the field in JavaThread | |
| 2902 __ get_thread(rdi); | |
| 304 | 2903 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); |
| 2904 __ movptr(Address(rbp, wordSize), rdx); | |
|
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2905 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2906 |
| 2907 #ifdef ASSERT | |
| 2908 // verify that there is really an exception oop in JavaThread | |
| 304 | 2909 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); |
| 0 | 2910 __ verify_oop(rax); |
| 2911 | |
| 2912 // verify that there is no pending exception | |
| 2913 Label no_pending_exception; | |
| 304 | 2914 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); |
| 2915 __ testptr(rax, rax); | |
| 0 | 2916 __ jcc(Assembler::zero, no_pending_exception); |
| 2917 __ stop("must not have pending exception here"); | |
| 2918 __ bind(no_pending_exception); | |
| 2919 #endif | |
| 2920 | |
| 2921 __ bind(cont); | |
| 2922 | |
| 2923 // Compiled code leaves the floating point stack dirty, empty it. | |
| 2924 __ empty_FPU_stack(); | |
| 2925 | |
| 2926 | |
| 2927 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 2928 // crud. We cannot block on this call, no GC can happen. | |
| 2929 __ get_thread(rcx); | |
| 304 | 2930 __ push(rcx); |
| 0 | 2931 // fetch_unroll_info needs to call last_java_frame() |
| 2932 __ set_last_Java_frame(rcx, noreg, noreg, NULL); | |
| 2933 | |
| 2934 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); | |
| 2935 | |
| 2936 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 2937 // find any register it might need. | |
| 2938 | |
| 2939 oop_maps->add_gc_map( __ pc()-start, map); | |
| 2940 | |
| 2941 // Discard arg to fetch_unroll_info | |
| 304 | 2942 __ pop(rcx); |
| 0 | 2943 |
| 2944 __ get_thread(rcx); | |
| 2945 __ reset_last_Java_frame(rcx, false, false); | |
| 2946 | |
| 2947 // Load UnrollBlock into EDI | |
| 304 | 2948 __ mov(rdi, rax); |
| 0 | 2949 |
| 2950 // Move the unpack kind to a safe place in the UnrollBlock because | |
| 2951 // we are very short of registers | |
| 2952 | |
| 2953 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); | |
| 2954 // retrieve the deopt kind from where we left it. | |
| 304 | 2955 __ pop(rax); |
| 0 | 2956 __ movl(unpack_kind, rax); // save the unpack_kind value |
| 2957 | |
| 2958 Label noException; | |
| 2959 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? | |
| 2960 __ jcc(Assembler::notEqual, noException); | |
| 304 | 2961 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); |
| 2962 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); | |
|
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2963 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); |
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2964 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2965 |
| 2966 __ verify_oop(rax); | |
| 2967 | |
| 2968 // Overwrite the result registers with the exception results. | |
| 304 | 2969 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 2970 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 2971 |
| 2972 __ bind(noException); | |
| 2973 | |
| 2974 // Stack is back to only having register save data on the stack. | |
| 2975 // Now restore the result registers. Everything else is either dead or captured | |
| 2976 // in the vframeArray. | |
| 2977 | |
| 2978 RegisterSaver::restore_result_registers(masm); | |
| 2979 | |
|
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2980 // Non standard control word may be leaked out through a safepoint blob, and we can |
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2981 // deopt at a poll point with the non standard control word. However, we should make |
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2982 // sure the control word is correct after restore_result_registers. |
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2983 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); |
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2984 |
| 0 | 2985 // All of the register save area has been popped of the stack. Only the |
| 2986 // return address remains. | |
| 2987 | |
| 2988 // Pop all the frames we must move/replace. | |
| 2989 // | |
| 2990 // Frame picture (youngest to oldest) | |
| 2991 // 1: self-frame (no frame link) | |
| 2992 // 2: deopting frame (no frame link) | |
| 2993 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 2994 // | |
| 2995 // Note: by leaving the return address of self-frame on the stack | |
| 2996 // and using the size of frame 2 to adjust the stack | |
| 2997 // when we are done the return to frame 3 will still be on the stack. | |
| 2998 | |
| 2999 // Pop deoptimized frame | |
| 304 | 3000 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 0 | 3001 |
| 3002 // sp should be pointing at the return address to the caller (3) | |
| 3003 | |
|
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3004 // Pick up the initial fp we should save |
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3005 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3006 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3007 |
| 0 | 3008 // Stack bang to make sure there's enough room for these interpreter frames. |
| 3009 if (UseStackBanging) { | |
| 3010 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3011 __ bang_stack_size(rbx, rcx); | |
| 3012 } | |
| 3013 | |
| 3014 // Load array of frame pcs into ECX | |
| 304 | 3015 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 3016 | |
| 3017 __ pop(rsi); // trash the old pc | |
| 0 | 3018 |
| 3019 // Load array of frame sizes into ESI | |
| 304 | 3020 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3021 |
| 3022 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 3023 | |
| 3024 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3025 __ movl(counter, rbx); | |
| 3026 | |
| 3027 // Now adjust the caller's stack to make up for the extra locals | |
| 3028 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3029 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3030 // value and not the "real" sp value. | |
| 3031 | |
| 3032 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 3033 __ movptr(sp_temp, rsp); |
| 3034 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 3035 __ subptr(rsp, rbx); | |
| 0 | 3036 |
| 3037 // Push interpreter frames in a loop | |
| 3038 Label loop; | |
| 3039 __ bind(loop); | |
| 304 | 3040 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 3041 #ifdef CC_INTERP |
| 304 | 3042 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 3043 #ifdef ASSERT |
| 304 | 3044 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 3045 __ push(0xDEADDEAD); | |
| 0 | 3046 #else /* ASSERT */ |
| 304 | 3047 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 3048 #endif /* ASSERT */ |
| 3049 #else /* CC_INTERP */ | |
| 304 | 3050 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 3051 #endif /* CC_INTERP */ |
| 304 | 3052 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 3053 __ enter(); // save old & set new rbp, |
| 304 | 3054 __ subptr(rsp, rbx); // Prolog! |
| 3055 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 3056 #ifdef CC_INTERP |
| 304 | 3057 __ movptr(Address(rbp, |
| 0 | 3058 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 3059 rbx); // Make it walkable | |
| 3060 #else /* CC_INTERP */ | |
| 3061 // This value is corrected by layout_activation_impl | |
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3062 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); |
| 304 | 3063 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 3064 #endif /* CC_INTERP */ |
| 304 | 3065 __ movptr(sp_temp, rsp); // pass to next frame |
| 3066 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3067 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3068 __ decrementl(counter); // decrement counter | |
| 0 | 3069 __ jcc(Assembler::notZero, loop); |
| 304 | 3070 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 3071 |
| 3072 // Re-push self-frame | |
| 3073 __ enter(); // save old & set new rbp, | |
| 3074 | |
| 3075 // Return address and rbp, are in place | |
| 3076 // We'll push additional args later. Just allocate a full sized | |
| 3077 // register save area | |
| 304 | 3078 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); |
| 0 | 3079 |
| 3080 // Restore frame locals after moving the frame | |
| 304 | 3081 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 3082 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 3083 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local |
| 3084 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 3085 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 3086 | |
| 3087 // Set up the args to unpack_frame | |
| 3088 | |
| 3089 __ pushl(unpack_kind); // get the unpack_kind value | |
| 3090 __ get_thread(rcx); | |
| 304 | 3091 __ push(rcx); |
| 0 | 3092 |
| 3093 // set last_Java_sp, last_Java_fp | |
| 3094 __ set_last_Java_frame(rcx, noreg, rbp, NULL); | |
| 3095 | |
| 3096 // Call C code. Need thread but NOT official VM entry | |
| 3097 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3098 // restore return values to their stack-slots with the new SP. | |
| 3099 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3100 // Set an oopmap for the call site | |
| 3101 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); | |
| 3102 | |
| 3103 // rax, contains the return result type | |
| 304 | 3104 __ push(rax); |
| 0 | 3105 |
| 3106 __ get_thread(rcx); | |
| 3107 __ reset_last_Java_frame(rcx, false, false); | |
| 3108 | |
| 3109 // Collect return values | |
| 304 | 3110 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); |
| 3111 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); | |
| 0 | 3112 |
| 3113 // Clear floating point stack before returning to interpreter | |
| 3114 __ empty_FPU_stack(); | |
| 3115 | |
| 3116 // Check if we should push the float or double return value. | |
| 3117 Label results_done, yes_double_value; | |
| 3118 __ cmpl(Address(rsp, 0), T_DOUBLE); | |
| 3119 __ jcc (Assembler::zero, yes_double_value); | |
| 3120 __ cmpl(Address(rsp, 0), T_FLOAT); | |
| 3121 __ jcc (Assembler::notZero, results_done); | |
| 3122 | |
| 3123 // return float value as expected by interpreter | |
| 3124 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 3125 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 3126 __ jmp(results_done); | |
| 3127 | |
| 3128 // return double value as expected by interpreter | |
| 3129 __ bind(yes_double_value); | |
| 3130 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 3131 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 3132 | |
| 3133 __ bind(results_done); | |
| 3134 | |
| 3135 // Pop self-frame. | |
| 3136 __ leave(); // Epilog! | |
| 3137 | |
| 3138 // Jump to interpreter | |
| 3139 __ ret(0); | |
| 3140 | |
| 3141 // ------------- | |
| 3142 // make sure all code is generated | |
| 3143 masm->flush(); | |
| 3144 | |
| 3145 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); | |
| 3146 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
| 3147 } | |
| 3148 | |
| 3149 | |
| 3150 #ifdef COMPILER2 | |
| 3151 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 3152 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 3153 // allocate space for the code | |
| 3154 ResourceMark rm; | |
| 3155 // setup code generation tools | |
| 3156 CodeBuffer buffer("uncommon_trap_blob", 512, 512); | |
| 3157 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3158 | |
| 3159 enum frame_layout { | |
| 3160 arg0_off, // thread sp + 0 // Arg location for | |
| 3161 arg1_off, // unloaded_class_index sp + 1 // calling C | |
| 3162 // The frame sender code expects that rbp will be in the "natural" place and | |
| 3163 // will override any oopMap setting for it. We must therefore force the layout | |
| 3164 // so that it agrees with the frame sender code. | |
| 3165 rbp_off, // callee saved register sp + 2 | |
| 3166 return_off, // slot for return address sp + 3 | |
| 3167 framesize | |
| 3168 }; | |
| 3169 | |
| 3170 address start = __ pc(); | |
| 3171 // Push self-frame. | |
| 304 | 3172 __ subptr(rsp, return_off*wordSize); // Epilog! |
| 0 | 3173 |
| 3174 // rbp, is an implicitly saved callee saved register (i.e. the calling | |
| 3175 // convention will save restore it in prolog/epilog) Other than that | |
| 3176 // there are no callee save registers no that adapter frames are gone. | |
| 304 | 3177 __ movptr(Address(rsp, rbp_off*wordSize), rbp); |
| 0 | 3178 |
| 3179 // Clear the floating point exception stack | |
| 3180 __ empty_FPU_stack(); | |
| 3181 | |
| 3182 // set last_Java_sp | |
| 3183 __ get_thread(rdx); | |
| 3184 __ set_last_Java_frame(rdx, noreg, noreg, NULL); | |
| 3185 | |
| 3186 // Call C code. Need thread but NOT official VM entry | |
| 3187 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3188 // capture callee-saved registers as well as return values. | |
| 304 | 3189 __ movptr(Address(rsp, arg0_off*wordSize), rdx); |
| 0 | 3190 // argument already in ECX |
| 3191 __ movl(Address(rsp, arg1_off*wordSize),rcx); | |
| 3192 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); | |
| 3193 | |
| 3194 // Set an oopmap for the call site | |
| 3195 OopMapSet *oop_maps = new OopMapSet(); | |
| 3196 OopMap* map = new OopMap( framesize, 0 ); | |
| 3197 // No oopMap for rbp, it is known implicitly | |
| 3198 | |
| 3199 oop_maps->add_gc_map( __ pc()-start, map); | |
| 3200 | |
| 3201 __ get_thread(rcx); | |
| 3202 | |
| 3203 __ reset_last_Java_frame(rcx, false, false); | |
| 3204 | |
| 3205 // Load UnrollBlock into EDI | |
| 304 | 3206 __ movptr(rdi, rax); |
| 0 | 3207 |
| 3208 // Pop all the frames we must move/replace. | |
| 3209 // | |
| 3210 // Frame picture (youngest to oldest) | |
| 3211 // 1: self-frame (no frame link) | |
| 3212 // 2: deopting frame (no frame link) | |
| 3213 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3214 | |
| 3215 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. | |
| 304 | 3216 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! |
| 0 | 3217 |
| 3218 // Pop deoptimized frame | |
| 304 | 3219 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 3220 __ addptr(rsp, rcx); | |
| 0 | 3221 |
| 3222 // sp should be pointing at the return address to the caller (3) | |
| 3223 | |
|
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3224 // Pick up the initial fp we should save |
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3225 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3226 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3227 |
| 0 | 3228 // Stack bang to make sure there's enough room for these interpreter frames. |
| 3229 if (UseStackBanging) { | |
| 3230 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3231 __ bang_stack_size(rbx, rcx); | |
| 3232 } | |
| 3233 | |
| 3234 | |
| 3235 // Load array of frame pcs into ECX | |
| 3236 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
| 3237 | |
| 304 | 3238 __ pop(rsi); // trash the pc |
| 0 | 3239 |
| 3240 // Load array of frame sizes into ESI | |
| 304 | 3241 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3242 |
| 3243 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 3244 | |
| 3245 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3246 __ movl(counter, rbx); | |
| 3247 | |
| 3248 // Now adjust the caller's stack to make up for the extra locals | |
| 3249 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3250 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3251 // value and not the "real" sp value. | |
| 3252 | |
| 3253 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 3254 __ movptr(sp_temp, rsp); |
| 3255 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 3256 __ subptr(rsp, rbx); | |
| 0 | 3257 |
| 3258 // Push interpreter frames in a loop | |
| 3259 Label loop; | |
| 3260 __ bind(loop); | |
| 304 | 3261 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 3262 #ifdef CC_INTERP |
| 304 | 3263 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 3264 #ifdef ASSERT |
| 304 | 3265 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 3266 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...) | |
| 0 | 3267 #else /* ASSERT */ |
| 304 | 3268 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 3269 #endif /* ASSERT */ |
| 3270 #else /* CC_INTERP */ | |
| 304 | 3271 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 3272 #endif /* CC_INTERP */ |
| 304 | 3273 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 3274 __ enter(); // save old & set new rbp, |
| 304 | 3275 __ subptr(rsp, rbx); // Prolog! |
| 3276 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 3277 #ifdef CC_INTERP |
| 304 | 3278 __ movptr(Address(rbp, |
| 0 | 3279 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 3280 rbx); // Make it walkable | |
| 3281 #else /* CC_INTERP */ | |
| 3282 // This value is corrected by layout_activation_impl | |
|
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3283 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); |
| 304 | 3284 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 3285 #endif /* CC_INTERP */ |
| 304 | 3286 __ movptr(sp_temp, rsp); // pass to next frame |
| 3287 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3288 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3289 __ decrementl(counter); // decrement counter | |
| 0 | 3290 __ jcc(Assembler::notZero, loop); |
| 304 | 3291 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 3292 |
| 3293 // Re-push self-frame | |
| 3294 __ enter(); // save old & set new rbp, | |
| 304 | 3295 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! |
| 0 | 3296 |
| 3297 | |
| 3298 // set last_Java_sp, last_Java_fp | |
| 3299 __ get_thread(rdi); | |
| 3300 __ set_last_Java_frame(rdi, noreg, rbp, NULL); | |
| 3301 | |
| 3302 // Call C code. Need thread but NOT official VM entry | |
| 3303 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3304 // restore return values to their stack-slots with the new SP. | |
| 304 | 3305 __ movptr(Address(rsp,arg0_off*wordSize),rdi); |
| 0 | 3306 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); |
| 3307 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3308 // Set an oopmap for the call site | |
| 3309 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); | |
| 3310 | |
| 3311 __ get_thread(rdi); | |
| 3312 __ reset_last_Java_frame(rdi, true, false); | |
| 3313 | |
| 3314 // Pop self-frame. | |
| 3315 __ leave(); // Epilog! | |
| 3316 | |
| 3317 // Jump to interpreter | |
| 3318 __ ret(0); | |
| 3319 | |
| 3320 // ------------- | |
| 3321 // make sure all code is generated | |
| 3322 masm->flush(); | |
| 3323 | |
| 3324 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); | |
| 3325 } | |
| 3326 #endif // COMPILER2 | |
| 3327 | |
| 3328 //------------------------------generate_handler_blob------ | |
| 3329 // | |
| 3330 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3331 // setup oopmap, and calls safepoint code to stop the compiled code for | |
| 3332 // a safepoint. | |
| 3333 // | |
|
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3334 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
| 0 | 3335 |
| 3336 // Account for thread arg in our frame | |
| 3337 const int additional_words = 1; | |
| 3338 int frame_size_in_words; | |
| 3339 | |
| 3340 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); | |
| 3341 | |
| 3342 ResourceMark rm; | |
| 3343 OopMapSet *oop_maps = new OopMapSet(); | |
| 3344 OopMap* map; | |
| 3345 | |
| 3346 // allocate space for the code | |
| 3347 // setup code generation tools | |
| 3348 CodeBuffer buffer("handler_blob", 1024, 512); | |
| 3349 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3350 | |
| 3351 const Register java_thread = rdi; // callee-saved for VC++ | |
| 3352 address start = __ pc(); | |
| 3353 address call_pc = NULL; | |
|
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3354 bool cause_return = (poll_type == POLL_AT_RETURN); |
|
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3355 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
| 0 | 3356 // If cause_return is true we are at a poll_return and there is |
| 3357 // the return address on the stack to the caller on the nmethod | |
| 3358 // that is safepoint. We can leave this return on the stack and | |
| 3359 // effectively complete the return and safepoint in the caller. | |
| 3360 // Otherwise we push space for a return address that the safepoint | |
| 3361 // handler will install later to make the stack walking sensible. | |
|
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|
3362 if (!cause_return) |
|
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|
3363 __ push(rbx); // Make room for return address (or push it again) |
|
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3364 |
|
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|
3365 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors); |
| 0 | 3366 |
| 3367 // The following is basically a call_VM. However, we need the precise | |
| 3368 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3369 // work ourselves. | |
| 3370 | |
| 3371 // Push thread argument and setup last_Java_sp | |
| 3372 __ get_thread(java_thread); | |
| 304 | 3373 __ push(java_thread); |
| 0 | 3374 __ set_last_Java_frame(java_thread, noreg, noreg, NULL); |
| 3375 | |
| 3376 // if this was not a poll_return then we need to correct the return address now. | |
|
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|
3377 if (!cause_return) { |
| 304 | 3378 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset())); |
| 3379 __ movptr(Address(rbp, wordSize), rax); | |
| 0 | 3380 } |
| 3381 | |
| 3382 // do the call | |
| 3383 __ call(RuntimeAddress(call_ptr)); | |
| 3384 | |
| 3385 // Set an oopmap for the call site. This oopmap will map all | |
| 3386 // oop-registers and debug-info registers as callee-saved. This | |
| 3387 // will allow deoptimization at this safepoint to find all possible | |
| 3388 // debug-info recordings, as well as let GC find all oops. | |
| 3389 | |
| 3390 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3391 | |
| 3392 // Discard arg | |
| 304 | 3393 __ pop(rcx); |
| 0 | 3394 |
| 3395 Label noException; | |
| 3396 | |
| 3397 // Clear last_Java_sp again | |
| 3398 __ get_thread(java_thread); | |
| 3399 __ reset_last_Java_frame(java_thread, false, false); | |
| 3400 | |
| 304 | 3401 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3402 __ jcc(Assembler::equal, noException); |
| 3403 | |
| 3404 // Exception pending | |
|
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3405 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3406 |
| 3407 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3408 | |
| 3409 __ bind(noException); | |
| 3410 | |
| 3411 // Normal exit, register restoring and exit | |
|
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3412 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3413 |
| 3414 __ ret(0); | |
| 3415 | |
| 3416 // make sure all code is generated | |
| 3417 masm->flush(); | |
| 3418 | |
| 3419 // Fill-out other meta info | |
| 3420 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 3421 } | |
| 3422 | |
| 3423 // | |
| 3424 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 3425 // | |
| 3426 // Generate a stub that calls into vm to find out the proper destination | |
| 3427 // of a java call. All the argument registers are live at this point | |
| 3428 // but since this is generic code we don't know what they are and the caller | |
| 3429 // must do any gc of the args. | |
| 3430 // | |
|
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|
3431 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 3432 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 3433 | |
| 3434 // allocate space for the code | |
| 3435 ResourceMark rm; | |
| 3436 | |
| 3437 CodeBuffer buffer(name, 1000, 512); | |
| 3438 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3439 | |
| 3440 int frame_size_words; | |
| 3441 enum frame_layout { | |
| 3442 thread_off, | |
| 3443 extra_words }; | |
| 3444 | |
| 3445 OopMapSet *oop_maps = new OopMapSet(); | |
| 3446 OopMap* map = NULL; | |
| 3447 | |
| 3448 int start = __ offset(); | |
| 3449 | |
| 3450 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); | |
| 3451 | |
| 3452 int frame_complete = __ offset(); | |
| 3453 | |
| 3454 const Register thread = rdi; | |
| 3455 __ get_thread(rdi); | |
| 3456 | |
| 304 | 3457 __ push(thread); |
| 0 | 3458 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
| 3459 | |
| 3460 __ call(RuntimeAddress(destination)); | |
| 3461 | |
| 3462 | |
| 3463 // Set an oopmap for the call site. | |
| 3464 // We need this not only for callee-saved registers, but also for volatile | |
| 3465 // registers that the compiler might be keeping live across a safepoint. | |
| 3466 | |
| 3467 oop_maps->add_gc_map( __ offset() - start, map); | |
| 3468 | |
| 3469 // rax, contains the address we are going to jump to assuming no exception got installed | |
| 3470 | |
| 304 | 3471 __ addptr(rsp, wordSize); |
| 0 | 3472 |
| 3473 // clear last_Java_sp | |
| 3474 __ reset_last_Java_frame(thread, true, false); | |
| 3475 // check for pending exceptions | |
| 3476 Label pending; | |
| 304 | 3477 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3478 __ jcc(Assembler::notEqual, pending); |
| 3479 | |
|
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3480 // get the returned Method* |
|
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3481 __ get_vm_result_2(rbx, thread); |
| 304 | 3482 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); |
| 3483 | |
| 3484 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); | |
| 0 | 3485 |
| 3486 RegisterSaver::restore_live_registers(masm); | |
| 3487 | |
| 3488 // We are back the the original state on entry and ready to go. | |
| 3489 | |
| 3490 __ jmp(rax); | |
| 3491 | |
| 3492 // Pending exception after the safepoint | |
| 3493 | |
| 3494 __ bind(pending); | |
| 3495 | |
| 3496 RegisterSaver::restore_live_registers(masm); | |
| 3497 | |
| 3498 // exception pending => remove activation and forward to exception handler | |
| 3499 | |
| 3500 __ get_thread(thread); | |
|
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3501 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
| 304 | 3502 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
| 0 | 3503 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 3504 | |
| 3505 // ------------- | |
| 3506 // make sure all code is generated | |
| 3507 masm->flush(); | |
| 3508 | |
| 3509 // return the blob | |
| 3510 // frame_size_words or bytes?? | |
| 3511 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
| 3512 } |