Mercurial > hg > truffle
annotate src/share/vm/opto/matcher.cpp @ 4710:41406797186b
7113012: G1: rename not-fully-young GCs as "mixed"
Summary: Renamed partially-young GCs as mixed and fully-young GCs as young. Change all external output that includes those terms (GC log and GC ergo log) as well as any comments, fields, methods, etc. The changeset also includes very minor code tidying up (added some curly brackets).
Reviewed-by: johnc, brutisso
| author | tonyp |
|---|---|
| date | Fri, 16 Dec 2011 02:14:27 -0500 |
| parents | 670a74b863fc |
| children | 65149e74c706 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "memory/allocation.inline.hpp" | |
| 27 #include "opto/addnode.hpp" | |
| 28 #include "opto/callnode.hpp" | |
| 29 #include "opto/connode.hpp" | |
| 30 #include "opto/idealGraphPrinter.hpp" | |
| 31 #include "opto/matcher.hpp" | |
| 32 #include "opto/memnode.hpp" | |
| 33 #include "opto/opcodes.hpp" | |
| 34 #include "opto/regmask.hpp" | |
| 35 #include "opto/rootnode.hpp" | |
| 36 #include "opto/runtime.hpp" | |
| 37 #include "opto/type.hpp" | |
| 38 #include "runtime/atomic.hpp" | |
| 39 #include "runtime/os.hpp" | |
| 40 #ifdef TARGET_ARCH_MODEL_x86_32 | |
| 41 # include "adfiles/ad_x86_32.hpp" | |
| 42 #endif | |
| 43 #ifdef TARGET_ARCH_MODEL_x86_64 | |
| 44 # include "adfiles/ad_x86_64.hpp" | |
| 45 #endif | |
| 46 #ifdef TARGET_ARCH_MODEL_sparc | |
| 47 # include "adfiles/ad_sparc.hpp" | |
| 48 #endif | |
| 49 #ifdef TARGET_ARCH_MODEL_zero | |
| 50 # include "adfiles/ad_zero.hpp" | |
| 51 #endif | |
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52 #ifdef TARGET_ARCH_MODEL_arm |
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53 # include "adfiles/ad_arm.hpp" |
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54 #endif |
| 3796 | 55 #ifdef TARGET_ARCH_MODEL_ppc |
| 56 # include "adfiles/ad_ppc.hpp" | |
| 57 #endif | |
| 0 | 58 |
| 59 OptoReg::Name OptoReg::c_frame_pointer; | |
| 60 | |
| 61 | |
| 62 | |
| 63 const int Matcher::base2reg[Type::lastype] = { | |
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64 Node::NotAMachineReg,0,0, Op_RegI, Op_RegL, 0, Op_RegN, |
| 0 | 65 Node::NotAMachineReg, Node::NotAMachineReg, /* tuple, array */ |
| 66 Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, /* the pointers */ | |
| 67 0, 0/*abio*/, | |
| 68 Op_RegP /* Return address */, 0, /* the memories */ | |
| 69 Op_RegF, Op_RegF, Op_RegF, Op_RegD, Op_RegD, Op_RegD, | |
| 70 0 /*bottom*/ | |
| 71 }; | |
| 72 | |
| 73 const RegMask *Matcher::idealreg2regmask[_last_machine_leaf]; | |
| 74 RegMask Matcher::mreg2regmask[_last_Mach_Reg]; | |
| 75 RegMask Matcher::STACK_ONLY_mask; | |
| 76 RegMask Matcher::c_frame_ptr_mask; | |
| 77 const uint Matcher::_begin_rematerialize = _BEGIN_REMATERIALIZE; | |
| 78 const uint Matcher::_end_rematerialize = _END_REMATERIALIZE; | |
| 79 | |
| 80 //---------------------------Matcher------------------------------------------- | |
| 81 Matcher::Matcher( Node_List &proj_list ) : | |
| 82 PhaseTransform( Phase::Ins_Select ), | |
| 83 #ifdef ASSERT | |
| 84 _old2new_map(C->comp_arena()), | |
| 222 | 85 _new2old_map(C->comp_arena()), |
| 0 | 86 #endif |
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87 _shared_nodes(C->comp_arena()), |
| 0 | 88 _reduceOp(reduceOp), _leftOp(leftOp), _rightOp(rightOp), |
| 89 _swallowed(swallowed), | |
| 90 _begin_inst_chain_rule(_BEGIN_INST_CHAIN_RULE), | |
| 91 _end_inst_chain_rule(_END_INST_CHAIN_RULE), | |
| 92 _must_clone(must_clone), _proj_list(proj_list), | |
| 93 _register_save_policy(register_save_policy), | |
| 94 _c_reg_save_policy(c_reg_save_policy), | |
| 95 _register_save_type(register_save_type), | |
| 96 _ruleName(ruleName), | |
| 97 _allocation_started(false), | |
| 98 _states_arena(Chunk::medium_size), | |
| 99 _visited(&_states_arena), | |
| 100 _shared(&_states_arena), | |
| 101 _dontcare(&_states_arena) { | |
| 102 C->set_matcher(this); | |
| 103 | |
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104 idealreg2spillmask [Op_RegI] = NULL; |
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105 idealreg2spillmask [Op_RegN] = NULL; |
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106 idealreg2spillmask [Op_RegL] = NULL; |
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107 idealreg2spillmask [Op_RegF] = NULL; |
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108 idealreg2spillmask [Op_RegD] = NULL; |
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109 idealreg2spillmask [Op_RegP] = NULL; |
| 0 | 110 |
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111 idealreg2debugmask [Op_RegI] = NULL; |
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112 idealreg2debugmask [Op_RegN] = NULL; |
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113 idealreg2debugmask [Op_RegL] = NULL; |
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114 idealreg2debugmask [Op_RegF] = NULL; |
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115 idealreg2debugmask [Op_RegD] = NULL; |
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116 idealreg2debugmask [Op_RegP] = NULL; |
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117 |
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118 idealreg2mhdebugmask[Op_RegI] = NULL; |
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119 idealreg2mhdebugmask[Op_RegN] = NULL; |
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120 idealreg2mhdebugmask[Op_RegL] = NULL; |
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121 idealreg2mhdebugmask[Op_RegF] = NULL; |
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122 idealreg2mhdebugmask[Op_RegD] = NULL; |
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123 idealreg2mhdebugmask[Op_RegP] = NULL; |
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124 |
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125 debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node |
| 0 | 126 } |
| 127 | |
| 128 //------------------------------warp_incoming_stk_arg------------------------ | |
| 129 // This warps a VMReg into an OptoReg::Name | |
| 130 OptoReg::Name Matcher::warp_incoming_stk_arg( VMReg reg ) { | |
| 131 OptoReg::Name warped; | |
| 132 if( reg->is_stack() ) { // Stack slot argument? | |
| 133 warped = OptoReg::add(_old_SP, reg->reg2stack() ); | |
| 134 warped = OptoReg::add(warped, C->out_preserve_stack_slots()); | |
| 135 if( warped >= _in_arg_limit ) | |
| 136 _in_arg_limit = OptoReg::add(warped, 1); // Bump max stack slot seen | |
| 137 if (!RegMask::can_represent(warped)) { | |
| 138 // the compiler cannot represent this method's calling sequence | |
| 139 C->record_method_not_compilable_all_tiers("unsupported incoming calling sequence"); | |
| 140 return OptoReg::Bad; | |
| 141 } | |
| 142 return warped; | |
| 143 } | |
| 144 return OptoReg::as_OptoReg(reg); | |
| 145 } | |
| 146 | |
| 147 //---------------------------compute_old_SP------------------------------------ | |
| 148 OptoReg::Name Compile::compute_old_SP() { | |
| 149 int fixed = fixed_slots(); | |
| 150 int preserve = in_preserve_stack_slots(); | |
| 151 return OptoReg::stack2reg(round_to(fixed + preserve, Matcher::stack_alignment_in_slots())); | |
| 152 } | |
| 153 | |
| 154 | |
| 155 | |
| 156 #ifdef ASSERT | |
| 157 void Matcher::verify_new_nodes_only(Node* xroot) { | |
| 158 // Make sure that the new graph only references new nodes | |
| 159 ResourceMark rm; | |
| 160 Unique_Node_List worklist; | |
| 161 VectorSet visited(Thread::current()->resource_area()); | |
| 162 worklist.push(xroot); | |
| 163 while (worklist.size() > 0) { | |
| 164 Node* n = worklist.pop(); | |
| 165 visited <<= n->_idx; | |
| 166 assert(C->node_arena()->contains(n), "dead node"); | |
| 167 for (uint j = 0; j < n->req(); j++) { | |
| 168 Node* in = n->in(j); | |
| 169 if (in != NULL) { | |
| 170 assert(C->node_arena()->contains(in), "dead node"); | |
| 171 if (!visited.test(in->_idx)) { | |
| 172 worklist.push(in); | |
| 173 } | |
| 174 } | |
| 175 } | |
| 176 } | |
| 177 } | |
| 178 #endif | |
| 179 | |
| 180 | |
| 181 //---------------------------match--------------------------------------------- | |
| 182 void Matcher::match( ) { | |
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183 if( MaxLabelRootDepth < 100 ) { // Too small? |
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184 assert(false, "invalid MaxLabelRootDepth, increase it to 100 minimum"); |
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185 MaxLabelRootDepth = 100; |
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186 } |
| 0 | 187 // One-time initialization of some register masks. |
| 188 init_spill_mask( C->root()->in(1) ); | |
| 189 _return_addr_mask = return_addr(); | |
| 190 #ifdef _LP64 | |
| 191 // Pointers take 2 slots in 64-bit land | |
| 192 _return_addr_mask.Insert(OptoReg::add(return_addr(),1)); | |
| 193 #endif | |
| 194 | |
| 195 // Map a Java-signature return type into return register-value | |
| 196 // machine registers for 0, 1 and 2 returned values. | |
| 197 const TypeTuple *range = C->tf()->range(); | |
| 198 if( range->cnt() > TypeFunc::Parms ) { // If not a void function | |
| 199 // Get ideal-register return type | |
| 200 int ireg = base2reg[range->field_at(TypeFunc::Parms)->base()]; | |
| 201 // Get machine return register | |
| 202 uint sop = C->start()->Opcode(); | |
| 203 OptoRegPair regs = return_value(ireg, false); | |
| 204 | |
| 205 // And mask for same | |
| 206 _return_value_mask = RegMask(regs.first()); | |
| 207 if( OptoReg::is_valid(regs.second()) ) | |
| 208 _return_value_mask.Insert(regs.second()); | |
| 209 } | |
| 210 | |
| 211 // --------------- | |
| 212 // Frame Layout | |
| 213 | |
| 214 // Need the method signature to determine the incoming argument types, | |
| 215 // because the types determine which registers the incoming arguments are | |
| 216 // in, and this affects the matched code. | |
| 217 const TypeTuple *domain = C->tf()->domain(); | |
| 218 uint argcnt = domain->cnt() - TypeFunc::Parms; | |
| 219 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
| 220 VMRegPair *vm_parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
| 221 _parm_regs = NEW_RESOURCE_ARRAY( OptoRegPair, argcnt ); | |
| 222 _calling_convention_mask = NEW_RESOURCE_ARRAY( RegMask, argcnt ); | |
| 223 uint i; | |
| 224 for( i = 0; i<argcnt; i++ ) { | |
| 225 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
| 226 } | |
| 227 | |
| 228 // Pass array of ideal registers and length to USER code (from the AD file) | |
| 229 // that will convert this to an array of register numbers. | |
| 230 const StartNode *start = C->start(); | |
| 231 start->calling_convention( sig_bt, vm_parm_regs, argcnt ); | |
| 232 #ifdef ASSERT | |
| 233 // Sanity check users' calling convention. Real handy while trying to | |
| 234 // get the initial port correct. | |
| 235 { for (uint i = 0; i<argcnt; i++) { | |
| 236 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
| 237 assert(domain->field_at(i+TypeFunc::Parms)==Type::HALF, "only allowed on halve" ); | |
| 238 _parm_regs[i].set_bad(); | |
| 239 continue; | |
| 240 } | |
| 241 VMReg parm_reg = vm_parm_regs[i].first(); | |
| 242 assert(parm_reg->is_valid(), "invalid arg?"); | |
| 243 if (parm_reg->is_reg()) { | |
| 244 OptoReg::Name opto_parm_reg = OptoReg::as_OptoReg(parm_reg); | |
| 245 assert(can_be_java_arg(opto_parm_reg) || | |
| 246 C->stub_function() == CAST_FROM_FN_PTR(address, OptoRuntime::rethrow_C) || | |
| 247 opto_parm_reg == inline_cache_reg(), | |
| 248 "parameters in register must be preserved by runtime stubs"); | |
| 249 } | |
| 250 for (uint j = 0; j < i; j++) { | |
| 251 assert(parm_reg != vm_parm_regs[j].first(), | |
| 252 "calling conv. must produce distinct regs"); | |
| 253 } | |
| 254 } | |
| 255 } | |
| 256 #endif | |
| 257 | |
| 258 // Do some initial frame layout. | |
| 259 | |
| 260 // Compute the old incoming SP (may be called FP) as | |
| 261 // OptoReg::stack0() + locks + in_preserve_stack_slots + pad2. | |
| 262 _old_SP = C->compute_old_SP(); | |
| 263 assert( is_even(_old_SP), "must be even" ); | |
| 264 | |
| 265 // Compute highest incoming stack argument as | |
| 266 // _old_SP + out_preserve_stack_slots + incoming argument size. | |
| 267 _in_arg_limit = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); | |
| 268 assert( is_even(_in_arg_limit), "out_preserve must be even" ); | |
| 269 for( i = 0; i < argcnt; i++ ) { | |
| 270 // Permit args to have no register | |
| 271 _calling_convention_mask[i].Clear(); | |
| 272 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
| 273 continue; | |
| 274 } | |
| 275 // calling_convention returns stack arguments as a count of | |
| 276 // slots beyond OptoReg::stack0()/VMRegImpl::stack0. We need to convert this to | |
| 277 // the allocators point of view, taking into account all the | |
| 278 // preserve area, locks & pad2. | |
| 279 | |
| 280 OptoReg::Name reg1 = warp_incoming_stk_arg(vm_parm_regs[i].first()); | |
| 281 if( OptoReg::is_valid(reg1)) | |
| 282 _calling_convention_mask[i].Insert(reg1); | |
| 283 | |
| 284 OptoReg::Name reg2 = warp_incoming_stk_arg(vm_parm_regs[i].second()); | |
| 285 if( OptoReg::is_valid(reg2)) | |
| 286 _calling_convention_mask[i].Insert(reg2); | |
| 287 | |
| 288 // Saved biased stack-slot register number | |
| 289 _parm_regs[i].set_pair(reg2, reg1); | |
| 290 } | |
| 291 | |
| 292 // Finally, make sure the incoming arguments take up an even number of | |
| 293 // words, in case the arguments or locals need to contain doubleword stack | |
| 294 // slots. The rest of the system assumes that stack slot pairs (in | |
| 295 // particular, in the spill area) which look aligned will in fact be | |
| 296 // aligned relative to the stack pointer in the target machine. Double | |
| 297 // stack slots will always be allocated aligned. | |
| 298 _new_SP = OptoReg::Name(round_to(_in_arg_limit, RegMask::SlotsPerLong)); | |
| 299 | |
| 300 // Compute highest outgoing stack argument as | |
| 301 // _new_SP + out_preserve_stack_slots + max(outgoing argument size). | |
| 302 _out_arg_limit = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
| 303 assert( is_even(_out_arg_limit), "out_preserve must be even" ); | |
| 304 | |
| 305 if (!RegMask::can_represent(OptoReg::add(_out_arg_limit,-1))) { | |
| 306 // the compiler cannot represent this method's calling sequence | |
| 307 C->record_method_not_compilable("must be able to represent all call arguments in reg mask"); | |
| 308 } | |
| 309 | |
| 310 if (C->failing()) return; // bailed out on incoming arg failure | |
| 311 | |
| 312 // --------------- | |
| 313 // Collect roots of matcher trees. Every node for which | |
| 314 // _shared[_idx] is cleared is guaranteed to not be shared, and thus | |
| 315 // can be a valid interior of some tree. | |
| 316 find_shared( C->root() ); | |
| 317 find_shared( C->top() ); | |
| 318 | |
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319 C->print_method("Before Matching"); |
| 0 | 320 |
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321 // Create new ideal node ConP #NULL even if it does exist in old space |
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322 // to avoid false sharing if the corresponding mach node is not used. |
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323 // The corresponding mach node is only used in rare cases for derived |
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324 // pointers. |
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325 Node* new_ideal_null = ConNode::make(C, TypePtr::NULL_PTR); |
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326 |
| 0 | 327 // Swap out to old-space; emptying new-space |
| 328 Arena *old = C->node_arena()->move_contents(C->old_arena()); | |
| 329 | |
| 330 // Save debug and profile information for nodes in old space: | |
| 331 _old_node_note_array = C->node_note_array(); | |
| 332 if (_old_node_note_array != NULL) { | |
| 333 C->set_node_note_array(new(C->comp_arena()) GrowableArray<Node_Notes*> | |
| 334 (C->comp_arena(), _old_node_note_array->length(), | |
| 335 0, NULL)); | |
| 336 } | |
| 337 | |
| 338 // Pre-size the new_node table to avoid the need for range checks. | |
| 339 grow_new_node_array(C->unique()); | |
| 340 | |
| 341 // Reset node counter so MachNodes start with _idx at 0 | |
| 342 int nodes = C->unique(); // save value | |
| 343 C->set_unique(0); | |
| 344 | |
| 345 // Recursively match trees from old space into new space. | |
| 346 // Correct leaves of new-space Nodes; they point to old-space. | |
| 347 _visited.Clear(); // Clear visit bits for xform call | |
| 348 C->set_cached_top_node(xform( C->top(), nodes )); | |
| 349 if (!C->failing()) { | |
| 350 Node* xroot = xform( C->root(), 1 ); | |
| 351 if (xroot == NULL) { | |
| 352 Matcher::soft_match_failure(); // recursive matching process failed | |
| 353 C->record_method_not_compilable("instruction match failed"); | |
| 354 } else { | |
| 355 // During matching shared constants were attached to C->root() | |
| 356 // because xroot wasn't available yet, so transfer the uses to | |
| 357 // the xroot. | |
| 358 for( DUIterator_Fast jmax, j = C->root()->fast_outs(jmax); j < jmax; j++ ) { | |
| 359 Node* n = C->root()->fast_out(j); | |
| 360 if (C->node_arena()->contains(n)) { | |
| 361 assert(n->in(0) == C->root(), "should be control user"); | |
| 362 n->set_req(0, xroot); | |
| 363 --j; | |
| 364 --jmax; | |
| 365 } | |
| 366 } | |
| 367 | |
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368 // Generate new mach node for ConP #NULL |
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369 assert(new_ideal_null != NULL, "sanity"); |
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370 _mach_null = match_tree(new_ideal_null); |
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371 // Don't set control, it will confuse GCM since there are no uses. |
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372 // The control will be set when this node is used first time |
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373 // in find_base_for_derived(). |
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374 assert(_mach_null != NULL, ""); |
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375 |
| 0 | 376 C->set_root(xroot->is_Root() ? xroot->as_Root() : NULL); |
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377 |
| 0 | 378 #ifdef ASSERT |
| 379 verify_new_nodes_only(xroot); | |
| 380 #endif | |
| 381 } | |
| 382 } | |
| 383 if (C->top() == NULL || C->root() == NULL) { | |
| 384 C->record_method_not_compilable("graph lost"); // %%% cannot happen? | |
| 385 } | |
| 386 if (C->failing()) { | |
| 387 // delete old; | |
| 388 old->destruct_contents(); | |
| 389 return; | |
| 390 } | |
| 391 assert( C->top(), "" ); | |
| 392 assert( C->root(), "" ); | |
| 393 validate_null_checks(); | |
| 394 | |
| 395 // Now smoke old-space | |
| 396 NOT_DEBUG( old->destruct_contents() ); | |
| 397 | |
| 398 // ------------------------ | |
| 399 // Set up save-on-entry registers | |
| 400 Fixup_Save_On_Entry( ); | |
| 401 } | |
| 402 | |
| 403 | |
| 404 //------------------------------Fixup_Save_On_Entry---------------------------- | |
| 405 // The stated purpose of this routine is to take care of save-on-entry | |
| 406 // registers. However, the overall goal of the Match phase is to convert into | |
| 407 // machine-specific instructions which have RegMasks to guide allocation. | |
| 408 // So what this procedure really does is put a valid RegMask on each input | |
| 409 // to the machine-specific variations of all Return, TailCall and Halt | |
| 410 // instructions. It also adds edgs to define the save-on-entry values (and of | |
| 411 // course gives them a mask). | |
| 412 | |
| 413 static RegMask *init_input_masks( uint size, RegMask &ret_adr, RegMask &fp ) { | |
| 414 RegMask *rms = NEW_RESOURCE_ARRAY( RegMask, size ); | |
| 415 // Do all the pre-defined register masks | |
| 416 rms[TypeFunc::Control ] = RegMask::Empty; | |
| 417 rms[TypeFunc::I_O ] = RegMask::Empty; | |
| 418 rms[TypeFunc::Memory ] = RegMask::Empty; | |
| 419 rms[TypeFunc::ReturnAdr] = ret_adr; | |
| 420 rms[TypeFunc::FramePtr ] = fp; | |
| 421 return rms; | |
| 422 } | |
| 423 | |
| 424 //---------------------------init_first_stack_mask----------------------------- | |
| 425 // Create the initial stack mask used by values spilling to the stack. | |
| 426 // Disallow any debug info in outgoing argument areas by setting the | |
| 427 // initial mask accordingly. | |
| 428 void Matcher::init_first_stack_mask() { | |
| 429 | |
| 430 // Allocate storage for spill masks as masks for the appropriate load type. | |
|
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431 RegMask *rms = (RegMask*)C->comp_arena()->Amalloc_D(sizeof(RegMask) * 3*6); |
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432 |
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433 idealreg2spillmask [Op_RegN] = &rms[0]; |
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434 idealreg2spillmask [Op_RegI] = &rms[1]; |
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435 idealreg2spillmask [Op_RegL] = &rms[2]; |
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436 idealreg2spillmask [Op_RegF] = &rms[3]; |
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437 idealreg2spillmask [Op_RegD] = &rms[4]; |
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438 idealreg2spillmask [Op_RegP] = &rms[5]; |
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439 |
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440 idealreg2debugmask [Op_RegN] = &rms[6]; |
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441 idealreg2debugmask [Op_RegI] = &rms[7]; |
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442 idealreg2debugmask [Op_RegL] = &rms[8]; |
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443 idealreg2debugmask [Op_RegF] = &rms[9]; |
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444 idealreg2debugmask [Op_RegD] = &rms[10]; |
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445 idealreg2debugmask [Op_RegP] = &rms[11]; |
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446 |
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447 idealreg2mhdebugmask[Op_RegN] = &rms[12]; |
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448 idealreg2mhdebugmask[Op_RegI] = &rms[13]; |
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449 idealreg2mhdebugmask[Op_RegL] = &rms[14]; |
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450 idealreg2mhdebugmask[Op_RegF] = &rms[15]; |
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451 idealreg2mhdebugmask[Op_RegD] = &rms[16]; |
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452 idealreg2mhdebugmask[Op_RegP] = &rms[17]; |
| 0 | 453 |
| 454 OptoReg::Name i; | |
| 455 | |
| 456 // At first, start with the empty mask | |
| 457 C->FIRST_STACK_mask().Clear(); | |
| 458 | |
| 459 // Add in the incoming argument area | |
| 460 OptoReg::Name init = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); | |
| 461 for (i = init; i < _in_arg_limit; i = OptoReg::add(i,1)) | |
| 462 C->FIRST_STACK_mask().Insert(i); | |
| 463 | |
| 464 // Add in all bits past the outgoing argument area | |
| 465 guarantee(RegMask::can_represent(OptoReg::add(_out_arg_limit,-1)), | |
| 466 "must be able to represent all call arguments in reg mask"); | |
| 467 init = _out_arg_limit; | |
| 468 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) | |
| 469 C->FIRST_STACK_mask().Insert(i); | |
| 470 | |
| 471 // Finally, set the "infinite stack" bit. | |
| 472 C->FIRST_STACK_mask().set_AllStack(); | |
| 473 | |
| 474 // Make spill masks. Registers for their class, plus FIRST_STACK_mask. | |
|
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475 #ifdef _LP64 |
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476 *idealreg2spillmask[Op_RegN] = *idealreg2regmask[Op_RegN]; |
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477 idealreg2spillmask[Op_RegN]->OR(C->FIRST_STACK_mask()); |
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478 #endif |
| 0 | 479 *idealreg2spillmask[Op_RegI] = *idealreg2regmask[Op_RegI]; |
| 480 idealreg2spillmask[Op_RegI]->OR(C->FIRST_STACK_mask()); | |
| 481 *idealreg2spillmask[Op_RegL] = *idealreg2regmask[Op_RegL]; | |
| 482 idealreg2spillmask[Op_RegL]->OR(C->FIRST_STACK_mask()); | |
| 483 *idealreg2spillmask[Op_RegF] = *idealreg2regmask[Op_RegF]; | |
| 484 idealreg2spillmask[Op_RegF]->OR(C->FIRST_STACK_mask()); | |
| 485 *idealreg2spillmask[Op_RegD] = *idealreg2regmask[Op_RegD]; | |
| 486 idealreg2spillmask[Op_RegD]->OR(C->FIRST_STACK_mask()); | |
| 487 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP]; | |
| 488 idealreg2spillmask[Op_RegP]->OR(C->FIRST_STACK_mask()); | |
| 489 | |
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490 if (UseFPUForSpilling) { |
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491 // This mask logic assumes that the spill operations are |
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492 // symmetric and that the registers involved are the same size. |
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493 // On sparc for instance we may have to use 64 bit moves will |
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494 // kill 2 registers when used with F0-F31. |
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495 idealreg2spillmask[Op_RegI]->OR(*idealreg2regmask[Op_RegF]); |
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496 idealreg2spillmask[Op_RegF]->OR(*idealreg2regmask[Op_RegI]); |
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497 #ifdef _LP64 |
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498 idealreg2spillmask[Op_RegN]->OR(*idealreg2regmask[Op_RegF]); |
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499 idealreg2spillmask[Op_RegL]->OR(*idealreg2regmask[Op_RegD]); |
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500 idealreg2spillmask[Op_RegD]->OR(*idealreg2regmask[Op_RegL]); |
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501 idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegD]); |
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502 #else |
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503 idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegF]); |
| 3909 | 504 #ifdef ARM |
| 505 // ARM has support for moving 64bit values between a pair of | |
| 506 // integer registers and a double register | |
| 507 idealreg2spillmask[Op_RegL]->OR(*idealreg2regmask[Op_RegD]); | |
| 508 idealreg2spillmask[Op_RegD]->OR(*idealreg2regmask[Op_RegL]); | |
| 509 #endif | |
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510 #endif |
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511 } |
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512 |
| 0 | 513 // Make up debug masks. Any spill slot plus callee-save registers. |
| 514 // Caller-save registers are assumed to be trashable by the various | |
| 515 // inline-cache fixup routines. | |
|
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516 *idealreg2debugmask [Op_RegN]= *idealreg2spillmask[Op_RegN]; |
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517 *idealreg2debugmask [Op_RegI]= *idealreg2spillmask[Op_RegI]; |
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518 *idealreg2debugmask [Op_RegL]= *idealreg2spillmask[Op_RegL]; |
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519 *idealreg2debugmask [Op_RegF]= *idealreg2spillmask[Op_RegF]; |
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520 *idealreg2debugmask [Op_RegD]= *idealreg2spillmask[Op_RegD]; |
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521 *idealreg2debugmask [Op_RegP]= *idealreg2spillmask[Op_RegP]; |
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522 |
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523 *idealreg2mhdebugmask[Op_RegN]= *idealreg2spillmask[Op_RegN]; |
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524 *idealreg2mhdebugmask[Op_RegI]= *idealreg2spillmask[Op_RegI]; |
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525 *idealreg2mhdebugmask[Op_RegL]= *idealreg2spillmask[Op_RegL]; |
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526 *idealreg2mhdebugmask[Op_RegF]= *idealreg2spillmask[Op_RegF]; |
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527 *idealreg2mhdebugmask[Op_RegD]= *idealreg2spillmask[Op_RegD]; |
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528 *idealreg2mhdebugmask[Op_RegP]= *idealreg2spillmask[Op_RegP]; |
| 0 | 529 |
| 530 // Prevent stub compilations from attempting to reference | |
| 531 // callee-saved registers from debug info | |
| 532 bool exclude_soe = !Compile::current()->is_method_compilation(); | |
| 533 | |
| 534 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
| 535 // registers the caller has to save do not work | |
| 536 if( _register_save_policy[i] == 'C' || | |
| 537 _register_save_policy[i] == 'A' || | |
| 538 (_register_save_policy[i] == 'E' && exclude_soe) ) { | |
|
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539 idealreg2debugmask [Op_RegN]->Remove(i); |
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540 idealreg2debugmask [Op_RegI]->Remove(i); // Exclude save-on-call |
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541 idealreg2debugmask [Op_RegL]->Remove(i); // registers from debug |
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542 idealreg2debugmask [Op_RegF]->Remove(i); // masks |
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543 idealreg2debugmask [Op_RegD]->Remove(i); |
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544 idealreg2debugmask [Op_RegP]->Remove(i); |
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545 |
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546 idealreg2mhdebugmask[Op_RegN]->Remove(i); |
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547 idealreg2mhdebugmask[Op_RegI]->Remove(i); |
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548 idealreg2mhdebugmask[Op_RegL]->Remove(i); |
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549 idealreg2mhdebugmask[Op_RegF]->Remove(i); |
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550 idealreg2mhdebugmask[Op_RegD]->Remove(i); |
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551 idealreg2mhdebugmask[Op_RegP]->Remove(i); |
| 0 | 552 } |
| 553 } | |
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554 |
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555 // Subtract the register we use to save the SP for MethodHandle |
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556 // invokes to from the debug mask. |
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557 const RegMask save_mask = method_handle_invoke_SP_save_mask(); |
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558 idealreg2mhdebugmask[Op_RegN]->SUBTRACT(save_mask); |
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559 idealreg2mhdebugmask[Op_RegI]->SUBTRACT(save_mask); |
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560 idealreg2mhdebugmask[Op_RegL]->SUBTRACT(save_mask); |
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561 idealreg2mhdebugmask[Op_RegF]->SUBTRACT(save_mask); |
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562 idealreg2mhdebugmask[Op_RegD]->SUBTRACT(save_mask); |
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563 idealreg2mhdebugmask[Op_RegP]->SUBTRACT(save_mask); |
| 0 | 564 } |
| 565 | |
| 566 //---------------------------is_save_on_entry---------------------------------- | |
| 567 bool Matcher::is_save_on_entry( int reg ) { | |
| 568 return | |
| 569 _register_save_policy[reg] == 'E' || | |
| 570 _register_save_policy[reg] == 'A' || // Save-on-entry register? | |
| 571 // Also save argument registers in the trampolining stubs | |
| 572 (C->save_argument_registers() && is_spillable_arg(reg)); | |
| 573 } | |
| 574 | |
| 575 //---------------------------Fixup_Save_On_Entry------------------------------- | |
| 576 void Matcher::Fixup_Save_On_Entry( ) { | |
| 577 init_first_stack_mask(); | |
| 578 | |
| 579 Node *root = C->root(); // Short name for root | |
| 580 // Count number of save-on-entry registers. | |
| 581 uint soe_cnt = number_of_saved_registers(); | |
| 582 uint i; | |
| 583 | |
| 584 // Find the procedure Start Node | |
| 585 StartNode *start = C->start(); | |
| 586 assert( start, "Expect a start node" ); | |
| 587 | |
| 588 // Save argument registers in the trampolining stubs | |
| 589 if( C->save_argument_registers() ) | |
| 590 for( i = 0; i < _last_Mach_Reg; i++ ) | |
| 591 if( is_spillable_arg(i) ) | |
| 592 soe_cnt++; | |
| 593 | |
| 594 // Input RegMask array shared by all Returns. | |
| 595 // The type for doubles and longs has a count of 2, but | |
| 596 // there is only 1 returned value | |
| 597 uint ret_edge_cnt = TypeFunc::Parms + ((C->tf()->range()->cnt() == TypeFunc::Parms) ? 0 : 1); | |
| 598 RegMask *ret_rms = init_input_masks( ret_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 599 // Returns have 0 or 1 returned values depending on call signature. | |
| 600 // Return register is specified by return_value in the AD file. | |
| 601 if (ret_edge_cnt > TypeFunc::Parms) | |
| 602 ret_rms[TypeFunc::Parms+0] = _return_value_mask; | |
| 603 | |
| 604 // Input RegMask array shared by all Rethrows. | |
| 605 uint reth_edge_cnt = TypeFunc::Parms+1; | |
| 606 RegMask *reth_rms = init_input_masks( reth_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 607 // Rethrow takes exception oop only, but in the argument 0 slot. | |
| 608 reth_rms[TypeFunc::Parms] = mreg2regmask[find_receiver(false)]; | |
| 609 #ifdef _LP64 | |
| 610 // Need two slots for ptrs in 64-bit land | |
| 611 reth_rms[TypeFunc::Parms].Insert(OptoReg::add(OptoReg::Name(find_receiver(false)),1)); | |
| 612 #endif | |
| 613 | |
| 614 // Input RegMask array shared by all TailCalls | |
| 615 uint tail_call_edge_cnt = TypeFunc::Parms+2; | |
| 616 RegMask *tail_call_rms = init_input_masks( tail_call_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 617 | |
| 618 // Input RegMask array shared by all TailJumps | |
| 619 uint tail_jump_edge_cnt = TypeFunc::Parms+2; | |
| 620 RegMask *tail_jump_rms = init_input_masks( tail_jump_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 621 | |
| 622 // TailCalls have 2 returned values (target & moop), whose masks come | |
| 623 // from the usual MachNode/MachOper mechanism. Find a sample | |
| 624 // TailCall to extract these masks and put the correct masks into | |
| 625 // the tail_call_rms array. | |
| 626 for( i=1; i < root->req(); i++ ) { | |
| 627 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
| 628 if( m->ideal_Opcode() == Op_TailCall ) { | |
| 629 tail_call_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
| 630 tail_call_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
| 631 break; | |
| 632 } | |
| 633 } | |
| 634 | |
| 635 // TailJumps have 2 returned values (target & ex_oop), whose masks come | |
| 636 // from the usual MachNode/MachOper mechanism. Find a sample | |
| 637 // TailJump to extract these masks and put the correct masks into | |
| 638 // the tail_jump_rms array. | |
| 639 for( i=1; i < root->req(); i++ ) { | |
| 640 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
| 641 if( m->ideal_Opcode() == Op_TailJump ) { | |
| 642 tail_jump_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
| 643 tail_jump_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
| 644 break; | |
| 645 } | |
| 646 } | |
| 647 | |
| 648 // Input RegMask array shared by all Halts | |
| 649 uint halt_edge_cnt = TypeFunc::Parms; | |
| 650 RegMask *halt_rms = init_input_masks( halt_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 651 | |
| 652 // Capture the return input masks into each exit flavor | |
| 653 for( i=1; i < root->req(); i++ ) { | |
| 654 MachReturnNode *exit = root->in(i)->as_MachReturn(); | |
| 655 switch( exit->ideal_Opcode() ) { | |
| 656 case Op_Return : exit->_in_rms = ret_rms; break; | |
| 657 case Op_Rethrow : exit->_in_rms = reth_rms; break; | |
| 658 case Op_TailCall : exit->_in_rms = tail_call_rms; break; | |
| 659 case Op_TailJump : exit->_in_rms = tail_jump_rms; break; | |
| 660 case Op_Halt : exit->_in_rms = halt_rms; break; | |
| 661 default : ShouldNotReachHere(); | |
| 662 } | |
| 663 } | |
| 664 | |
| 665 // Next unused projection number from Start. | |
| 666 int proj_cnt = C->tf()->domain()->cnt(); | |
| 667 | |
| 668 // Do all the save-on-entry registers. Make projections from Start for | |
| 669 // them, and give them a use at the exit points. To the allocator, they | |
| 670 // look like incoming register arguments. | |
| 671 for( i = 0; i < _last_Mach_Reg; i++ ) { | |
| 672 if( is_save_on_entry(i) ) { | |
| 673 | |
| 674 // Add the save-on-entry to the mask array | |
| 675 ret_rms [ ret_edge_cnt] = mreg2regmask[i]; | |
| 676 reth_rms [ reth_edge_cnt] = mreg2regmask[i]; | |
| 677 tail_call_rms[tail_call_edge_cnt] = mreg2regmask[i]; | |
| 678 tail_jump_rms[tail_jump_edge_cnt] = mreg2regmask[i]; | |
| 679 // Halts need the SOE registers, but only in the stack as debug info. | |
| 680 // A just-prior uncommon-trap or deoptimization will use the SOE regs. | |
| 681 halt_rms [ halt_edge_cnt] = *idealreg2spillmask[_register_save_type[i]]; | |
| 682 | |
| 683 Node *mproj; | |
| 684 | |
| 685 // Is this a RegF low half of a RegD? Double up 2 adjacent RegF's | |
| 686 // into a single RegD. | |
| 687 if( (i&1) == 0 && | |
| 688 _register_save_type[i ] == Op_RegF && | |
| 689 _register_save_type[i+1] == Op_RegF && | |
| 690 is_save_on_entry(i+1) ) { | |
| 691 // Add other bit for double | |
| 692 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 693 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 694 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 695 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 696 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 697 mproj = new (C, 1) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegD ); | |
| 698 proj_cnt += 2; // Skip 2 for doubles | |
| 699 } | |
| 700 else if( (i&1) == 1 && // Else check for high half of double | |
| 701 _register_save_type[i-1] == Op_RegF && | |
| 702 _register_save_type[i ] == Op_RegF && | |
| 703 is_save_on_entry(i-1) ) { | |
| 704 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
| 705 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
| 706 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
| 707 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
| 708 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
| 709 mproj = C->top(); | |
| 710 } | |
| 711 // Is this a RegI low half of a RegL? Double up 2 adjacent RegI's | |
| 712 // into a single RegL. | |
| 713 else if( (i&1) == 0 && | |
| 714 _register_save_type[i ] == Op_RegI && | |
| 715 _register_save_type[i+1] == Op_RegI && | |
| 716 is_save_on_entry(i+1) ) { | |
| 717 // Add other bit for long | |
| 718 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 719 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 720 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 721 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 722 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 723 mproj = new (C, 1) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegL ); | |
| 724 proj_cnt += 2; // Skip 2 for longs | |
| 725 } | |
| 726 else if( (i&1) == 1 && // Else check for high half of long | |
| 727 _register_save_type[i-1] == Op_RegI && | |
| 728 _register_save_type[i ] == Op_RegI && | |
| 729 is_save_on_entry(i-1) ) { | |
| 730 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
| 731 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
| 732 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
| 733 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
| 734 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
| 735 mproj = C->top(); | |
| 736 } else { | |
| 737 // Make a projection for it off the Start | |
| 738 mproj = new (C, 1) MachProjNode( start, proj_cnt++, ret_rms[ret_edge_cnt], _register_save_type[i] ); | |
| 739 } | |
| 740 | |
| 741 ret_edge_cnt ++; | |
| 742 reth_edge_cnt ++; | |
| 743 tail_call_edge_cnt ++; | |
| 744 tail_jump_edge_cnt ++; | |
| 745 halt_edge_cnt ++; | |
| 746 | |
| 747 // Add a use of the SOE register to all exit paths | |
| 748 for( uint j=1; j < root->req(); j++ ) | |
| 749 root->in(j)->add_req(mproj); | |
| 750 } // End of if a save-on-entry register | |
| 751 } // End of for all machine registers | |
| 752 } | |
| 753 | |
| 754 //------------------------------init_spill_mask-------------------------------- | |
| 755 void Matcher::init_spill_mask( Node *ret ) { | |
| 756 if( idealreg2regmask[Op_RegI] ) return; // One time only init | |
| 757 | |
| 758 OptoReg::c_frame_pointer = c_frame_pointer(); | |
| 759 c_frame_ptr_mask = c_frame_pointer(); | |
| 760 #ifdef _LP64 | |
| 761 // pointers are twice as big | |
| 762 c_frame_ptr_mask.Insert(OptoReg::add(c_frame_pointer(),1)); | |
| 763 #endif | |
| 764 | |
| 765 // Start at OptoReg::stack0() | |
| 766 STACK_ONLY_mask.Clear(); | |
| 767 OptoReg::Name init = OptoReg::stack2reg(0); | |
| 768 // STACK_ONLY_mask is all stack bits | |
| 769 OptoReg::Name i; | |
| 770 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) | |
| 771 STACK_ONLY_mask.Insert(i); | |
| 772 // Also set the "infinite stack" bit. | |
| 773 STACK_ONLY_mask.set_AllStack(); | |
| 774 | |
| 775 // Copy the register names over into the shared world | |
| 776 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
| 777 // SharedInfo::regName[i] = regName[i]; | |
| 778 // Handy RegMasks per machine register | |
| 779 mreg2regmask[i].Insert(i); | |
| 780 } | |
| 781 | |
| 782 // Grab the Frame Pointer | |
| 783 Node *fp = ret->in(TypeFunc::FramePtr); | |
| 784 Node *mem = ret->in(TypeFunc::Memory); | |
| 785 const TypePtr* atp = TypePtr::BOTTOM; | |
| 786 // Share frame pointer while making spill ops | |
| 787 set_shared(fp); | |
| 788 | |
| 789 // Compute generic short-offset Loads | |
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790 #ifdef _LP64 |
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791 MachNode *spillCP = match_tree(new (C, 3) LoadNNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM)); |
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792 #endif |
| 0 | 793 MachNode *spillI = match_tree(new (C, 3) LoadINode(NULL,mem,fp,atp)); |
| 794 MachNode *spillL = match_tree(new (C, 3) LoadLNode(NULL,mem,fp,atp)); | |
| 795 MachNode *spillF = match_tree(new (C, 3) LoadFNode(NULL,mem,fp,atp)); | |
| 796 MachNode *spillD = match_tree(new (C, 3) LoadDNode(NULL,mem,fp,atp)); | |
| 797 MachNode *spillP = match_tree(new (C, 3) LoadPNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM)); | |
| 798 assert(spillI != NULL && spillL != NULL && spillF != NULL && | |
| 799 spillD != NULL && spillP != NULL, ""); | |
| 800 | |
| 801 // Get the ADLC notion of the right regmask, for each basic type. | |
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802 #ifdef _LP64 |
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803 idealreg2regmask[Op_RegN] = &spillCP->out_RegMask(); |
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804 #endif |
| 0 | 805 idealreg2regmask[Op_RegI] = &spillI->out_RegMask(); |
| 806 idealreg2regmask[Op_RegL] = &spillL->out_RegMask(); | |
| 807 idealreg2regmask[Op_RegF] = &spillF->out_RegMask(); | |
| 808 idealreg2regmask[Op_RegD] = &spillD->out_RegMask(); | |
| 809 idealreg2regmask[Op_RegP] = &spillP->out_RegMask(); | |
| 810 } | |
| 811 | |
| 812 #ifdef ASSERT | |
| 813 static void match_alias_type(Compile* C, Node* n, Node* m) { | |
| 814 if (!VerifyAliases) return; // do not go looking for trouble by default | |
| 815 const TypePtr* nat = n->adr_type(); | |
| 816 const TypePtr* mat = m->adr_type(); | |
| 817 int nidx = C->get_alias_index(nat); | |
| 818 int midx = C->get_alias_index(mat); | |
| 819 // Detune the assert for cases like (AndI 0xFF (LoadB p)). | |
| 820 if (nidx == Compile::AliasIdxTop && midx >= Compile::AliasIdxRaw) { | |
| 821 for (uint i = 1; i < n->req(); i++) { | |
| 822 Node* n1 = n->in(i); | |
| 823 const TypePtr* n1at = n1->adr_type(); | |
| 824 if (n1at != NULL) { | |
| 825 nat = n1at; | |
| 826 nidx = C->get_alias_index(n1at); | |
| 827 } | |
| 828 } | |
| 829 } | |
| 830 // %%% Kludgery. Instead, fix ideal adr_type methods for all these cases: | |
| 831 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxRaw) { | |
| 832 switch (n->Opcode()) { | |
| 833 case Op_PrefetchRead: | |
| 834 case Op_PrefetchWrite: | |
| 3854 | 835 case Op_PrefetchAllocation: |
| 0 | 836 nidx = Compile::AliasIdxRaw; |
| 837 nat = TypeRawPtr::BOTTOM; | |
| 838 break; | |
| 839 } | |
| 840 } | |
| 841 if (nidx == Compile::AliasIdxRaw && midx == Compile::AliasIdxTop) { | |
| 842 switch (n->Opcode()) { | |
| 843 case Op_ClearArray: | |
| 844 midx = Compile::AliasIdxRaw; | |
| 845 mat = TypeRawPtr::BOTTOM; | |
| 846 break; | |
| 847 } | |
| 848 } | |
| 849 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxBot) { | |
| 850 switch (n->Opcode()) { | |
| 851 case Op_Return: | |
| 852 case Op_Rethrow: | |
| 853 case Op_Halt: | |
| 854 case Op_TailCall: | |
| 855 case Op_TailJump: | |
| 856 nidx = Compile::AliasIdxBot; | |
| 857 nat = TypePtr::BOTTOM; | |
| 858 break; | |
| 859 } | |
| 860 } | |
| 861 if (nidx == Compile::AliasIdxBot && midx == Compile::AliasIdxTop) { | |
| 862 switch (n->Opcode()) { | |
| 863 case Op_StrComp: | |
| 681 | 864 case Op_StrEquals: |
| 865 case Op_StrIndexOf: | |
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866 case Op_AryEq: |
| 0 | 867 case Op_MemBarVolatile: |
| 868 case Op_MemBarCPUOrder: // %%% these ideals should have narrower adr_type? | |
| 869 nidx = Compile::AliasIdxTop; | |
| 870 nat = NULL; | |
| 871 break; | |
| 872 } | |
| 873 } | |
| 874 if (nidx != midx) { | |
| 875 if (PrintOpto || (PrintMiscellaneous && (WizardMode || Verbose))) { | |
| 876 tty->print_cr("==== Matcher alias shift %d => %d", nidx, midx); | |
| 877 n->dump(); | |
| 878 m->dump(); | |
| 879 } | |
| 880 assert(C->subsume_loads() && C->must_alias(nat, midx), | |
| 881 "must not lose alias info when matching"); | |
| 882 } | |
| 883 } | |
| 884 #endif | |
| 885 | |
| 886 | |
| 887 //------------------------------MStack----------------------------------------- | |
| 888 // State and MStack class used in xform() and find_shared() iterative methods. | |
| 889 enum Node_State { Pre_Visit, // node has to be pre-visited | |
| 890 Visit, // visit node | |
| 891 Post_Visit, // post-visit node | |
| 892 Alt_Post_Visit // alternative post-visit path | |
| 893 }; | |
| 894 | |
| 895 class MStack: public Node_Stack { | |
| 896 public: | |
| 897 MStack(int size) : Node_Stack(size) { } | |
| 898 | |
| 899 void push(Node *n, Node_State ns) { | |
| 900 Node_Stack::push(n, (uint)ns); | |
| 901 } | |
| 902 void push(Node *n, Node_State ns, Node *parent, int indx) { | |
| 903 ++_inode_top; | |
| 904 if ((_inode_top + 1) >= _inode_max) grow(); | |
| 905 _inode_top->node = parent; | |
| 906 _inode_top->indx = (uint)indx; | |
| 907 ++_inode_top; | |
| 908 _inode_top->node = n; | |
| 909 _inode_top->indx = (uint)ns; | |
| 910 } | |
| 911 Node *parent() { | |
| 912 pop(); | |
| 913 return node(); | |
| 914 } | |
| 915 Node_State state() const { | |
| 916 return (Node_State)index(); | |
| 917 } | |
| 918 void set_state(Node_State ns) { | |
| 919 set_index((uint)ns); | |
| 920 } | |
| 921 }; | |
| 922 | |
| 923 | |
| 924 //------------------------------xform------------------------------------------ | |
| 925 // Given a Node in old-space, Match him (Label/Reduce) to produce a machine | |
| 926 // Node in new-space. Given a new-space Node, recursively walk his children. | |
| 927 Node *Matcher::transform( Node *n ) { ShouldNotCallThis(); return n; } | |
| 928 Node *Matcher::xform( Node *n, int max_stack ) { | |
| 929 // Use one stack to keep both: child's node/state and parent's node/index | |
| 930 MStack mstack(max_stack * 2 * 2); // C->unique() * 2 * 2 | |
| 931 mstack.push(n, Visit, NULL, -1); // set NULL as parent to indicate root | |
| 932 | |
| 933 while (mstack.is_nonempty()) { | |
| 934 n = mstack.node(); // Leave node on stack | |
| 935 Node_State nstate = mstack.state(); | |
| 936 if (nstate == Visit) { | |
| 937 mstack.set_state(Post_Visit); | |
| 938 Node *oldn = n; | |
| 939 // Old-space or new-space check | |
| 940 if (!C->node_arena()->contains(n)) { | |
| 941 // Old space! | |
| 942 Node* m; | |
| 943 if (has_new_node(n)) { // Not yet Label/Reduced | |
| 944 m = new_node(n); | |
| 945 } else { | |
| 946 if (!is_dontcare(n)) { // Matcher can match this guy | |
| 947 // Calls match special. They match alone with no children. | |
| 948 // Their children, the incoming arguments, match normally. | |
| 949 m = n->is_SafePoint() ? match_sfpt(n->as_SafePoint()):match_tree(n); | |
| 950 if (C->failing()) return NULL; | |
| 951 if (m == NULL) { Matcher::soft_match_failure(); return NULL; } | |
| 952 } else { // Nothing the matcher cares about | |
| 953 if( n->is_Proj() && n->in(0)->is_Multi()) { // Projections? | |
| 954 // Convert to machine-dependent projection | |
| 955 m = n->in(0)->as_Multi()->match( n->as_Proj(), this ); | |
| 222 | 956 #ifdef ASSERT |
| 957 _new2old_map.map(m->_idx, n); | |
| 958 #endif | |
| 0 | 959 if (m->in(0) != NULL) // m might be top |
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960 collect_null_checks(m, n); |
| 0 | 961 } else { // Else just a regular 'ol guy |
| 962 m = n->clone(); // So just clone into new-space | |
| 222 | 963 #ifdef ASSERT |
| 964 _new2old_map.map(m->_idx, n); | |
| 965 #endif | |
| 0 | 966 // Def-Use edges will be added incrementally as Uses |
| 967 // of this node are matched. | |
| 968 assert(m->outcnt() == 0, "no Uses of this clone yet"); | |
| 969 } | |
| 970 } | |
| 971 | |
| 972 set_new_node(n, m); // Map old to new | |
| 973 if (_old_node_note_array != NULL) { | |
| 974 Node_Notes* nn = C->locate_node_notes(_old_node_note_array, | |
| 975 n->_idx); | |
| 976 C->set_node_notes_at(m->_idx, nn); | |
| 977 } | |
| 978 debug_only(match_alias_type(C, n, m)); | |
| 979 } | |
| 980 n = m; // n is now a new-space node | |
| 981 mstack.set_node(n); | |
| 982 } | |
| 983 | |
| 984 // New space! | |
| 985 if (_visited.test_set(n->_idx)) continue; // while(mstack.is_nonempty()) | |
| 986 | |
| 987 int i; | |
| 988 // Put precedence edges on stack first (match them last). | |
| 989 for (i = oldn->req(); (uint)i < oldn->len(); i++) { | |
| 990 Node *m = oldn->in(i); | |
| 991 if (m == NULL) break; | |
| 992 // set -1 to call add_prec() instead of set_req() during Step1 | |
| 993 mstack.push(m, Visit, n, -1); | |
| 994 } | |
| 995 | |
| 996 // For constant debug info, I'd rather have unmatched constants. | |
| 997 int cnt = n->req(); | |
| 998 JVMState* jvms = n->jvms(); | |
| 999 int debug_cnt = jvms ? jvms->debug_start() : cnt; | |
| 1000 | |
| 1001 // Now do only debug info. Clone constants rather than matching. | |
| 1002 // Constants are represented directly in the debug info without | |
| 1003 // the need for executable machine instructions. | |
| 1004 // Monitor boxes are also represented directly. | |
| 1005 for (i = cnt - 1; i >= debug_cnt; --i) { // For all debug inputs do | |
| 1006 Node *m = n->in(i); // Get input | |
| 1007 int op = m->Opcode(); | |
| 1008 assert((op == Op_BoxLock) == jvms->is_monitor_use(i), "boxes only at monitor sites"); | |
| 163 | 1009 if( op == Op_ConI || op == Op_ConP || op == Op_ConN || |
| 0 | 1010 op == Op_ConF || op == Op_ConD || op == Op_ConL |
| 1011 // || op == Op_BoxLock // %%%% enable this and remove (+++) in chaitin.cpp | |
| 1012 ) { | |
| 1013 m = m->clone(); | |
| 222 | 1014 #ifdef ASSERT |
| 1015 _new2old_map.map(m->_idx, n); | |
| 1016 #endif | |
| 605 | 1017 mstack.push(m, Post_Visit, n, i); // Don't need to visit |
| 0 | 1018 mstack.push(m->in(0), Visit, m, 0); |
| 1019 } else { | |
| 1020 mstack.push(m, Visit, n, i); | |
| 1021 } | |
| 1022 } | |
| 1023 | |
| 1024 // And now walk his children, and convert his inputs to new-space. | |
| 1025 for( ; i >= 0; --i ) { // For all normal inputs do | |
| 1026 Node *m = n->in(i); // Get input | |
| 1027 if(m != NULL) | |
| 1028 mstack.push(m, Visit, n, i); | |
| 1029 } | |
| 1030 | |
| 1031 } | |
| 1032 else if (nstate == Post_Visit) { | |
| 1033 // Set xformed input | |
| 1034 Node *p = mstack.parent(); | |
| 1035 if (p != NULL) { // root doesn't have parent | |
| 1036 int i = (int)mstack.index(); | |
| 1037 if (i >= 0) | |
| 1038 p->set_req(i, n); // required input | |
| 1039 else if (i == -1) | |
| 1040 p->add_prec(n); // precedence input | |
| 1041 else | |
| 1042 ShouldNotReachHere(); | |
| 1043 } | |
| 1044 mstack.pop(); // remove processed node from stack | |
| 1045 } | |
| 1046 else { | |
| 1047 ShouldNotReachHere(); | |
| 1048 } | |
| 1049 } // while (mstack.is_nonempty()) | |
| 1050 return n; // Return new-space Node | |
| 1051 } | |
| 1052 | |
| 1053 //------------------------------warp_outgoing_stk_arg------------------------ | |
| 1054 OptoReg::Name Matcher::warp_outgoing_stk_arg( VMReg reg, OptoReg::Name begin_out_arg_area, OptoReg::Name &out_arg_limit_per_call ) { | |
| 1055 // Convert outgoing argument location to a pre-biased stack offset | |
| 1056 if (reg->is_stack()) { | |
| 1057 OptoReg::Name warped = reg->reg2stack(); | |
| 1058 // Adjust the stack slot offset to be the register number used | |
| 1059 // by the allocator. | |
| 1060 warped = OptoReg::add(begin_out_arg_area, warped); | |
| 1061 // Keep track of the largest numbered stack slot used for an arg. | |
| 1062 // Largest used slot per call-site indicates the amount of stack | |
| 1063 // that is killed by the call. | |
| 1064 if( warped >= out_arg_limit_per_call ) | |
| 1065 out_arg_limit_per_call = OptoReg::add(warped,1); | |
| 1066 if (!RegMask::can_represent(warped)) { | |
| 1067 C->record_method_not_compilable_all_tiers("unsupported calling sequence"); | |
| 1068 return OptoReg::Bad; | |
| 1069 } | |
| 1070 return warped; | |
| 1071 } | |
| 1072 return OptoReg::as_OptoReg(reg); | |
| 1073 } | |
| 1074 | |
| 1075 | |
| 1076 //------------------------------match_sfpt------------------------------------- | |
| 1077 // Helper function to match call instructions. Calls match special. | |
| 1078 // They match alone with no children. Their children, the incoming | |
| 1079 // arguments, match normally. | |
| 1080 MachNode *Matcher::match_sfpt( SafePointNode *sfpt ) { | |
| 1081 MachSafePointNode *msfpt = NULL; | |
| 1082 MachCallNode *mcall = NULL; | |
| 1083 uint cnt; | |
| 1084 // Split out case for SafePoint vs Call | |
| 1085 CallNode *call; | |
| 1086 const TypeTuple *domain; | |
| 1087 ciMethod* method = NULL; | |
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| 0 | 1089 if( sfpt->is_Call() ) { |
| 1090 call = sfpt->as_Call(); | |
| 1091 domain = call->tf()->domain(); | |
| 1092 cnt = domain->cnt(); | |
| 1093 | |
| 1094 // Match just the call, nothing else | |
| 1095 MachNode *m = match_tree(call); | |
| 1096 if (C->failing()) return NULL; | |
| 1097 if( m == NULL ) { Matcher::soft_match_failure(); return NULL; } | |
| 1098 | |
| 1099 // Copy data from the Ideal SafePoint to the machine version | |
| 1100 mcall = m->as_MachCall(); | |
| 1101 | |
| 1102 mcall->set_tf( call->tf()); | |
| 1103 mcall->set_entry_point(call->entry_point()); | |
| 1104 mcall->set_cnt( call->cnt()); | |
| 1105 | |
| 1106 if( mcall->is_MachCallJava() ) { | |
| 1107 MachCallJavaNode *mcall_java = mcall->as_MachCallJava(); | |
| 1108 const CallJavaNode *call_java = call->as_CallJava(); | |
| 1109 method = call_java->method(); | |
| 1110 mcall_java->_method = method; | |
| 1111 mcall_java->_bci = call_java->_bci; | |
| 1112 mcall_java->_optimized_virtual = call_java->is_optimized_virtual(); | |
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1113 is_method_handle_invoke = call_java->is_method_handle_invoke(); |
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1114 mcall_java->_method_handle_invoke = is_method_handle_invoke; |
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1115 if (is_method_handle_invoke) { |
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1116 C->set_has_method_handle_invokes(true); |
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1117 } |
| 0 | 1118 if( mcall_java->is_MachCallStaticJava() ) |
| 1119 mcall_java->as_MachCallStaticJava()->_name = | |
| 1120 call_java->as_CallStaticJava()->_name; | |
| 1121 if( mcall_java->is_MachCallDynamicJava() ) | |
| 1122 mcall_java->as_MachCallDynamicJava()->_vtable_index = | |
| 1123 call_java->as_CallDynamicJava()->_vtable_index; | |
| 1124 } | |
| 1125 else if( mcall->is_MachCallRuntime() ) { | |
| 1126 mcall->as_MachCallRuntime()->_name = call->as_CallRuntime()->_name; | |
| 1127 } | |
| 1128 msfpt = mcall; | |
| 1129 } | |
| 1130 // This is a non-call safepoint | |
| 1131 else { | |
| 1132 call = NULL; | |
| 1133 domain = NULL; | |
| 1134 MachNode *mn = match_tree(sfpt); | |
| 1135 if (C->failing()) return NULL; | |
| 1136 msfpt = mn->as_MachSafePoint(); | |
| 1137 cnt = TypeFunc::Parms; | |
| 1138 } | |
| 1139 | |
| 1140 // Advertise the correct memory effects (for anti-dependence computation). | |
| 1141 msfpt->set_adr_type(sfpt->adr_type()); | |
| 1142 | |
| 1143 // Allocate a private array of RegMasks. These RegMasks are not shared. | |
| 1144 msfpt->_in_rms = NEW_RESOURCE_ARRAY( RegMask, cnt ); | |
| 1145 // Empty them all. | |
| 1146 memset( msfpt->_in_rms, 0, sizeof(RegMask)*cnt ); | |
| 1147 | |
| 1148 // Do all the pre-defined non-Empty register masks | |
| 1149 msfpt->_in_rms[TypeFunc::ReturnAdr] = _return_addr_mask; | |
| 1150 msfpt->_in_rms[TypeFunc::FramePtr ] = c_frame_ptr_mask; | |
| 1151 | |
| 1152 // Place first outgoing argument can possibly be put. | |
| 1153 OptoReg::Name begin_out_arg_area = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
| 1154 assert( is_even(begin_out_arg_area), "" ); | |
| 1155 // Compute max outgoing register number per call site. | |
| 1156 OptoReg::Name out_arg_limit_per_call = begin_out_arg_area; | |
| 1157 // Calls to C may hammer extra stack slots above and beyond any arguments. | |
| 1158 // These are usually backing store for register arguments for varargs. | |
| 1159 if( call != NULL && call->is_CallRuntime() ) | |
| 1160 out_arg_limit_per_call = OptoReg::add(out_arg_limit_per_call,C->varargs_C_out_slots_killed()); | |
| 1161 | |
| 1162 | |
| 1163 // Do the normal argument list (parameters) register masks | |
| 1164 int argcnt = cnt - TypeFunc::Parms; | |
| 1165 if( argcnt > 0 ) { // Skip it all if we have no args | |
| 1166 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
| 1167 VMRegPair *parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
| 1168 int i; | |
| 1169 for( i = 0; i < argcnt; i++ ) { | |
| 1170 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
| 1171 } | |
| 1172 // V-call to pick proper calling convention | |
| 1173 call->calling_convention( sig_bt, parm_regs, argcnt ); | |
| 1174 | |
| 1175 #ifdef ASSERT | |
| 1176 // Sanity check users' calling convention. Really handy during | |
| 1177 // the initial porting effort. Fairly expensive otherwise. | |
| 1178 { for (int i = 0; i<argcnt; i++) { | |
| 1179 if( !parm_regs[i].first()->is_valid() && | |
| 1180 !parm_regs[i].second()->is_valid() ) continue; | |
| 1181 VMReg reg1 = parm_regs[i].first(); | |
| 1182 VMReg reg2 = parm_regs[i].second(); | |
| 1183 for (int j = 0; j < i; j++) { | |
| 1184 if( !parm_regs[j].first()->is_valid() && | |
| 1185 !parm_regs[j].second()->is_valid() ) continue; | |
| 1186 VMReg reg3 = parm_regs[j].first(); | |
| 1187 VMReg reg4 = parm_regs[j].second(); | |
| 1188 if( !reg1->is_valid() ) { | |
| 1189 assert( !reg2->is_valid(), "valid halvsies" ); | |
| 1190 } else if( !reg3->is_valid() ) { | |
| 1191 assert( !reg4->is_valid(), "valid halvsies" ); | |
| 1192 } else { | |
| 1193 assert( reg1 != reg2, "calling conv. must produce distinct regs"); | |
| 1194 assert( reg1 != reg3, "calling conv. must produce distinct regs"); | |
| 1195 assert( reg1 != reg4, "calling conv. must produce distinct regs"); | |
| 1196 assert( reg2 != reg3, "calling conv. must produce distinct regs"); | |
| 1197 assert( reg2 != reg4 || !reg2->is_valid(), "calling conv. must produce distinct regs"); | |
| 1198 assert( reg3 != reg4, "calling conv. must produce distinct regs"); | |
| 1199 } | |
| 1200 } | |
| 1201 } | |
| 1202 } | |
| 1203 #endif | |
| 1204 | |
| 1205 // Visit each argument. Compute its outgoing register mask. | |
| 1206 // Return results now can have 2 bits returned. | |
| 1207 // Compute max over all outgoing arguments both per call-site | |
| 1208 // and over the entire method. | |
| 1209 for( i = 0; i < argcnt; i++ ) { | |
| 1210 // Address of incoming argument mask to fill in | |
| 1211 RegMask *rm = &mcall->_in_rms[i+TypeFunc::Parms]; | |
| 1212 if( !parm_regs[i].first()->is_valid() && | |
| 1213 !parm_regs[i].second()->is_valid() ) { | |
| 1214 continue; // Avoid Halves | |
| 1215 } | |
| 1216 // Grab first register, adjust stack slots and insert in mask. | |
| 1217 OptoReg::Name reg1 = warp_outgoing_stk_arg(parm_regs[i].first(), begin_out_arg_area, out_arg_limit_per_call ); | |
| 1218 if (OptoReg::is_valid(reg1)) | |
| 1219 rm->Insert( reg1 ); | |
| 1220 // Grab second register (if any), adjust stack slots and insert in mask. | |
| 1221 OptoReg::Name reg2 = warp_outgoing_stk_arg(parm_regs[i].second(), begin_out_arg_area, out_arg_limit_per_call ); | |
| 1222 if (OptoReg::is_valid(reg2)) | |
| 1223 rm->Insert( reg2 ); | |
| 1224 } // End of for all arguments | |
| 1225 | |
| 1226 // Compute number of stack slots needed to restore stack in case of | |
| 1227 // Pascal-style argument popping. | |
| 1228 mcall->_argsize = out_arg_limit_per_call - begin_out_arg_area; | |
| 1229 } | |
| 1230 | |
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1231 if (is_method_handle_invoke) { |
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1232 // Kill some extra stack space in case method handles want to do |
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1233 // a little in-place argument insertion. |
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1234 int regs_per_word = NOT_LP64(1) LP64_ONLY(2); // %%% make a global const! |
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1235 out_arg_limit_per_call += MethodHandlePushLimit * regs_per_word; |
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1236 // Do not update mcall->_argsize because (a) the extra space is not |
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1237 // pushed as arguments and (b) _argsize is dead (not used anywhere). |
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1238 } |
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1239 |
| 0 | 1240 // Compute the max stack slot killed by any call. These will not be |
| 1241 // available for debug info, and will be used to adjust FIRST_STACK_mask | |
| 1242 // after all call sites have been visited. | |
| 1243 if( _out_arg_limit < out_arg_limit_per_call) | |
| 1244 _out_arg_limit = out_arg_limit_per_call; | |
| 1245 | |
| 1246 if (mcall) { | |
| 1247 // Kill the outgoing argument area, including any non-argument holes and | |
| 1248 // any legacy C-killed slots. Use Fat-Projections to do the killing. | |
| 1249 // Since the max-per-method covers the max-per-call-site and debug info | |
| 1250 // is excluded on the max-per-method basis, debug info cannot land in | |
| 1251 // this killed area. | |
| 1252 uint r_cnt = mcall->tf()->range()->cnt(); | |
| 1253 MachProjNode *proj = new (C, 1) MachProjNode( mcall, r_cnt+10000, RegMask::Empty, MachProjNode::fat_proj ); | |
| 1254 if (!RegMask::can_represent(OptoReg::Name(out_arg_limit_per_call-1))) { | |
| 1255 C->record_method_not_compilable_all_tiers("unsupported outgoing calling sequence"); | |
| 1256 } else { | |
| 1257 for (int i = begin_out_arg_area; i < out_arg_limit_per_call; i++) | |
| 1258 proj->_rout.Insert(OptoReg::Name(i)); | |
| 1259 } | |
| 1260 if( proj->_rout.is_NotEmpty() ) | |
| 1261 _proj_list.push(proj); | |
| 1262 } | |
| 1263 // Transfer the safepoint information from the call to the mcall | |
| 1264 // Move the JVMState list | |
| 1265 msfpt->set_jvms(sfpt->jvms()); | |
| 1266 for (JVMState* jvms = msfpt->jvms(); jvms; jvms = jvms->caller()) { | |
| 1267 jvms->set_map(sfpt); | |
| 1268 } | |
| 1269 | |
| 1270 // Debug inputs begin just after the last incoming parameter | |
| 1271 assert( (mcall == NULL) || (mcall->jvms() == NULL) || | |
| 1272 (mcall->jvms()->debug_start() + mcall->_jvmadj == mcall->tf()->domain()->cnt()), "" ); | |
| 1273 | |
| 1274 // Move the OopMap | |
| 1275 msfpt->_oop_map = sfpt->_oop_map; | |
| 1276 | |
| 1277 // Registers killed by the call are set in the local scheduling pass | |
| 1278 // of Global Code Motion. | |
| 1279 return msfpt; | |
| 1280 } | |
| 1281 | |
| 1282 //---------------------------match_tree---------------------------------------- | |
| 1283 // Match a Ideal Node DAG - turn it into a tree; Label & Reduce. Used as part | |
| 1284 // of the whole-sale conversion from Ideal to Mach Nodes. Also used for | |
| 1285 // making GotoNodes while building the CFG and in init_spill_mask() to identify | |
| 1286 // a Load's result RegMask for memoization in idealreg2regmask[] | |
| 1287 MachNode *Matcher::match_tree( const Node *n ) { | |
| 1288 assert( n->Opcode() != Op_Phi, "cannot match" ); | |
| 1289 assert( !n->is_block_start(), "cannot match" ); | |
| 1290 // Set the mark for all locally allocated State objects. | |
| 1291 // When this call returns, the _states_arena arena will be reset | |
| 1292 // freeing all State objects. | |
| 1293 ResourceMark rm( &_states_arena ); | |
| 1294 | |
| 1295 LabelRootDepth = 0; | |
| 1296 | |
| 1297 // StoreNodes require their Memory input to match any LoadNodes | |
| 1298 Node *mem = n->is_Store() ? n->in(MemNode::Memory) : (Node*)1 ; | |
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1299 #ifdef ASSERT |
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1300 Node* save_mem_node = _mem_node; |
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1301 _mem_node = n->is_Store() ? (Node*)n : NULL; |
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1302 #endif |
| 0 | 1303 // State object for root node of match tree |
| 1304 // Allocate it on _states_arena - stack allocation can cause stack overflow. | |
| 1305 State *s = new (&_states_arena) State; | |
| 1306 s->_kids[0] = NULL; | |
| 1307 s->_kids[1] = NULL; | |
| 1308 s->_leaf = (Node*)n; | |
| 1309 // Label the input tree, allocating labels from top-level arena | |
| 1310 Label_Root( n, s, n->in(0), mem ); | |
| 1311 if (C->failing()) return NULL; | |
| 1312 | |
| 1313 // The minimum cost match for the whole tree is found at the root State | |
| 1314 uint mincost = max_juint; | |
| 1315 uint cost = max_juint; | |
| 1316 uint i; | |
| 1317 for( i = 0; i < NUM_OPERANDS; i++ ) { | |
| 1318 if( s->valid(i) && // valid entry and | |
| 1319 s->_cost[i] < cost && // low cost and | |
| 1320 s->_rule[i] >= NUM_OPERANDS ) // not an operand | |
| 1321 cost = s->_cost[mincost=i]; | |
| 1322 } | |
| 1323 if (mincost == max_juint) { | |
| 1324 #ifndef PRODUCT | |
| 1325 tty->print("No matching rule for:"); | |
| 1326 s->dump(); | |
| 1327 #endif | |
| 1328 Matcher::soft_match_failure(); | |
| 1329 return NULL; | |
| 1330 } | |
| 1331 // Reduce input tree based upon the state labels to machine Nodes | |
| 1332 MachNode *m = ReduceInst( s, s->_rule[mincost], mem ); | |
| 1333 #ifdef ASSERT | |
| 1334 _old2new_map.map(n->_idx, m); | |
| 222 | 1335 _new2old_map.map(m->_idx, (Node*)n); |
| 0 | 1336 #endif |
| 1337 | |
| 1338 // Add any Matcher-ignored edges | |
| 1339 uint cnt = n->req(); | |
| 1340 uint start = 1; | |
| 1341 if( mem != (Node*)1 ) start = MemNode::Memory+1; | |
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1342 if( n->is_AddP() ) { |
| 0 | 1343 assert( mem == (Node*)1, "" ); |
| 1344 start = AddPNode::Base+1; | |
| 1345 } | |
| 1346 for( i = start; i < cnt; i++ ) { | |
| 1347 if( !n->match_edge(i) ) { | |
| 1348 if( i < m->req() ) | |
| 1349 m->ins_req( i, n->in(i) ); | |
| 1350 else | |
| 1351 m->add_req( n->in(i) ); | |
| 1352 } | |
| 1353 } | |
| 1354 | |
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1355 debug_only( _mem_node = save_mem_node; ) |
| 0 | 1356 return m; |
| 1357 } | |
| 1358 | |
| 1359 | |
| 1360 //------------------------------match_into_reg--------------------------------- | |
| 1361 // Choose to either match this Node in a register or part of the current | |
| 1362 // match tree. Return true for requiring a register and false for matching | |
| 1363 // as part of the current match tree. | |
| 1364 static bool match_into_reg( const Node *n, Node *m, Node *control, int i, bool shared ) { | |
| 1365 | |
| 1366 const Type *t = m->bottom_type(); | |
| 1367 | |
| 1368 if( t->singleton() ) { | |
| 1369 // Never force constants into registers. Allow them to match as | |
| 1370 // constants or registers. Copies of the same value will share | |
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1371 // the same register. See find_shared_node. |
| 0 | 1372 return false; |
| 1373 } else { // Not a constant | |
| 1374 // Stop recursion if they have different Controls. | |
| 1375 // Slot 0 of constants is not really a Control. | |
| 1376 if( control && m->in(0) && control != m->in(0) ) { | |
| 1377 | |
| 1378 // Actually, we can live with the most conservative control we | |
| 1379 // find, if it post-dominates the others. This allows us to | |
| 1380 // pick up load/op/store trees where the load can float a little | |
| 1381 // above the store. | |
| 1382 Node *x = control; | |
| 1383 const uint max_scan = 6; // Arbitrary scan cutoff | |
| 1384 uint j; | |
| 1385 for( j=0; j<max_scan; j++ ) { | |
| 1386 if( x->is_Region() ) // Bail out at merge points | |
| 1387 return true; | |
| 1388 x = x->in(0); | |
| 1389 if( x == m->in(0) ) // Does 'control' post-dominate | |
| 1390 break; // m->in(0)? If so, we can use it | |
| 1391 } | |
| 1392 if( j == max_scan ) // No post-domination before scan end? | |
| 1393 return true; // Then break the match tree up | |
| 1394 } | |
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1395 if (m->is_DecodeN() && Matcher::narrow_oop_use_complex_address()) { |
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1396 // These are commonly used in address expressions and can |
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1397 // efficiently fold into them on X64 in some cases. |
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1398 return false; |
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1399 } |
| 0 | 1400 } |
| 1401 | |
| 605 | 1402 // Not forceable cloning. If shared, put it into a register. |
| 0 | 1403 return shared; |
| 1404 } | |
| 1405 | |
| 1406 | |
| 1407 //------------------------------Instruction Selection-------------------------- | |
| 1408 // Label method walks a "tree" of nodes, using the ADLC generated DFA to match | |
| 1409 // ideal nodes to machine instructions. Trees are delimited by shared Nodes, | |
| 1410 // things the Matcher does not match (e.g., Memory), and things with different | |
| 1411 // Controls (hence forced into different blocks). We pass in the Control | |
| 1412 // selected for this entire State tree. | |
| 1413 | |
| 1414 // The Matcher works on Trees, but an Intel add-to-memory requires a DAG: the | |
| 1415 // Store and the Load must have identical Memories (as well as identical | |
| 1416 // pointers). Since the Matcher does not have anything for Memory (and | |
| 1417 // does not handle DAGs), I have to match the Memory input myself. If the | |
| 1418 // Tree root is a Store, I require all Loads to have the identical memory. | |
| 1419 Node *Matcher::Label_Root( const Node *n, State *svec, Node *control, const Node *mem){ | |
| 1420 // Since Label_Root is a recursive function, its possible that we might run | |
| 1421 // out of stack space. See bugs 6272980 & 6227033 for more info. | |
| 1422 LabelRootDepth++; | |
| 1423 if (LabelRootDepth > MaxLabelRootDepth) { | |
| 1424 C->record_method_not_compilable_all_tiers("Out of stack space, increase MaxLabelRootDepth"); | |
| 1425 return NULL; | |
| 1426 } | |
| 1427 uint care = 0; // Edges matcher cares about | |
| 1428 uint cnt = n->req(); | |
| 1429 uint i = 0; | |
| 1430 | |
| 1431 // Examine children for memory state | |
| 1432 // Can only subsume a child into your match-tree if that child's memory state | |
| 1433 // is not modified along the path to another input. | |
| 1434 // It is unsafe even if the other inputs are separate roots. | |
| 1435 Node *input_mem = NULL; | |
| 1436 for( i = 1; i < cnt; i++ ) { | |
| 1437 if( !n->match_edge(i) ) continue; | |
| 1438 Node *m = n->in(i); // Get ith input | |
| 1439 assert( m, "expect non-null children" ); | |
| 1440 if( m->is_Load() ) { | |
| 1441 if( input_mem == NULL ) { | |
| 1442 input_mem = m->in(MemNode::Memory); | |
| 1443 } else if( input_mem != m->in(MemNode::Memory) ) { | |
| 1444 input_mem = NodeSentinel; | |
| 1445 } | |
| 1446 } | |
| 1447 } | |
| 1448 | |
| 1449 for( i = 1; i < cnt; i++ ){// For my children | |
| 1450 if( !n->match_edge(i) ) continue; | |
| 1451 Node *m = n->in(i); // Get ith input | |
| 1452 // Allocate states out of a private arena | |
| 1453 State *s = new (&_states_arena) State; | |
| 1454 svec->_kids[care++] = s; | |
| 1455 assert( care <= 2, "binary only for now" ); | |
| 1456 | |
| 1457 // Recursively label the State tree. | |
| 1458 s->_kids[0] = NULL; | |
| 1459 s->_kids[1] = NULL; | |
| 1460 s->_leaf = m; | |
| 1461 | |
| 1462 // Check for leaves of the State Tree; things that cannot be a part of | |
| 1463 // the current tree. If it finds any, that value is matched as a | |
| 1464 // register operand. If not, then the normal matching is used. | |
| 1465 if( match_into_reg(n, m, control, i, is_shared(m)) || | |
| 1466 // | |
| 1467 // Stop recursion if this is LoadNode and the root of this tree is a | |
| 1468 // StoreNode and the load & store have different memories. | |
| 1469 ((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) || | |
| 1470 // Can NOT include the match of a subtree when its memory state | |
| 1471 // is used by any of the other subtrees | |
| 1472 (input_mem == NodeSentinel) ) { | |
| 1473 #ifndef PRODUCT | |
| 1474 // Print when we exclude matching due to different memory states at input-loads | |
| 1475 if( PrintOpto && (Verbose && WizardMode) && (input_mem == NodeSentinel) | |
| 1476 && !((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) ) { | |
| 1477 tty->print_cr("invalid input_mem"); | |
| 1478 } | |
| 1479 #endif | |
| 1480 // Switch to a register-only opcode; this value must be in a register | |
| 1481 // and cannot be subsumed as part of a larger instruction. | |
| 1482 s->DFA( m->ideal_reg(), m ); | |
| 1483 | |
| 1484 } else { | |
| 1485 // If match tree has no control and we do, adopt it for entire tree | |
| 1486 if( control == NULL && m->in(0) != NULL && m->req() > 1 ) | |
| 1487 control = m->in(0); // Pick up control | |
| 1488 // Else match as a normal part of the match tree. | |
| 1489 control = Label_Root(m,s,control,mem); | |
| 1490 if (C->failing()) return NULL; | |
| 1491 } | |
| 1492 } | |
| 1493 | |
| 1494 | |
| 1495 // Call DFA to match this node, and return | |
| 1496 svec->DFA( n->Opcode(), n ); | |
| 1497 | |
| 1498 #ifdef ASSERT | |
| 1499 uint x; | |
| 1500 for( x = 0; x < _LAST_MACH_OPER; x++ ) | |
| 1501 if( svec->valid(x) ) | |
| 1502 break; | |
| 1503 | |
| 1504 if (x >= _LAST_MACH_OPER) { | |
| 1505 n->dump(); | |
| 1506 svec->dump(); | |
| 1507 assert( false, "bad AD file" ); | |
| 1508 } | |
| 1509 #endif | |
| 1510 return control; | |
| 1511 } | |
| 1512 | |
| 1513 | |
| 1514 // Con nodes reduced using the same rule can share their MachNode | |
| 1515 // which reduces the number of copies of a constant in the final | |
| 1516 // program. The register allocator is free to split uses later to | |
| 1517 // split live ranges. | |
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1518 MachNode* Matcher::find_shared_node(Node* leaf, uint rule) { |
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1519 if (!leaf->is_Con() && !leaf->is_DecodeN()) return NULL; |
| 0 | 1520 |
| 1521 // See if this Con has already been reduced using this rule. | |
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1522 if (_shared_nodes.Size() <= leaf->_idx) return NULL; |
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1523 MachNode* last = (MachNode*)_shared_nodes.at(leaf->_idx); |
| 0 | 1524 if (last != NULL && rule == last->rule()) { |
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1525 // Don't expect control change for DecodeN |
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1526 if (leaf->is_DecodeN()) |
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1527 return last; |
| 0 | 1528 // Get the new space root. |
| 1529 Node* xroot = new_node(C->root()); | |
| 1530 if (xroot == NULL) { | |
| 1531 // This shouldn't happen give the order of matching. | |
| 1532 return NULL; | |
| 1533 } | |
| 1534 | |
| 1535 // Shared constants need to have their control be root so they | |
| 1536 // can be scheduled properly. | |
| 1537 Node* control = last->in(0); | |
| 1538 if (control != xroot) { | |
| 1539 if (control == NULL || control == C->root()) { | |
| 1540 last->set_req(0, xroot); | |
| 1541 } else { | |
| 1542 assert(false, "unexpected control"); | |
| 1543 return NULL; | |
| 1544 } | |
| 1545 } | |
| 1546 return last; | |
| 1547 } | |
| 1548 return NULL; | |
| 1549 } | |
| 1550 | |
| 1551 | |
| 1552 //------------------------------ReduceInst------------------------------------- | |
| 1553 // Reduce a State tree (with given Control) into a tree of MachNodes. | |
| 1554 // This routine (and it's cohort ReduceOper) convert Ideal Nodes into | |
| 1555 // complicated machine Nodes. Each MachNode covers some tree of Ideal Nodes. | |
| 1556 // Each MachNode has a number of complicated MachOper operands; each | |
| 1557 // MachOper also covers a further tree of Ideal Nodes. | |
| 1558 | |
| 1559 // The root of the Ideal match tree is always an instruction, so we enter | |
| 1560 // the recursion here. After building the MachNode, we need to recurse | |
| 1561 // the tree checking for these cases: | |
| 1562 // (1) Child is an instruction - | |
| 1563 // Build the instruction (recursively), add it as an edge. | |
| 1564 // Build a simple operand (register) to hold the result of the instruction. | |
| 1565 // (2) Child is an interior part of an instruction - | |
| 1566 // Skip over it (do nothing) | |
| 1567 // (3) Child is the start of a operand - | |
| 1568 // Build the operand, place it inside the instruction | |
| 1569 // Call ReduceOper. | |
| 1570 MachNode *Matcher::ReduceInst( State *s, int rule, Node *&mem ) { | |
| 1571 assert( rule >= NUM_OPERANDS, "called with operand rule" ); | |
| 1572 | |
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1573 MachNode* shared_node = find_shared_node(s->_leaf, rule); |
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1574 if (shared_node != NULL) { |
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1575 return shared_node; |
| 0 | 1576 } |
| 1577 | |
| 1578 // Build the object to represent this state & prepare for recursive calls | |
| 1579 MachNode *mach = s->MachNodeGenerator( rule, C ); | |
| 1580 mach->_opnds[0] = s->MachOperGenerator( _reduceOp[rule], C ); | |
| 1581 assert( mach->_opnds[0] != NULL, "Missing result operand" ); | |
| 1582 Node *leaf = s->_leaf; | |
| 1583 // Check for instruction or instruction chain rule | |
| 1584 if( rule >= _END_INST_CHAIN_RULE || rule < _BEGIN_INST_CHAIN_RULE ) { | |
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1585 assert(C->node_arena()->contains(s->_leaf) || !has_new_node(s->_leaf), |
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1586 "duplicating node that's already been matched"); |
| 0 | 1587 // Instruction |
| 1588 mach->add_req( leaf->in(0) ); // Set initial control | |
| 1589 // Reduce interior of complex instruction | |
| 1590 ReduceInst_Interior( s, rule, mem, mach, 1 ); | |
| 1591 } else { | |
| 1592 // Instruction chain rules are data-dependent on their inputs | |
| 1593 mach->add_req(0); // Set initial control to none | |
| 1594 ReduceInst_Chain_Rule( s, rule, mem, mach ); | |
| 1595 } | |
| 1596 | |
| 1597 // If a Memory was used, insert a Memory edge | |
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1598 if( mem != (Node*)1 ) { |
| 0 | 1599 mach->ins_req(MemNode::Memory,mem); |
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1600 #ifdef ASSERT |
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1601 // Verify adr type after matching memory operation |
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1602 const MachOper* oper = mach->memory_operand(); |
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1603 if (oper != NULL && oper != (MachOper*)-1) { |
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1604 // It has a unique memory operand. Find corresponding ideal mem node. |
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1605 Node* m = NULL; |
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1606 if (leaf->is_Mem()) { |
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1607 m = leaf; |
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1608 } else { |
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1609 m = _mem_node; |
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1610 assert(m != NULL && m->is_Mem(), "expecting memory node"); |
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1611 } |
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1612 const Type* mach_at = mach->adr_type(); |
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1613 // DecodeN node consumed by an address may have different type |
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1614 // then its input. Don't compare types for such case. |
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1615 if (m->adr_type() != mach_at && |
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1616 (m->in(MemNode::Address)->is_DecodeN() || |
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1617 m->in(MemNode::Address)->is_AddP() && |
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1618 m->in(MemNode::Address)->in(AddPNode::Address)->is_DecodeN() || |
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1619 m->in(MemNode::Address)->is_AddP() && |
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1620 m->in(MemNode::Address)->in(AddPNode::Address)->is_AddP() && |
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1621 m->in(MemNode::Address)->in(AddPNode::Address)->in(AddPNode::Address)->is_DecodeN())) { |
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1622 mach_at = m->adr_type(); |
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1623 } |
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1624 if (m->adr_type() != mach_at) { |
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1625 m->dump(); |
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1626 tty->print_cr("mach:"); |
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1627 mach->dump(1); |
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1628 } |
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1629 assert(m->adr_type() == mach_at, "matcher should not change adr type"); |
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1630 } |
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1631 #endif |
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1632 } |
| 0 | 1633 |
| 1634 // If the _leaf is an AddP, insert the base edge | |
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1635 if( leaf->is_AddP() ) |
| 0 | 1636 mach->ins_req(AddPNode::Base,leaf->in(AddPNode::Base)); |
| 1637 | |
| 1638 uint num_proj = _proj_list.size(); | |
| 1639 | |
| 1640 // Perform any 1-to-many expansions required | |
| 1203 | 1641 MachNode *ex = mach->Expand(s,_proj_list, mem); |
| 0 | 1642 if( ex != mach ) { |
| 1643 assert(ex->ideal_reg() == mach->ideal_reg(), "ideal types should match"); | |
| 1644 if( ex->in(1)->is_Con() ) | |
| 1645 ex->in(1)->set_req(0, C->root()); | |
| 1646 // Remove old node from the graph | |
| 1647 for( uint i=0; i<mach->req(); i++ ) { | |
| 1648 mach->set_req(i,NULL); | |
| 1649 } | |
| 222 | 1650 #ifdef ASSERT |
| 1651 _new2old_map.map(ex->_idx, s->_leaf); | |
| 1652 #endif | |
| 0 | 1653 } |
| 1654 | |
| 1655 // PhaseChaitin::fixup_spills will sometimes generate spill code | |
| 1656 // via the matcher. By the time, nodes have been wired into the CFG, | |
| 1657 // and any further nodes generated by expand rules will be left hanging | |
| 1658 // in space, and will not get emitted as output code. Catch this. | |
| 1659 // Also, catch any new register allocation constraints ("projections") | |
| 1660 // generated belatedly during spill code generation. | |
| 1661 if (_allocation_started) { | |
| 1662 guarantee(ex == mach, "no expand rules during spill generation"); | |
| 1663 guarantee(_proj_list.size() == num_proj, "no allocation during spill generation"); | |
| 1664 } | |
| 1665 | |
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1666 if (leaf->is_Con() || leaf->is_DecodeN()) { |
| 0 | 1667 // Record the con for sharing |
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1668 _shared_nodes.map(leaf->_idx, ex); |
| 0 | 1669 } |
| 1670 | |
| 1671 return ex; | |
| 1672 } | |
| 1673 | |
| 1674 void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) { | |
| 1675 // 'op' is what I am expecting to receive | |
| 1676 int op = _leftOp[rule]; | |
| 1677 // Operand type to catch childs result | |
| 1678 // This is what my child will give me. | |
| 1679 int opnd_class_instance = s->_rule[op]; | |
| 1680 // Choose between operand class or not. | |
| 605 | 1681 // This is what I will receive. |
| 0 | 1682 int catch_op = (FIRST_OPERAND_CLASS <= op && op < NUM_OPERANDS) ? opnd_class_instance : op; |
| 1683 // New rule for child. Chase operand classes to get the actual rule. | |
| 1684 int newrule = s->_rule[catch_op]; | |
| 1685 | |
| 1686 if( newrule < NUM_OPERANDS ) { | |
| 1687 // Chain from operand or operand class, may be output of shared node | |
| 1688 assert( 0 <= opnd_class_instance && opnd_class_instance < NUM_OPERANDS, | |
| 1689 "Bad AD file: Instruction chain rule must chain from operand"); | |
| 1690 // Insert operand into array of operands for this instruction | |
| 1691 mach->_opnds[1] = s->MachOperGenerator( opnd_class_instance, C ); | |
| 1692 | |
| 1693 ReduceOper( s, newrule, mem, mach ); | |
| 1694 } else { | |
| 1695 // Chain from the result of an instruction | |
| 1696 assert( newrule >= _LAST_MACH_OPER, "Do NOT chain from internal operand"); | |
| 1697 mach->_opnds[1] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
| 1698 Node *mem1 = (Node*)1; | |
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1699 debug_only(Node *save_mem_node = _mem_node;) |
| 0 | 1700 mach->add_req( ReduceInst(s, newrule, mem1) ); |
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1701 debug_only(_mem_node = save_mem_node;) |
| 0 | 1702 } |
| 1703 return; | |
| 1704 } | |
| 1705 | |
| 1706 | |
| 1707 uint Matcher::ReduceInst_Interior( State *s, int rule, Node *&mem, MachNode *mach, uint num_opnds ) { | |
| 1708 if( s->_leaf->is_Load() ) { | |
| 1709 Node *mem2 = s->_leaf->in(MemNode::Memory); | |
| 1710 assert( mem == (Node*)1 || mem == mem2, "multiple Memories being matched at once?" ); | |
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1711 debug_only( if( mem == (Node*)1 ) _mem_node = s->_leaf;) |
| 0 | 1712 mem = mem2; |
| 1713 } | |
| 1714 if( s->_leaf->in(0) != NULL && s->_leaf->req() > 1) { | |
| 1715 if( mach->in(0) == NULL ) | |
| 1716 mach->set_req(0, s->_leaf->in(0)); | |
| 1717 } | |
| 1718 | |
| 1719 // Now recursively walk the state tree & add operand list. | |
| 1720 for( uint i=0; i<2; i++ ) { // binary tree | |
| 1721 State *newstate = s->_kids[i]; | |
| 1722 if( newstate == NULL ) break; // Might only have 1 child | |
| 1723 // 'op' is what I am expecting to receive | |
| 1724 int op; | |
| 1725 if( i == 0 ) { | |
| 1726 op = _leftOp[rule]; | |
| 1727 } else { | |
| 1728 op = _rightOp[rule]; | |
| 1729 } | |
| 1730 // Operand type to catch childs result | |
| 1731 // This is what my child will give me. | |
| 1732 int opnd_class_instance = newstate->_rule[op]; | |
| 1733 // Choose between operand class or not. | |
| 1734 // This is what I will receive. | |
| 1735 int catch_op = (op >= FIRST_OPERAND_CLASS && op < NUM_OPERANDS) ? opnd_class_instance : op; | |
| 1736 // New rule for child. Chase operand classes to get the actual rule. | |
| 1737 int newrule = newstate->_rule[catch_op]; | |
| 1738 | |
| 1739 if( newrule < NUM_OPERANDS ) { // Operand/operandClass or internalOp/instruction? | |
| 1740 // Operand/operandClass | |
| 1741 // Insert operand into array of operands for this instruction | |
| 1742 mach->_opnds[num_opnds++] = newstate->MachOperGenerator( opnd_class_instance, C ); | |
| 1743 ReduceOper( newstate, newrule, mem, mach ); | |
| 1744 | |
| 1745 } else { // Child is internal operand or new instruction | |
| 1746 if( newrule < _LAST_MACH_OPER ) { // internal operand or instruction? | |
| 1747 // internal operand --> call ReduceInst_Interior | |
| 1748 // Interior of complex instruction. Do nothing but recurse. | |
| 1749 num_opnds = ReduceInst_Interior( newstate, newrule, mem, mach, num_opnds ); | |
| 1750 } else { | |
| 1751 // instruction --> call build operand( ) to catch result | |
| 1752 // --> ReduceInst( newrule ) | |
| 1753 mach->_opnds[num_opnds++] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
| 1754 Node *mem1 = (Node*)1; | |
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1755 debug_only(Node *save_mem_node = _mem_node;) |
| 0 | 1756 mach->add_req( ReduceInst( newstate, newrule, mem1 ) ); |
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1757 debug_only(_mem_node = save_mem_node;) |
| 0 | 1758 } |
| 1759 } | |
| 1760 assert( mach->_opnds[num_opnds-1], "" ); | |
| 1761 } | |
| 1762 return num_opnds; | |
| 1763 } | |
| 1764 | |
| 1765 // This routine walks the interior of possible complex operands. | |
| 1766 // At each point we check our children in the match tree: | |
| 1767 // (1) No children - | |
| 1768 // We are a leaf; add _leaf field as an input to the MachNode | |
| 1769 // (2) Child is an internal operand - | |
| 1770 // Skip over it ( do nothing ) | |
| 1771 // (3) Child is an instruction - | |
| 1772 // Call ReduceInst recursively and | |
| 1773 // and instruction as an input to the MachNode | |
| 1774 void Matcher::ReduceOper( State *s, int rule, Node *&mem, MachNode *mach ) { | |
| 1775 assert( rule < _LAST_MACH_OPER, "called with operand rule" ); | |
| 1776 State *kid = s->_kids[0]; | |
| 1777 assert( kid == NULL || s->_leaf->in(0) == NULL, "internal operands have no control" ); | |
| 1778 | |
| 1779 // Leaf? And not subsumed? | |
| 1780 if( kid == NULL && !_swallowed[rule] ) { | |
| 1781 mach->add_req( s->_leaf ); // Add leaf pointer | |
| 1782 return; // Bail out | |
| 1783 } | |
| 1784 | |
| 1785 if( s->_leaf->is_Load() ) { | |
| 1786 assert( mem == (Node*)1, "multiple Memories being matched at once?" ); | |
| 1787 mem = s->_leaf->in(MemNode::Memory); | |
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1788 debug_only(_mem_node = s->_leaf;) |
| 0 | 1789 } |
| 1790 if( s->_leaf->in(0) && s->_leaf->req() > 1) { | |
| 1791 if( !mach->in(0) ) | |
| 1792 mach->set_req(0,s->_leaf->in(0)); | |
| 1793 else { | |
| 1794 assert( s->_leaf->in(0) == mach->in(0), "same instruction, differing controls?" ); | |
| 1795 } | |
| 1796 } | |
| 1797 | |
| 1798 for( uint i=0; kid != NULL && i<2; kid = s->_kids[1], i++ ) { // binary tree | |
| 1799 int newrule; | |
| 1800 if( i == 0 ) | |
| 1801 newrule = kid->_rule[_leftOp[rule]]; | |
| 1802 else | |
| 1803 newrule = kid->_rule[_rightOp[rule]]; | |
| 1804 | |
| 1805 if( newrule < _LAST_MACH_OPER ) { // Operand or instruction? | |
| 1806 // Internal operand; recurse but do nothing else | |
| 1807 ReduceOper( kid, newrule, mem, mach ); | |
| 1808 | |
| 1809 } else { // Child is a new instruction | |
| 1810 // Reduce the instruction, and add a direct pointer from this | |
| 1811 // machine instruction to the newly reduced one. | |
| 1812 Node *mem1 = (Node*)1; | |
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1813 debug_only(Node *save_mem_node = _mem_node;) |
| 0 | 1814 mach->add_req( ReduceInst( kid, newrule, mem1 ) ); |
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1815 debug_only(_mem_node = save_mem_node;) |
| 0 | 1816 } |
| 1817 } | |
| 1818 } | |
| 1819 | |
| 1820 | |
| 1821 // ------------------------------------------------------------------------- | |
| 1822 // Java-Java calling convention | |
| 1823 // (what you use when Java calls Java) | |
| 1824 | |
| 1825 //------------------------------find_receiver---------------------------------- | |
| 1826 // For a given signature, return the OptoReg for parameter 0. | |
| 1827 OptoReg::Name Matcher::find_receiver( bool is_outgoing ) { | |
| 1828 VMRegPair regs; | |
| 1829 BasicType sig_bt = T_OBJECT; | |
| 1830 calling_convention(&sig_bt, ®s, 1, is_outgoing); | |
| 1831 // Return argument 0 register. In the LP64 build pointers | |
| 1832 // take 2 registers, but the VM wants only the 'main' name. | |
| 1833 return OptoReg::as_OptoReg(regs.first()); | |
| 1834 } | |
| 1835 | |
| 1836 // A method-klass-holder may be passed in the inline_cache_reg | |
| 1837 // and then expanded into the inline_cache_reg and a method_oop register | |
| 1838 // defined in ad_<arch>.cpp | |
| 1839 | |
| 1840 | |
| 1841 //------------------------------find_shared------------------------------------ | |
| 1842 // Set bits if Node is shared or otherwise a root | |
| 1843 void Matcher::find_shared( Node *n ) { | |
| 1844 // Allocate stack of size C->unique() * 2 to avoid frequent realloc | |
| 1845 MStack mstack(C->unique() * 2); | |
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1846 // Mark nodes as address_visited if they are inputs to an address expression |
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1847 VectorSet address_visited(Thread::current()->resource_area()); |
| 0 | 1848 mstack.push(n, Visit); // Don't need to pre-visit root node |
| 1849 while (mstack.is_nonempty()) { | |
| 1850 n = mstack.node(); // Leave node on stack | |
| 1851 Node_State nstate = mstack.state(); | |
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1852 uint nop = n->Opcode(); |
| 0 | 1853 if (nstate == Pre_Visit) { |
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1854 if (address_visited.test(n->_idx)) { // Visited in address already? |
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1855 // Flag as visited and shared now. |
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1856 set_visited(n); |
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1857 } |
| 0 | 1858 if (is_visited(n)) { // Visited already? |
| 1859 // Node is shared and has no reason to clone. Flag it as shared. | |
| 1860 // This causes it to match into a register for the sharing. | |
| 1861 set_shared(n); // Flag as shared and | |
| 1862 mstack.pop(); // remove node from stack | |
| 1863 continue; | |
| 1864 } | |
| 1865 nstate = Visit; // Not already visited; so visit now | |
| 1866 } | |
| 1867 if (nstate == Visit) { | |
| 1868 mstack.set_state(Post_Visit); | |
| 1869 set_visited(n); // Flag as visited now | |
| 1870 bool mem_op = false; | |
| 1871 | |
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1872 switch( nop ) { // Handle some opcodes special |
| 0 | 1873 case Op_Phi: // Treat Phis as shared roots |
| 1874 case Op_Parm: | |
| 1875 case Op_Proj: // All handled specially during matching | |
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1876 case Op_SafePointScalarObject: |
| 0 | 1877 set_shared(n); |
| 1878 set_dontcare(n); | |
| 1879 break; | |
| 1880 case Op_If: | |
| 1881 case Op_CountedLoopEnd: | |
| 1882 mstack.set_state(Alt_Post_Visit); // Alternative way | |
| 1883 // Convert (If (Bool (CmpX A B))) into (If (Bool) (CmpX A B)). Helps | |
| 1884 // with matching cmp/branch in 1 instruction. The Matcher needs the | |
| 1885 // Bool and CmpX side-by-side, because it can only get at constants | |
| 1886 // that are at the leaves of Match trees, and the Bool's condition acts | |
| 1887 // as a constant here. | |
| 1888 mstack.push(n->in(1), Visit); // Clone the Bool | |
| 1889 mstack.push(n->in(0), Pre_Visit); // Visit control input | |
| 1890 continue; // while (mstack.is_nonempty()) | |
| 1891 case Op_ConvI2D: // These forms efficiently match with a prior | |
| 1892 case Op_ConvI2F: // Load but not a following Store | |
| 1893 if( n->in(1)->is_Load() && // Prior load | |
| 1894 n->outcnt() == 1 && // Not already shared | |
| 1895 n->unique_out()->is_Store() ) // Following store | |
| 1896 set_shared(n); // Force it to be a root | |
| 1897 break; | |
| 1898 case Op_ReverseBytesI: | |
| 1899 case Op_ReverseBytesL: | |
| 1900 if( n->in(1)->is_Load() && // Prior load | |
| 1901 n->outcnt() == 1 ) // Not already shared | |
| 1902 set_shared(n); // Force it to be a root | |
| 1903 break; | |
| 1904 case Op_BoxLock: // Cant match until we get stack-regs in ADLC | |
| 1905 case Op_IfFalse: | |
| 1906 case Op_IfTrue: | |
| 1907 case Op_MachProj: | |
| 1908 case Op_MergeMem: | |
| 1909 case Op_Catch: | |
| 1910 case Op_CatchProj: | |
| 1911 case Op_CProj: | |
| 1912 case Op_JumpProj: | |
| 1913 case Op_JProj: | |
| 1914 case Op_NeverBranch: | |
| 1915 set_dontcare(n); | |
| 1916 break; | |
| 1917 case Op_Jump: | |
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1918 mstack.push(n->in(1), Pre_Visit); // Switch Value (could be shared) |
| 0 | 1919 mstack.push(n->in(0), Pre_Visit); // Visit Control input |
| 1920 continue; // while (mstack.is_nonempty()) | |
| 1921 case Op_StrComp: | |
| 681 | 1922 case Op_StrEquals: |
| 1923 case Op_StrIndexOf: | |
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1924 case Op_AryEq: |
| 0 | 1925 set_shared(n); // Force result into register (it will be anyways) |
| 1926 break; | |
| 1927 case Op_ConP: { // Convert pointers above the centerline to NUL | |
| 1928 TypeNode *tn = n->as_Type(); // Constants derive from type nodes | |
| 1929 const TypePtr* tp = tn->type()->is_ptr(); | |
| 1930 if (tp->_ptr == TypePtr::AnyNull) { | |
| 1931 tn->set_type(TypePtr::NULL_PTR); | |
| 1932 } | |
| 1933 break; | |
| 1934 } | |
| 163 | 1935 case Op_ConN: { // Convert narrow pointers above the centerline to NUL |
| 1936 TypeNode *tn = n->as_Type(); // Constants derive from type nodes | |
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1937 const TypePtr* tp = tn->type()->make_ptr(); |
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1938 if (tp && tp->_ptr == TypePtr::AnyNull) { |
| 163 | 1939 tn->set_type(TypeNarrowOop::NULL_PTR); |
| 1940 } | |
| 1941 break; | |
| 1942 } | |
| 0 | 1943 case Op_Binary: // These are introduced in the Post_Visit state. |
| 1944 ShouldNotReachHere(); | |
| 1945 break; | |
| 1946 case Op_ClearArray: | |
| 1947 case Op_SafePoint: | |
| 1948 mem_op = true; | |
| 1949 break; | |
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1950 default: |
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1951 if( n->is_Store() ) { |
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1952 // Do match stores, despite no ideal reg |
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1953 mem_op = true; |
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1954 break; |
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1955 } |
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1956 if( n->is_Mem() ) { // Loads and LoadStores |
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1957 mem_op = true; |
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1958 // Loads must be root of match tree due to prior load conflict |
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1959 if( C->subsume_loads() == false ) |
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1960 set_shared(n); |
| 0 | 1961 } |
| 1962 // Fall into default case | |
| 1963 if( !n->ideal_reg() ) | |
| 1964 set_dontcare(n); // Unmatchable Nodes | |
| 1965 } // end_switch | |
| 1966 | |
| 1967 for(int i = n->req() - 1; i >= 0; --i) { // For my children | |
| 1968 Node *m = n->in(i); // Get ith input | |
| 1969 if (m == NULL) continue; // Ignore NULLs | |
| 1970 uint mop = m->Opcode(); | |
| 1971 | |
| 1972 // Must clone all producers of flags, or we will not match correctly. | |
| 1973 // Suppose a compare setting int-flags is shared (e.g., a switch-tree) | |
| 1974 // then it will match into an ideal Op_RegFlags. Alas, the fp-flags | |
| 1975 // are also there, so we may match a float-branch to int-flags and | |
| 1976 // expect the allocator to haul the flags from the int-side to the | |
| 1977 // fp-side. No can do. | |
| 1978 if( _must_clone[mop] ) { | |
| 1979 mstack.push(m, Visit); | |
| 1980 continue; // for(int i = ...) | |
| 1981 } | |
| 1982 | |
|
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1983 if( mop == Op_AddP && m->in(AddPNode::Base)->Opcode() == Op_DecodeN ) { |
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1984 // Bases used in addresses must be shared but since |
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1985 // they are shared through a DecodeN they may appear |
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1986 // to have a single use so force sharing here. |
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1987 set_shared(m->in(AddPNode::Base)->in(1)); |
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1988 } |
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1989 |
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1990 // Clone addressing expressions as they are "free" in memory access instructions |
| 0 | 1991 if( mem_op && i == MemNode::Address && mop == Op_AddP ) { |
|
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1992 // Some inputs for address expression are not put on stack |
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1993 // to avoid marking them as shared and forcing them into register |
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1994 // if they are used only in address expressions. |
|
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1995 // But they should be marked as shared if there are other uses |
|
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|
1996 // besides address expressions. |
|
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1997 |
| 0 | 1998 Node *off = m->in(AddPNode::Offset); |
|
586
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|
1999 if( off->is_Con() && |
|
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|
2000 // When there are other uses besides address expressions |
|
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|
2001 // put it on stack and mark as shared. |
|
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|
2002 !is_visited(m) ) { |
|
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|
2003 address_visited.test_set(m->_idx); // Flag as address_visited |
| 0 | 2004 Node *adr = m->in(AddPNode::Address); |
| 2005 | |
| 2006 // Intel, ARM and friends can handle 2 adds in addressing mode | |
|
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2007 if( clone_shift_expressions && adr->is_AddP() && |
| 0 | 2008 // AtomicAdd is not an addressing expression. |
| 2009 // Cheap to find it by looking for screwy base. | |
|
586
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|
2010 !adr->in(AddPNode::Base)->is_top() && |
|
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|
2011 // Are there other uses besides address expressions? |
|
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|
2012 !is_visited(adr) ) { |
|
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|
2013 address_visited.set(adr->_idx); // Flag as address_visited |
| 0 | 2014 Node *shift = adr->in(AddPNode::Offset); |
| 2015 // Check for shift by small constant as well | |
| 2016 if( shift->Opcode() == Op_LShiftX && shift->in(2)->is_Con() && | |
|
586
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|
2017 shift->in(2)->get_int() <= 3 && |
|
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|
2018 // Are there other uses besides address expressions? |
|
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|
2019 !is_visited(shift) ) { |
|
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|
2020 address_visited.set(shift->_idx); // Flag as address_visited |
| 0 | 2021 mstack.push(shift->in(2), Visit); |
|
586
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|
2022 Node *conv = shift->in(1); |
| 0 | 2023 #ifdef _LP64 |
| 2024 // Allow Matcher to match the rule which bypass | |
| 2025 // ConvI2L operation for an array index on LP64 | |
| 2026 // if the index value is positive. | |
|
586
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|
2027 if( conv->Opcode() == Op_ConvI2L && |
|
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|
2028 conv->as_Type()->type()->is_long()->_lo >= 0 && |
|
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|
2029 // Are there other uses besides address expressions? |
|
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|
2030 !is_visited(conv) ) { |
|
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|
2031 address_visited.set(conv->_idx); // Flag as address_visited |
|
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|
2032 mstack.push(conv->in(1), Pre_Visit); |
| 0 | 2033 } else |
| 2034 #endif | |
|
586
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|
2035 mstack.push(conv, Pre_Visit); |
| 0 | 2036 } else { |
| 2037 mstack.push(shift, Pre_Visit); | |
| 2038 } | |
| 2039 mstack.push(adr->in(AddPNode::Address), Pre_Visit); | |
| 2040 mstack.push(adr->in(AddPNode::Base), Pre_Visit); | |
| 2041 } else { // Sparc, Alpha, PPC and friends | |
| 2042 mstack.push(adr, Pre_Visit); | |
| 2043 } | |
| 2044 | |
| 2045 // Clone X+offset as it also folds into most addressing expressions | |
| 2046 mstack.push(off, Visit); | |
| 2047 mstack.push(m->in(AddPNode::Base), Pre_Visit); | |
| 2048 continue; // for(int i = ...) | |
| 2049 } // if( off->is_Con() ) | |
| 2050 } // if( mem_op && | |
| 2051 mstack.push(m, Pre_Visit); | |
| 2052 } // for(int i = ...) | |
| 2053 } | |
| 2054 else if (nstate == Alt_Post_Visit) { | |
| 2055 mstack.pop(); // Remove node from stack | |
| 2056 // We cannot remove the Cmp input from the Bool here, as the Bool may be | |
| 2057 // shared and all users of the Bool need to move the Cmp in parallel. | |
| 2058 // This leaves both the Bool and the If pointing at the Cmp. To | |
| 2059 // prevent the Matcher from trying to Match the Cmp along both paths | |
| 2060 // BoolNode::match_edge always returns a zero. | |
| 2061 | |
| 2062 // We reorder the Op_If in a pre-order manner, so we can visit without | |
| 605 | 2063 // accidentally sharing the Cmp (the Bool and the If make 2 users). |
| 0 | 2064 n->add_req( n->in(1)->in(1) ); // Add the Cmp next to the Bool |
| 2065 } | |
| 2066 else if (nstate == Post_Visit) { | |
| 2067 mstack.pop(); // Remove node from stack | |
| 2068 | |
| 2069 // Now hack a few special opcodes | |
| 2070 switch( n->Opcode() ) { // Handle some opcodes special | |
| 2071 case Op_StorePConditional: | |
|
420
a1980da045cc
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|
2072 case Op_StoreIConditional: |
| 0 | 2073 case Op_StoreLConditional: |
| 2074 case Op_CompareAndSwapI: | |
| 2075 case Op_CompareAndSwapL: | |
|
113
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|
2076 case Op_CompareAndSwapP: |
|
ba764ed4b6f2
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|
2077 case Op_CompareAndSwapN: { // Convert trinary to binary-tree |
| 0 | 2078 Node *newval = n->in(MemNode::ValueIn ); |
| 2079 Node *oldval = n->in(LoadStoreNode::ExpectedIn); | |
| 2080 Node *pair = new (C, 3) BinaryNode( oldval, newval ); | |
| 2081 n->set_req(MemNode::ValueIn,pair); | |
| 2082 n->del_req(LoadStoreNode::ExpectedIn); | |
| 2083 break; | |
| 2084 } | |
| 2085 case Op_CMoveD: // Convert trinary to binary-tree | |
| 2086 case Op_CMoveF: | |
| 2087 case Op_CMoveI: | |
| 2088 case Op_CMoveL: | |
|
164
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|
2089 case Op_CMoveN: |
| 0 | 2090 case Op_CMoveP: { |
| 2091 // Restructure into a binary tree for Matching. It's possible that | |
| 2092 // we could move this code up next to the graph reshaping for IfNodes | |
| 2093 // or vice-versa, but I do not want to debug this for Ladybird. | |
| 2094 // 10/2/2000 CNC. | |
| 2095 Node *pair1 = new (C, 3) BinaryNode(n->in(1),n->in(1)->in(1)); | |
| 2096 n->set_req(1,pair1); | |
| 2097 Node *pair2 = new (C, 3) BinaryNode(n->in(2),n->in(3)); | |
| 2098 n->set_req(2,pair2); | |
| 2099 n->del_req(3); | |
| 2100 break; | |
| 2101 } | |
| 3345 | 2102 case Op_LoopLimit: { |
| 2103 Node *pair1 = new (C, 3) BinaryNode(n->in(1),n->in(2)); | |
| 2104 n->set_req(1,pair1); | |
| 2105 n->set_req(2,n->in(3)); | |
| 2106 n->del_req(3); | |
| 2107 break; | |
| 2108 } | |
|
986
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2109 case Op_StrEquals: { |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
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|
2110 Node *pair1 = new (C, 3) BinaryNode(n->in(2),n->in(3)); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2111 n->set_req(2,pair1); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2112 n->set_req(3,n->in(4)); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2113 n->del_req(4); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2114 break; |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2115 } |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2116 case Op_StrComp: |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2117 case Op_StrIndexOf: { |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2118 Node *pair1 = new (C, 3) BinaryNode(n->in(2),n->in(3)); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2119 n->set_req(2,pair1); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2120 Node *pair2 = new (C, 3) BinaryNode(n->in(4),n->in(5)); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2121 n->set_req(3,pair2); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2122 n->del_req(5); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2123 n->del_req(4); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2124 break; |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2125 } |
| 0 | 2126 default: |
| 2127 break; | |
| 2128 } | |
| 2129 } | |
| 2130 else { | |
| 2131 ShouldNotReachHere(); | |
| 2132 } | |
| 2133 } // end of while (mstack.is_nonempty()) | |
| 2134 } | |
| 2135 | |
| 2136 #ifdef ASSERT | |
| 2137 // machine-independent root to machine-dependent root | |
| 2138 void Matcher::dump_old2new_map() { | |
| 2139 _old2new_map.dump(); | |
| 2140 } | |
| 2141 #endif | |
| 2142 | |
| 2143 //---------------------------collect_null_checks------------------------------- | |
| 2144 // Find null checks in the ideal graph; write a machine-specific node for | |
| 2145 // it. Used by later implicit-null-check handling. Actually collects | |
| 2146 // either an IfTrue or IfFalse for the common NOT-null path, AND the ideal | |
| 2147 // value being tested. | |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2148 void Matcher::collect_null_checks( Node *proj, Node *orig_proj ) { |
| 0 | 2149 Node *iff = proj->in(0); |
| 2150 if( iff->Opcode() == Op_If ) { | |
| 2151 // During matching If's have Bool & Cmp side-by-side | |
| 2152 BoolNode *b = iff->in(1)->as_Bool(); | |
| 2153 Node *cmp = iff->in(2); | |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
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|
2154 int opc = cmp->Opcode(); |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
63
diff
changeset
|
2155 if (opc != Op_CmpP && opc != Op_CmpN) return; |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2156 |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2157 const Type* ct = cmp->in(2)->bottom_type(); |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2158 if (ct == TypePtr::NULL_PTR || |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
63
diff
changeset
|
2159 (opc == Op_CmpN && ct == TypeNarrowOop::NULL_PTR)) { |
| 0 | 2160 |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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changeset
|
2161 bool push_it = false; |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
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|
2162 if( proj->Opcode() == Op_IfTrue ) { |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2163 extern int all_null_checks_found; |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2164 all_null_checks_found++; |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2165 if( b->_test._test == BoolTest::ne ) { |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2166 push_it = true; |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
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|
2167 } |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2168 } else { |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2169 assert( proj->Opcode() == Op_IfFalse, "" ); |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2170 if( b->_test._test == BoolTest::eq ) { |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2171 push_it = true; |
| 0 | 2172 } |
| 2173 } | |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2174 if( push_it ) { |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2175 _null_check_tests.push(proj); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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changeset
|
2176 Node* val = cmp->in(1); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2177 #ifdef _LP64 |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
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1203
diff
changeset
|
2178 if (val->bottom_type()->isa_narrowoop() && |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2179 !Matcher::narrow_oop_use_complex_address()) { |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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changeset
|
2180 // |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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|
2181 // Look for DecodeN node which should be pinned to orig_proj. |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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changeset
|
2182 // On platforms (Sparc) which can not handle 2 adds |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2183 // in addressing mode we have to keep a DecodeN node and |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2184 // use it to do implicit NULL check in address. |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2185 // |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2186 // DecodeN node was pinned to non-null path (orig_proj) during |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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changeset
|
2187 // CastPP transformation in final_graph_reshaping_impl(). |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2188 // |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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changeset
|
2189 uint cnt = orig_proj->outcnt(); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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changeset
|
2190 for (uint i = 0; i < orig_proj->outcnt(); i++) { |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
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changeset
|
2191 Node* d = orig_proj->raw_out(i); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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changeset
|
2192 if (d->is_DecodeN() && d->in(1) == val) { |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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changeset
|
2193 val = d; |
|
36ccc817fca4
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367
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changeset
|
2194 val->set_req(0, NULL); // Unpin now. |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
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1203
diff
changeset
|
2195 // Mark this as special case to distinguish from |
|
3657cb01ffc5
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kvn
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1203
diff
changeset
|
2196 // a regular case: CmpP(DecodeN, NULL). |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
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1203
diff
changeset
|
2197 val = (Node*)(((intptr_t)val) | 1); |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
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|
2198 break; |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2199 } |
|
36ccc817fca4
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kvn
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367
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|
2200 } |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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|
2201 } |
|
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2202 #endif |
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2203 _null_check_tests.push(val); |
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2204 } |
| 0 | 2205 } |
| 2206 } | |
| 2207 } | |
| 2208 | |
| 2209 //---------------------------validate_null_checks------------------------------ | |
| 2210 // Its possible that the value being NULL checked is not the root of a match | |
| 2211 // tree. If so, I cannot use the value in an implicit null check. | |
| 2212 void Matcher::validate_null_checks( ) { | |
| 2213 uint cnt = _null_check_tests.size(); | |
| 2214 for( uint i=0; i < cnt; i+=2 ) { | |
| 2215 Node *test = _null_check_tests[i]; | |
| 2216 Node *val = _null_check_tests[i+1]; | |
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2217 bool is_decoden = ((intptr_t)val) & 1; |
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2218 val = (Node*)(((intptr_t)val) & ~1); |
| 0 | 2219 if (has_new_node(val)) { |
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2220 Node* new_val = new_node(val); |
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2221 if (is_decoden) { |
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2222 assert(val->is_DecodeN() && val->in(0) == NULL, "sanity"); |
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2223 // Note: new_val may have a control edge if |
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2224 // the original ideal node DecodeN was matched before |
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2225 // it was unpinned in Matcher::collect_null_checks(). |
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2226 // Unpin the mach node and mark it. |
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2227 new_val->set_req(0, NULL); |
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2228 new_val = (Node*)(((intptr_t)new_val) | 1); |
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2229 } |
| 0 | 2230 // Is a match-tree root, so replace with the matched value |
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2231 _null_check_tests.map(i+1, new_val); |
| 0 | 2232 } else { |
| 2233 // Yank from candidate list | |
| 2234 _null_check_tests.map(i+1,_null_check_tests[--cnt]); | |
| 2235 _null_check_tests.map(i,_null_check_tests[--cnt]); | |
| 2236 _null_check_tests.pop(); | |
| 2237 _null_check_tests.pop(); | |
| 2238 i-=2; | |
| 2239 } | |
| 2240 } | |
| 2241 } | |
| 2242 | |
| 2243 // Used by the DFA in dfa_xxx.cpp. Check for a following barrier or | |
| 2244 // atomic instruction acting as a store_load barrier without any | |
| 2245 // intervening volatile load, and thus we don't need a barrier here. | |
| 2246 // We retain the Node to act as a compiler ordering barrier. | |
| 2247 bool Matcher::post_store_load_barrier(const Node *vmb) { | |
| 2248 Compile *C = Compile::current(); | |
| 2249 assert( vmb->is_MemBar(), "" ); | |
| 2250 assert( vmb->Opcode() != Op_MemBarAcquire, "" ); | |
| 2251 const MemBarNode *mem = (const MemBarNode*)vmb; | |
| 2252 | |
| 2253 // Get the Proj node, ctrl, that can be used to iterate forward | |
| 2254 Node *ctrl = NULL; | |
| 2255 DUIterator_Fast imax, i = mem->fast_outs(imax); | |
| 2256 while( true ) { | |
| 2257 ctrl = mem->fast_out(i); // Throw out-of-bounds if proj not found | |
| 2258 assert( ctrl->is_Proj(), "only projections here" ); | |
| 2259 ProjNode *proj = (ProjNode*)ctrl; | |
| 2260 if( proj->_con == TypeFunc::Control && | |
| 2261 !C->node_arena()->contains(ctrl) ) // Unmatched old-space only | |
| 2262 break; | |
| 2263 i++; | |
| 2264 } | |
| 2265 | |
| 2266 for( DUIterator_Fast jmax, j = ctrl->fast_outs(jmax); j < jmax; j++ ) { | |
| 2267 Node *x = ctrl->fast_out(j); | |
| 2268 int xop = x->Opcode(); | |
| 2269 | |
| 2270 // We don't need current barrier if we see another or a lock | |
| 2271 // before seeing volatile load. | |
| 2272 // | |
| 2273 // Op_Fastunlock previously appeared in the Op_* list below. | |
| 2274 // With the advent of 1-0 lock operations we're no longer guaranteed | |
| 2275 // that a monitor exit operation contains a serializing instruction. | |
| 2276 | |
| 2277 if (xop == Op_MemBarVolatile || | |
| 2278 xop == Op_FastLock || | |
| 2279 xop == Op_CompareAndSwapL || | |
| 2280 xop == Op_CompareAndSwapP || | |
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2281 xop == Op_CompareAndSwapN || |
| 0 | 2282 xop == Op_CompareAndSwapI) |
| 2283 return true; | |
| 2284 | |
| 2285 if (x->is_MemBar()) { | |
| 2286 // We must retain this membar if there is an upcoming volatile | |
| 2287 // load, which will be preceded by acquire membar. | |
| 2288 if (xop == Op_MemBarAcquire) | |
| 2289 return false; | |
| 2290 // For other kinds of barriers, check by pretending we | |
| 2291 // are them, and seeing if we can be removed. | |
| 2292 else | |
| 2293 return post_store_load_barrier((const MemBarNode*)x); | |
| 2294 } | |
| 2295 | |
| 2296 // Delicate code to detect case of an upcoming fastlock block | |
| 2297 if( x->is_If() && x->req() > 1 && | |
| 2298 !C->node_arena()->contains(x) ) { // Unmatched old-space only | |
| 2299 Node *iff = x; | |
| 2300 Node *bol = iff->in(1); | |
| 2301 // The iff might be some random subclass of If or bol might be Con-Top | |
| 2302 if (!bol->is_Bool()) return false; | |
| 2303 assert( bol->req() > 1, "" ); | |
| 2304 return (bol->in(1)->Opcode() == Op_FastUnlock); | |
| 2305 } | |
| 2306 // probably not necessary to check for these | |
| 2307 if (x->is_Call() || x->is_SafePoint() || x->is_block_proj()) | |
| 2308 return false; | |
| 2309 } | |
| 2310 return false; | |
| 2311 } | |
| 2312 | |
| 2313 //============================================================================= | |
| 2314 //---------------------------State--------------------------------------------- | |
| 2315 State::State(void) { | |
| 2316 #ifdef ASSERT | |
| 2317 _id = 0; | |
| 2318 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
| 2319 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
| 2320 //memset(_cost, -1, sizeof(_cost)); | |
| 2321 //memset(_rule, -1, sizeof(_rule)); | |
| 2322 #endif | |
| 2323 memset(_valid, 0, sizeof(_valid)); | |
| 2324 } | |
| 2325 | |
| 2326 #ifdef ASSERT | |
| 2327 State::~State() { | |
| 2328 _id = 99; | |
| 2329 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
| 2330 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
| 2331 memset(_cost, -3, sizeof(_cost)); | |
| 2332 memset(_rule, -3, sizeof(_rule)); | |
| 2333 } | |
| 2334 #endif | |
| 2335 | |
| 2336 #ifndef PRODUCT | |
| 2337 //---------------------------dump---------------------------------------------- | |
| 2338 void State::dump() { | |
| 2339 tty->print("\n"); | |
| 2340 dump(0); | |
| 2341 } | |
| 2342 | |
| 2343 void State::dump(int depth) { | |
| 2344 for( int j = 0; j < depth; j++ ) | |
| 2345 tty->print(" "); | |
| 2346 tty->print("--N: "); | |
| 2347 _leaf->dump(); | |
| 2348 uint i; | |
| 2349 for( i = 0; i < _LAST_MACH_OPER; i++ ) | |
| 2350 // Check for valid entry | |
| 2351 if( valid(i) ) { | |
| 2352 for( int j = 0; j < depth; j++ ) | |
| 2353 tty->print(" "); | |
| 2354 assert(_cost[i] != max_juint, "cost must be a valid value"); | |
| 2355 assert(_rule[i] < _last_Mach_Node, "rule[i] must be valid rule"); | |
| 2356 tty->print_cr("%s %d %s", | |
| 2357 ruleName[i], _cost[i], ruleName[_rule[i]] ); | |
| 2358 } | |
| 2359 tty->print_cr(""); | |
| 2360 | |
| 2361 for( i=0; i<2; i++ ) | |
| 2362 if( _kids[i] ) | |
| 2363 _kids[i]->dump(depth+1); | |
| 2364 } | |
| 2365 #endif |