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annotate graal/com.oracle.graal.compiler/src/com/oracle/graal/compiler/alloc/RegisterVerifier.java @ 5506:56860d3f9f39

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More refactorings and renamings in preparation of ci/ri split.
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Thu, 07 Jun 2012 18:12:01 +0200
parents e808627bd16f
children dc71b06d09f8
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1 /*
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2 * Copyright (c) 2009, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23 package com.oracle.graal.compiler.alloc;
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24
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25 import static com.oracle.max.cri.ci.CiValueUtil.*;
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26
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27 import java.util.*;
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28
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29 import com.oracle.max.cri.ci.*;
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30 import com.oracle.max.cri.ri.*;
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31 import com.oracle.max.criutils.*;
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32 import com.oracle.graal.compiler.*;
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33 import com.oracle.graal.compiler.util.*;
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34 import com.oracle.graal.graph.*;
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35 import com.oracle.graal.lir.*;
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36 import com.oracle.graal.lir.LIRInstruction.*;
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37 import com.oracle.graal.lir.cfg.*;
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38
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39 /**
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40 */
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41 final class RegisterVerifier {
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42
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43 LinearScan allocator;
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44 List<Block> workList; // all blocks that must be processed
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45 ArrayMap<Interval[]> savedStates; // saved information of previous check
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46
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47 // simplified access to methods of LinearScan
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48 Interval intervalAt(RiValue operand) {
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49 return allocator.intervalFor(operand);
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50 }
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51
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52 // currently, only registers are processed
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53 int stateSize() {
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54 return allocator.maxRegisterNumber() + 1;
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55 }
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56
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57 // accessors
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58 Interval[] stateForBlock(Block block) {
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59 return savedStates.get(block.getId());
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60 }
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61
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62 void setStateForBlock(Block block, Interval[] savedState) {
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63 savedStates.put(block.getId(), savedState);
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64 }
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65
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66 void addToWorkList(Block block) {
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67 if (!workList.contains(block)) {
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68 workList.add(block);
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69 }
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70 }
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71
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72 RegisterVerifier(LinearScan allocator) {
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73 this.allocator = allocator;
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74 workList = new ArrayList<>(16);
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75 this.savedStates = new ArrayMap<>();
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76
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77 }
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78
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79 void verify(Block start) {
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80 // setup input registers (method arguments) for first block
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81 Interval[] inputState = new Interval[stateSize()];
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82 setStateForBlock(start, inputState);
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83 addToWorkList(start);
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84
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85 // main loop for verification
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86 do {
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87 Block block = workList.get(0);
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88 workList.remove(0);
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89
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90 processBlock(block);
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91 } while (!workList.isEmpty());
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92 }
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93
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94 private void processBlock(Block block) {
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95 if (GraalOptions.TraceLinearScanLevel >= 2) {
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96 TTY.println();
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97 TTY.println("processBlock B%d", block.getId());
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98 }
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99
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100 // must copy state because it is modified
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101 Interval[] inputState = copy(stateForBlock(block));
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102
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103 if (GraalOptions.TraceLinearScanLevel >= 4) {
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104 TTY.println("Input-State of intervals:");
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105 TTY.print(" ");
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106 for (int i = 0; i < stateSize(); i++) {
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107 if (inputState[i] != null) {
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108 TTY.print(" %4d", inputState[i].operandNumber);
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109 } else {
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110 TTY.print(" __");
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111 }
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112 }
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113 TTY.println();
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114 TTY.println();
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115 }
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116
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117 // process all operations of the block
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118 processOperations(block.lir, inputState);
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119
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120 // iterate all successors
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121 for (int i = 0; i < block.numberOfSux(); i++) {
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122 Block succ = block.suxAt(i);
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123 processSuccessor(succ, inputState);
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124 }
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125 }
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126
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127 private void processSuccessor(Block block, Interval[] inputState) {
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128 Interval[] savedState = stateForBlock(block);
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129
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130 if (savedState != null) {
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131 // this block was already processed before.
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132 // check if new inputState is consistent with savedState
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133
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134 boolean savedStateCorrect = true;
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135 for (int i = 0; i < stateSize(); i++) {
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136 if (inputState[i] != savedState[i]) {
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137 // current inputState and previous savedState assume a different
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diff changeset
138 // interval in this register . assume that this register is invalid
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parents:
diff changeset
139 if (savedState[i] != null) {
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parents:
diff changeset
140 // invalidate old calculation only if it assumed that
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parents:
diff changeset
141 // register was valid. when the register was already invalid,
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parents:
diff changeset
142 // then the old calculation was correct.
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diff changeset
143 savedStateCorrect = false;
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parents:
diff changeset
144 savedState[i] = null;
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diff changeset
145
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diff changeset
146 if (GraalOptions.TraceLinearScanLevel >= 4) {
4435
57cb8ec5f6bb Restructure block and control flow graph data structures
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diff changeset
147 TTY.println("processSuccessor B%d: invalidating slot %d", block.getId(), i);
3733
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148 }
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149 }
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150 }
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diff changeset
151 }
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152
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153 if (savedStateCorrect) {
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154 // already processed block with correct inputState
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diff changeset
155 if (GraalOptions.TraceLinearScanLevel >= 2) {
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diff changeset
156 TTY.println("processSuccessor B%d: previous visit already correct", block.getId());
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157 }
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158 } else {
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159 // must re-visit this block
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diff changeset
160 if (GraalOptions.TraceLinearScanLevel >= 2) {
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diff changeset
161 TTY.println("processSuccessor B%d: must re-visit because input state changed", block.getId());
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162 }
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163 addToWorkList(block);
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164 }
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165
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166 } else {
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167 // block was not processed before, so set initial inputState
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168 if (GraalOptions.TraceLinearScanLevel >= 2) {
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diff changeset
169 TTY.println("processSuccessor B%d: initial visit", block.getId());
3733
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170 }
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171
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172 setStateForBlock(block, copy(inputState));
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173 addToWorkList(block);
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174 }
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175 }
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176
4142
bc8527f3071c Adjust code base to new level of warnings.
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diff changeset
177 static Interval[] copy(Interval[] inputState) {
3733
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178 return inputState.clone();
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179 }
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180
5506
56860d3f9f39 More refactorings and renamings in preparation of ci/ri split.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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diff changeset
181 static void statePut(Interval[] inputState, RiValue location, Interval interval) {
4183
9e0c1b4cfef5 Move all isXxx and asXxx out of CiValue and into their own util class.
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parents: 4181
diff changeset
182 if (location != null && isRegister(location)) {
9e0c1b4cfef5 Move all isXxx and asXxx out of CiValue and into their own util class.
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parents: 4181
diff changeset
183 CiRegister reg = asRegister(location);
3733
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184 int regNum = reg.number;
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185 if (interval != null) {
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186 if (GraalOptions.TraceLinearScanLevel >= 4) {
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187 TTY.println(" %s = %s", reg, interval.operand);
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188 }
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189 } else if (inputState[regNum] != null) {
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190 if (GraalOptions.TraceLinearScanLevel >= 4) {
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191 TTY.println(" %s = null", reg);
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192 }
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193 }
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194
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195 inputState[regNum] = interval;
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196 }
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197 }
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198
5506
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diff changeset
199 static boolean checkState(Interval[] inputState, RiValue reg, Interval interval) {
4183
9e0c1b4cfef5 Move all isXxx and asXxx out of CiValue and into their own util class.
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parents: 4181
diff changeset
200 if (reg != null && isRegister(reg)) {
9e0c1b4cfef5 Move all isXxx and asXxx out of CiValue and into their own util class.
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parents: 4181
diff changeset
201 if (inputState[asRegister(reg).number] != interval) {
4616
53168434d0df Transform some CiBailout into GraalInternalError
Gilles Duboscq <duboscq@ssw.jku.at>
parents: 4525
diff changeset
202 throw new GraalInternalError("!! Error in register allocation: register %s does not contain interval %s but interval %s", reg, interval.operand, inputState[asRegister(reg).number]);
3733
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203 }
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204 }
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parents:
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205 return true;
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diff changeset
206 }
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diff changeset
207
4245
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diff changeset
208 void processOperations(List<LIRInstruction> ops, final Interval[] inputState) {
3733
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parents:
diff changeset
209 // visit all instructions of the block
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parents:
diff changeset
210 for (int i = 0; i < ops.size(); i++) {
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
211 final LIRInstruction op = ops.get(i);
3733
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diff changeset
212
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parents:
diff changeset
213 if (GraalOptions.TraceLinearScanLevel >= 4) {
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parents:
diff changeset
214 TTY.println(op.toStringWithIdPrefix());
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parents:
diff changeset
215 }
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
216
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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diff changeset
217 ValueProcedure useProc = new ValueProcedure() {
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
218 @Override
5506
56860d3f9f39 More refactorings and renamings in preparation of ci/ri split.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 5061
diff changeset
219 public RiValue doValue(RiValue operand, OperandMode mode, EnumSet<OperandFlag> flags) {
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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diff changeset
220 if (LinearScan.isVariableOrRegister(operand) && allocator.isProcessed(operand)) {
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
221 Interval interval = intervalAt(operand);
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
222 if (op.id() != -1) {
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
223 interval = interval.getSplitChildAtOpId(op.id(), mode, allocator);
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
224 }
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
225
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
226 assert checkState(inputState, interval.location(), interval.splitParent());
3733
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parents:
diff changeset
227 }
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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diff changeset
228 return operand;
3733
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
229 }
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
230 };
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
231
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
232 ValueProcedure defProc = new ValueProcedure() {
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
233 @Override
5506
56860d3f9f39 More refactorings and renamings in preparation of ci/ri split.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 5061
diff changeset
234 public RiValue doValue(RiValue operand, OperandMode mode, EnumSet<OperandFlag> flags) {
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
235 if (LinearScan.isVariableOrRegister(operand) && allocator.isProcessed(operand)) {
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
236 Interval interval = intervalAt(operand);
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
237 if (op.id() != -1) {
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
238 interval = interval.getSplitChildAtOpId(op.id(), mode, allocator);
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
239 }
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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diff changeset
240
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
241 statePut(inputState, interval.location(), interval.splitParent());
3733
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diff changeset
242 }
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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diff changeset
243 return operand;
3733
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
244 }
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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diff changeset
245 };
3733
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parents:
diff changeset
246
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
Christian Wimmer <Christian.Wimmer@Oracle.com>
parents: 4212
diff changeset
247 // check if input operands are correct
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
248 op.forEachInput(useProc);
3733
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parents:
diff changeset
249 // invalidate all caller save registers at calls
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
250 if (op.hasCall()) {
4265
4643ccd37dac * removed CiStatistics
Lukas Stadler <lukas.stadler@jku.at>
parents: 4262
diff changeset
251 for (CiRegister r : allocator.frameMap.registerConfig.getCallerSaveRegisters()) {
3733
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
252 statePut(inputState, r.asValue(), null);
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
253 }
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
254 }
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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diff changeset
255 op.forEachAlive(useProc);
3733
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parents:
diff changeset
256 // set temp operands (some operations use temp operands also as output operands, so can't set them null)
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
257 op.forEachTemp(defProc);
3733
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parents:
diff changeset
258 // set output operands
4245
75c620f90ab9 Support stack-operands and register hints in new register allocator API
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parents: 4212
diff changeset
259 op.forEachOutput(defProc);
3733
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parents:
diff changeset
260 }
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
261 }
e233f5660da4 Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff changeset
262 }