annotate src/cpu/x86/vm/c1_MacroAssembler_x86.cpp @ 4984:5c41e7002923

Added missing #ifdef GRAAL
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Mon, 27 Feb 2012 23:05:48 +0100
parents ab906cea36f7
children 2f2c6347fce4
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1 /*
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2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "c1/c1_MacroAssembler.hpp"
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27 #include "c1/c1_Runtime1.hpp"
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28 #include "classfile/systemDictionary.hpp"
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29 #include "gc_interface/collectedHeap.hpp"
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30 #include "interpreter/interpreter.hpp"
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31 #include "oops/arrayOop.hpp"
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32 #include "oops/markOop.hpp"
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33 #include "runtime/basicLock.hpp"
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34 #include "runtime/biasedLocking.hpp"
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35 #include "runtime/os.hpp"
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36 #include "runtime/stubRoutines.hpp"
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37
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38 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register scratch, Label& slow_case, bool use_basic_object_lock) {
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39 const int aligned_mask = BytesPerWord -1;
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40 const int hdr_offset = oopDesc::mark_offset_in_bytes();
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41 assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
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42 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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43 Label done;
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44 int null_check_offset = -1;
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45
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46 verify_oop(obj);
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47
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48 if (use_basic_object_lock) {
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49 // save object being locked into the BasicObjectLock
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50 movptr(Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()), obj);
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51 }
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52
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53 if (UseBiasedLocking) {
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54 assert(scratch != noreg, "should have scratch register at this point");
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55 null_check_offset = biased_locking_enter(disp_hdr, obj, hdr, scratch, false, done, &slow_case);
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56 } else {
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57 null_check_offset = offset();
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58 }
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59
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60 // Load object header
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61 movptr(hdr, Address(obj, hdr_offset));
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62 // and mark it as unlocked
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63 orptr(hdr, markOopDesc::unlocked_value);
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64 // save unlocked object header into the displaced header location on the stack
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65 movptr(Address(disp_hdr, 0), hdr);
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66 // test if object header is still the same (i.e. unlocked), and if so, store the
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67 // displaced header address in the object header - if it is not the same, get the
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68 // object header instead
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69 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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70 cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
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71 // if the object header was the same, we're done
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72 if (PrintBiasedLockingStatistics) {
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73 cond_inc32(Assembler::equal,
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74 ExternalAddress((address)BiasedLocking::fast_path_entry_count_addr()));
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75 }
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76 jcc(Assembler::equal, done);
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77 // if the object header was not the same, it is now in the hdr register
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78 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
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79 //
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80 // 1) (hdr & aligned_mask) == 0
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81 // 2) rsp <= hdr
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82 // 3) hdr <= rsp + page_size
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83 //
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84 // these 3 tests can be done by evaluating the following expression:
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85 //
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86 // (hdr - rsp) & (aligned_mask - page_size)
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87 //
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88 // assuming both the stack pointer and page_size have their least
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89 // significant 2 bits cleared and page_size is a power of 2
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90 subptr(hdr, rsp);
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91 andptr(hdr, aligned_mask - os::vm_page_size());
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92 // for recursive locking, the result is zero => save it in the displaced header
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93 // location (NULL in the displaced hdr location indicates recursive locking)
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94 movptr(Address(disp_hdr, 0), hdr);
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95 // otherwise we don't care about the result and handle locking via runtime call
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96 jcc(Assembler::notZero, slow_case);
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97 // done
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98 bind(done);
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99 return null_check_offset;
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100 }
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101
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102
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103 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case, bool use_basic_object_lock) {
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104 const int aligned_mask = BytesPerWord -1;
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105 const int hdr_offset = oopDesc::mark_offset_in_bytes();
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106 assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
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107 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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108 Label done;
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109
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110 if (UseBiasedLocking) {
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111 if (use_basic_object_lock) {
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112 // load object
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113 movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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114 }
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115 biased_locking_exit(obj, hdr, done);
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116 }
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117
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118 // load displaced header
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119 movptr(hdr, Address(disp_hdr, 0));
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120 // if the loaded hdr is NULL we had recursive locking
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121 testptr(hdr, hdr);
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122 // if we had recursive locking, we are done
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123 jcc(Assembler::zero, done);
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124 if (!UseBiasedLocking) {
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125 if (use_basic_object_lock) {
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126 // load object
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127 movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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128 }
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129 }
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130 verify_oop(obj);
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131 // test if object header is pointing to the displaced header, and if so, restore
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132 // the displaced header in the object - if the object header is not pointing to
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133 // the displaced header, get the object header instead
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134 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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135 cmpxchgptr(hdr, Address(obj, hdr_offset));
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136 // if the object header was not pointing to the displaced header,
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137 // we do unlocking via runtime call
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138 jcc(Assembler::notEqual, slow_case);
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139 // done
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140 bind(done);
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141 }
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142
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143
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144 // Defines obj, preserves var_size_in_bytes
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145 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
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146 if (UseTLAB) {
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147 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
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148 } else {
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149 eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
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150 incr_allocated_bytes(noreg, var_size_in_bytes, con_size_in_bytes, t1);
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151 }
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152 }
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153
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154
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155 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
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156 assert_different_registers(obj, klass, len);
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157 if (UseBiasedLocking && !len->is_valid()) {
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158 assert_different_registers(obj, klass, len, t1, t2);
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159 movptr(t1, Address(klass, Klass::prototype_header_offset()));
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160 movptr(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
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161 } else {
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162 // This assumes that all prototype bits fit in an int32_t
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163 movptr(Address(obj, oopDesc::mark_offset_in_bytes ()), (int32_t)(intptr_t)markOopDesc::prototype());
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164 }
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165 #ifdef _LP64
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166 if (UseCompressedOops) { // Take care not to kill klass
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167 movptr(t1, klass);
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168 encode_heap_oop_not_null(t1);
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169 movl(Address(obj, oopDesc::klass_offset_in_bytes()), t1);
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170 } else
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171 #endif
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172 {
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173 movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
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174 }
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175
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176 if (len->is_valid()) {
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177 movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
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178 }
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179 #ifdef _LP64
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180 else if (UseCompressedOops) {
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181 xorptr(t1, t1);
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182 store_klass_gap(obj, t1);
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183 }
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184 #endif
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185 }
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186
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187
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188 // preserves obj, destroys len_in_bytes
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189 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
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190 Label done;
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191 assert(obj != len_in_bytes && obj != t1 && t1 != len_in_bytes, "registers must be different");
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192 assert((hdr_size_in_bytes & (BytesPerWord - 1)) == 0, "header size is not a multiple of BytesPerWord");
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193 Register index = len_in_bytes;
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194 // index is positive and ptr sized
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195 subptr(index, hdr_size_in_bytes);
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196 jcc(Assembler::zero, done);
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197 // initialize topmost word, divide index by 2, check if odd and test if zero
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198 // note: for the remaining code to work, index must be a multiple of BytesPerWord
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199 #ifdef ASSERT
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200 { Label L;
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201 testptr(index, BytesPerWord - 1);
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202 jcc(Assembler::zero, L);
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203 stop("index is not a multiple of BytesPerWord");
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204 bind(L);
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205 }
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206 #endif
304
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207 xorptr(t1, t1); // use _zero reg to clear memory (shorter code)
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208 if (UseIncDec) {
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209 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
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210 } else {
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211 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
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212 shrptr(index, 1);
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213 }
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214 #ifndef _LP64
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215 // index could have been not a multiple of 8 (i.e., bit 2 was set)
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216 { Label even;
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217 // note: if index was a multiple of 8, than it cannot
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218 // be 0 now otherwise it must have been 0 before
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219 // => if it is even, we don't need to check for 0 again
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220 jcc(Assembler::carryClear, even);
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221 // clear topmost word (no jump needed if conditional assignment would work here)
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222 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 0*BytesPerWord), t1);
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223 // index could be 0 now, need to check again
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224 jcc(Assembler::zero, done);
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225 bind(even);
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226 }
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227 #endif // !_LP64
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228 // initialize remaining object fields: rdx is a multiple of 2 now
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229 { Label loop;
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230 bind(loop);
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231 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 1*BytesPerWord), t1);
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232 NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 2*BytesPerWord), t1);)
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233 decrement(index);
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234 jcc(Assembler::notZero, loop);
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235 }
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236
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237 // done
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238 bind(done);
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239 }
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240
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241
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242 void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
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243 assert(obj == rax, "obj must be in rax, for cmpxchg");
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244 assert_different_registers(obj, t1, t2); // XXX really?
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245 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
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246
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247 try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
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248
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249 initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2);
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250 }
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251
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252 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2) {
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253 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
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254 "con_size_in_bytes is not multiple of alignment");
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255 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
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256
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257 initialize_header(obj, klass, noreg, t1, t2);
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258
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259 // clear rest of allocated space
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260 const Register t1_zero = t1;
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261 const Register index = t2;
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262 const int threshold = 6 * BytesPerWord; // approximate break even point for code size (see comments below)
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263 if (var_size_in_bytes != noreg) {
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264 mov(index, var_size_in_bytes);
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265 initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
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266 } else if (con_size_in_bytes <= threshold) {
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267 // use explicit null stores
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268 // code size = 2 + 3*n bytes (n = number of fields to clear)
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269 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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270 for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
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271 movptr(Address(obj, i), t1_zero);
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272 } else if (con_size_in_bytes > hdr_size_in_bytes) {
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273 // use loop to null out the fields
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274 // code size = 16 bytes for even n (n = number of fields to clear)
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275 // initialize last object field first if odd number of fields
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276 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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277 movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
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278 // initialize last object field if constant size is odd
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279 if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
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280 movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
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281 // initialize remaining object fields: rdx is a multiple of 2
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282 { Label loop;
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283 bind(loop);
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284 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
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285 t1_zero);
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286 NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
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287 t1_zero);)
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288 decrement(index);
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289 jcc(Assembler::notZero, loop);
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290 }
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291 }
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292
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293 #ifndef GRAAL
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294 // TODO(tw): Check how we can access the flag without a ciEnv object.
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295 if (CURRENT_ENV->dtrace_alloc_probes()) {
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296 assert(obj == rax, "must be");
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297 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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298 }
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299 #endif
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300
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301 verify_oop(obj);
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302 }
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303
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304 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int header_size, Address::ScaleFactor f, Register klass, Label& slow_case) {
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305 assert(obj == rax, "obj must be in rax, for cmpxchg");
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306 assert_different_registers(obj, len, t1, t2, klass);
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307
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308 // determine alignment mask
304
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309 assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
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310
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311 // check for negative or excessive length
304
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312 cmpptr(len, (int32_t)max_array_allocation_length);
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313 jcc(Assembler::above, slow_case);
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314
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315 const Register arr_size = t2; // okay to be the same
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316 // align object end
304
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317 movptr(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
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318 lea(arr_size, Address(arr_size, len, f));
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319 andptr(arr_size, ~MinObjAlignmentInBytesMask);
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320
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321 try_allocate(obj, arr_size, 0, t1, t2, slow_case);
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322
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323 initialize_header(obj, klass, len, t1, t2);
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324
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325 // clear rest of allocated space
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326 const Register len_zero = len;
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327 initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
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328
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329
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330 #ifndef GRAAL
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331 // TODO(tw): Check how we can access the flag without a ciEnv object.
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332 if (CURRENT_ENV->dtrace_alloc_probes()) {
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333 assert(obj == rax, "must be");
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334 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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335 }
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336 #endif
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337
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338 verify_oop(obj);
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339 }
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340
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341
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342
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343 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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344 verify_oop(receiver);
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345 // explicit NULL check not needed since load from [klass_offset] causes a trap
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346 // check against inline cache
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347 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
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348 int start_offset = offset();
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349
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350 if (UseCompressedOops) {
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351 load_klass(rscratch1, receiver);
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352 cmpptr(rscratch1, iCache);
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353 } else {
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354 cmpptr(iCache, Address(receiver, oopDesc::klass_offset_in_bytes()));
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355 }
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356 // if icache check fails, then jump to runtime routine
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357 // Note: RECEIVER must still contain the receiver!
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358 jump_cc(Assembler::notEqual,
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359 RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
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360 const int ic_cmp_size = LP64_ONLY(10) NOT_LP64(9);
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361 assert(UseCompressedOops || offset() - start_offset == ic_cmp_size, "check alignment in emit_method_entry");
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362 }
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363
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364
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365 void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
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366 // Make sure there is enough stack space for this method's activation.
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367 // Note that we do this before doing an enter(). This matches the
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368 // ordering of C2's stack overflow check / rsp decrement and allows
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369 // the SharedRuntime stack overflow handling to be consistent
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370 // between the two compilers.
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371 generate_stack_overflow_check(frame_size_in_bytes);
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372
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373 push(rbp);
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374 #ifdef TIERED
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375 // c2 leaves fpu stack dirty. Clean it on entry
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376 if (UseSSE < 2 ) {
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377 empty_FPU_stack();
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378 }
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379 #endif // TIERED
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380 decrement(rsp, frame_size_in_bytes); // does not emit code for frame_size == 0
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381 }
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382
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383
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384 void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
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385 increment(rsp, frame_size_in_bytes); // Does not emit code for frame_size == 0
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386 pop(rbp);
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387 }
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388
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389
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390 void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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391 if (C1Breakpoint) int3();
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392 inline_cache_check(receiver, ic_klass);
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393 }
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394
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395
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396 void C1_MacroAssembler::verified_entry() {
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397 if (C1Breakpoint || VerifyFPU || !UseStackBanging) {
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398 // Verified Entry first instruction should be 5 bytes long for correct
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399 // patching by patch_verified_entry().
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400 //
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401 // C1Breakpoint and VerifyFPU have one byte first instruction.
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402 // Also first instruction will be one byte "push(rbp)" if stack banging
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403 // code is not generated (see build_frame() above).
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404 // For all these cases generate long instruction first.
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405 fat_nop();
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406 }
0
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407 if (C1Breakpoint)int3();
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408 // build frame
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409 verify_FPU(0, "method_entry");
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410 }
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411
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412
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413 #ifndef PRODUCT
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414
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415 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
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416 if (!VerifyOops) return;
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417 verify_oop_addr(Address(rsp, stack_offset));
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418 }
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419
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420 void C1_MacroAssembler::verify_not_null_oop(Register r) {
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421 if (!VerifyOops) return;
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422 Label not_null;
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423 testptr(r, r);
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424 jcc(Assembler::notZero, not_null);
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425 stop("non-null oop required");
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426 bind(not_null);
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427 verify_oop(r);
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428 }
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429
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430 void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
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431 #ifdef ASSERT
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432 if (inv_rax) movptr(rax, 0xDEAD);
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433 if (inv_rbx) movptr(rbx, 0xDEAD);
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434 if (inv_rcx) movptr(rcx, 0xDEAD);
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435 if (inv_rdx) movptr(rdx, 0xDEAD);
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436 if (inv_rsi) movptr(rsi, 0xDEAD);
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437 if (inv_rdi) movptr(rdi, 0xDEAD);
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438 #endif
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439 }
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440
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441 #endif // ifndef PRODUCT