annotate src/cpu/x86/vm/c1_MacroAssembler_x86.cpp @ 196:d1605aabd0a1 jdk7-b30

6719955: Update copyright year Summary: Update copyright year for files that have been modified in 2008 Reviewed-by: ohair, tbell
author xdono
date Wed, 02 Jul 2008 12:55:16 -0700
parents ba764ed4b6f2
children dc7f315e41f7
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1 /*
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d1605aabd0a1 6719955: Update copyright year
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2 * Copyright 1999-2008 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 #include "incls/_precompiled.incl"
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26 #include "incls/_c1_MacroAssembler_x86.cpp.incl"
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27
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28 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register scratch, Label& slow_case) {
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29 const int aligned_mask = 3;
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30 const int hdr_offset = oopDesc::mark_offset_in_bytes();
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31 assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
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32 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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33 assert(BytesPerWord == 4, "adjust aligned_mask and code");
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34 Label done;
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35 int null_check_offset = -1;
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36
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37 verify_oop(obj);
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38
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39 // save object being locked into the BasicObjectLock
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40 movl(Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()), obj);
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41
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42 if (UseBiasedLocking) {
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43 assert(scratch != noreg, "should have scratch register at this point");
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44 null_check_offset = biased_locking_enter(disp_hdr, obj, hdr, scratch, false, done, &slow_case);
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45 } else {
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46 null_check_offset = offset();
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47 }
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48
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49 // Load object header
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50 movl(hdr, Address(obj, hdr_offset));
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51 // and mark it as unlocked
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52 orl(hdr, markOopDesc::unlocked_value);
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53 // save unlocked object header into the displaced header location on the stack
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54 movl(Address(disp_hdr, 0), hdr);
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55 // test if object header is still the same (i.e. unlocked), and if so, store the
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56 // displaced header address in the object header - if it is not the same, get the
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57 // object header instead
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58 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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59 cmpxchg(disp_hdr, Address(obj, hdr_offset));
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60 // if the object header was the same, we're done
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61 if (PrintBiasedLockingStatistics) {
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62 cond_inc32(Assembler::equal,
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63 ExternalAddress((address)BiasedLocking::fast_path_entry_count_addr()));
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64 }
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65 jcc(Assembler::equal, done);
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66 // if the object header was not the same, it is now in the hdr register
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67 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
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68 //
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69 // 1) (hdr & aligned_mask) == 0
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70 // 2) rsp <= hdr
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71 // 3) hdr <= rsp + page_size
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72 //
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73 // these 3 tests can be done by evaluating the following expression:
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74 //
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75 // (hdr - rsp) & (aligned_mask - page_size)
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76 //
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77 // assuming both the stack pointer and page_size have their least
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78 // significant 2 bits cleared and page_size is a power of 2
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79 subl(hdr, rsp);
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80 andl(hdr, aligned_mask - os::vm_page_size());
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81 // for recursive locking, the result is zero => save it in the displaced header
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82 // location (NULL in the displaced hdr location indicates recursive locking)
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83 movl(Address(disp_hdr, 0), hdr);
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84 // otherwise we don't care about the result and handle locking via runtime call
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85 jcc(Assembler::notZero, slow_case);
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86 // done
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87 bind(done);
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88 return null_check_offset;
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89 }
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90
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91
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92 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
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93 const int aligned_mask = 3;
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94 const int hdr_offset = oopDesc::mark_offset_in_bytes();
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95 assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
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96 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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97 assert(BytesPerWord == 4, "adjust aligned_mask and code");
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98 Label done;
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99
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100 if (UseBiasedLocking) {
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101 // load object
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102 movl(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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103 biased_locking_exit(obj, hdr, done);
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104 }
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105
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106 // load displaced header
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107 movl(hdr, Address(disp_hdr, 0));
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108 // if the loaded hdr is NULL we had recursive locking
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109 testl(hdr, hdr);
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110 // if we had recursive locking, we are done
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111 jcc(Assembler::zero, done);
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112 if (!UseBiasedLocking) {
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113 // load object
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114 movl(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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115 }
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116 verify_oop(obj);
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117 // test if object header is pointing to the displaced header, and if so, restore
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118 // the displaced header in the object - if the object header is not pointing to
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119 // the displaced header, get the object header instead
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120 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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121 cmpxchg(hdr, Address(obj, hdr_offset));
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122 // if the object header was not pointing to the displaced header,
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123 // we do unlocking via runtime call
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124 jcc(Assembler::notEqual, slow_case);
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125 // done
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126 bind(done);
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127 }
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128
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129
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130 // Defines obj, preserves var_size_in_bytes
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131 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
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132 if (UseTLAB) {
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133 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
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134 } else {
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135 eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
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136 }
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137 }
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138
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139
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140 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
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141 assert_different_registers(obj, klass, len);
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142 if (UseBiasedLocking && !len->is_valid()) {
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143 assert_different_registers(obj, klass, len, t1, t2);
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144 movl(t1, Address(klass, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()));
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145 movl(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
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146 } else {
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147 movl(Address(obj, oopDesc::mark_offset_in_bytes ()), (int)markOopDesc::prototype());
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148 }
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149
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150 movl(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
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151 if (len->is_valid()) {
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152 movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
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153 }
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154 }
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155
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156
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157 // preserves obj, destroys len_in_bytes
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158 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
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159 Label done;
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160 assert(obj != len_in_bytes && obj != t1 && t1 != len_in_bytes, "registers must be different");
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161 assert((hdr_size_in_bytes & (BytesPerWord - 1)) == 0, "header size is not a multiple of BytesPerWord");
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162 Register index = len_in_bytes;
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163 subl(index, hdr_size_in_bytes);
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164 jcc(Assembler::zero, done);
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165 // initialize topmost word, divide index by 2, check if odd and test if zero
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166 // note: for the remaining code to work, index must be a multiple of BytesPerWord
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167 #ifdef ASSERT
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168 { Label L;
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169 testl(index, BytesPerWord - 1);
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170 jcc(Assembler::zero, L);
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171 stop("index is not a multiple of BytesPerWord");
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172 bind(L);
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173 }
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174 #endif
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175 xorl(t1, t1); // use _zero reg to clear memory (shorter code)
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176 if (UseIncDec) {
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177 shrl(index, 3); // divide by 8 and set carry flag if bit 2 was set
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178 } else {
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179 shrl(index, 2); // use 2 instructions to avoid partial flag stall
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180 shrl(index, 1);
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181 }
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182 // index could have been not a multiple of 8 (i.e., bit 2 was set)
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183 { Label even;
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184 // note: if index was a multiple of 8, than it cannot
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185 // be 0 now otherwise it must have been 0 before
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186 // => if it is even, we don't need to check for 0 again
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187 jcc(Assembler::carryClear, even);
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188 // clear topmost word (no jump needed if conditional assignment would work here)
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189 movl(Address(obj, index, Address::times_8, hdr_size_in_bytes - 0*BytesPerWord), t1);
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190 // index could be 0 now, need to check again
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191 jcc(Assembler::zero, done);
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192 bind(even);
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193 }
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194 // initialize remaining object fields: rdx is a multiple of 2 now
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195 { Label loop;
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196 bind(loop);
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197 movl(Address(obj, index, Address::times_8, hdr_size_in_bytes - 1*BytesPerWord), t1);
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198 movl(Address(obj, index, Address::times_8, hdr_size_in_bytes - 2*BytesPerWord), t1);
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199 decrement(index);
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200 jcc(Assembler::notZero, loop);
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201 }
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202
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203 // done
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204 bind(done);
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205 }
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206
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207
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208 void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
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209 assert(obj == rax, "obj must be in rax, for cmpxchg");
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210 assert(obj != t1 && obj != t2 && t1 != t2, "registers must be different"); // XXX really?
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211 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
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212
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213 try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
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214
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215 initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2);
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216 }
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217
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218 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2) {
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219 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
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220 "con_size_in_bytes is not multiple of alignment");
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
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221 const int hdr_size_in_bytes = instanceOopDesc::base_offset_in_bytes();
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222
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223 initialize_header(obj, klass, noreg, t1, t2);
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224
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225 // clear rest of allocated space
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226 const Register t1_zero = t1;
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227 const Register index = t2;
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228 const int threshold = 6 * BytesPerWord; // approximate break even point for code size (see comments below)
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229 if (var_size_in_bytes != noreg) {
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230 movl(index, var_size_in_bytes);
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231 initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
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232 } else if (con_size_in_bytes <= threshold) {
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233 // use explicit null stores
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234 // code size = 2 + 3*n bytes (n = number of fields to clear)
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235 xorl(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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236 for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
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237 movl(Address(obj, i), t1_zero);
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238 } else if (con_size_in_bytes > hdr_size_in_bytes) {
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239 // use loop to null out the fields
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240 // code size = 16 bytes for even n (n = number of fields to clear)
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241 // initialize last object field first if odd number of fields
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242 xorl(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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243 movl(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
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244 // initialize last object field if constant size is odd
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245 if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
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246 movl(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
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247 // initialize remaining object fields: rdx is a multiple of 2
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248 { Label loop;
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249 bind(loop);
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250 movl(Address(obj, index, Address::times_8,
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251 hdr_size_in_bytes - (1*BytesPerWord)), t1_zero);
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252 movl(Address(obj, index, Address::times_8,
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253 hdr_size_in_bytes - (2*BytesPerWord)), t1_zero);
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254 decrement(index);
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255 jcc(Assembler::notZero, loop);
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256 }
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257 }
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258
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259 if (DTraceAllocProbes) {
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260 assert(obj == rax, "must be");
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261 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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262 }
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263
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264 verify_oop(obj);
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265 }
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266
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267 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int header_size, Address::ScaleFactor f, Register klass, Label& slow_case) {
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268 assert(obj == rax, "obj must be in rax, for cmpxchg");
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269 assert_different_registers(obj, len, t1, t2, klass);
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270
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271 // determine alignment mask
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272 assert(BytesPerWord == 4, "must be a multiple of 2 for masking code to work");
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273
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274 // check for negative or excessive length
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275 cmpl(len, max_array_allocation_length);
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276 jcc(Assembler::above, slow_case);
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277
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278 const Register arr_size = t2; // okay to be the same
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279 // align object end
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280 movl(arr_size, header_size * BytesPerWord + MinObjAlignmentInBytesMask);
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281 leal(arr_size, Address(arr_size, len, f));
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282 andl(arr_size, ~MinObjAlignmentInBytesMask);
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283
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284 try_allocate(obj, arr_size, 0, t1, t2, slow_case);
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285
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286 initialize_header(obj, klass, len, t1, t2);
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287
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288 // clear rest of allocated space
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289 const Register len_zero = len;
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290 initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
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291
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292 if (DTraceAllocProbes) {
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293 assert(obj == rax, "must be");
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294 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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295 }
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296
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297 verify_oop(obj);
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298 }
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299
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300
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301
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302 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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303 verify_oop(receiver);
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304 // explicit NULL check not needed since load from [klass_offset] causes a trap
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305 // check against inline cache
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306 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
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307 int start_offset = offset();
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308 cmpl(iCache, Address(receiver, oopDesc::klass_offset_in_bytes()));
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309 // if icache check fails, then jump to runtime routine
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310 // Note: RECEIVER must still contain the receiver!
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311 jump_cc(Assembler::notEqual,
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312 RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
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313 assert(offset() - start_offset == 9, "check alignment in emit_method_entry");
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314 }
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315
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316
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317 void C1_MacroAssembler::method_exit(bool restore_frame) {
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318 if (restore_frame) {
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319 leave();
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320 }
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321 ret(0);
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322 }
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323
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324
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325 void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
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326 // Make sure there is enough stack space for this method's activation.
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327 // Note that we do this before doing an enter(). This matches the
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328 // ordering of C2's stack overflow check / rsp decrement and allows
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329 // the SharedRuntime stack overflow handling to be consistent
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330 // between the two compilers.
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331 generate_stack_overflow_check(frame_size_in_bytes);
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332
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333 enter();
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334 #ifdef TIERED
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335 // c2 leaves fpu stack dirty. Clean it on entry
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336 if (UseSSE < 2 ) {
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337 empty_FPU_stack();
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338 }
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339 #endif // TIERED
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340 decrement(rsp, frame_size_in_bytes); // does not emit code for frame_size == 0
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341 }
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342
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343
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344 void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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345 if (C1Breakpoint) int3();
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346 inline_cache_check(receiver, ic_klass);
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347 }
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348
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349
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350 void C1_MacroAssembler::verified_entry() {
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351 if (C1Breakpoint)int3();
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352 // build frame
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353 verify_FPU(0, "method_entry");
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354 }
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355
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356
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357 #ifndef PRODUCT
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358
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359 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
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360 if (!VerifyOops) return;
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361 verify_oop_addr(Address(rsp, stack_offset));
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362 }
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363
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364 void C1_MacroAssembler::verify_not_null_oop(Register r) {
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365 if (!VerifyOops) return;
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366 Label not_null;
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367 testl(r, r);
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368 jcc(Assembler::notZero, not_null);
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369 stop("non-null oop required");
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370 bind(not_null);
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371 verify_oop(r);
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372 }
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373
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374 void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
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375 #ifdef ASSERT
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376 if (inv_rax) movl(rax, 0xDEAD);
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377 if (inv_rbx) movl(rbx, 0xDEAD);
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378 if (inv_rcx) movl(rcx, 0xDEAD);
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379 if (inv_rdx) movl(rdx, 0xDEAD);
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380 if (inv_rsi) movl(rsi, 0xDEAD);
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381 if (inv_rdi) movl(rdi, 0xDEAD);
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382 #endif
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383 }
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384
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385 #endif // ifndef PRODUCT