Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 7154:5d0bb7d52783
changes to support Graal co-existing with the other HotSpot compiler(s) and being used for explicit compilation requests and code installation via the Graal API
| author | Doug Simon <doug.simon@oracle.com> |
|---|---|
| date | Wed, 12 Dec 2012 21:36:40 +0100 |
| parents | e522a00b91aa |
| children | 291ffc492eb6 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "asm/assembler.hpp" | |
| 27 #include "assembler_x86.inline.hpp" | |
| 28 #include "code/debugInfoRec.hpp" | |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
| 1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
| 0 | 43 |
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44 #define __ masm-> |
| 0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
| 0 | 48 class SimpleRuntimeFrame { |
| 49 | |
| 50 public: | |
| 51 | |
| 52 // Most of the runtime stubs have this simple frame layout. | |
| 53 // This class exists to make the layout shared in one place. | |
| 54 // Offsets are for compiler stack slots, which are jints. | |
| 55 enum layout { | |
| 56 // The frame sender code expects that rbp will be in the "natural" place and | |
| 57 // will override any oopMap setting for it. We must therefore force the layout | |
| 58 // so that it agrees with the frame sender code. | |
| 59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
| 60 rbp_off2, | |
| 61 return_off, return_off2, | |
| 62 framesize | |
| 63 }; | |
| 64 }; | |
| 65 | |
| 66 class RegisterSaver { | |
| 67 // Capture info about frame layout. Layout offsets are in jint | |
| 68 // units because compiler frame slots are jints. | |
| 69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
| 70 enum layout { | |
| 71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
| 72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
| 73 DEF_XMM_OFFS(0), | |
| 74 DEF_XMM_OFFS(1), | |
| 75 DEF_XMM_OFFS(2), | |
| 76 DEF_XMM_OFFS(3), | |
| 77 DEF_XMM_OFFS(4), | |
| 78 DEF_XMM_OFFS(5), | |
| 79 DEF_XMM_OFFS(6), | |
| 80 DEF_XMM_OFFS(7), | |
| 81 DEF_XMM_OFFS(8), | |
| 82 DEF_XMM_OFFS(9), | |
| 83 DEF_XMM_OFFS(10), | |
| 84 DEF_XMM_OFFS(11), | |
| 85 DEF_XMM_OFFS(12), | |
| 86 DEF_XMM_OFFS(13), | |
| 87 DEF_XMM_OFFS(14), | |
| 88 DEF_XMM_OFFS(15), | |
| 89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
| 90 fpu_stateH_end, | |
| 91 r15_off, r15H_off, | |
| 92 r14_off, r14H_off, | |
| 93 r13_off, r13H_off, | |
| 94 r12_off, r12H_off, | |
| 95 r11_off, r11H_off, | |
| 96 r10_off, r10H_off, | |
| 97 r9_off, r9H_off, | |
| 98 r8_off, r8H_off, | |
| 99 rdi_off, rdiH_off, | |
| 100 rsi_off, rsiH_off, | |
| 101 ignore_off, ignoreH_off, // extra copy of rbp | |
| 102 rsp_off, rspH_off, | |
| 103 rbx_off, rbxH_off, | |
| 104 rdx_off, rdxH_off, | |
| 105 rcx_off, rcxH_off, | |
| 106 rax_off, raxH_off, | |
| 107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
| 108 align_off, alignH_off, | |
| 109 flags_off, flagsH_off, | |
| 110 // The frame sender code expects that rbp will be in the "natural" place and | |
| 111 // will override any oopMap setting for it. We must therefore force the layout | |
| 112 // so that it agrees with the frame sender code. | |
| 113 rbp_off, rbpH_off, // copy of rbp we will restore | |
| 114 return_off, returnH_off, // slot for return address | |
| 115 reg_save_size // size in compiler stack slots | |
| 116 }; | |
| 117 | |
| 118 public: | |
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119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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120 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
| 0 | 121 |
| 122 // Offsets into the register save area | |
| 123 // Used by deoptimization when it is managing result register | |
| 124 // values on its own | |
| 125 | |
| 126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
| 304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
| 0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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129 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
| 0 | 130 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
| 131 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
| 132 | |
| 133 // During deoptimization only the result registers need to be restored, | |
| 134 // all the other values have already been extracted. | |
| 135 static void restore_result_registers(MacroAssembler* masm); | |
| 136 }; | |
| 137 | |
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138 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
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139 int vect_words = 0; |
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140 #ifdef COMPILER2 |
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141 if (save_vectors) { |
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142 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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143 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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144 // Save upper half of YMM registes |
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145 vect_words = 16 * 16 / wordSize; |
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146 additional_frame_words += vect_words; |
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147 } |
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148 #else |
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149 assert(!save_vectors, "vectors are generated only by C2"); |
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150 #endif |
| 0 | 151 |
| 152 // Always make the frame size 16-byte aligned | |
| 153 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
| 154 reg_save_size*BytesPerInt, 16); | |
| 155 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
| 156 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
| 157 // The caller will allocate additional_frame_words | |
| 158 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
| 159 // CodeBlob frame size is in words. | |
| 160 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
| 161 *total_frame_words = frame_size_in_words; | |
| 162 | |
| 163 // Save registers, fpu state, and flags. | |
| 164 // We assume caller has already pushed the return address onto the | |
| 165 // stack, so rsp is 8-byte aligned here. | |
| 166 // We push rpb twice in this sequence because we want the real rbp | |
| 167 // to be under the return like a normal enter. | |
| 168 | |
| 169 __ enter(); // rsp becomes 16-byte aligned here | |
| 170 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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171 |
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172 if (vect_words > 0) { |
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173 assert(vect_words*wordSize == 256, ""); |
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174 __ subptr(rsp, 256); // Save upper half of YMM registes |
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175 __ vextractf128h(Address(rsp, 0),xmm0); |
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176 __ vextractf128h(Address(rsp, 16),xmm1); |
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177 __ vextractf128h(Address(rsp, 32),xmm2); |
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178 __ vextractf128h(Address(rsp, 48),xmm3); |
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179 __ vextractf128h(Address(rsp, 64),xmm4); |
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180 __ vextractf128h(Address(rsp, 80),xmm5); |
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181 __ vextractf128h(Address(rsp, 96),xmm6); |
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182 __ vextractf128h(Address(rsp,112),xmm7); |
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183 __ vextractf128h(Address(rsp,128),xmm8); |
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184 __ vextractf128h(Address(rsp,144),xmm9); |
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185 __ vextractf128h(Address(rsp,160),xmm10); |
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186 __ vextractf128h(Address(rsp,176),xmm11); |
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187 __ vextractf128h(Address(rsp,192),xmm12); |
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188 __ vextractf128h(Address(rsp,208),xmm13); |
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189 __ vextractf128h(Address(rsp,224),xmm14); |
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190 __ vextractf128h(Address(rsp,240),xmm15); |
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191 } |
| 0 | 192 if (frame::arg_reg_save_area_bytes != 0) { |
| 193 // Allocate argument register save area | |
| 304 | 194 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 195 } |
| 196 | |
| 197 // Set an oopmap for the call site. This oopmap will map all | |
| 198 // oop-registers and debug-info registers as callee-saved. This | |
| 199 // will allow deoptimization at this safepoint to find all possible | |
| 200 // debug-info recordings, as well as let GC find all oops. | |
| 201 | |
| 202 OopMapSet *oop_maps = new OopMapSet(); | |
| 203 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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204 |
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205 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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206 |
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207 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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208 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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209 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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210 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
| 0 | 211 // rbp location is known implicitly by the frame sender code, needs no oopmap |
| 212 // and the location where rbp was saved by is ignored | |
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213 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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214 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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215 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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216 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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217 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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218 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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219 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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220 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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221 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
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222 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
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223 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
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224 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
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225 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
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226 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
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227 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
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228 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
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229 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
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230 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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231 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
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232 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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233 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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234 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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235 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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238 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
| 0 | 239 |
| 240 // %%% These should all be a waste but we'll keep things as they were for now | |
| 241 if (true) { | |
|
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242 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
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243 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
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244 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
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245 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
| 0 | 246 // rbp location is known implicitly by the frame sender code, needs no oopmap |
|
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247 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
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248 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
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249 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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250 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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251 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
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252 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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253 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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254 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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255 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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256 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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257 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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258 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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259 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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260 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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261 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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262 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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263 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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264 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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265 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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266 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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267 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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268 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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269 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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270 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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271 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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272 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
| 0 | 273 } |
| 274 | |
| 275 return map; | |
| 276 } | |
| 277 | |
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278 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
| 0 | 279 if (frame::arg_reg_save_area_bytes != 0) { |
| 280 // Pop arg register save area | |
| 304 | 281 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 282 } |
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283 #ifdef COMPILER2 |
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284 if (restore_vectors) { |
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285 // Restore upper half of YMM registes. |
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286 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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287 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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288 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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289 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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290 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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291 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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292 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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293 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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294 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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295 __ vinsertf128h(xmm7, Address(rsp,112)); |
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296 __ vinsertf128h(xmm8, Address(rsp,128)); |
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297 __ vinsertf128h(xmm9, Address(rsp,144)); |
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298 __ vinsertf128h(xmm10, Address(rsp,160)); |
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299 __ vinsertf128h(xmm11, Address(rsp,176)); |
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300 __ vinsertf128h(xmm12, Address(rsp,192)); |
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301 __ vinsertf128h(xmm13, Address(rsp,208)); |
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302 __ vinsertf128h(xmm14, Address(rsp,224)); |
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303 __ vinsertf128h(xmm15, Address(rsp,240)); |
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304 __ addptr(rsp, 256); |
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305 } |
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306 #else |
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307 assert(!restore_vectors, "vectors are generated only by C2"); |
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308 #endif |
| 0 | 309 // Recover CPU state |
| 310 __ pop_CPU_state(); | |
| 311 // Get the rbp described implicitly by the calling convention (no oopMap) | |
| 304 | 312 __ pop(rbp); |
| 0 | 313 } |
| 314 | |
| 315 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 316 | |
| 317 // Just restore result register. Only used by deoptimization. By | |
| 318 // now any callee save register that needs to be restored to a c2 | |
| 319 // caller of the deoptee has been extracted into the vframeArray | |
| 320 // and will be stuffed into the c2i adapter we create for later | |
| 321 // restoration so only result registers need to be restored here. | |
| 322 | |
| 323 // Restore fp result register | |
| 324 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
| 325 // Restore integer result register | |
| 304 | 326 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
| 327 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
| 328 | |
| 0 | 329 // Pop all of the register save are off the stack except the return address |
| 304 | 330 __ addptr(rsp, return_offset_in_bytes()); |
| 0 | 331 } |
| 332 | |
|
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333 // Is vector's size (in bytes) bigger than a size saved by default? |
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334 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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335 bool SharedRuntime::is_wide_vector(int size) { |
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336 return size > 16; |
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337 } |
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338 |
| 0 | 339 // The java_calling_convention describes stack locations as ideal slots on |
| 340 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 341 // (like the placement of the register window) the slots must be biased by | |
| 342 // the following value. | |
| 343 static int reg2offset_in(VMReg r) { | |
| 344 // Account for saved rbp and return address | |
| 345 // This should really be in_preserve_stack_slots | |
| 346 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
| 347 } | |
| 348 | |
| 349 static int reg2offset_out(VMReg r) { | |
| 350 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 351 } | |
| 352 | |
| 353 // --------------------------------------------------------------------------- | |
| 354 // Read the array of BasicTypes from a signature, and compute where the | |
| 355 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 356 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
| 357 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 358 // as framesizes are fixed. | |
| 359 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 360 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 361 // up to RegisterImpl::number_of_registers) are the 64-bit | |
| 362 // integer registers. | |
| 363 | |
| 364 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 365 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 366 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 367 | |
| 368 // The Java calling convention is a "shifted" version of the C ABI. | |
| 369 // By skipping the first C ABI register we can call non-static jni methods | |
| 370 // with small numbers of arguments without having to shuffle the arguments | |
| 371 // at all. Since we control the java ABI we ought to at least get some | |
| 372 // advantage out of it. | |
| 373 | |
| 374 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 375 VMRegPair *regs, | |
| 376 int total_args_passed, | |
| 377 int is_outgoing) { | |
| 378 | |
| 379 // Create the mapping between argument positions and | |
| 380 // registers. | |
| 381 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
| 382 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
| 383 }; | |
| 384 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
| 385 j_farg0, j_farg1, j_farg2, j_farg3, | |
| 386 j_farg4, j_farg5, j_farg6, j_farg7 | |
| 387 }; | |
| 388 | |
| 389 | |
| 390 uint int_args = 0; | |
| 391 uint fp_args = 0; | |
| 392 uint stk_args = 0; // inc by 2 each time | |
| 393 | |
| 394 for (int i = 0; i < total_args_passed; i++) { | |
| 395 switch (sig_bt[i]) { | |
| 396 case T_BOOLEAN: | |
| 397 case T_CHAR: | |
| 398 case T_BYTE: | |
| 399 case T_SHORT: | |
| 400 case T_INT: | |
| 401 if (int_args < Argument::n_int_register_parameters_j) { | |
| 402 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 403 } else { | |
| 404 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 405 stk_args += 2; | |
| 406 } | |
| 407 break; | |
| 408 case T_VOID: | |
| 409 // halves of T_LONG or T_DOUBLE | |
| 410 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 411 regs[i].set_bad(); | |
| 412 break; | |
| 413 case T_LONG: | |
| 414 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 415 // fall through | |
| 416 case T_OBJECT: | |
| 417 case T_ARRAY: | |
| 418 case T_ADDRESS: | |
| 419 if (int_args < Argument::n_int_register_parameters_j) { | |
| 420 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 421 } else { | |
| 422 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 423 stk_args += 2; | |
| 424 } | |
| 425 break; | |
| 426 case T_FLOAT: | |
| 427 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 428 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 429 } else { | |
| 430 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 431 stk_args += 2; | |
| 432 } | |
| 433 break; | |
| 434 case T_DOUBLE: | |
| 435 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 436 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 437 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 438 } else { | |
| 439 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 440 stk_args += 2; | |
| 441 } | |
| 442 break; | |
| 443 default: | |
| 444 ShouldNotReachHere(); | |
| 445 break; | |
| 446 } | |
| 447 } | |
| 448 | |
| 449 return round_to(stk_args, 2); | |
| 450 } | |
| 451 | |
| 452 // Patch the callers callsite with entry to compiled code if it exists. | |
| 453 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 454 Label L; | |
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455 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 456 __ jcc(Assembler::equal, L); |
| 457 | |
| 458 // Save the current stack pointer | |
| 304 | 459 __ mov(r13, rsp); |
| 0 | 460 // Schedule the branch target address early. |
| 461 // Call into the VM to patch the caller, then jump to compiled callee | |
| 462 // rax isn't live so capture return address while we easily can | |
| 304 | 463 __ movptr(rax, Address(rsp, 0)); |
| 0 | 464 |
| 465 // align stack so push_CPU_state doesn't fault | |
| 304 | 466 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 467 __ push_CPU_state(); |
| 468 | |
| 469 // VM needs caller's callsite | |
| 470 // VM needs target method | |
| 471 // This needs to be a long call since we will relocate this adapter to | |
| 472 // the codeBuffer and it may not reach | |
| 473 | |
| 474 // Allocate argument register save area | |
| 475 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 476 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 477 } |
| 304 | 478 __ mov(c_rarg0, rbx); |
| 479 __ mov(c_rarg1, rax); | |
| 0 | 480 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 481 | |
| 482 // De-allocate argument register save area | |
| 483 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 484 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 485 } |
| 486 | |
| 487 __ pop_CPU_state(); | |
| 488 // restore sp | |
| 304 | 489 __ mov(rsp, r13); |
| 0 | 490 __ bind(L); |
| 491 } | |
| 492 | |
| 493 | |
| 494 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 495 int total_args_passed, | |
| 496 int comp_args_on_stack, | |
| 497 const BasicType *sig_bt, | |
| 498 const VMRegPair *regs, | |
| 499 Label& skip_fixup) { | |
| 500 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 501 // at all. We've come from compiled code and are attempting to jump to the | |
| 502 // interpreter, which means the caller made a static call to get here | |
| 503 // (vcalls always get a compiled target if there is one). Check for a | |
| 504 // compiled target. If there is one, we need to patch the caller's call. | |
| 505 patch_callers_callsite(masm); | |
| 506 | |
| 507 __ bind(skip_fixup); | |
| 508 | |
| 509 // Since all args are passed on the stack, total_args_passed * | |
| 510 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
| 511 // we also account for the return address location since | |
| 512 // we store it first rather than hold it in rax across all the shuffling | |
| 513 | |
| 1506 | 514 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
| 0 | 515 |
| 516 // stack is aligned, keep it that way | |
| 517 extraspace = round_to(extraspace, 2*wordSize); | |
| 518 | |
| 519 // Get return address | |
| 304 | 520 __ pop(rax); |
| 0 | 521 |
| 522 // set senderSP value | |
| 304 | 523 __ mov(r13, rsp); |
| 524 | |
| 525 __ subptr(rsp, extraspace); | |
| 0 | 526 |
| 527 // Store the return address in the expected location | |
| 304 | 528 __ movptr(Address(rsp, 0), rax); |
| 0 | 529 |
| 530 // Now write the args into the outgoing interpreter space | |
| 531 for (int i = 0; i < total_args_passed; i++) { | |
| 532 if (sig_bt[i] == T_VOID) { | |
| 533 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 534 continue; | |
| 535 } | |
| 536 | |
| 537 // offset to start parameters | |
| 1506 | 538 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 539 int next_off = st_off - Interpreter::stackElementSize; | |
| 0 | 540 |
| 541 // Say 4 args: | |
| 542 // i st_off | |
| 543 // 0 32 T_LONG | |
| 544 // 1 24 T_VOID | |
| 545 // 2 16 T_OBJECT | |
| 546 // 3 8 T_BOOL | |
| 547 // - 0 return address | |
| 548 // | |
| 549 // However to make thing extra confusing. Because we can fit a long/double in | |
| 550 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
| 551 // leaves one slot empty and only stores to a single slot. In this case the | |
| 552 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
| 553 | |
| 554 VMReg r_1 = regs[i].first(); | |
| 555 VMReg r_2 = regs[i].second(); | |
| 556 if (!r_1->is_valid()) { | |
| 557 assert(!r_2->is_valid(), ""); | |
| 558 continue; | |
| 559 } | |
| 560 if (r_1->is_stack()) { | |
| 561 // memory to memory use rax | |
| 562 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 563 if (!r_2->is_valid()) { | |
| 564 // sign extend?? | |
| 565 __ movl(rax, Address(rsp, ld_off)); | |
| 304 | 566 __ movptr(Address(rsp, st_off), rax); |
| 0 | 567 |
| 568 } else { | |
| 569 | |
| 570 __ movq(rax, Address(rsp, ld_off)); | |
| 571 | |
| 572 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 573 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 574 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 575 // ld_off == LSW, ld_off+wordSize == MSW | |
| 576 // st_off == MSW, next_off == LSW | |
| 577 __ movq(Address(rsp, next_off), rax); | |
| 578 #ifdef ASSERT | |
| 579 // Overwrite the unused slot with known junk | |
| 580 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 304 | 581 __ movptr(Address(rsp, st_off), rax); |
| 0 | 582 #endif /* ASSERT */ |
| 583 } else { | |
| 584 __ movq(Address(rsp, st_off), rax); | |
| 585 } | |
| 586 } | |
| 587 } else if (r_1->is_Register()) { | |
| 588 Register r = r_1->as_Register(); | |
| 589 if (!r_2->is_valid()) { | |
| 590 // must be only an int (or less ) so move only 32bits to slot | |
| 591 // why not sign extend?? | |
| 592 __ movl(Address(rsp, st_off), r); | |
| 593 } else { | |
| 594 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 595 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 596 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 597 // long/double in gpr | |
| 598 #ifdef ASSERT | |
| 599 // Overwrite the unused slot with known junk | |
| 600 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
| 304 | 601 __ movptr(Address(rsp, st_off), rax); |
| 0 | 602 #endif /* ASSERT */ |
| 603 __ movq(Address(rsp, next_off), r); | |
| 604 } else { | |
| 304 | 605 __ movptr(Address(rsp, st_off), r); |
| 0 | 606 } |
| 607 } | |
| 608 } else { | |
| 609 assert(r_1->is_XMMRegister(), ""); | |
| 610 if (!r_2->is_valid()) { | |
| 611 // only a float use just part of the slot | |
| 612 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 613 } else { | |
| 614 #ifdef ASSERT | |
| 615 // Overwrite the unused slot with known junk | |
| 616 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
| 304 | 617 __ movptr(Address(rsp, st_off), rax); |
| 0 | 618 #endif /* ASSERT */ |
| 619 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
| 620 } | |
| 621 } | |
| 622 } | |
| 623 | |
| 624 // Schedule the branch target address early. | |
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625 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
| 0 | 626 __ jmp(rcx); |
| 627 } | |
| 628 | |
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629 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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630 address code_start, address code_end, |
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631 Label& L_ok) { |
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632 Label L_fail; |
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633 __ lea(temp_reg, ExternalAddress(code_start)); |
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634 __ cmpptr(pc_reg, temp_reg); |
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635 __ jcc(Assembler::belowEqual, L_fail); |
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636 __ lea(temp_reg, ExternalAddress(code_end)); |
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637 __ cmpptr(pc_reg, temp_reg); |
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638 __ jcc(Assembler::below, L_ok); |
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639 __ bind(L_fail); |
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640 } |
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641 |
| 0 | 642 static void gen_i2c_adapter(MacroAssembler *masm, |
| 643 int total_args_passed, | |
| 644 int comp_args_on_stack, | |
| 645 const BasicType *sig_bt, | |
| 646 const VMRegPair *regs) { | |
| 647 | |
| 648 // Note: r13 contains the senderSP on entry. We must preserve it since | |
| 649 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 650 // code goes non-entrant while we get args ready. | |
| 651 // In addition we use r13 to locate all the interpreter args as | |
| 652 // we must align the stack to 16 bytes on an i2c entry else we | |
| 653 // lose alignment we expect in all compiled code and register | |
| 654 // save code can segv when fxsave instructions find improperly | |
| 655 // aligned stack pointer. | |
| 656 | |
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657 // Adapters can be frameless because they do not require the caller |
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658 // to perform additional cleanup work, such as correcting the stack pointer. |
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659 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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660 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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661 // even if a callee has modified the stack pointer. |
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662 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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663 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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664 // up via the senderSP register). |
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665 // In other words, if *either* the caller or callee is interpreted, we can |
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666 // get the stack pointer repaired after a call. |
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667 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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668 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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669 // both caller and callee would be compiled methods, and neither would |
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670 // clean up the stack pointer changes performed by the two adapters. |
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671 // If this happens, control eventually transfers back to the compiled |
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672 // caller, but with an uncorrected stack, causing delayed havoc. |
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673 |
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674 // Pick up the return address |
| 304 | 675 __ movptr(rax, Address(rsp, 0)); |
| 0 | 676 |
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677 if (VerifyAdapterCalls && |
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678 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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679 // So, let's test for cascading c2i/i2c adapters right now. |
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680 // assert(Interpreter::contains($return_addr) || |
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681 // StubRoutines::contains($return_addr), |
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682 // "i2c adapter must return to an interpreter frame"); |
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683 __ block_comment("verify_i2c { "); |
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684 Label L_ok; |
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685 if (Interpreter::code() != NULL) |
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686 range_check(masm, rax, r11, |
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687 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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688 L_ok); |
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689 if (StubRoutines::code1() != NULL) |
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690 range_check(masm, rax, r11, |
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691 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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692 L_ok); |
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693 if (StubRoutines::code2() != NULL) |
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694 range_check(masm, rax, r11, |
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695 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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696 L_ok); |
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697 const char* msg = "i2c adapter must return to an interpreter frame"; |
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698 __ block_comment(msg); |
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699 __ stop(msg); |
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700 __ bind(L_ok); |
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701 __ block_comment("} verify_i2ce "); |
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702 } |
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703 |
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704 // Must preserve original SP for loading incoming arguments because |
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705 // we need to align the outgoing SP for compiled code. |
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706 __ movptr(r11, rsp); |
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707 |
| 0 | 708 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
| 709 // in registers, we will occasionally have no stack args. | |
| 710 int comp_words_on_stack = 0; | |
| 711 if (comp_args_on_stack) { | |
| 712 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 713 // registers are below. By subtracting stack0, we either get a negative | |
| 714 // number (all values in registers) or the maximum stack slot accessed. | |
| 715 | |
| 716 // Convert 4-byte c2 stack slots to words. | |
| 717 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
| 718 // Round up to miminum stack alignment, in wordSize | |
| 719 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 720 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 721 } |
| 722 | |
| 723 | |
| 724 // Ensure compiled code always sees stack at proper alignment | |
| 304 | 725 __ andptr(rsp, -16); |
| 0 | 726 |
| 727 // push the return address and misalign the stack that youngest frame always sees | |
| 728 // as far as the placement of the call instruction | |
| 304 | 729 __ push(rax); |
| 0 | 730 |
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731 // Put saved SP in another register |
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732 const Register saved_sp = rax; |
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733 __ movptr(saved_sp, r11); |
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734 |
| 0 | 735 // Will jump to the compiled code just as if compiled code was doing it. |
| 736 // Pre-load the register-jump target early, to schedule it better. | |
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737 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
| 0 | 738 |
|
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739 #ifdef GRAAL |
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740 // check if this call should be routed towards a specific entry point |
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741 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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742 Label no_alternative_target; |
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743 __ jcc(Assembler::equal, no_alternative_target); |
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744 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
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745 __ movptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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746 __ bind(no_alternative_target); |
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747 #endif |
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748 |
| 0 | 749 // Now generate the shuffle code. Pick up all register args and move the |
| 750 // rest through the floating point stack top. | |
| 751 for (int i = 0; i < total_args_passed; i++) { | |
| 752 if (sig_bt[i] == T_VOID) { | |
| 753 // Longs and doubles are passed in native word order, but misaligned | |
| 754 // in the 32-bit build. | |
| 755 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 756 continue; | |
| 757 } | |
| 758 | |
| 759 // Pick up 0, 1 or 2 words from SP+offset. | |
| 760 | |
| 761 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 762 "scrambled load targets?"); | |
| 763 // Load in argument order going down. | |
| 1506 | 764 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
| 0 | 765 // Point to interpreter value (vs. tag) |
| 1506 | 766 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 767 // |
| 768 // | |
| 769 // | |
| 770 VMReg r_1 = regs[i].first(); | |
| 771 VMReg r_2 = regs[i].second(); | |
| 772 if (!r_1->is_valid()) { | |
| 773 assert(!r_2->is_valid(), ""); | |
| 774 continue; | |
| 775 } | |
| 776 if (r_1->is_stack()) { | |
| 777 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 778 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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779 |
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780 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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781 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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782 // will be generated. |
| 0 | 783 if (!r_2->is_valid()) { |
| 784 // sign extend??? | |
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785 __ movl(r13, Address(saved_sp, ld_off)); |
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786 __ movptr(Address(rsp, st_off), r13); |
| 0 | 787 } else { |
| 788 // | |
| 789 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 790 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 791 // So we must adjust where to pick up the data to match the interpreter. | |
| 792 // | |
| 793 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 794 // are accessed as negative so LSW is at LOW address | |
| 795 | |
| 796 // ld_off is MSW so get LSW | |
| 797 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 798 next_off : ld_off; | |
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799 __ movq(r13, Address(saved_sp, offset)); |
| 0 | 800 // st_off is LSW (i.e. reg.first()) |
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801 __ movq(Address(rsp, st_off), r13); |
| 0 | 802 } |
| 803 } else if (r_1->is_Register()) { // Register argument | |
| 804 Register r = r_1->as_Register(); | |
| 805 assert(r != rax, "must be different"); | |
| 806 if (r_2->is_valid()) { | |
| 807 // | |
| 808 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 809 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 810 // So we must adjust where to pick up the data to match the interpreter. | |
| 811 | |
| 812 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 813 next_off : ld_off; | |
| 814 | |
| 815 // this can be a misaligned move | |
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816 __ movq(r, Address(saved_sp, offset)); |
| 0 | 817 } else { |
| 818 // sign extend and use a full word? | |
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819 __ movl(r, Address(saved_sp, ld_off)); |
| 0 | 820 } |
| 821 } else { | |
| 822 if (!r_2->is_valid()) { | |
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823 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
| 0 | 824 } else { |
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825 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
| 0 | 826 } |
| 827 } | |
| 828 } | |
| 829 | |
| 830 // 6243940 We might end up in handle_wrong_method if | |
| 831 // the callee is deoptimized as we race thru here. If that | |
| 832 // happens we don't want to take a safepoint because the | |
| 833 // caller frame will look interpreted and arguments are now | |
| 834 // "compiled" so it is much better to make this transition | |
| 835 // invisible to the stack walking code. Unfortunately if | |
| 836 // we try and find the callee by normal means a safepoint | |
| 837 // is possible. So we stash the desired callee in the thread | |
| 838 // and the vm will find there should this case occur. | |
| 839 | |
| 304 | 840 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
| 0 | 841 |
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842 // put Method* where a c2i would expect should we end up there |
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843 // only needed becaus eof c2 resolve stubs return Method* as a result in |
| 0 | 844 // rax |
| 304 | 845 __ mov(rax, rbx); |
| 0 | 846 __ jmp(r11); |
| 847 } | |
| 848 | |
| 849 // --------------------------------------------------------------- | |
| 850 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 851 int total_args_passed, | |
| 852 int comp_args_on_stack, | |
| 853 const BasicType *sig_bt, | |
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854 const VMRegPair *regs, |
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855 AdapterFingerPrint* fingerprint) { |
| 0 | 856 address i2c_entry = __ pc(); |
| 857 | |
| 858 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 859 | |
| 860 // ------------------------------------------------------------------------- | |
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861 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
| 0 | 862 // to the interpreter. The args start out packed in the compiled layout. They |
| 863 // need to be unpacked into the interpreter layout. This will almost always | |
| 864 // require some stack space. We grow the current (compiled) stack, then repack | |
| 865 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 866 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 867 // compiled code, which relys solely on SP and not RBP, get sick). | |
| 868 | |
| 869 address c2i_unverified_entry = __ pc(); | |
| 870 Label skip_fixup; | |
| 871 Label ok; | |
| 872 | |
| 873 Register holder = rax; | |
| 874 Register receiver = j_rarg0; | |
| 875 Register temp = rbx; | |
| 876 | |
| 877 { | |
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878 __ load_klass(temp, receiver); |
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879 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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880 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
| 0 | 881 __ jcc(Assembler::equal, ok); |
| 882 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 883 | |
| 884 __ bind(ok); | |
| 885 // Method might have been compiled since the call site was patched to | |
| 886 // interpreted if that is the case treat it as a miss so we can get | |
| 887 // the call site corrected. | |
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888 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 889 __ jcc(Assembler::equal, skip_fixup); |
| 890 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 891 } | |
| 892 | |
| 893 address c2i_entry = __ pc(); | |
| 894 | |
| 895 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 896 | |
| 897 __ flush(); | |
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898 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 899 } |
| 900 | |
| 901 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 902 VMRegPair *regs, | |
| 903 int total_args_passed) { | |
| 904 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
| 905 // the arguments NOT counting out_preserve_stack_slots. | |
| 906 | |
| 907 // NOTE: These arrays will have to change when c1 is ported | |
| 908 #ifdef _WIN64 | |
| 909 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 910 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
| 911 }; | |
| 912 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 913 c_farg0, c_farg1, c_farg2, c_farg3 | |
| 914 }; | |
| 915 #else | |
| 916 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 917 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
| 918 }; | |
| 919 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 920 c_farg0, c_farg1, c_farg2, c_farg3, | |
| 921 c_farg4, c_farg5, c_farg6, c_farg7 | |
| 922 }; | |
| 923 #endif // _WIN64 | |
| 924 | |
| 925 | |
| 926 uint int_args = 0; | |
| 927 uint fp_args = 0; | |
| 928 uint stk_args = 0; // inc by 2 each time | |
| 929 | |
| 930 for (int i = 0; i < total_args_passed; i++) { | |
| 931 switch (sig_bt[i]) { | |
| 932 case T_BOOLEAN: | |
| 933 case T_CHAR: | |
| 934 case T_BYTE: | |
| 935 case T_SHORT: | |
| 936 case T_INT: | |
| 937 if (int_args < Argument::n_int_register_parameters_c) { | |
| 938 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 939 #ifdef _WIN64 | |
| 940 fp_args++; | |
| 941 // Allocate slots for callee to stuff register args the stack. | |
| 942 stk_args += 2; | |
| 943 #endif | |
| 944 } else { | |
| 945 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 946 stk_args += 2; | |
| 947 } | |
| 948 break; | |
| 949 case T_LONG: | |
| 950 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 951 // fall through | |
| 952 case T_OBJECT: | |
| 953 case T_ARRAY: | |
| 954 case T_ADDRESS: | |
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955 case T_METADATA: |
| 0 | 956 if (int_args < Argument::n_int_register_parameters_c) { |
| 957 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 958 #ifdef _WIN64 | |
| 959 fp_args++; | |
| 960 stk_args += 2; | |
| 961 #endif | |
| 962 } else { | |
| 963 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 964 stk_args += 2; | |
| 965 } | |
| 966 break; | |
| 967 case T_FLOAT: | |
| 968 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 969 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 970 #ifdef _WIN64 | |
| 971 int_args++; | |
| 972 // Allocate slots for callee to stuff register args the stack. | |
| 973 stk_args += 2; | |
| 974 #endif | |
| 975 } else { | |
| 976 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 977 stk_args += 2; | |
| 978 } | |
| 979 break; | |
| 980 case T_DOUBLE: | |
| 981 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 982 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 983 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 984 #ifdef _WIN64 | |
| 985 int_args++; | |
| 986 // Allocate slots for callee to stuff register args the stack. | |
| 987 stk_args += 2; | |
| 988 #endif | |
| 989 } else { | |
| 990 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 991 stk_args += 2; | |
| 992 } | |
| 993 break; | |
| 994 case T_VOID: // Halves of longs and doubles | |
| 995 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 996 regs[i].set_bad(); | |
| 997 break; | |
| 998 default: | |
| 999 ShouldNotReachHere(); | |
| 1000 break; | |
| 1001 } | |
| 1002 } | |
| 1003 #ifdef _WIN64 | |
| 1004 // windows abi requires that we always allocate enough stack space | |
| 1005 // for 4 64bit registers to be stored down. | |
| 1006 if (stk_args < 8) { | |
| 1007 stk_args = 8; | |
| 1008 } | |
| 1009 #endif // _WIN64 | |
| 1010 | |
| 1011 return stk_args; | |
| 1012 } | |
| 1013 | |
| 1014 // On 64 bit we will store integer like items to the stack as | |
| 1015 // 64 bits items (sparc abi) even though java would only store | |
| 1016 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
| 1017 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
| 1018 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1019 if (src.first()->is_stack()) { | |
| 1020 if (dst.first()->is_stack()) { | |
| 1021 // stack to stack | |
| 1022 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1023 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1024 } else { | |
| 1025 // stack to reg | |
| 1026 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
| 1027 } | |
| 1028 } else if (dst.first()->is_stack()) { | |
| 1029 // reg to stack | |
| 1030 // Do we really have to sign extend??? | |
| 1031 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
| 1032 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1033 } else { | |
| 1034 // Do we really have to sign extend??? | |
| 1035 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1036 if (dst.first() != src.first()) { | |
| 1037 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1038 } | |
| 1039 } | |
| 1040 } | |
| 1041 | |
|
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1042 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1043 if (src.first()->is_stack()) { |
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1044 if (dst.first()->is_stack()) { |
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1045 // stack to stack |
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1046 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1047 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1048 } else { |
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1049 // stack to reg |
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1050 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1051 } |
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1052 } else if (dst.first()->is_stack()) { |
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1053 // reg to stack |
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1054 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1055 } else { |
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1056 if (dst.first() != src.first()) { |
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1057 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1058 } |
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1059 } |
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1060 } |
| 0 | 1061 |
| 1062 // An oop arg. Must pass a handle not the oop itself | |
| 1063 static void object_move(MacroAssembler* masm, | |
| 1064 OopMap* map, | |
| 1065 int oop_handle_offset, | |
| 1066 int framesize_in_slots, | |
| 1067 VMRegPair src, | |
| 1068 VMRegPair dst, | |
| 1069 bool is_receiver, | |
| 1070 int* receiver_offset) { | |
| 1071 | |
| 1072 // must pass a handle. First figure out the location we use as a handle | |
| 1073 | |
| 1074 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
| 1075 | |
| 1076 // See if oop is NULL if it is we need no handle | |
| 1077 | |
| 1078 if (src.first()->is_stack()) { | |
| 1079 | |
| 1080 // Oop is already on the stack as an argument | |
| 1081 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1082 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1083 if (is_receiver) { | |
| 1084 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1085 } | |
| 1086 | |
| 304 | 1087 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
| 1088 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
| 0 | 1089 // conditionally move a NULL |
| 304 | 1090 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1091 } else { |
| 1092 | |
| 1093 // Oop is in an a register we must store it to the space we reserve | |
| 1094 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
| 1095 | |
| 1096 const Register rOop = src.first()->as_Register(); | |
| 1097 int oop_slot; | |
| 1098 if (rOop == j_rarg0) | |
| 1099 oop_slot = 0; | |
| 1100 else if (rOop == j_rarg1) | |
| 1101 oop_slot = 1; | |
| 1102 else if (rOop == j_rarg2) | |
| 1103 oop_slot = 2; | |
| 1104 else if (rOop == j_rarg3) | |
| 1105 oop_slot = 3; | |
| 1106 else if (rOop == j_rarg4) | |
| 1107 oop_slot = 4; | |
| 1108 else { | |
| 1109 assert(rOop == j_rarg5, "wrong register"); | |
| 1110 oop_slot = 5; | |
| 1111 } | |
| 1112 | |
| 1113 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1114 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1115 | |
| 1116 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
| 1117 // Store oop in handle area, may be NULL | |
| 304 | 1118 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1119 if (is_receiver) { |
| 1120 *receiver_offset = offset; | |
| 1121 } | |
| 1122 | |
| 304 | 1123 __ cmpptr(rOop, (int32_t)NULL_WORD); |
| 1124 __ lea(rHandle, Address(rsp, offset)); | |
| 0 | 1125 // conditionally move a NULL from the handle area where it was just stored |
| 304 | 1126 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
| 0 | 1127 } |
| 1128 | |
| 1129 // If arg is on the stack then place it otherwise it is already in correct reg. | |
| 1130 if (dst.first()->is_stack()) { | |
| 304 | 1131 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1132 } |
| 1133 } | |
| 1134 | |
| 1135 // A float arg may have to do float reg int reg conversion | |
| 1136 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1137 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1138 | |
| 1139 // The calling conventions assures us that each VMregpair is either | |
| 1140 // all really one physical register or adjacent stack slots. | |
| 1141 // This greatly simplifies the cases here compared to sparc. | |
| 1142 | |
| 1143 if (src.first()->is_stack()) { | |
| 1144 if (dst.first()->is_stack()) { | |
| 1145 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1146 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1147 } else { |
| 1148 // stack to reg | |
| 1149 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1150 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
| 1151 } | |
| 1152 } else if (dst.first()->is_stack()) { | |
| 1153 // reg to stack | |
| 1154 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1155 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1156 } else { | |
| 1157 // reg to reg | |
| 1158 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1159 if ( src.first() != dst.first()) { | |
| 1160 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1161 } | |
| 1162 } | |
| 1163 } | |
| 1164 | |
| 1165 // A long move | |
| 1166 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1167 | |
| 1168 // The calling conventions assures us that each VMregpair is either | |
| 1169 // all really one physical register or adjacent stack slots. | |
| 1170 // This greatly simplifies the cases here compared to sparc. | |
| 1171 | |
| 1172 if (src.is_single_phys_reg() ) { | |
| 1173 if (dst.is_single_phys_reg()) { | |
| 1174 if (dst.first() != src.first()) { | |
| 304 | 1175 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
| 0 | 1176 } |
| 1177 } else { | |
| 1178 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1179 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1180 } | |
| 1181 } else if (dst.is_single_phys_reg()) { | |
| 1182 assert(src.is_single_reg(), "not a stack pair"); | |
| 1183 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
| 1184 } else { | |
| 1185 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1186 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1187 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1188 } | |
| 1189 } | |
| 1190 | |
| 1191 // A double move | |
| 1192 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1193 | |
| 1194 // The calling conventions assures us that each VMregpair is either | |
| 1195 // all really one physical register or adjacent stack slots. | |
| 1196 // This greatly simplifies the cases here compared to sparc. | |
| 1197 | |
| 1198 if (src.is_single_phys_reg() ) { | |
| 1199 if (dst.is_single_phys_reg()) { | |
| 1200 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1201 if ( src.first() != dst.first()) { | |
| 1202 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1203 } | |
| 1204 } else { | |
| 1205 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1206 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1207 } | |
| 1208 } else if (dst.is_single_phys_reg()) { | |
| 1209 assert(src.is_single_reg(), "not a stack pair"); | |
| 1210 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
| 1211 } else { | |
| 1212 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1213 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1214 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1215 } | |
| 1216 } | |
| 1217 | |
| 1218 | |
| 1219 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1220 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1221 // which by this time is free to use | |
| 1222 switch (ret_type) { | |
| 1223 case T_FLOAT: | |
| 1224 __ movflt(Address(rbp, -wordSize), xmm0); | |
| 1225 break; | |
| 1226 case T_DOUBLE: | |
| 1227 __ movdbl(Address(rbp, -wordSize), xmm0); | |
| 1228 break; | |
| 1229 case T_VOID: break; | |
| 1230 default: { | |
| 304 | 1231 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1232 } |
| 1233 } | |
| 1234 } | |
| 1235 | |
| 1236 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1237 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1238 // which by this time is free to use | |
| 1239 switch (ret_type) { | |
| 1240 case T_FLOAT: | |
| 1241 __ movflt(xmm0, Address(rbp, -wordSize)); | |
| 1242 break; | |
| 1243 case T_DOUBLE: | |
| 1244 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
| 1245 break; | |
| 1246 case T_VOID: break; | |
| 1247 default: { | |
| 304 | 1248 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1249 } |
| 1250 } | |
| 1251 } | |
| 1252 | |
| 1253 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1254 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
| 1255 if (args[i].first()->is_Register()) { | |
| 304 | 1256 __ push(args[i].first()->as_Register()); |
| 0 | 1257 } else if (args[i].first()->is_XMMRegister()) { |
| 304 | 1258 __ subptr(rsp, 2*wordSize); |
| 0 | 1259 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
| 1260 } | |
| 1261 } | |
| 1262 } | |
| 1263 | |
| 1264 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1265 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
| 1266 if (args[i].first()->is_Register()) { | |
| 304 | 1267 __ pop(args[i].first()->as_Register()); |
| 0 | 1268 } else if (args[i].first()->is_XMMRegister()) { |
| 1269 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
| 304 | 1270 __ addptr(rsp, 2*wordSize); |
| 0 | 1271 } |
| 1272 } | |
| 1273 } | |
| 1274 | |
|
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1275 |
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1276 static void save_or_restore_arguments(MacroAssembler* masm, |
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1277 const int stack_slots, |
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1278 const int total_in_args, |
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1279 const int arg_save_area, |
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1280 OopMap* map, |
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1281 VMRegPair* in_regs, |
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1282 BasicType* in_sig_bt) { |
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1283 // if map is non-NULL then the code should store the values, |
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1284 // otherwise it should load them. |
| 5905 | 1285 int slot = arg_save_area; |
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1286 // Save down double word first |
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1287 for ( int i = 0; i < total_in_args; i++) { |
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1288 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1289 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1290 slot += VMRegImpl::slots_per_word; |
| 1291 assert(slot <= stack_slots, "overflow"); | |
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1292 if (map != NULL) { |
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1293 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1294 } else { |
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1295 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1296 } |
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1297 } |
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1298 if (in_regs[i].first()->is_Register() && |
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1299 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1300 int offset = slot * VMRegImpl::stack_slot_size; |
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1301 if (map != NULL) { |
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1302 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1303 if (in_sig_bt[i] == T_ARRAY) { |
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1304 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1305 } |
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1306 } else { |
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1307 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1308 } |
| 5907 | 1309 slot += VMRegImpl::slots_per_word; |
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1310 } |
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1311 } |
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1312 // Save or restore single word registers |
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1313 for ( int i = 0; i < total_in_args; i++) { |
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1314 if (in_regs[i].first()->is_Register()) { |
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1315 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1316 slot++; |
| 1317 assert(slot <= stack_slots, "overflow"); | |
|
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1318 |
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1319 // Value is in an input register pass we must flush it to the stack |
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1320 const Register reg = in_regs[i].first()->as_Register(); |
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1321 switch (in_sig_bt[i]) { |
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1322 case T_BOOLEAN: |
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1323 case T_CHAR: |
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1324 case T_BYTE: |
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1325 case T_SHORT: |
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1326 case T_INT: |
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1327 if (map != NULL) { |
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1328 __ movl(Address(rsp, offset), reg); |
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1329 } else { |
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1330 __ movl(reg, Address(rsp, offset)); |
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1331 } |
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1332 break; |
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1333 case T_ARRAY: |
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1334 case T_LONG: |
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1335 // handled above |
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1336 break; |
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1337 case T_OBJECT: |
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1338 default: ShouldNotReachHere(); |
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1339 } |
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1340 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1341 if (in_sig_bt[i] == T_FLOAT) { |
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1342 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1343 slot++; |
| 1344 assert(slot <= stack_slots, "overflow"); | |
|
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1345 if (map != NULL) { |
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1346 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1347 } else { |
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1348 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1349 } |
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1350 } |
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1351 } else if (in_regs[i].first()->is_stack()) { |
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1352 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1353 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1354 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1355 } |
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1356 } |
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1357 } |
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1358 } |
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1359 |
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1360 |
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1361 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1362 // keeps a new JNI critical region from starting until a GC has been |
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1363 // forced. Save down any oops in registers and describe them in an |
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1364 // OopMap. |
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1365 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1366 int stack_slots, |
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1367 int total_c_args, |
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1368 int total_in_args, |
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1369 int arg_save_area, |
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1370 OopMapSet* oop_maps, |
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1371 VMRegPair* in_regs, |
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1372 BasicType* in_sig_bt) { |
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1373 __ block_comment("check GC_locker::needs_gc"); |
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1374 Label cont; |
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1375 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1376 __ jcc(Assembler::equal, cont); |
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1377 |
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1378 // Save down any incoming oops and call into the runtime to halt for a GC |
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1379 |
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1380 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1381 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1382 arg_save_area, map, in_regs, in_sig_bt); |
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1383 |
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1384 address the_pc = __ pc(); |
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1385 oop_maps->add_gc_map( __ offset(), map); |
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1386 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1387 |
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1388 __ block_comment("block_for_jni_critical"); |
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1389 __ movptr(c_rarg0, r15_thread); |
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1390 __ mov(r12, rsp); // remember sp |
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1391 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1392 __ andptr(rsp, -16); // align stack as required by ABI |
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1393 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1394 __ mov(rsp, r12); // restore sp |
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1395 __ reinit_heapbase(); |
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1396 |
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1397 __ reset_last_Java_frame(false, true); |
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1398 |
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1399 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1400 arg_save_area, NULL, in_regs, in_sig_bt); |
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1401 |
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1402 __ bind(cont); |
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1403 #ifdef ASSERT |
|
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1404 if (StressCriticalJNINatives) { |
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1405 // Stress register saving |
|
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1406 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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1407 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1408 arg_save_area, map, in_regs, in_sig_bt); |
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1409 // Destroy argument registers |
|
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1410 for (int i = 0; i < total_in_args - 1; i++) { |
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1411 if (in_regs[i].first()->is_Register()) { |
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1412 const Register reg = in_regs[i].first()->as_Register(); |
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1413 __ xorptr(reg, reg); |
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1414 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1415 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1416 } else if (in_regs[i].first()->is_FloatRegister()) { |
|
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|
1417 ShouldNotReachHere(); |
|
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1418 } else if (in_regs[i].first()->is_stack()) { |
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1419 // Nothing to do |
|
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1420 } else { |
|
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1421 ShouldNotReachHere(); |
|
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1422 } |
|
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1423 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
|
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1424 i++; |
|
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1425 } |
|
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1426 } |
|
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|
1427 |
|
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|
1428 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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1429 arg_save_area, NULL, in_regs, in_sig_bt); |
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1430 } |
|
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|
1431 #endif |
|
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1432 } |
|
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|
1433 |
|
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|
1434 // Unpack an array argument into a pointer to the body and the length |
|
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1435 // if the array is non-null, otherwise pass 0 for both. |
|
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1436 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
|
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1437 Register tmp_reg = rax; |
|
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|
1438 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
|
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1439 "possible collision"); |
|
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|
1440 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
|
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1441 "possible collision"); |
|
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|
1442 |
|
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1443 // Pass the length, ptr pair |
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1444 Label is_null, done; |
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1445 VMRegPair tmp; |
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1446 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1447 if (reg.first()->is_stack()) { |
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1448 // Load the arg up from the stack |
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1449 move_ptr(masm, reg, tmp); |
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1450 reg = tmp; |
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1451 } |
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1452 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1453 __ jccb(Assembler::equal, is_null); |
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1454 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1455 move_ptr(masm, tmp, body_arg); |
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1456 // load the length relative to the body. |
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1457 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1458 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1459 move32_64(masm, tmp, length_arg); |
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1460 __ jmpb(done); |
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1461 __ bind(is_null); |
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1462 // Pass zeros |
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1463 __ xorptr(tmp_reg, tmp_reg); |
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1464 move_ptr(masm, tmp, body_arg); |
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1465 move32_64(masm, tmp, length_arg); |
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1466 __ bind(done); |
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1467 } |
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1468 |
| 5905 | 1469 |
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1470 // Different signatures may require very different orders for the move |
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1471 // to avoid clobbering other arguments. There's no simple way to |
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1472 // order them safely. Compute a safe order for issuing stores and |
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1473 // break any cycles in those stores. This code is fairly general but |
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1474 // it's not necessary on the other platforms so we keep it in the |
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1475 // platform dependent code instead of moving it into a shared file. |
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1476 // (See bugs 7013347 & 7145024.) |
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1477 // Note that this code is specific to LP64. |
| 5905 | 1478 class ComputeMoveOrder: public StackObj { |
| 1479 class MoveOperation: public ResourceObj { | |
| 1480 friend class ComputeMoveOrder; | |
| 1481 private: | |
| 1482 VMRegPair _src; | |
| 1483 VMRegPair _dst; | |
| 1484 int _src_index; | |
| 1485 int _dst_index; | |
| 1486 bool _processed; | |
| 1487 MoveOperation* _next; | |
| 1488 MoveOperation* _prev; | |
| 1489 | |
| 1490 static int get_id(VMRegPair r) { | |
| 1491 return r.first()->value(); | |
| 1492 } | |
| 1493 | |
| 1494 public: | |
| 1495 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
| 1496 _src(src) | |
| 1497 , _src_index(src_index) | |
| 1498 , _dst(dst) | |
| 1499 , _dst_index(dst_index) | |
| 1500 , _next(NULL) | |
| 1501 , _prev(NULL) | |
| 1502 , _processed(false) { | |
| 1503 } | |
| 1504 | |
| 1505 VMRegPair src() const { return _src; } | |
| 1506 int src_id() const { return get_id(src()); } | |
| 1507 int src_index() const { return _src_index; } | |
| 1508 VMRegPair dst() const { return _dst; } | |
| 1509 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
| 1510 int dst_index() const { return _dst_index; } | |
| 1511 int dst_id() const { return get_id(dst()); } | |
| 1512 MoveOperation* next() const { return _next; } | |
| 1513 MoveOperation* prev() const { return _prev; } | |
| 1514 void set_processed() { _processed = true; } | |
| 1515 bool is_processed() const { return _processed; } | |
| 1516 | |
| 1517 // insert | |
| 1518 void break_cycle(VMRegPair temp_register) { | |
| 1519 // create a new store following the last store | |
| 1520 // to move from the temp_register to the original | |
| 1521 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
| 1522 | |
| 1523 // break the cycle of links and insert new_store at the end | |
| 1524 // break the reverse link. | |
| 1525 MoveOperation* p = prev(); | |
| 1526 assert(p->next() == this, "must be"); | |
| 1527 _prev = NULL; | |
| 1528 p->_next = new_store; | |
| 1529 new_store->_prev = p; | |
| 1530 | |
| 1531 // change the original store to save it's value in the temp. | |
| 1532 set_dst(-1, temp_register); | |
| 1533 } | |
| 1534 | |
| 1535 void link(GrowableArray<MoveOperation*>& killer) { | |
| 1536 // link this store in front the store that it depends on | |
| 1537 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
| 1538 if (n != NULL) { | |
| 1539 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
| 1540 _next = n; | |
| 1541 n->_prev = this; | |
| 1542 } | |
| 1543 } | |
| 1544 }; | |
| 1545 | |
| 1546 private: | |
| 1547 GrowableArray<MoveOperation*> edges; | |
| 1548 | |
| 1549 public: | |
| 1550 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
| 1551 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
| 1552 // Move operations where the dest is the stack can all be | |
| 1553 // scheduled first since they can't interfere with the other moves. | |
| 1554 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 1555 if (in_sig_bt[i] == T_ARRAY) { | |
| 1556 c_arg--; | |
| 1557 if (out_regs[c_arg].first()->is_stack() && | |
| 1558 out_regs[c_arg + 1].first()->is_stack()) { | |
| 1559 arg_order.push(i); | |
| 1560 arg_order.push(c_arg); | |
| 1561 } else { | |
| 1562 if (out_regs[c_arg].first()->is_stack() || | |
| 1563 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1564 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
| 1565 } else { | |
| 1566 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1567 } | |
| 1568 } | |
| 1569 } else if (in_sig_bt[i] == T_VOID) { | |
| 1570 arg_order.push(i); | |
| 1571 arg_order.push(c_arg); | |
| 1572 } else { | |
| 1573 if (out_regs[c_arg].first()->is_stack() || | |
| 1574 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1575 arg_order.push(i); | |
| 1576 arg_order.push(c_arg); | |
| 1577 } else { | |
| 1578 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1579 } | |
| 1580 } | |
| 1581 } | |
| 1582 // Break any cycles in the register moves and emit the in the | |
| 1583 // proper order. | |
| 1584 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
| 1585 for (int i = 0; i < stores->length(); i++) { | |
| 1586 arg_order.push(stores->at(i)->src_index()); | |
| 1587 arg_order.push(stores->at(i)->dst_index()); | |
| 1588 } | |
| 1589 } | |
| 1590 | |
| 1591 // Collected all the move operations | |
| 1592 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
| 1593 if (src.first() == dst.first()) return; | |
| 1594 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
| 1595 } | |
| 1596 | |
| 1597 // Walk the edges breaking cycles between moves. The result list | |
| 1598 // can be walked in order to produce the proper set of loads | |
| 1599 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
| 1600 // Record which moves kill which values | |
| 1601 GrowableArray<MoveOperation*> killer; | |
| 1602 for (int i = 0; i < edges.length(); i++) { | |
| 1603 MoveOperation* s = edges.at(i); | |
| 1604 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
| 1605 killer.at_put_grow(s->dst_id(), s, NULL); | |
| 1606 } | |
| 1607 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
| 1608 "make sure temp isn't in the registers that are killed"); | |
| 1609 | |
| 1610 // create links between loads and stores | |
| 1611 for (int i = 0; i < edges.length(); i++) { | |
| 1612 edges.at(i)->link(killer); | |
| 1613 } | |
| 1614 | |
| 1615 // at this point, all the move operations are chained together | |
| 1616 // in a doubly linked list. Processing it backwards finds | |
| 1617 // the beginning of the chain, forwards finds the end. If there's | |
| 1618 // a cycle it can be broken at any point, so pick an edge and walk | |
| 1619 // backward until the list ends or we end where we started. | |
| 1620 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
| 1621 for (int e = 0; e < edges.length(); e++) { | |
| 1622 MoveOperation* s = edges.at(e); | |
| 1623 if (!s->is_processed()) { | |
| 1624 MoveOperation* start = s; | |
| 1625 // search for the beginning of the chain or cycle | |
| 1626 while (start->prev() != NULL && start->prev() != s) { | |
| 1627 start = start->prev(); | |
| 1628 } | |
| 1629 if (start->prev() == s) { | |
| 1630 start->break_cycle(temp_register); | |
| 1631 } | |
| 1632 // walk the chain forward inserting to store list | |
| 1633 while (start != NULL) { | |
| 1634 stores->append(start); | |
| 1635 start->set_processed(); | |
| 1636 start = start->next(); | |
| 1637 } | |
| 1638 } | |
| 1639 } | |
| 1640 return stores; | |
| 1641 } | |
| 1642 }; | |
| 1643 | |
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1644 static void verify_oop_args(MacroAssembler* masm, |
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1645 methodHandle method, |
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1646 const BasicType* sig_bt, |
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1647 const VMRegPair* regs) { |
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1648 Register temp_reg = rbx; // not part of any compiled calling seq |
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1649 if (VerifyOops) { |
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1650 for (int i = 0; i < method->size_of_parameters(); i++) { |
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1651 if (sig_bt[i] == T_OBJECT || |
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1652 sig_bt[i] == T_ARRAY) { |
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1653 VMReg r = regs[i].first(); |
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1654 assert(r->is_valid(), "bad oop arg"); |
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1655 if (r->is_stack()) { |
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1656 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1657 __ verify_oop(temp_reg); |
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1658 } else { |
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1659 __ verify_oop(r->as_Register()); |
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1660 } |
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1661 } |
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1662 } |
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1663 } |
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1664 } |
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1665 |
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1666 static void gen_special_dispatch(MacroAssembler* masm, |
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1667 methodHandle method, |
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1668 const BasicType* sig_bt, |
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1669 const VMRegPair* regs) { |
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1670 verify_oop_args(masm, method, sig_bt, regs); |
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1671 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1672 |
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1673 // Now write the args into the outgoing interpreter space |
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1674 bool has_receiver = false; |
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1675 Register receiver_reg = noreg; |
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1676 int member_arg_pos = -1; |
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1677 Register member_reg = noreg; |
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1678 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
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1679 if (ref_kind != 0) { |
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1680 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
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1681 member_reg = rbx; // known to be free at this point |
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1682 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1683 } else if (iid == vmIntrinsics::_invokeBasic) { |
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1684 has_receiver = true; |
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1685 } else { |
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1686 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
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1687 } |
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1688 |
|
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1689 if (member_reg != noreg) { |
|
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1690 // Load the member_arg into register, if necessary. |
|
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1691 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
|
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1692 VMReg r = regs[member_arg_pos].first(); |
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1693 if (r->is_stack()) { |
|
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1694 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1695 } else { |
|
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1696 // no data motion is needed |
|
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1697 member_reg = r->as_Register(); |
|
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|
1698 } |
|
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1699 } |
|
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1700 |
|
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1701 if (has_receiver) { |
|
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1702 // Make sure the receiver is loaded into a register. |
|
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1703 assert(method->size_of_parameters() > 0, "oob"); |
|
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1704 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
|
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1705 VMReg r = regs[0].first(); |
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1706 assert(r->is_valid(), "bad receiver arg"); |
|
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1707 if (r->is_stack()) { |
|
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1708 // Porting note: This assumes that compiled calling conventions always |
|
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1709 // pass the receiver oop in a register. If this is not true on some |
|
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1710 // platform, pick a temp and load the receiver from stack. |
|
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1711 fatal("receiver always in a register"); |
|
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1712 receiver_reg = j_rarg0; // known to be free at this point |
|
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1713 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1714 } else { |
|
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1715 // no data motion is needed |
|
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1716 receiver_reg = r->as_Register(); |
|
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|
1717 } |
|
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|
1718 } |
|
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|
1719 |
|
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|
1720 // Figure out which address we are really jumping to: |
|
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1721 MethodHandles::generate_method_handle_dispatch(masm, iid, |
|
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1722 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
|
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1723 } |
| 5905 | 1724 |
| 0 | 1725 // --------------------------------------------------------------------------- |
| 1726 // Generate a native wrapper for a given method. The method takes arguments | |
| 1727 // in the Java compiled code convention, marshals them to the native | |
| 1728 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1729 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1730 // returns. | |
|
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1731 // |
|
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1732 // Critical native functions are a shorthand for the use of |
|
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1733 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
|
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1734 // functions. The wrapper is expected to unpack the arguments before |
|
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1735 // passing them to the callee and perform checks before and after the |
|
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|
1736 // native call to ensure that they GC_locker |
|
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1737 // lock_critical/unlock_critical semantics are followed. Some other |
|
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1738 // parts of JNI setup are skipped like the tear down of the JNI handle |
|
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|
1739 // block and the check for pending exceptions it's impossible for them |
|
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|
1740 // to be thrown. |
|
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|
1741 // |
|
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1742 // They are roughly structured like this: |
|
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|
1743 // if (GC_locker::needs_gc()) |
|
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|
1744 // SharedRuntime::block_for_jni_critical(); |
|
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|
1745 // tranistion to thread_in_native |
|
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|
1746 // unpack arrray arguments and call native entry point |
|
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|
1747 // check for safepoint in progress |
|
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|
1748 // check if any thread suspend flags are set |
|
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|
1749 // call into JVM and possible unlock the JNI critical |
|
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1750 // if a GC was suppressed while in the critical native. |
|
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|
1751 // transition back to thread_in_Java |
|
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|
1752 // return to caller |
|
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|
1753 // |
|
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|
1754 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
| 0 | 1755 methodHandle method, |
|
2405
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|
1756 int compile_id, |
|
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|
1757 BasicType* in_sig_bt, |
|
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|
1758 VMRegPair* in_regs, |
| 0 | 1759 BasicType ret_type) { |
|
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|
1760 if (method->is_method_handle_intrinsic()) { |
|
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|
1761 vmIntrinsics::ID iid = method->intrinsic_id(); |
|
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|
1762 intptr_t start = (intptr_t)__ pc(); |
|
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|
1763 int vep_offset = ((intptr_t)__ pc()) - start; |
|
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|
1764 gen_special_dispatch(masm, |
|
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|
1765 method, |
|
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|
1766 in_sig_bt, |
|
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|
1767 in_regs); |
|
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|
1768 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
|
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|
1769 __ flush(); |
|
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|
1770 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
|
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|
1771 return nmethod::new_native_nmethod(method, |
|
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|
1772 compile_id, |
|
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|
1773 masm->code(), |
|
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|
1774 vep_offset, |
|
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|
1775 frame_complete, |
|
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|
1776 stack_slots / VMRegImpl::slots_per_word, |
|
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|
1777 in_ByteSize(-1), |
|
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|
1778 in_ByteSize(-1), |
|
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|
1779 (OopMapSet*)NULL); |
|
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|
1780 } |
|
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|
1781 bool is_critical_native = true; |
|
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|
1782 address native_func = method->critical_native_function(); |
|
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|
1783 if (native_func == NULL) { |
|
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|
1784 native_func = method->native_function(); |
|
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|
1785 is_critical_native = false; |
|
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|
1786 } |
|
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|
1787 assert(native_func != NULL, "must have function"); |
|
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|
1788 |
| 0 | 1789 // An OopMap for lock (and class if static) |
| 1790 OopMapSet *oop_maps = new OopMapSet(); | |
| 1791 intptr_t start = (intptr_t)__ pc(); | |
| 1792 | |
| 1793 // We have received a description of where all the java arg are located | |
| 1794 // on entry to the wrapper. We need to convert these args to where | |
| 1795 // the jni function will expect them. To figure out where they go | |
| 1796 // we convert the java signature to a C signature by inserting | |
| 1797 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1798 | |
|
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|
1799 const int total_in_args = method->size_of_parameters(); |
|
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|
1800 int total_c_args = total_in_args; |
|
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|
1801 if (!is_critical_native) { |
|
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|
1802 total_c_args += 1; |
|
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|
1803 if (method->is_static()) { |
|
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|
1804 total_c_args++; |
|
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|
1805 } |
|
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|
1806 } else { |
|
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1807 for (int i = 0; i < total_in_args; i++) { |
|
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|
1808 if (in_sig_bt[i] == T_ARRAY) { |
|
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|
1809 total_c_args++; |
|
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|
1810 } |
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|
1811 } |
| 0 | 1812 } |
| 1813 | |
| 1814 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
|
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|
1815 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
|
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|
1816 BasicType* in_elem_bt = NULL; |
| 0 | 1817 |
| 1818 int argc = 0; | |
|
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1819 if (!is_critical_native) { |
|
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|
1820 out_sig_bt[argc++] = T_ADDRESS; |
|
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|
1821 if (method->is_static()) { |
|
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|
1822 out_sig_bt[argc++] = T_OBJECT; |
|
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|
1823 } |
|
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|
1824 |
|
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1825 for (int i = 0; i < total_in_args ; i++ ) { |
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1826 out_sig_bt[argc++] = in_sig_bt[i]; |
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1827 } |
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1828 } else { |
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1829 Thread* THREAD = Thread::current(); |
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1830 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1831 SignatureStream ss(method->signature()); |
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1832 for (int i = 0; i < total_in_args ; i++ ) { |
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1833 if (in_sig_bt[i] == T_ARRAY) { |
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1834 // Arrays are passed as int, elem* pair |
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1835 out_sig_bt[argc++] = T_INT; |
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1836 out_sig_bt[argc++] = T_ADDRESS; |
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1837 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1838 const char* at = atype->as_C_string(); |
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1839 if (strlen(at) == 2) { |
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1840 assert(at[0] == '[', "must be"); |
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1841 switch (at[1]) { |
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1842 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1843 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1844 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1845 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1846 case 'I': in_elem_bt[i] = T_INT; break; |
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1847 case 'J': in_elem_bt[i] = T_LONG; break; |
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1848 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1849 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1850 default: ShouldNotReachHere(); |
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1851 } |
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1852 } |
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1853 } else { |
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1854 out_sig_bt[argc++] = in_sig_bt[i]; |
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1855 in_elem_bt[i] = T_VOID; |
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1856 } |
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1857 if (in_sig_bt[i] != T_VOID) { |
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1858 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1859 ss.next(); |
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1860 } |
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1861 } |
| 0 | 1862 } |
| 1863 | |
| 1864 // Now figure out where the args must be stored and how much stack space | |
| 1865 // they require. | |
| 1866 int out_arg_slots; | |
| 1867 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
| 1868 | |
| 1869 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1870 // incoming registers | |
| 1871 | |
| 1872 // Calculate the total number of stack slots we will need. | |
| 1873 | |
| 1874 // First count the abi requirement plus all of the outgoing args | |
| 1875 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1876 | |
| 1877 // Now the space for the inbound oop handle area | |
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1878 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1879 if (is_critical_native) { |
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1880 // Critical natives may have to call out so they need a save area |
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1881 // for register arguments. |
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1882 int double_slots = 0; |
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1883 int single_slots = 0; |
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1884 for ( int i = 0; i < total_in_args; i++) { |
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1885 if (in_regs[i].first()->is_Register()) { |
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1886 const Register reg = in_regs[i].first()->as_Register(); |
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1887 switch (in_sig_bt[i]) { |
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1888 case T_BOOLEAN: |
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1889 case T_BYTE: |
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1890 case T_SHORT: |
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1891 case T_CHAR: |
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1892 case T_INT: single_slots++; break; |
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1893 case T_ARRAY: // specific to LP64 (7145024) |
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1894 case T_LONG: double_slots++; break; |
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1895 default: ShouldNotReachHere(); |
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1896 } |
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1897 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1898 switch (in_sig_bt[i]) { |
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1899 case T_FLOAT: single_slots++; break; |
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1900 case T_DOUBLE: double_slots++; break; |
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1901 default: ShouldNotReachHere(); |
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1902 } |
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1903 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1904 ShouldNotReachHere(); |
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1905 } |
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1906 } |
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1907 total_save_slots = double_slots * 2 + single_slots; |
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1908 // align the save area |
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1909 if (double_slots != 0) { |
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1910 stack_slots = round_to(stack_slots, 2); |
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1911 } |
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1912 } |
| 0 | 1913 |
| 1914 int oop_handle_offset = stack_slots; | |
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1915 stack_slots += total_save_slots; |
| 0 | 1916 |
| 1917 // Now any space we need for handlizing a klass if static method | |
| 1918 | |
| 1919 int klass_slot_offset = 0; | |
| 1920 int klass_offset = -1; | |
| 1921 int lock_slot_offset = 0; | |
| 1922 bool is_static = false; | |
| 1923 | |
| 1924 if (method->is_static()) { | |
| 1925 klass_slot_offset = stack_slots; | |
| 1926 stack_slots += VMRegImpl::slots_per_word; | |
| 1927 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1928 is_static = true; | |
| 1929 } | |
| 1930 | |
| 1931 // Plus a lock if needed | |
| 1932 | |
| 1933 if (method->is_synchronized()) { | |
| 1934 lock_slot_offset = stack_slots; | |
| 1935 stack_slots += VMRegImpl::slots_per_word; | |
| 1936 } | |
| 1937 | |
| 1938 // Now a place (+2) to save return values or temp during shuffling | |
| 1939 // + 4 for return address (which we own) and saved rbp | |
| 1940 stack_slots += 6; | |
| 1941 | |
| 1942 // Ok The space we have allocated will look like: | |
| 1943 // | |
| 1944 // | |
| 1945 // FP-> | | | |
| 1946 // |---------------------| | |
| 1947 // | 2 slots for moves | | |
| 1948 // |---------------------| | |
| 1949 // | lock box (if sync) | | |
| 1950 // |---------------------| <- lock_slot_offset | |
| 1951 // | klass (if static) | | |
| 1952 // |---------------------| <- klass_slot_offset | |
| 1953 // | oopHandle area | | |
| 1954 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
| 1955 // | outbound memory | | |
| 1956 // | based arguments | | |
| 1957 // | | | |
| 1958 // |---------------------| | |
| 1959 // | | | |
| 1960 // SP-> | out_preserved_slots | | |
| 1961 // | |
| 1962 // | |
| 1963 | |
| 1964 | |
| 1965 // Now compute actual number of stack words we need rounding to make | |
| 1966 // stack properly aligned. | |
|
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1967 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 1968 |
| 1969 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 1970 | |
| 1971 // First thing make an ic check to see if we should even be here | |
| 1972 | |
| 1973 // We are free to use all registers as temps without saving them and | |
| 1974 // restoring them except rbp. rbp is the only callee save register | |
| 1975 // as far as the interpreter and the compiler(s) are concerned. | |
| 1976 | |
| 1977 | |
| 1978 const Register ic_reg = rax; | |
| 1979 const Register receiver = j_rarg0; | |
| 1980 | |
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1981 Label hit; |
| 0 | 1982 Label exception_pending; |
| 1983 | |
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1984 assert_different_registers(ic_reg, receiver, rscratch1); |
| 0 | 1985 __ verify_oop(receiver); |
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1986 __ load_klass(rscratch1, receiver); |
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1987 __ cmpq(ic_reg, rscratch1); |
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1988 __ jcc(Assembler::equal, hit); |
| 0 | 1989 |
| 1990 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 1991 | |
| 1992 // Verified entry point must be aligned | |
| 1993 __ align(8); | |
| 1994 | |
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1995 __ bind(hit); |
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1996 |
| 0 | 1997 int vep_offset = ((intptr_t)__ pc()) - start; |
| 1998 | |
|
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1999 #ifdef GRAALVM |
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2000 if (InlineObjectHash && (method->intrinsic_id() == vmIntrinsics::_hashCode || method->intrinsic_id() == vmIntrinsics::_identityHashCode)) { |
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2001 // Object.hashCode can pull the hashCode from the header word |
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2002 // instead of doing a full VM transition once it's been computed. |
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2003 // Since hashCode is usually polymorphic at call sites we can't do |
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2004 // this optimization at the call site without a lot of work. |
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2005 Label slowCase; |
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2006 Label nullCase; |
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2007 Register result = rax; |
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2008 |
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2009 if (method->intrinsic_id() == vmIntrinsics::_identityHashCode) { |
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2010 __ cmpptr(receiver, 0); |
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2011 __ jcc(Assembler::equal, nullCase); |
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2012 } |
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2013 |
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2014 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
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2015 |
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2016 // check if locked |
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2017 __ testptr(result, markOopDesc::unlocked_value); |
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2018 __ jcc (Assembler::zero, slowCase); |
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2019 |
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2020 if (UseBiasedLocking) { |
|
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2021 // Check if biased and fall through to runtime if so |
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|
2022 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
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2023 __ jcc (Assembler::notZero, slowCase); |
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2024 } |
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2025 |
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2026 // get hash |
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2027 __ shrptr(result, markOopDesc::hash_shift); |
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2028 __ andptr(result, markOopDesc::hash_mask); |
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2029 // test if hashCode exists |
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2030 __ jcc (Assembler::zero, slowCase); |
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2031 __ ret(0); |
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2032 |
|
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2033 if (method->intrinsic_id() == vmIntrinsics::_identityHashCode) { |
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2034 __ bind(nullCase); |
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2035 __ movl(result, 0); |
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2036 __ ret(0); |
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2037 } |
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2038 |
|
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2039 __ bind (slowCase); |
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2040 } |
|
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5d0bb7d52783
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2041 #endif // GRAALVM |
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2042 |
| 0 | 2043 // The instruction at the verified entry point must be 5 bytes or longer |
| 2044 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 2045 // instruction fits that requirement. | |
| 2046 | |
| 2047 // Generate stack overflow check | |
| 2048 | |
| 2049 if (UseStackBanging) { | |
| 2050 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 2051 } else { | |
| 2052 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 2053 __ fat_nop(); | |
| 2054 } | |
| 2055 | |
| 2056 // Generate a new frame for the wrapper. | |
| 2057 __ enter(); | |
| 2058 // -2 because return address is already present and so is saved rbp | |
| 304 | 2059 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 2060 |
|
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2061 // Frame is now completed as far as size and linkage. |
|
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|
2062 int frame_complete = ((intptr_t)__ pc()) - start; |
| 0 | 2063 |
| 2064 #ifdef ASSERT | |
| 2065 { | |
| 2066 Label L; | |
| 304 | 2067 __ mov(rax, rsp); |
| 605 | 2068 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
| 304 | 2069 __ cmpptr(rax, rsp); |
| 0 | 2070 __ jcc(Assembler::equal, L); |
| 2071 __ stop("improperly aligned stack"); | |
| 2072 __ bind(L); | |
| 2073 } | |
| 2074 #endif /* ASSERT */ | |
| 2075 | |
| 2076 | |
| 2077 // We use r14 as the oop handle for the receiver/klass | |
| 2078 // It is callee save so it survives the call to native | |
| 2079 | |
| 2080 const Register oop_handle_reg = r14; | |
| 2081 | |
|
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2082 if (is_critical_native) { |
|
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|
2083 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
|
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|
2084 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
|
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|
2085 } |
| 0 | 2086 |
| 2087 // | |
| 2088 // We immediately shuffle the arguments so that any vm call we have to | |
| 2089 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 2090 // captured the oops from our caller and have a valid oopMap for | |
| 2091 // them. | |
| 2092 | |
| 2093 // ----------------- | |
| 2094 // The Grand Shuffle | |
| 2095 | |
| 2096 // The Java calling convention is either equal (linux) or denser (win64) than the | |
| 2097 // c calling convention. However the because of the jni_env argument the c calling | |
| 2098 // convention always has at least one more (and two for static) arguments than Java. | |
| 2099 // Therefore if we move the args from java -> c backwards then we will never have | |
| 2100 // a register->register conflict and we don't have to build a dependency graph | |
| 2101 // and figure out how to break any cycles. | |
| 2102 // | |
| 2103 | |
| 2104 // Record esp-based slot for receiver on stack for non-static methods | |
| 2105 int receiver_offset = -1; | |
| 2106 | |
| 2107 // This is a trick. We double the stack slots so we can claim | |
| 2108 // the oops in the caller's frame. Since we are sure to have | |
| 2109 // more args than the caller doubling is enough to make | |
| 2110 // sure we can capture all the incoming oop args from the | |
| 2111 // caller. | |
| 2112 // | |
| 2113 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 2114 | |
| 2115 // Mark location of rbp (someday) | |
| 2116 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
| 2117 | |
| 2118 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
| 2119 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
| 2120 | |
| 2121 | |
| 2122 #ifdef ASSERT | |
| 2123 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
| 2124 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
| 2125 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
| 2126 reg_destroyed[r] = false; | |
| 2127 } | |
| 2128 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
| 2129 freg_destroyed[f] = false; | |
| 2130 } | |
| 2131 | |
| 2132 #endif /* ASSERT */ | |
| 2133 | |
|
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2134 // This may iterate in two different directions depending on the |
|
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|
2135 // kind of native it is. The reason is that for regular JNI natives |
|
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|
2136 // the incoming and outgoing registers are offset upwards and for |
|
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|
2137 // critical natives they are offset down. |
| 5905 | 2138 GrowableArray<int> arg_order(2 * total_in_args); |
| 2139 VMRegPair tmp_vmreg; | |
| 2140 tmp_vmreg.set1(rbx->as_VMReg()); | |
| 2141 | |
| 2142 if (!is_critical_native) { | |
| 2143 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 2144 arg_order.push(i); | |
| 2145 arg_order.push(c_arg); | |
| 2146 } | |
| 2147 } else { | |
| 2148 // Compute a valid move order, using tmp_vmreg to break any cycles | |
| 2149 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
|
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|
2150 } |
| 5905 | 2151 |
| 2152 int temploc = -1; | |
| 2153 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
| 2154 int i = arg_order.at(ai); | |
| 2155 int c_arg = arg_order.at(ai + 1); | |
| 2156 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
| 2157 if (c_arg == -1) { | |
| 2158 assert(is_critical_native, "should only be required for critical natives"); | |
| 2159 // This arg needs to be moved to a temporary | |
| 2160 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
| 2161 in_regs[i] = tmp_vmreg; | |
| 2162 temploc = i; | |
| 2163 continue; | |
| 2164 } else if (i == -1) { | |
| 2165 assert(is_critical_native, "should only be required for critical natives"); | |
| 2166 // Read from the temporary location | |
| 2167 assert(temploc != -1, "must be valid"); | |
| 2168 i = temploc; | |
| 2169 temploc = -1; | |
| 2170 } | |
| 0 | 2171 #ifdef ASSERT |
| 2172 if (in_regs[i].first()->is_Register()) { | |
| 2173 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
| 2174 } else if (in_regs[i].first()->is_XMMRegister()) { | |
| 2175 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
| 2176 } | |
| 2177 if (out_regs[c_arg].first()->is_Register()) { | |
| 2178 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
| 2179 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
| 2180 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
| 2181 } | |
| 2182 #endif /* ASSERT */ | |
| 2183 switch (in_sig_bt[i]) { | |
| 2184 case T_ARRAY: | |
|
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2185 if (is_critical_native) { |
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2186 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2187 c_arg++; |
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2188 #ifdef ASSERT |
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2189 if (out_regs[c_arg].first()->is_Register()) { |
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2190 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2191 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2192 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2193 } |
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|
2194 #endif |
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|
2195 break; |
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|
2196 } |
| 0 | 2197 case T_OBJECT: |
|
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|
2198 assert(!is_critical_native, "no oop arguments"); |
| 0 | 2199 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
| 2200 ((i == 0) && (!is_static)), | |
| 2201 &receiver_offset); | |
| 2202 break; | |
| 2203 case T_VOID: | |
| 2204 break; | |
| 2205 | |
| 2206 case T_FLOAT: | |
| 2207 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2208 break; | |
| 2209 | |
| 2210 case T_DOUBLE: | |
| 2211 assert( i + 1 < total_in_args && | |
| 2212 in_sig_bt[i + 1] == T_VOID && | |
| 2213 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 2214 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2215 break; | |
| 2216 | |
| 2217 case T_LONG : | |
| 2218 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2219 break; | |
| 2220 | |
| 2221 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 2222 | |
| 2223 default: | |
| 2224 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
| 2225 } | |
| 2226 } | |
| 2227 | |
| 2228 // point c_arg at the first arg that is already loaded in case we | |
| 2229 // need to spill before we call out | |
| 5905 | 2230 int c_arg = total_c_args - total_in_args; |
| 0 | 2231 |
| 2232 // Pre-load a static method's oop into r14. Used both by locking code and | |
| 2233 // the normal JNI call code. | |
|
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2234 if (method->is_static() && !is_critical_native) { |
| 0 | 2235 |
| 2236 // load oop into a register | |
|
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2237 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
| 0 | 2238 |
| 2239 // Now handlize the static class mirror it's known not-null. | |
| 304 | 2240 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
| 0 | 2241 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
| 2242 | |
| 2243 // Now get the handle | |
| 304 | 2244 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
| 0 | 2245 // store the klass handle as second argument |
| 304 | 2246 __ movptr(c_rarg1, oop_handle_reg); |
| 0 | 2247 // and protect the arg if we must spill |
| 2248 c_arg--; | |
| 2249 } | |
| 2250 | |
| 2251 // Change state to native (we save the return address in the thread, since it might not | |
| 2252 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 2253 // points into the right code segment. It does not have to be the correct return pc. | |
| 2254 // We use the same pc/oopMap repeatedly when we call out | |
| 2255 | |
| 2256 intptr_t the_pc = (intptr_t) __ pc(); | |
| 2257 oop_maps->add_gc_map(the_pc - start, map); | |
| 2258 | |
| 2259 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
| 2260 | |
| 2261 | |
| 2262 // We have all of the arguments setup at this point. We must not touch any register | |
| 2263 // argument registers at this point (what if we save/restore them there are no oop? | |
| 2264 | |
| 2265 { | |
| 2266 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2267 // protect the args we've loaded | |
| 2268 save_args(masm, total_c_args, c_arg, out_regs); | |
|
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2269 __ mov_metadata(c_rarg1, method()); |
| 0 | 2270 __ call_VM_leaf( |
| 2271 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 2272 r15_thread, c_rarg1); | |
| 2273 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2274 } | |
| 2275 | |
|
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2276 // RedefineClasses() tracing support for obsolete method entry |
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2277 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2278 // protect the args we've loaded |
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2279 save_args(masm, total_c_args, c_arg, out_regs); |
|
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2280 __ mov_metadata(c_rarg1, method()); |
|
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2281 __ call_VM_leaf( |
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2282 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2283 r15_thread, c_rarg1); |
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2284 restore_args(masm, total_c_args, c_arg, out_regs); |
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2285 } |
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2286 |
| 0 | 2287 // Lock a synchronized method |
| 2288 | |
| 2289 // Register definitions used by locking and unlocking | |
| 2290 | |
| 2291 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
| 2292 const Register obj_reg = rbx; // Will contain the oop | |
| 2293 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
| 2294 const Register old_hdr = r13; // value of old header at unlock time | |
| 2295 | |
| 2296 Label slow_path_lock; | |
| 2297 Label lock_done; | |
| 2298 | |
| 2299 if (method->is_synchronized()) { | |
|
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2300 assert(!is_critical_native, "unhandled"); |
| 0 | 2301 |
| 2302 | |
| 2303 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 2304 | |
| 2305 // Get the handle (the 2nd argument) | |
| 304 | 2306 __ mov(oop_handle_reg, c_rarg1); |
| 0 | 2307 |
| 2308 // Get address of the box | |
| 2309 | |
| 304 | 2310 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2311 |
| 2312 // Load the oop from the handle | |
| 304 | 2313 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2314 |
| 2315 if (UseBiasedLocking) { | |
| 2316 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
| 2317 } | |
| 2318 | |
| 2319 // Load immediate 1 into swap_reg %rax | |
| 2320 __ movl(swap_reg, 1); | |
| 2321 | |
| 2322 // Load (object->mark() | 1) into swap_reg %rax | |
| 304 | 2323 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 2324 |
| 2325 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 2326 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2327 |
| 2328 if (os::is_MP()) { | |
| 2329 __ lock(); | |
| 2330 } | |
| 2331 | |
| 2332 // src -> dest iff dest == rax else rax <- dest | |
| 304 | 2333 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 2334 __ jcc(Assembler::equal, lock_done); |
| 2335 | |
| 2336 // Hmm should this move to the slow path code area??? | |
| 2337 | |
| 2338 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 2339 // 1) (mark & 3) == 0, and | |
| 2340 // 2) rsp <= mark < mark + os::pagesize() | |
| 2341 // These 3 tests can be done by evaluating the following | |
| 2342 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 2343 // assuming both stack pointer and pagesize have their | |
| 2344 // least significant 2 bits clear. | |
| 2345 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
| 2346 | |
| 304 | 2347 __ subptr(swap_reg, rsp); |
| 2348 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 2349 |
| 2350 // Save the test result, for recursive case, the result is zero | |
| 304 | 2351 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2352 __ jcc(Assembler::notEqual, slow_path_lock); |
| 2353 | |
| 2354 // Slow path will re-enter here | |
| 2355 | |
| 2356 __ bind(lock_done); | |
| 2357 } | |
| 2358 | |
| 2359 | |
| 2360 // Finally just about ready to make the JNI call | |
| 2361 | |
| 2362 | |
| 2363 // get JNIEnv* which is first argument to native | |
|
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2364 if (!is_critical_native) { |
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2365 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2366 } |
| 0 | 2367 |
| 2368 // Now set thread in native | |
| 304 | 2369 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
| 0 | 2370 |
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2371 __ call(RuntimeAddress(native_func)); |
| 0 | 2372 |
| 2373 // Either restore the MXCSR register after returning from the JNI Call | |
| 2374 // or verify that it wasn't changed. | |
| 2375 if (RestoreMXCSROnJNICalls) { | |
| 304 | 2376 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std())); |
| 0 | 2377 |
| 2378 } | |
| 2379 else if (CheckJNICalls ) { | |
| 304 | 2380 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry()))); |
| 0 | 2381 } |
| 2382 | |
| 2383 | |
| 2384 // Unpack native results. | |
| 2385 switch (ret_type) { | |
| 2386 case T_BOOLEAN: __ c2bool(rax); break; | |
| 2387 case T_CHAR : __ movzwl(rax, rax); break; | |
| 2388 case T_BYTE : __ sign_extend_byte (rax); break; | |
| 2389 case T_SHORT : __ sign_extend_short(rax); break; | |
| 2390 case T_INT : /* nothing to do */ break; | |
| 2391 case T_DOUBLE : | |
| 2392 case T_FLOAT : | |
| 2393 // Result is in xmm0 we'll save as needed | |
| 2394 break; | |
| 2395 case T_ARRAY: // Really a handle | |
| 2396 case T_OBJECT: // Really a handle | |
| 2397 break; // can't de-handlize until after safepoint check | |
| 2398 case T_VOID: break; | |
| 2399 case T_LONG: break; | |
| 2400 default : ShouldNotReachHere(); | |
| 2401 } | |
| 2402 | |
| 2403 // Switch thread to "native transition" state before reading the synchronization state. | |
| 2404 // This additional state is necessary because reading and testing the synchronization | |
| 2405 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 2406 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 2407 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 2408 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 2409 // didn't see any synchronization is progress, and escapes. | |
| 304 | 2410 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
| 0 | 2411 |
| 2412 if(os::is_MP()) { | |
| 2413 if (UseMembar) { | |
| 2414 // Force this write out before the read below | |
| 2415 __ membar(Assembler::Membar_mask_bits( | |
| 2416 Assembler::LoadLoad | Assembler::LoadStore | | |
| 2417 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 2418 } else { | |
| 2419 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 2420 // We use the current thread pointer to calculate a thread specific | |
| 2421 // offset to write to within the page. This minimizes bus traffic | |
| 2422 // due to cache line collision. | |
| 2423 __ serialize_memory(r15_thread, rcx); | |
| 2424 } | |
| 2425 } | |
| 2426 | |
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2427 Label after_transition; |
| 0 | 2428 |
| 2429 // check for safepoint operation in progress and/or pending suspend requests | |
| 2430 { | |
| 2431 Label Continue; | |
| 2432 | |
| 2433 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 2434 SafepointSynchronize::_not_synchronized); | |
| 2435 | |
| 2436 Label L; | |
| 2437 __ jcc(Assembler::notEqual, L); | |
| 2438 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
| 2439 __ jcc(Assembler::equal, Continue); | |
| 2440 __ bind(L); | |
| 2441 | |
| 2442 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 2443 // and never return here preventing us from clearing _last_native_pc down below. | |
| 2444 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 2445 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 2446 // by hand. | |
| 2447 // | |
| 2448 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2449 __ mov(c_rarg0, r15_thread); |
| 2450 __ mov(r12, rsp); // remember sp | |
| 2451 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2452 __ andptr(rsp, -16); // align stack as required by ABI | |
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2453 if (!is_critical_native) { |
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2454 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2455 } else { |
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2456 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2457 } |
| 304 | 2458 __ mov(rsp, r12); // restore sp |
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2459 __ reinit_heapbase(); |
| 0 | 2460 // Restore any method result value |
| 2461 restore_native_result(masm, ret_type, stack_slots); | |
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2462 |
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2463 if (is_critical_native) { |
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2464 // The call above performed the transition to thread_in_Java so |
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2465 // skip the transition logic below. |
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2466 __ jmpb(after_transition); |
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2467 } |
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2468 |
| 0 | 2469 __ bind(Continue); |
| 2470 } | |
| 2471 | |
| 2472 // change thread state | |
| 2473 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2474 __ bind(after_transition); |
| 0 | 2475 |
| 2476 Label reguard; | |
| 2477 Label reguard_done; | |
| 2478 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 2479 __ jcc(Assembler::equal, reguard); | |
| 2480 __ bind(reguard_done); | |
| 2481 | |
| 2482 // native result if any is live | |
| 2483 | |
| 2484 // Unlock | |
| 2485 Label unlock_done; | |
| 2486 Label slow_path_unlock; | |
| 2487 if (method->is_synchronized()) { | |
| 2488 | |
| 2489 // Get locked oop from the handle we passed to jni | |
| 304 | 2490 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2491 |
| 2492 Label done; | |
| 2493 | |
| 2494 if (UseBiasedLocking) { | |
| 2495 __ biased_locking_exit(obj_reg, old_hdr, done); | |
| 2496 } | |
| 2497 | |
| 2498 // Simple recursive lock? | |
| 2499 | |
| 304 | 2500 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
| 0 | 2501 __ jcc(Assembler::equal, done); |
| 2502 | |
| 2503 // Must save rax if if it is live now because cmpxchg must use it | |
| 2504 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2505 save_native_result(masm, ret_type, stack_slots); | |
| 2506 } | |
| 2507 | |
| 2508 | |
| 2509 // get address of the stack lock | |
| 304 | 2510 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2511 // get old displaced header |
| 304 | 2512 __ movptr(old_hdr, Address(rax, 0)); |
| 0 | 2513 |
| 2514 // Atomic swap old header if oop still contains the stack lock | |
| 2515 if (os::is_MP()) { | |
| 2516 __ lock(); | |
| 2517 } | |
| 304 | 2518 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
| 0 | 2519 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 2520 | |
| 2521 // slow path re-enters here | |
| 2522 __ bind(unlock_done); | |
| 2523 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2524 restore_native_result(masm, ret_type, stack_slots); | |
| 2525 } | |
| 2526 | |
| 2527 __ bind(done); | |
| 2528 | |
| 2529 } | |
| 2530 { | |
| 2531 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2532 save_native_result(masm, ret_type, stack_slots); | |
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2533 __ mov_metadata(c_rarg1, method()); |
| 0 | 2534 __ call_VM_leaf( |
| 2535 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 2536 r15_thread, c_rarg1); | |
| 2537 restore_native_result(masm, ret_type, stack_slots); | |
| 2538 } | |
| 2539 | |
| 2540 __ reset_last_Java_frame(false, true); | |
| 2541 | |
| 2542 // Unpack oop result | |
| 2543 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 2544 Label L; | |
| 304 | 2545 __ testptr(rax, rax); |
| 0 | 2546 __ jcc(Assembler::zero, L); |
| 304 | 2547 __ movptr(rax, Address(rax, 0)); |
| 0 | 2548 __ bind(L); |
| 2549 __ verify_oop(rax); | |
| 2550 } | |
| 2551 | |
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2552 if (!is_critical_native) { |
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2553 // reset handle block |
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2554 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2555 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2556 } |
| 0 | 2557 |
| 2558 // pop our frame | |
| 2559 | |
| 2560 __ leave(); | |
| 2561 | |
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2562 if (!is_critical_native) { |
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2563 // Any exception pending? |
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2564 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2565 __ jcc(Assembler::notEqual, exception_pending); |
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2566 } |
| 0 | 2567 |
| 2568 // Return | |
| 2569 | |
| 2570 __ ret(0); | |
| 2571 | |
| 2572 // Unexpected paths are out of line and go here | |
| 2573 | |
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2574 if (!is_critical_native) { |
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2575 // forward the exception |
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2576 __ bind(exception_pending); |
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2577 |
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2578 // and forward the exception |
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2579 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2580 } |
| 0 | 2581 |
| 2582 // Slow path locking & unlocking | |
| 2583 if (method->is_synchronized()) { | |
| 2584 | |
| 2585 // BEGIN Slow path lock | |
| 2586 __ bind(slow_path_lock); | |
| 2587 | |
| 2588 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 2589 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 2590 | |
| 2591 // protect the args we've loaded | |
| 2592 save_args(masm, total_c_args, c_arg, out_regs); | |
| 2593 | |
| 304 | 2594 __ mov(c_rarg0, obj_reg); |
| 2595 __ mov(c_rarg1, lock_reg); | |
| 2596 __ mov(c_rarg2, r15_thread); | |
| 0 | 2597 |
| 2598 // Not a leaf but we have last_Java_frame setup as we want | |
| 2599 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
| 2600 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2601 | |
| 2602 #ifdef ASSERT | |
| 2603 { Label L; | |
| 304 | 2604 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 2605 __ jcc(Assembler::equal, L); |
| 2606 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 2607 __ bind(L); | |
| 2608 } | |
| 2609 #endif | |
| 2610 __ jmp(lock_done); | |
| 2611 | |
| 2612 // END Slow path lock | |
| 2613 | |
| 2614 // BEGIN Slow path unlock | |
| 2615 __ bind(slow_path_unlock); | |
| 2616 | |
| 2617 // If we haven't already saved the native result we must save it now as xmm registers | |
| 2618 // are still exposed. | |
| 2619 | |
| 2620 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2621 save_native_result(masm, ret_type, stack_slots); | |
| 2622 } | |
| 2623 | |
| 304 | 2624 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 2625 | |
| 2626 __ mov(c_rarg0, obj_reg); | |
| 2627 __ mov(r12, rsp); // remember sp | |
| 2628 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2629 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2630 |
| 2631 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 2632 // NOTE that obj_reg == rbx currently | |
| 304 | 2633 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
| 2634 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
| 0 | 2635 |
| 2636 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
| 304 | 2637 __ mov(rsp, r12); // restore sp |
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2638 __ reinit_heapbase(); |
| 0 | 2639 #ifdef ASSERT |
| 2640 { | |
| 2641 Label L; | |
| 304 | 2642 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 2643 __ jcc(Assembler::equal, L); |
| 2644 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 2645 __ bind(L); | |
| 2646 } | |
| 2647 #endif /* ASSERT */ | |
| 2648 | |
| 304 | 2649 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
| 0 | 2650 |
| 2651 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2652 restore_native_result(masm, ret_type, stack_slots); | |
| 2653 } | |
| 2654 __ jmp(unlock_done); | |
| 2655 | |
| 2656 // END Slow path unlock | |
| 2657 | |
| 2658 } // synchronized | |
| 2659 | |
| 2660 // SLOW PATH Reguard the stack if needed | |
| 2661 | |
| 2662 __ bind(reguard); | |
| 2663 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2664 __ mov(r12, rsp); // remember sp |
| 2665 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2666 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2667 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
| 304 | 2668 __ mov(rsp, r12); // restore sp |
|
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|
2669 __ reinit_heapbase(); |
| 0 | 2670 restore_native_result(masm, ret_type, stack_slots); |
| 2671 // and continue | |
| 2672 __ jmp(reguard_done); | |
| 2673 | |
| 2674 | |
| 2675 | |
| 2676 __ flush(); | |
| 2677 | |
| 2678 nmethod *nm = nmethod::new_native_nmethod(method, | |
|
2405
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|
2679 compile_id, |
| 0 | 2680 masm->code(), |
| 2681 vep_offset, | |
| 2682 frame_complete, | |
| 2683 stack_slots / VMRegImpl::slots_per_word, | |
| 2684 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 2685 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 2686 oop_maps); | |
|
4873
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7013347: allow crypto functions to be called inline to enhance performance
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|
2687 |
|
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|
2688 if (is_critical_native) { |
|
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|
2689 nm->set_lazy_critical_native(true); |
|
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|
2690 } |
|
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2691 |
| 0 | 2692 return nm; |
| 2693 | |
| 2694 } | |
| 2695 | |
|
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2696 #ifdef HAVE_DTRACE_H |
|
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2697 // --------------------------------------------------------------------------- |
|
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2698 // Generate a dtrace nmethod for a given signature. The method takes arguments |
|
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2699 // in the Java compiled code convention, marshals them to the native |
|
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2700 // abi and then leaves nops at the position you would expect to call a native |
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2701 // function. When the probe is enabled the nops are replaced with a trap |
|
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2702 // instruction that dtrace inserts and the trace will cause a notification |
|
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2703 // to dtrace. |
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2704 // |
|
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2705 // The probes are only able to take primitive types and java/lang/String as |
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2706 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2707 // strings so that from dtrace point of view java strings are converted to C |
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2708 // strings. There is an arbitrary fixed limit on the total space that a method |
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2709 // can use for converting the strings. (256 chars per string in the signature). |
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2710 // So any java string larger then this is truncated. |
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2711 |
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2712 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2713 static bool offsets_initialized = false; |
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2714 |
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2715 |
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2716 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2717 methodHandle method) { |
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2718 |
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2719 |
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2720 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2721 // be single threaded in this method. |
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2722 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2723 |
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2724 if (!offsets_initialized) { |
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2725 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2726 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2727 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2728 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2729 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2730 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2731 |
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2732 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2733 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2734 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2735 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2736 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2737 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2738 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2739 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2740 |
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2741 offsets_initialized = true; |
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2742 } |
|
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2743 // Fill in the signature array, for the calling-convention call. |
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2744 int total_args_passed = method->size_of_parameters(); |
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2745 |
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2746 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
|
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2747 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2748 |
|
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2749 // The signature we are going to use for the trap that dtrace will see |
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2750 // java/lang/String is converted. We drop "this" and any other object |
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2751 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2752 // is converted to a two-slot long, which is why we double the allocation). |
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2753 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2754 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2755 |
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2756 int i=0; |
|
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2757 int total_strings = 0; |
|
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2758 int first_arg_to_pass = 0; |
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2759 int total_c_args = 0; |
|
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2760 |
|
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2761 // Skip the receiver as dtrace doesn't want to see it |
|
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2762 if( !method->is_static() ) { |
|
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2763 in_sig_bt[i++] = T_OBJECT; |
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2764 first_arg_to_pass = 1; |
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2765 } |
|
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2766 |
|
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2767 // We need to convert the java args to where a native (non-jni) function |
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2768 // would expect them. To figure out where they go we convert the java |
|
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2769 // signature to a C signature. |
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2770 |
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2771 SignatureStream ss(method->signature()); |
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2772 for ( ; !ss.at_return_type(); ss.next()) { |
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2773 BasicType bt = ss.type(); |
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2774 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2775 out_sig_bt[total_c_args++] = bt; |
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2776 if( bt == T_OBJECT) { |
|
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3582bf76420e
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2777 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
|
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2778 if (s == vmSymbols::java_lang_String()) { |
|
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2779 total_strings++; |
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2780 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2781 } else if (s == vmSymbols::java_lang_Boolean() || |
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2782 s == vmSymbols::java_lang_Character() || |
|
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2783 s == vmSymbols::java_lang_Byte() || |
|
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2784 s == vmSymbols::java_lang_Short() || |
|
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2785 s == vmSymbols::java_lang_Integer() || |
|
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2786 s == vmSymbols::java_lang_Float()) { |
|
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2787 out_sig_bt[total_c_args-1] = T_INT; |
|
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2788 } else if (s == vmSymbols::java_lang_Long() || |
|
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2789 s == vmSymbols::java_lang_Double()) { |
|
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2790 out_sig_bt[total_c_args-1] = T_LONG; |
|
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2791 out_sig_bt[total_c_args++] = T_VOID; |
|
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2792 } |
|
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2793 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2794 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2795 // We convert double to long |
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2796 out_sig_bt[total_c_args-1] = T_LONG; |
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2797 out_sig_bt[total_c_args++] = T_VOID; |
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2798 } else if ( bt == T_FLOAT) { |
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2799 // We convert float to int |
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2800 out_sig_bt[total_c_args-1] = T_INT; |
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2801 } |
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2802 } |
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2803 |
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2804 assert(i==total_args_passed, "validly parsed signature"); |
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2805 |
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2806 // Now get the compiled-Java layout as input arguments |
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2807 int comp_args_on_stack; |
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2808 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2809 in_sig_bt, in_regs, total_args_passed, false); |
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2810 |
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2811 // Now figure out where the args must be stored and how much stack space |
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2812 // they require (neglecting out_preserve_stack_slots but space for storing |
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2813 // the 1st six register arguments). It's weird see int_stk_helper. |
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2814 |
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2815 int out_arg_slots; |
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2816 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2817 |
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2818 // Calculate the total number of stack slots we will need. |
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2819 |
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2820 // First count the abi requirement plus all of the outgoing args |
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2821 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2822 |
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2823 // Now space for the string(s) we must convert |
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2824 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2825 for (i = 0; i < total_strings ; i++) { |
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2826 string_locs[i] = stack_slots; |
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2827 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2828 } |
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2829 |
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2830 // Plus the temps we might need to juggle register args |
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2831 // regs take two slots each |
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2832 stack_slots += (Argument::n_int_register_parameters_c + |
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2833 Argument::n_float_register_parameters_c) * 2; |
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2834 |
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2835 |
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2836 // + 4 for return address (which we own) and saved rbp, |
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2837 |
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2838 stack_slots += 4; |
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2839 |
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2840 // Ok The space we have allocated will look like: |
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2841 // |
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2842 // |
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2843 // FP-> | | |
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2844 // |---------------------| |
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2845 // | string[n] | |
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2846 // |---------------------| <- string_locs[n] |
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2847 // | string[n-1] | |
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2848 // |---------------------| <- string_locs[n-1] |
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2849 // | ... | |
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2850 // | ... | |
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2851 // |---------------------| <- string_locs[1] |
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2852 // | string[0] | |
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2853 // |---------------------| <- string_locs[0] |
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2854 // | outbound memory | |
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2855 // | based arguments | |
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2856 // | | |
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2857 // |---------------------| |
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2858 // | | |
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2859 // SP-> | out_preserved_slots | |
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2860 // |
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2861 // |
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2862 |
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2863 // Now compute actual number of stack words we need rounding to make |
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2864 // stack properly aligned. |
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2865 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2866 |
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2867 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2868 |
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2869 intptr_t start = (intptr_t)__ pc(); |
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2870 |
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2871 // First thing make an ic check to see if we should even be here |
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2872 |
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2873 // We are free to use all registers as temps without saving them and |
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2874 // restoring them except rbp. rbp, is the only callee save register |
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2875 // as far as the interpreter and the compiler(s) are concerned. |
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2876 |
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2877 const Register ic_reg = rax; |
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2878 const Register receiver = rcx; |
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2879 Label hit; |
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2880 Label exception_pending; |
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2881 |
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2882 |
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2883 __ verify_oop(receiver); |
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2884 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2885 __ jcc(Assembler::equal, hit); |
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2886 |
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2887 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2888 |
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2889 // verified entry must be aligned for code patching. |
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2890 // and the first 5 bytes must be in the same cache line |
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2891 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2892 __ align(8); |
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2893 |
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2894 __ bind(hit); |
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2895 |
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2896 int vep_offset = ((intptr_t)__ pc()) - start; |
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2897 |
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2898 |
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2899 // The instruction at the verified entry point must be 5 bytes or longer |
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2900 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2901 // instruction fits that requirement. |
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2902 |
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2903 // Generate stack overflow check |
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2904 |
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2905 if (UseStackBanging) { |
|
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2906 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2907 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2908 } else { |
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2909 __ movl(rax, stack_size); |
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2910 __ bang_stack_size(rax, rbx); |
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2911 } |
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2912 } else { |
|
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2913 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2914 __ fat_nop(); |
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2915 } |
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2916 |
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2917 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2918 "valid size for make_non_entrant"); |
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2919 |
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2920 // Generate a new frame for the wrapper. |
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2921 __ enter(); |
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2922 |
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2923 // -4 because return address is already present and so is saved rbp, |
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2924 if (stack_size - 2*wordSize != 0) { |
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2925 __ subq(rsp, stack_size - 2*wordSize); |
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2926 } |
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2927 |
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2928 // Frame is now completed as far a size and linkage. |
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2929 |
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2930 int frame_complete = ((intptr_t)__ pc()) - start; |
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2931 |
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2932 int c_arg, j_arg; |
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2933 |
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2934 // State of input register args |
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2935 |
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2936 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2937 |
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2938 live[j_rarg0->as_VMReg()->value()] = false; |
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2939 live[j_rarg1->as_VMReg()->value()] = false; |
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2940 live[j_rarg2->as_VMReg()->value()] = false; |
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2941 live[j_rarg3->as_VMReg()->value()] = false; |
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2942 live[j_rarg4->as_VMReg()->value()] = false; |
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2943 live[j_rarg5->as_VMReg()->value()] = false; |
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2944 |
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2945 live[j_farg0->as_VMReg()->value()] = false; |
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2946 live[j_farg1->as_VMReg()->value()] = false; |
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2947 live[j_farg2->as_VMReg()->value()] = false; |
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2948 live[j_farg3->as_VMReg()->value()] = false; |
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2949 live[j_farg4->as_VMReg()->value()] = false; |
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2950 live[j_farg5->as_VMReg()->value()] = false; |
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2951 live[j_farg6->as_VMReg()->value()] = false; |
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2952 live[j_farg7->as_VMReg()->value()] = false; |
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2953 |
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2954 |
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2955 bool rax_is_zero = false; |
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2956 |
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2957 // All args (except strings) destined for the stack are moved first |
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2958 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2959 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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2960 VMRegPair src = in_regs[j_arg]; |
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2961 VMRegPair dst = out_regs[c_arg]; |
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2962 |
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2963 // Get the real reg value or a dummy (rsp) |
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2964 |
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2965 int src_reg = src.first()->is_reg() ? |
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2966 src.first()->value() : |
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2967 rsp->as_VMReg()->value(); |
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2968 |
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2969 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2970 (in_sig_bt[j_arg] == T_OBJECT && |
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2971 out_sig_bt[c_arg] != T_INT && |
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2972 out_sig_bt[c_arg] != T_ADDRESS && |
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2973 out_sig_bt[c_arg] != T_LONG); |
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2974 |
|
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2975 live[src_reg] = !useless; |
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2976 |
|
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2977 if (dst.first()->is_stack()) { |
|
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2978 |
|
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2979 // Even though a string arg in a register is still live after this loop |
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2980 // after the string conversion loop (next) it will be dead so we take |
|
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2981 // advantage of that now for simpler code to manage live. |
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2982 |
|
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2983 live[src_reg] = false; |
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2984 switch (in_sig_bt[j_arg]) { |
|
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2985 |
|
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2986 case T_ARRAY: |
|
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2987 case T_OBJECT: |
|
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2988 { |
|
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2989 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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2990 |
|
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2991 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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2992 // need to unbox a one-word value |
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2993 Register in_reg = rax; |
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2994 if ( src.first()->is_reg() ) { |
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2995 in_reg = src.first()->as_Register(); |
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2996 } else { |
|
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2997 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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2998 rax_is_zero = false; |
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2999 } |
|
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3000 Label skipUnbox; |
|
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3001 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
|
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3002 (int32_t)NULL_WORD); |
|
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3003 __ testq(in_reg, in_reg); |
|
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3004 __ jcc(Assembler::zero, skipUnbox); |
|
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3005 |
|
165
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3006 BasicType bt = out_sig_bt[c_arg]; |
|
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3007 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
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3008 Address src1(in_reg, box_offset); |
|
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3009 if ( bt == T_LONG ) { |
|
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3010 __ movq(in_reg, src1); |
|
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3011 __ movq(stack_dst, in_reg); |
|
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3012 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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3013 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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3014 } else { |
|
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3015 __ movl(in_reg, src1); |
|
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3016 __ movl(stack_dst, in_reg); |
|
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3017 } |
|
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|
3018 |
|
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3019 __ bind(skipUnbox); |
|
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3020 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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diff
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|
3021 // Convert the arg to NULL |
|
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diff
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|
3022 if (!rax_is_zero) { |
|
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|
3023 __ xorq(rax, rax); |
|
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diff
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|
3024 rax_is_zero = true; |
|
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113
diff
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|
3025 } |
|
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diff
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|
3026 __ movq(stack_dst, rax); |
|
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kamg
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113
diff
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|
3027 } |
|
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kamg
parents:
113
diff
changeset
|
3028 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3029 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3030 |
|
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kamg
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diff
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|
3031 case T_VOID: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3032 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3033 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3034 case T_FLOAT: |
|
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diff
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|
3035 // This does the right thing since we know it is destined for the |
|
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|
3036 // stack |
|
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diff
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|
3037 float_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3038 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3039 |
|
018d5b58dd4f
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kamg
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113
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|
3040 case T_DOUBLE: |
|
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|
3041 // This does the right thing since we know it is destined for the |
|
018d5b58dd4f
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|
3042 // stack |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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diff
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|
3043 double_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3044 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3045 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3046 case T_LONG : |
|
018d5b58dd4f
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|
3047 long_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3048 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3049 |
|
018d5b58dd4f
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kamg
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113
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|
3050 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
018d5b58dd4f
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kamg
parents:
113
diff
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|
3051 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3052 default: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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diff
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|
3053 move32_64(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3054 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3055 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3056 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3057 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3058 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3059 // If we have any strings we must store any register based arg to the stack |
|
018d5b58dd4f
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kamg
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113
diff
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|
3060 // This includes any still live xmm registers too. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3061 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3062 int sid = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3063 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3064 if (total_strings > 0 ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3065 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3066 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3067 VMRegPair src = in_regs[j_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3068 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3069 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3070 if (src.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3071 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3072 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3073 // string oops were left untouched by the previous loop even if the |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3074 // eventual (converted) arg is destined for the stack so park them |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3075 // away now (except for first) |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3076 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3077 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3078 Address utf8_addr = Address( |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3079 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3080 if (sid != 1) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3081 // The first string arg won't be killed until after the utf8 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3082 // conversion |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3083 __ movq(utf8_addr, src.first()->as_Register()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3084 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3085 } else if (dst.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3086 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3087 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3088 // Convert the xmm register to an int and store it in the reserved |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3089 // location for the eventual c register arg |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3090 XMMRegister f = src.first()->as_XMMRegister(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3091 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3092 __ movflt(src_tmp, f); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3093 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3094 __ movdbl(src_tmp, f); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3095 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3096 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3097 // If the arg is an oop type we don't support don't bother to store |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3098 // it remember string was handled above. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3099 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3100 (in_sig_bt[j_arg] == T_OBJECT && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3101 out_sig_bt[c_arg] != T_INT && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3102 out_sig_bt[c_arg] != T_LONG); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3103 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3104 if (!useless) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3105 __ movq(src_tmp, src.first()->as_Register()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3106 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3107 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3108 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3109 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3110 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
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kamg
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113
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|
3111 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3112 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3113 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3114 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3115 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3116 // Now that the volatile registers are safe, convert all the strings |
|
018d5b58dd4f
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kamg
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113
diff
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|
3117 sid = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3118 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3119 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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|
3120 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
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kamg
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|
3121 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
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kamg
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113
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|
3122 // It's a string |
|
018d5b58dd4f
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113
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|
3123 Address utf8_addr = Address( |
|
018d5b58dd4f
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kamg
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113
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|
3124 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
018d5b58dd4f
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|
3125 // The first string we find might still be in the original java arg |
|
018d5b58dd4f
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kamg
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113
diff
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|
3126 // register |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3127 |
|
018d5b58dd4f
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113
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|
3128 VMReg src = in_regs[j_arg].first(); |
|
018d5b58dd4f
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kamg
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113
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|
3129 |
|
018d5b58dd4f
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kamg
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113
diff
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|
3130 // We will need to eventually save the final argument to the trap |
|
018d5b58dd4f
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113
diff
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|
3131 // in the von-volatile location dedicated to src. This is the offset |
|
018d5b58dd4f
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113
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|
3132 // from fp we will use. |
|
018d5b58dd4f
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113
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|
3133 int src_off = src->is_reg() ? |
|
018d5b58dd4f
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113
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|
3134 fp_offset[src->value()] : reg2offset_in(src); |
|
018d5b58dd4f
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kamg
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113
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|
3135 |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3136 // This is where the argument will eventually reside |
|
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3137 VMRegPair dst = out_regs[c_arg]; |
|
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3138 |
|
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3139 if (src->is_reg()) { |
|
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3140 if (sid == 1) { |
|
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3141 __ movq(c_rarg0, src->as_Register()); |
|
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3142 } else { |
|
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3143 __ movq(c_rarg0, utf8_addr); |
|
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3144 } |
|
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|
3145 } else { |
|
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3146 // arg is still in the original location |
|
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3147 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
|
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3148 } |
|
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3149 Label done, convert; |
|
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3150 |
|
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3151 // see if the oop is NULL |
|
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3152 __ testq(c_rarg0, c_rarg0); |
|
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3153 __ jcc(Assembler::notEqual, convert); |
|
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3154 |
|
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|
3155 if (dst.first()->is_reg()) { |
|
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3156 // Save the ptr to utf string in the origina src loc or the tmp |
|
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3157 // dedicated to it |
|
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3158 __ movq(Address(rbp, src_off), c_rarg0); |
|
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3159 } else { |
|
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3160 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
|
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|
3161 } |
|
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|
3162 __ jmp(done); |
|
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|
3163 |
|
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|
3164 __ bind(convert); |
|
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|
3165 |
|
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|
3166 __ lea(c_rarg1, utf8_addr); |
|
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|
3167 if (dst.first()->is_reg()) { |
|
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3168 __ movq(Address(rbp, src_off), c_rarg1); |
|
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|
3169 } else { |
|
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3170 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
|
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|
3171 } |
|
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|
3172 // And do the conversion |
|
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3173 __ call(RuntimeAddress( |
|
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|
3174 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
|
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|
3175 |
|
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|
3176 __ bind(done); |
|
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|
3177 } |
|
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|
3178 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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|
3179 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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3180 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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|
3181 } |
|
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|
3182 } |
|
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|
3183 // The get_utf call killed all the c_arg registers |
|
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|
3184 live[c_rarg0->as_VMReg()->value()] = false; |
|
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|
3185 live[c_rarg1->as_VMReg()->value()] = false; |
|
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|
3186 live[c_rarg2->as_VMReg()->value()] = false; |
|
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|
3187 live[c_rarg3->as_VMReg()->value()] = false; |
|
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|
3188 live[c_rarg4->as_VMReg()->value()] = false; |
|
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|
3189 live[c_rarg5->as_VMReg()->value()] = false; |
|
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|
3190 |
|
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|
3191 live[c_farg0->as_VMReg()->value()] = false; |
|
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|
3192 live[c_farg1->as_VMReg()->value()] = false; |
|
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|
3193 live[c_farg2->as_VMReg()->value()] = false; |
|
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|
3194 live[c_farg3->as_VMReg()->value()] = false; |
|
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|
3195 live[c_farg4->as_VMReg()->value()] = false; |
|
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|
3196 live[c_farg5->as_VMReg()->value()] = false; |
|
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|
3197 live[c_farg6->as_VMReg()->value()] = false; |
|
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|
3198 live[c_farg7->as_VMReg()->value()] = false; |
|
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|
3199 } |
|
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|
3200 |
|
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|
3201 // Now we can finally move the register args to their desired locations |
|
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|
3202 |
|
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|
3203 rax_is_zero = false; |
|
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|
3204 |
|
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|
3205 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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|
3206 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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|
3207 |
|
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|
3208 VMRegPair src = in_regs[j_arg]; |
|
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|
3209 VMRegPair dst = out_regs[c_arg]; |
|
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|
3210 |
|
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|
3211 // Only need to look for args destined for the interger registers (since we |
|
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|
3212 // convert float/double args to look like int/long outbound) |
|
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|
3213 if (dst.first()->is_reg()) { |
|
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|
3214 Register r = dst.first()->as_Register(); |
|
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|
3215 |
|
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|
3216 // Check if the java arg is unsupported and thereofre useless |
|
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|
3217 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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|
3218 (in_sig_bt[j_arg] == T_OBJECT && |
|
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|
3219 out_sig_bt[c_arg] != T_INT && |
|
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|
3220 out_sig_bt[c_arg] != T_ADDRESS && |
|
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|
3221 out_sig_bt[c_arg] != T_LONG); |
|
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|
3222 |
|
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|
3223 |
|
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|
3224 // If we're going to kill an existing arg save it first |
|
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|
3225 if (live[dst.first()->value()]) { |
|
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|
3226 // you can't kill yourself |
|
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|
3227 if (src.first() != dst.first()) { |
|
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|
3228 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
|
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|
3229 } |
|
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|
3230 } |
|
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|
3231 if (src.first()->is_reg()) { |
|
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3232 if (live[src.first()->value()] ) { |
|
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3233 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
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|
3234 __ movdl(r, src.first()->as_XMMRegister()); |
|
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3235 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
|
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|
3236 __ movdq(r, src.first()->as_XMMRegister()); |
|
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|
3237 } else if (r != src.first()->as_Register()) { |
|
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3238 if (!useless) { |
|
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|
3239 __ movq(r, src.first()->as_Register()); |
|
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|
3240 } |
|
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|
3241 } |
|
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|
3242 } else { |
|
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3243 // If the arg is an oop type we don't support don't bother to store |
|
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|
3244 // it |
|
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|
3245 if (!useless) { |
|
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3246 if (in_sig_bt[j_arg] == T_DOUBLE || |
|
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3247 in_sig_bt[j_arg] == T_LONG || |
|
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3248 in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3249 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
|
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3250 } else { |
|
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3251 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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3252 } |
|
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3253 } |
|
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|
3254 } |
|
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3255 live[src.first()->value()] = false; |
|
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3256 } else if (!useless) { |
|
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3257 // full sized move even for int should be ok |
|
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3258 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
|
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3259 } |
|
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3260 |
|
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3261 // At this point r has the original java arg in the final location |
|
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3262 // (assuming it wasn't useless). If the java arg was an oop |
|
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3263 // we have a bit more to do |
|
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3264 |
|
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3265 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3266 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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3267 // need to unbox a one-word value |
|
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3268 Label skip; |
|
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3269 __ testq(r, r); |
|
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3270 __ jcc(Assembler::equal, skip); |
|
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3271 BasicType bt = out_sig_bt[c_arg]; |
|
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3272 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
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3273 Address src1(r, box_offset); |
|
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3274 if ( bt == T_LONG ) { |
|
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3275 __ movq(r, src1); |
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3276 } else { |
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3277 __ movl(r, src1); |
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3278 } |
|
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|
3279 __ bind(skip); |
|
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3280 |
|
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3281 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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3282 // Convert the arg to NULL |
|
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3283 __ xorq(r, r); |
|
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3284 } |
|
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|
3285 } |
|
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|
3286 |
|
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|
3287 // dst can longer be holding an input value |
|
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3288 live[dst.first()->value()] = false; |
|
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3289 } |
|
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3290 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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3291 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3292 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3293 } |
|
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|
3294 } |
|
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|
3295 |
|
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|
3296 |
|
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3297 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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3298 // patch in the trap |
|
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3299 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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3300 |
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|
3301 __ nop(); |
|
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3302 |
|
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|
3303 |
|
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|
3304 // Return |
|
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|
3305 |
|
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|
3306 __ leave(); |
|
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3307 __ ret(0); |
|
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3308 |
|
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|
3309 __ flush(); |
|
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3310 |
|
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|
3311 nmethod *nm = nmethod::new_dtrace_nmethod( |
|
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3312 method, masm->code(), vep_offset, patch_offset, frame_complete, |
|
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3313 stack_slots / VMRegImpl::slots_per_word); |
|
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3314 return nm; |
|
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3315 |
|
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|
3316 } |
|
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|
3317 |
|
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|
3318 #endif // HAVE_DTRACE_H |
|
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3319 |
| 0 | 3320 // this function returns the adjust size (in number of words) to a c2i adapter |
| 3321 // activation for use during deoptimization | |
| 3322 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 3323 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 3324 } |
| 3325 | |
| 3326 | |
| 3327 uint SharedRuntime::out_preserve_stack_slots() { | |
| 3328 return 0; | |
| 3329 } | |
| 3330 | |
| 3331 //------------------------------generate_deopt_blob---------------------------- | |
| 3332 void SharedRuntime::generate_deopt_blob() { | |
| 3333 // Allocate space for the code | |
| 3334 ResourceMark rm; | |
| 3335 // Setup code generation tools | |
| 3336 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
| 3337 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3338 int frame_size_in_words; | |
| 3339 OopMap* map = NULL; | |
| 3340 OopMapSet *oop_maps = new OopMapSet(); | |
| 3341 | |
| 3342 // ------------- | |
| 3343 // This code enters when returning to a de-optimized nmethod. A return | |
| 3344 // address has been pushed on the the stack, and return values are in | |
| 3345 // registers. | |
| 3346 // If we are doing a normal deopt then we were called from the patched | |
| 3347 // nmethod from the point we returned to the nmethod. So the return | |
| 3348 // address on the stack is wrong by NativeCall::instruction_size | |
| 3349 // We will adjust the value so it looks like we have the original return | |
| 3350 // address on the stack (like when we eagerly deoptimized). | |
| 3351 // In the case of an exception pending when deoptimizing, we enter | |
| 3352 // with a return address on the stack that points after the call we patched | |
| 3353 // into the exception handler. We have the following register state from, | |
| 3354 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
| 3355 // rax: exception oop | |
| 3356 // rbx: exception handler | |
| 3357 // rdx: throwing pc | |
| 3358 // So in this case we simply jam rdx into the useless return address and | |
| 3359 // the stack looks just like we want. | |
| 3360 // | |
| 3361 // At this point we need to de-opt. We save the argument return | |
| 3362 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 3363 // routine captures the return values and returns a structure which | |
| 3364 // describes the current frame size and the sizes of all replacement frames. | |
| 3365 // The current frame is compiled code and may contain many inlined | |
| 3366 // functions, each with their own JVM state. We pop the current frame, then | |
| 3367 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 3368 // populate these frames. Finally unpack_frames() returns us the new target | |
| 3369 // address. Notice that callee-save registers are BLOWN here; they have | |
| 3370 // already been captured in the vframeArray at the time the return PC was | |
| 3371 // patched. | |
| 3372 address start = __ pc(); | |
| 3373 Label cont; | |
| 3374 | |
| 3375 // Prolog for non exception case! | |
| 3376 | |
| 3377 // Save everything in sight. | |
| 3378 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3379 | |
| 3380 // Normal deoptimization. Save exec mode for unpack_frames. | |
|
113
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diff
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|
3381 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
| 0 | 3382 __ jmp(cont); |
| 304 | 3383 |
| 3384 int reexecute_offset = __ pc() - start; | |
| 3385 | |
| 3386 // Reexecute case | |
| 3387 // return address is the pc describes what bci to do re-execute at | |
| 3388 | |
| 3389 // No need to update map as each call to save_live_registers will produce identical oopmap | |
| 3390 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3391 | |
| 3392 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
| 3393 __ jmp(cont); | |
| 3394 | |
| 0 | 3395 int exception_offset = __ pc() - start; |
| 3396 | |
| 3397 // Prolog for exception case | |
| 3398 | |
| 304 | 3399 // all registers are dead at this entry point, except for rax, and |
| 3400 // rdx which contain the exception oop and exception pc | |
| 3401 // respectively. Set them in TLS and fall thru to the | |
| 3402 // unpack_with_exception_in_tls entry point. | |
| 3403 | |
| 3404 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 3405 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
| 3406 | |
| 3407 int exception_in_tls_offset = __ pc() - start; | |
| 3408 | |
| 3409 // new implementation because exception oop is now passed in JavaThread | |
| 3410 | |
| 3411 // Prolog for exception case | |
| 3412 // All registers must be preserved because they might be used by LinearScan | |
| 3413 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 3414 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 3415 // args are on the stack, no return address) | |
| 3416 | |
| 3417 // make room on stack for the return address | |
| 3418 // It will be patched later with the throwing pc. The correct value is not | |
| 3419 // available now because loading it from memory would destroy registers. | |
| 3420 __ push(0); | |
| 0 | 3421 |
| 3422 // Save everything in sight. | |
|
7154
5d0bb7d52783
changes to support Graal co-existing with the other HotSpot compiler(s) and being used for explicit compilation requests and code installation via the Graal API
Doug Simon <doug.simon@oracle.com>
parents:
6948
diff
changeset
|
3423 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
| 0 | 3424 |
| 304 | 3425 // Now it is safe to overwrite any register |
| 3426 | |
| 0 | 3427 // Deopt during an exception. Save exec mode for unpack_frames. |
|
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|
3428 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
| 0 | 3429 |
| 304 | 3430 // load throwing pc from JavaThread and patch it as the return address |
| 3431 // of the current frame. Then clear the field in JavaThread | |
| 3432 | |
| 3433 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3434 __ movptr(Address(rbp, wordSize), rdx); | |
| 3435 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3436 | |
| 3437 #ifdef ASSERT | |
| 3438 // verify that there is really an exception oop in JavaThread | |
| 3439 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3440 __ verify_oop(rax); | |
| 3441 | |
| 3442 // verify that there is no pending exception | |
| 3443 Label no_pending_exception; | |
| 3444 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
| 3445 __ testptr(rax, rax); | |
| 3446 __ jcc(Assembler::zero, no_pending_exception); | |
| 3447 __ stop("must not have pending exception here"); | |
| 3448 __ bind(no_pending_exception); | |
| 3449 #endif | |
| 3450 | |
|
4984
5c41e7002923
Added missing #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4979
diff
changeset
|
3451 #ifdef GRAAL |
|
2059
9508a52cbd32
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Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3452 __ jmp(cont); |
|
9508a52cbd32
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Thomas Wuerthinger <wuerthinger@ssw.jku.at>
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1972
diff
changeset
|
3453 |
|
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3454 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
|
2605
98fa88528319
Deopt on implicit null pointer exception.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2491
diff
changeset
|
3455 __ pushptr(Address(r15_thread, in_bytes(JavaThread::ScratchA_offset()))); |
|
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3456 __ movptr(rscratch1, Address(r15_thread, in_bytes(JavaThread::ScratchB_offset()))); |
|
2605
98fa88528319
Deopt on implicit null pointer exception.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2491
diff
changeset
|
3457 |
|
2059
9508a52cbd32
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Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3458 int uncommon_trap_offset = __ pc() - start; |
|
9508a52cbd32
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Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
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|
3459 |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3460 // Save everything in sight. |
|
4675
c2384f5b2e6e
Small changes to the deopt stub.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4661
diff
changeset
|
3461 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3462 // fetch_unroll_info needs to call last_java_frame() |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3463 __ set_last_Java_frame(noreg, noreg, NULL); |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3464 |
|
2935
9b8f30608e62
deoptimization action (invalidate, reprofile, ...)
Lukas Stadler <lukas.stadler@jku.at>
parents:
2928
diff
changeset
|
3465 assert(r10 == rscratch1, "scratch register should be r10"); |
|
4675
c2384f5b2e6e
Small changes to the deopt stub.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4661
diff
changeset
|
3466 __ movl(c_rarg1, Address(rsp, RegisterSaver::r10_offset_in_bytes())); |
|
5109
6766253384bf
more preparations for disabling runtime feedback selectively based on deoptimization history
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4993
diff
changeset
|
3467 |
|
2928
1e13559b112d
small fix in deopt stub, more branch prediction code
Lukas Stadler <lukas.stadler@jku.at>
parents:
2891
diff
changeset
|
3468 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3469 __ mov(c_rarg0, r15_thread); |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3470 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3471 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3472 |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3473 __ reset_last_Java_frame(false, false); |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3474 |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3475 Label after_fetch_unroll_info_call; |
|
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3476 __ jmp(after_fetch_unroll_info_call); |
|
5109
6766253384bf
more preparations for disabling runtime feedback selectively based on deoptimization history
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4993
diff
changeset
|
3477 #endif // GRAAL |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3478 |
| 0 | 3479 __ bind(cont); |
| 3480 | |
| 3481 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 3482 // crud. We cannot block on this call, no GC can happen. | |
| 3483 // | |
| 3484 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
| 3485 | |
| 3486 // fetch_unroll_info needs to call last_java_frame(). | |
| 3487 | |
| 3488 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3489 #ifdef ASSERT | |
| 3490 { Label L; | |
| 304 | 3491 __ cmpptr(Address(r15_thread, |
| 0 | 3492 JavaThread::last_Java_fp_offset()), |
| 304 | 3493 (int32_t)0); |
| 0 | 3494 __ jcc(Assembler::equal, L); |
| 3495 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
| 3496 __ bind(L); | |
| 3497 } | |
| 3498 #endif // ASSERT | |
| 304 | 3499 __ mov(c_rarg0, r15_thread); |
| 0 | 3500 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
| 3501 | |
| 3502 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 3503 // find any register it might need. | |
| 3504 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3505 | |
| 3506 __ reset_last_Java_frame(false, false); | |
| 3507 | |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3508 #ifdef GRAAL |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3509 __ bind(after_fetch_unroll_info_call); |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3510 #endif |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3511 |
| 0 | 3512 // Load UnrollBlock* into rdi |
| 304 | 3513 __ mov(rdi, rax); |
| 3514 | |
| 3515 Label noException; | |
|
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
3516 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
| 304 | 3517 __ jcc(Assembler::notEqual, noException); |
| 3518 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3519 // QQQ this is useless it was NULL above | |
| 3520 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3521 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
| 3522 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3523 | |
| 3524 __ verify_oop(rax); | |
| 3525 | |
| 3526 // Overwrite the result registers with the exception results. | |
| 3527 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 3528 // I think this is useless | |
| 3529 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
| 3530 | |
| 3531 __ bind(noException); | |
| 0 | 3532 |
| 3533 // Only register save data is on the stack. | |
| 3534 // Now restore the result registers. Everything else is either dead | |
| 3535 // or captured in the vframeArray. | |
| 3536 RegisterSaver::restore_result_registers(masm); | |
| 3537 | |
| 3538 // All of the register save area has been popped of the stack. Only the | |
| 3539 // return address remains. | |
| 3540 | |
| 3541 // Pop all the frames we must move/replace. | |
| 3542 // | |
| 3543 // Frame picture (youngest to oldest) | |
| 3544 // 1: self-frame (no frame link) | |
| 3545 // 2: deopting frame (no frame link) | |
| 3546 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3547 // | |
| 3548 // Note: by leaving the return address of self-frame on the stack | |
| 3549 // and using the size of frame 2 to adjust the stack | |
| 3550 // when we are done the return to frame 3 will still be on the stack. | |
| 3551 | |
| 3552 // Pop deoptimized frame | |
| 3553 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3554 __ addptr(rsp, rcx); |
| 0 | 3555 |
| 3556 // rsp should be pointing at the return address to the caller (3) | |
| 3557 | |
| 3558 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 3559 if (UseStackBanging) { | |
| 3560 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3561 __ bang_stack_size(rbx, rcx); | |
| 3562 } | |
| 3563 | |
| 3564 // Load address of array of frame pcs into rcx | |
| 304 | 3565 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 0 | 3566 |
| 3567 // Trash the old pc | |
| 304 | 3568 __ addptr(rsp, wordSize); |
| 0 | 3569 |
| 3570 // Load address of array of frame sizes into rsi | |
| 304 | 3571 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3572 |
| 3573 // Load counter into rdx | |
| 3574 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3575 | |
| 3576 // Pick up the initial fp we should save | |
|
3931
5432047c7db7
7087445: Improve platform independence of JSR292 shared code
bdelsart
parents:
3442
diff
changeset
|
3577 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
| 0 | 3578 |
| 3579 // Now adjust the caller's stack to make up for the extra locals | |
| 3580 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3581 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3582 // value and not the "real" sp value. | |
| 3583 | |
| 3584 const Register sender_sp = r8; | |
| 3585 | |
| 304 | 3586 __ mov(sender_sp, rsp); |
| 0 | 3587 __ movl(rbx, Address(rdi, |
| 3588 Deoptimization::UnrollBlock:: | |
| 3589 caller_adjustment_offset_in_bytes())); | |
| 304 | 3590 __ subptr(rsp, rbx); |
| 0 | 3591 |
| 3592 // Push interpreter frames in a loop | |
| 3593 Label loop; | |
| 3594 __ bind(loop); | |
| 304 | 3595 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3596 #ifdef CC_INTERP | |
| 3597 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
| 3598 #ifdef ASSERT | |
| 3599 __ push(0xDEADDEAD); // Make a recognizable pattern | |
| 3600 __ push(0xDEADDEAD); | |
| 3601 #else /* ASSERT */ | |
| 3602 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
| 3603 #endif /* ASSERT */ | |
| 3604 #else | |
| 3605 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
| 3606 #endif // CC_INTERP | |
| 3607 __ pushptr(Address(rcx, 0)); // Save return address | |
| 0 | 3608 __ enter(); // Save old & set new ebp |
| 304 | 3609 __ subptr(rsp, rbx); // Prolog |
| 3610 #ifdef CC_INTERP | |
| 3611 __ movptr(Address(rbp, | |
| 3612 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
| 3613 sender_sp); // Make it walkable | |
| 3614 #else /* CC_INTERP */ | |
| 0 | 3615 // This value is corrected by layout_activation_impl |
| 304 | 3616 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
| 3617 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
| 3618 #endif /* CC_INTERP */ | |
| 3619 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
| 3620 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3621 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 0 | 3622 __ decrementl(rdx); // Decrement counter |
| 3623 __ jcc(Assembler::notZero, loop); | |
| 304 | 3624 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3625 |
| 3626 // Re-push self-frame | |
| 3627 __ enter(); // Save old & set new ebp | |
| 3628 | |
| 3629 // Allocate a full sized register save area. | |
| 3630 // Return address and rbp are in place, so we allocate two less words. | |
| 304 | 3631 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
| 0 | 3632 |
| 3633 // Restore frame locals after moving the frame | |
| 3634 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
| 304 | 3635 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
| 0 | 3636 |
| 3637 // Call C code. Need thread but NOT official VM entry | |
| 3638 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3639 // restore return values to their stack-slots with the new SP. | |
| 3640 // | |
| 3641 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
| 3642 | |
| 3643 // Use rbp because the frames look interpreted now | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3644 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3645 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3646 address the_pc = __ pc(); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3647 __ set_last_Java_frame(noreg, rbp, the_pc); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3648 |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3649 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
| 304 | 3650 __ mov(c_rarg0, r15_thread); |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3651 __ movl(c_rarg1, r14); // second arg: exec_mode |
| 0 | 3652 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3653 // Revert SP alignment after call since we're going to do some SP relative addressing below |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3654 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
| 0 | 3655 |
| 3656 // Set an oopmap for the call site | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3657 // Use the same PC we used for the last java frame |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3658 oop_maps->add_gc_map(the_pc - start, |
| 0 | 3659 new OopMap( frame_size_in_words, 0 )); |
| 3660 | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3661 // Clear fp AND pc |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3662 __ reset_last_Java_frame(true, true); |
| 0 | 3663 |
| 3664 // Collect return values | |
| 3665 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
| 304 | 3666 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
| 3667 // I think this is useless (throwing pc?) | |
| 3668 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
| 0 | 3669 |
| 3670 // Pop self-frame. | |
| 3671 __ leave(); // Epilog | |
| 3672 | |
| 3673 // Jump to interpreter | |
| 3674 __ ret(0); | |
| 3675 | |
| 3676 // Make sure all code is generated | |
| 3677 masm->flush(); | |
| 3678 | |
| 304 | 3679 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
| 3680 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3681 #ifdef GRAAL |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3682 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
|
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3683 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3684 #endif |
| 0 | 3685 } |
| 3686 | |
| 3687 #ifdef COMPILER2 | |
| 3688 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 3689 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 3690 // Allocate space for the code | |
| 3691 ResourceMark rm; | |
| 3692 // Setup code generation tools | |
| 3693 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
| 3694 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3695 | |
| 3696 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 3697 | |
| 3698 address start = __ pc(); | |
| 3699 | |
| 3700 // Push self-frame. We get here with a return address on the | |
| 3701 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
| 304 | 3702 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
| 0 | 3703 |
| 3704 // No callee saved registers. rbp is assumed implicitly saved | |
| 304 | 3705 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 3706 |
| 3707 // compiler left unloaded_class_index in j_rarg0 move to where the | |
| 3708 // runtime expects it. | |
| 3709 __ movl(c_rarg1, j_rarg0); | |
| 3710 | |
| 3711 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3712 | |
| 3713 // Call C code. Need thread but NOT official VM entry | |
| 3714 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3715 // capture callee-saved registers as well as return values. | |
| 3716 // Thread is in rdi already. | |
| 3717 // | |
| 3718 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
| 3719 | |
| 304 | 3720 __ mov(c_rarg0, r15_thread); |
| 0 | 3721 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
| 3722 | |
| 3723 // Set an oopmap for the call site | |
| 3724 OopMapSet* oop_maps = new OopMapSet(); | |
| 3725 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
| 3726 | |
| 3727 // location of rbp is known implicitly by the frame sender code | |
| 3728 | |
| 3729 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3730 | |
| 3731 __ reset_last_Java_frame(false, false); | |
| 3732 | |
| 3733 // Load UnrollBlock* into rdi | |
| 304 | 3734 __ mov(rdi, rax); |
| 0 | 3735 |
| 3736 // Pop all the frames we must move/replace. | |
| 3737 // | |
| 3738 // Frame picture (youngest to oldest) | |
| 3739 // 1: self-frame (no frame link) | |
| 3740 // 2: deopting frame (no frame link) | |
| 3741 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3742 | |
| 3743 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
| 304 | 3744 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
| 0 | 3745 |
| 3746 // Pop deoptimized frame (int) | |
| 3747 __ movl(rcx, Address(rdi, | |
| 3748 Deoptimization::UnrollBlock:: | |
| 3749 size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3750 __ addptr(rsp, rcx); |
| 0 | 3751 |
| 3752 // rsp should be pointing at the return address to the caller (3) | |
| 3753 | |
| 3754 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 3755 if (UseStackBanging) { | |
| 3756 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3757 __ bang_stack_size(rbx, rcx); | |
| 3758 } | |
| 3759 | |
| 3760 // Load address of array of frame pcs into rcx (address*) | |
| 304 | 3761 __ movptr(rcx, |
| 3762 Address(rdi, | |
| 3763 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
| 0 | 3764 |
| 3765 // Trash the return pc | |
| 304 | 3766 __ addptr(rsp, wordSize); |
| 0 | 3767 |
| 3768 // Load address of array of frame sizes into rsi (intptr_t*) | |
| 304 | 3769 __ movptr(rsi, Address(rdi, |
| 3770 Deoptimization::UnrollBlock:: | |
| 3771 frame_sizes_offset_in_bytes())); | |
| 0 | 3772 |
| 3773 // Counter | |
| 3774 __ movl(rdx, Address(rdi, | |
| 3775 Deoptimization::UnrollBlock:: | |
| 3776 number_of_frames_offset_in_bytes())); // (int) | |
| 3777 | |
| 3778 // Pick up the initial fp we should save | |
| 304 | 3779 __ movptr(rbp, |
| 3780 Address(rdi, | |
|
3931
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|
3781 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
| 0 | 3782 |
| 3783 // Now adjust the caller's stack to make up for the extra locals but | |
| 3784 // record the original sp so that we can save it in the skeletal | |
| 3785 // interpreter frame and the stack walking of interpreter_sender | |
| 3786 // will get the unextended sp value and not the "real" sp value. | |
| 3787 | |
| 3788 const Register sender_sp = r8; | |
| 3789 | |
| 304 | 3790 __ mov(sender_sp, rsp); |
| 0 | 3791 __ movl(rbx, Address(rdi, |
| 3792 Deoptimization::UnrollBlock:: | |
| 3793 caller_adjustment_offset_in_bytes())); // (int) | |
| 304 | 3794 __ subptr(rsp, rbx); |
| 0 | 3795 |
| 3796 // Push interpreter frames in a loop | |
| 3797 Label loop; | |
| 3798 __ bind(loop); | |
| 304 | 3799 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3800 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
| 3801 __ pushptr(Address(rcx, 0)); // Save return address | |
| 3802 __ enter(); // Save old & set new rbp | |
| 3803 __ subptr(rsp, rbx); // Prolog | |
|
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|
3804 #ifdef CC_INTERP |
|
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|
3805 __ movptr(Address(rbp, |
|
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|
3806 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
|
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|
3807 sender_sp); // Make it walkable |
|
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|
3808 #else // CC_INTERP |
| 304 | 3809 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
| 3810 sender_sp); // Make it walkable | |
| 0 | 3811 // This value is corrected by layout_activation_impl |
| 304 | 3812 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
|
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|
3813 #endif // CC_INTERP |
| 304 | 3814 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
| 3815 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3816 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3817 __ decrementl(rdx); // Decrement counter | |
| 0 | 3818 __ jcc(Assembler::notZero, loop); |
| 304 | 3819 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3820 |
| 3821 // Re-push self-frame | |
| 3822 __ enter(); // Save old & set new rbp | |
| 304 | 3823 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
| 0 | 3824 // Prolog |
| 3825 | |
| 3826 // Use rbp because the frames look interpreted now | |
|
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|
3827 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
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|
3828 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
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|
3829 address the_pc = __ pc(); |
|
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|
3830 __ set_last_Java_frame(noreg, rbp, the_pc); |
| 0 | 3831 |
| 3832 // Call C code. Need thread but NOT official VM entry | |
| 3833 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3834 // restore return values to their stack-slots with the new SP. | |
| 3835 // Thread is in rdi already. | |
| 3836 // | |
| 3837 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
| 3838 | |
|
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|
3839 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
| 304 | 3840 __ mov(c_rarg0, r15_thread); |
| 0 | 3841 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
| 3842 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3843 | |
| 3844 // Set an oopmap for the call site | |
|
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|
3845 // Use the same PC we used for the last java frame |
|
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|
3846 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
|
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|
3847 |
|
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|
3848 // Clear fp AND pc |
|
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|
3849 __ reset_last_Java_frame(true, true); |
| 0 | 3850 |
| 3851 // Pop self-frame. | |
| 3852 __ leave(); // Epilog | |
| 3853 | |
| 3854 // Jump to interpreter | |
| 3855 __ ret(0); | |
| 3856 | |
| 3857 // Make sure all code is generated | |
| 3858 masm->flush(); | |
| 3859 | |
| 3860 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
| 3861 SimpleRuntimeFrame::framesize >> 1); | |
| 3862 } | |
| 3863 #endif // COMPILER2 | |
| 3864 | |
| 3865 | |
| 3866 //------------------------------generate_handler_blob------ | |
| 3867 // | |
| 3868 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3869 // and setup oopmap. | |
| 3870 // | |
|
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|
3871 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
| 0 | 3872 assert(StubRoutines::forward_exception_entry() != NULL, |
| 3873 "must be generated before"); | |
| 3874 | |
| 3875 ResourceMark rm; | |
| 3876 OopMapSet *oop_maps = new OopMapSet(); | |
| 3877 OopMap* map; | |
| 3878 | |
| 3879 // Allocate space for the code. Setup code generation tools. | |
| 3880 CodeBuffer buffer("handler_blob", 2048, 1024); | |
| 3881 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3882 | |
| 3883 address start = __ pc(); | |
| 3884 address call_pc = NULL; | |
| 3885 int frame_size_in_words; | |
|
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|
3886 bool cause_return = (poll_type == POLL_AT_RETURN); |
|
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|
3887 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
| 0 | 3888 |
| 3889 // Make room for return address (or push it again) | |
| 3890 if (!cause_return) { | |
| 304 | 3891 __ push(rbx); |
| 0 | 3892 } |
| 3893 | |
| 3894 // Save registers, fpu state, and flags | |
|
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|
3895 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
| 0 | 3896 |
| 3897 // The following is basically a call_VM. However, we need the precise | |
| 3898 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3899 // work outselves. | |
| 3900 | |
| 3901 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3902 | |
| 3903 // The return address must always be correct so that frame constructor never | |
| 3904 // sees an invalid pc. | |
| 3905 | |
| 3906 if (!cause_return) { | |
| 3907 // overwrite the dummy value we pushed on entry | |
| 304 | 3908 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
| 3909 __ movptr(Address(rbp, wordSize), c_rarg0); | |
| 0 | 3910 } |
| 3911 | |
| 3912 // Do the call | |
| 304 | 3913 __ mov(c_rarg0, r15_thread); |
| 0 | 3914 __ call(RuntimeAddress(call_ptr)); |
| 3915 | |
| 3916 // Set an oopmap for the call site. This oopmap will map all | |
| 3917 // oop-registers and debug-info registers as callee-saved. This | |
| 3918 // will allow deoptimization at this safepoint to find all possible | |
| 3919 // debug-info recordings, as well as let GC find all oops. | |
| 3920 | |
| 3921 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3922 | |
| 3923 Label noException; | |
| 3924 | |
| 3925 __ reset_last_Java_frame(false, false); | |
| 3926 | |
| 304 | 3927 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3928 __ jcc(Assembler::equal, noException); |
| 3929 | |
| 3930 // Exception pending | |
| 3931 | |
|
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|
3932 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3933 |
| 3934 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3935 | |
| 3936 // No exception case | |
| 3937 __ bind(noException); | |
| 3938 | |
| 3939 // Normal exit, restore registers and exit. | |
|
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|
3940 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3941 |
| 3942 __ ret(0); | |
| 3943 | |
| 3944 // Make sure all code is generated | |
| 3945 masm->flush(); | |
| 3946 | |
| 3947 // Fill-out other meta info | |
| 3948 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 3949 } | |
| 3950 | |
| 3951 // | |
| 3952 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 3953 // | |
| 3954 // Generate a stub that calls into vm to find out the proper destination | |
| 3955 // of a java call. All the argument registers are live at this point | |
| 3956 // but since this is generic code we don't know what they are and the caller | |
| 3957 // must do any gc of the args. | |
| 3958 // | |
|
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3363
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|
3959 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 3960 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 3961 | |
| 3962 // allocate space for the code | |
| 3963 ResourceMark rm; | |
| 3964 | |
| 3965 CodeBuffer buffer(name, 1000, 512); | |
| 3966 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3967 | |
| 3968 int frame_size_in_words; | |
| 3969 | |
| 3970 OopMapSet *oop_maps = new OopMapSet(); | |
| 3971 OopMap* map = NULL; | |
| 3972 | |
| 3973 int start = __ offset(); | |
| 3974 | |
| 3975 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3976 | |
| 3977 int frame_complete = __ offset(); | |
| 3978 | |
| 3979 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3980 | |
| 304 | 3981 __ mov(c_rarg0, r15_thread); |
| 0 | 3982 |
| 3983 __ call(RuntimeAddress(destination)); | |
| 3984 | |
| 3985 | |
| 3986 // Set an oopmap for the call site. | |
| 3987 // We need this not only for callee-saved registers, but also for volatile | |
| 3988 // registers that the compiler might be keeping live across a safepoint. | |
| 3989 | |
| 3990 oop_maps->add_gc_map( __ offset() - start, map); | |
| 3991 | |
| 3992 // rax contains the address we are going to jump to assuming no exception got installed | |
| 3993 | |
| 3994 // clear last_Java_sp | |
| 3995 __ reset_last_Java_frame(false, false); | |
| 3996 // check for pending exceptions | |
| 3997 Label pending; | |
| 304 | 3998 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3999 __ jcc(Assembler::notEqual, pending); |
| 4000 | |
|
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4001 // get the returned Method* |
|
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|
4002 __ get_vm_result_2(rbx, r15_thread); |
| 304 | 4003 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
| 4004 | |
| 4005 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 0 | 4006 |
| 4007 RegisterSaver::restore_live_registers(masm); | |
| 4008 | |
| 4009 // We are back the the original state on entry and ready to go. | |
| 4010 | |
| 4011 __ jmp(rax); | |
| 4012 | |
| 4013 // Pending exception after the safepoint | |
| 4014 | |
| 4015 __ bind(pending); | |
| 4016 | |
| 4017 RegisterSaver::restore_live_registers(masm); | |
| 4018 | |
| 4019 // exception pending => remove activation and forward to exception handler | |
| 4020 | |
| 4021 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
| 4022 | |
| 304 | 4023 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
| 0 | 4024 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 4025 | |
| 4026 // ------------- | |
| 4027 // make sure all code is generated | |
| 4028 masm->flush(); | |
| 4029 | |
| 4030 // return the blob | |
| 4031 // frame_size_words or bytes?? | |
| 4032 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
| 4033 } | |
| 4034 | |
| 4035 | |
| 4036 #ifdef COMPILER2 | |
| 4037 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
| 4038 // | |
| 4039 //------------------------------generate_exception_blob--------------------------- | |
| 4040 // creates exception blob at the end | |
| 4041 // Using exception blob, this code is jumped from a compiled method. | |
| 4042 // (see emit_exception_handler in x86_64.ad file) | |
| 4043 // | |
| 4044 // Given an exception pc at a call we call into the runtime for the | |
| 4045 // handler in this method. This handler might merely restore state | |
| 4046 // (i.e. callee save registers) unwind the frame and jump to the | |
| 4047 // exception handler for the nmethod if there is no Java level handler | |
| 4048 // for the nmethod. | |
| 4049 // | |
| 4050 // This code is entered with a jmp. | |
| 4051 // | |
| 4052 // Arguments: | |
| 4053 // rax: exception oop | |
| 4054 // rdx: exception pc | |
| 4055 // | |
| 4056 // Results: | |
| 4057 // rax: exception oop | |
| 4058 // rdx: exception pc in caller or ??? | |
| 4059 // destination: exception handler of caller | |
| 4060 // | |
| 4061 // Note: the exception pc MUST be at a call (precise debug information) | |
| 4062 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
| 4063 // | |
| 4064 | |
| 4065 void OptoRuntime::generate_exception_blob() { | |
| 4066 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
| 4067 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
| 4068 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
| 4069 | |
| 4070 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 4071 | |
| 4072 // Allocate space for the code | |
| 4073 ResourceMark rm; | |
| 4074 // Setup code generation tools | |
| 4075 CodeBuffer buffer("exception_blob", 2048, 1024); | |
| 4076 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 4077 | |
| 4078 | |
| 4079 address start = __ pc(); | |
| 4080 | |
| 4081 // Exception pc is 'return address' for stack walker | |
| 304 | 4082 __ push(rdx); |
| 4083 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
| 0 | 4084 |
| 4085 // Save callee-saved registers. See x86_64.ad. | |
| 4086 | |
| 4087 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4088 // convention will save restore it in prolog/epilog) Other than that | |
| 4089 // there are no callee save registers now that adapter frames are gone. | |
| 4090 | |
| 304 | 4091 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 4092 |
| 4093 // Store exception in Thread object. We cannot pass any arguments to the | |
| 4094 // handle_exception call, since we do not want to make any assumption | |
| 4095 // about the size of the frame where the exception happened in. | |
| 4096 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
| 304 | 4097 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
| 4098 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 0 | 4099 |
| 4100 // This call does all the hard work. It checks if an exception handler | |
| 4101 // exists in the method. | |
| 4102 // If so, it returns the handler address. | |
| 4103 // If not, it prepares for stack-unwinding, restoring the callee-save | |
| 4104 // registers of the frame being removed. | |
| 4105 // | |
| 4106 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
| 4107 | |
|
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|
4108 // At a method handle call, the stack may not be properly aligned |
|
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|
4109 // when returning with an exception. |
|
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|
4110 address the_pc = __ pc(); |
|
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|
4111 __ set_last_Java_frame(noreg, noreg, the_pc); |
| 304 | 4112 __ mov(c_rarg0, r15_thread); |
|
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|
4113 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
| 0 | 4114 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
| 4115 | |
| 4116 // Set an oopmap for the call site. This oopmap will only be used if we | |
| 4117 // are unwinding the stack. Hence, all locations will be dead. | |
| 4118 // Callee-saved registers will be the same as the frame above (i.e., | |
| 4119 // handle_exception_stub), since they were restored when we got the | |
| 4120 // exception. | |
| 4121 | |
| 4122 OopMapSet* oop_maps = new OopMapSet(); | |
| 4123 | |
|
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|
4124 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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|
4125 |
|
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|
4126 __ reset_last_Java_frame(false, true); |
| 0 | 4127 |
| 4128 // Restore callee-saved registers | |
| 4129 | |
| 4130 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4131 // convention will save restore it in prolog/epilog) Other than that | |
| 4132 // there are no callee save registers no that adapter frames are gone. | |
| 4133 | |
| 304 | 4134 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
| 4135 | |
| 4136 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
| 4137 __ pop(rdx); // No need for exception pc anymore | |
| 0 | 4138 |
| 4139 // rax: exception handler | |
| 4140 | |
|
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|
4141 // Restore SP from BP if the exception PC is a MethodHandle call site. |
|
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|
4142 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
| 1567 | 4143 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
|
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|
4144 |
| 0 | 4145 // We have a handler in rax (could be deopt blob). |
| 304 | 4146 __ mov(r8, rax); |
| 0 | 4147 |
| 4148 // Get the exception oop | |
| 304 | 4149 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
| 0 | 4150 // Get the exception pc in case we are deoptimized |
| 304 | 4151 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
| 0 | 4152 #ifdef ASSERT |
| 4153 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
| 4154 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
| 4155 #endif | |
| 4156 // Clear the exception oop so GC no longer processes it as a root. | |
| 4157 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
| 4158 | |
| 4159 // rax: exception oop | |
| 4160 // r8: exception handler | |
| 4161 // rdx: exception pc | |
| 4162 // Jump to handler | |
| 4163 | |
| 4164 __ jmp(r8); | |
| 4165 | |
| 4166 // Make sure all code is generated | |
| 4167 masm->flush(); | |
| 4168 | |
| 4169 // Set exception blob | |
| 4170 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
| 4171 } | |
| 4172 #endif // COMPILER2 |