Mercurial > hg > truffle
annotate src/share/vm/opto/machnode.hpp @ 17780:606acabe7b5c
8031320: Use Intel RTM instructions for locks
Summary: Use RTM for inflated locks and stack locks.
Reviewed-by: iveresov, twisti, roland, dcubed
| author | kvn |
|---|---|
| date | Thu, 20 Mar 2014 17:49:27 -0700 |
| parents | 9758d9f36299 |
| children | 62c54fcc0a35 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP |
| 26 #define SHARE_VM_OPTO_MACHNODE_HPP | |
| 27 | |
| 28 #include "opto/callnode.hpp" | |
| 29 #include "opto/matcher.hpp" | |
| 30 #include "opto/multnode.hpp" | |
| 31 #include "opto/node.hpp" | |
| 32 #include "opto/regmask.hpp" | |
| 33 | |
| 0 | 34 class BufferBlob; |
| 35 class CodeBuffer; | |
| 36 class JVMState; | |
| 37 class MachCallDynamicJavaNode; | |
| 38 class MachCallJavaNode; | |
| 39 class MachCallLeafNode; | |
| 40 class MachCallNode; | |
| 41 class MachCallRuntimeNode; | |
| 42 class MachCallStaticJavaNode; | |
| 43 class MachEpilogNode; | |
| 44 class MachIfNode; | |
| 45 class MachNullCheckNode; | |
| 46 class MachOper; | |
| 47 class MachProjNode; | |
| 48 class MachPrologNode; | |
| 49 class MachReturnNode; | |
| 50 class MachSafePointNode; | |
| 51 class MachSpillCopyNode; | |
| 52 class Matcher; | |
| 53 class PhaseRegAlloc; | |
| 54 class RegMask; | |
| 17780 | 55 class RTMLockingCounters; |
| 0 | 56 class State; |
| 57 | |
| 58 //---------------------------MachOper------------------------------------------ | |
| 59 class MachOper : public ResourceObj { | |
| 60 public: | |
| 61 // Allocate right next to the MachNodes in the same arena | |
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62 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); } |
| 0 | 63 |
| 64 // Opcode | |
| 65 virtual uint opcode() const = 0; | |
| 66 | |
| 67 // Number of input edges. | |
| 68 // Generally at least 1 | |
| 69 virtual uint num_edges() const { return 1; } | |
| 70 // Array of Register masks | |
| 71 virtual const RegMask *in_RegMask(int index) const; | |
| 72 | |
| 73 // Methods to output the encoding of the operand | |
| 74 | |
| 75 // Negate conditional branches. Error for non-branch Nodes | |
| 76 virtual void negate(); | |
| 77 | |
| 78 // Return the value requested | |
| 79 // result register lookup, corresponding to int_format | |
| 80 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; | |
| 81 // input register lookup, corresponding to ext_format | |
| 82 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
| 83 | |
| 84 // helpers for MacroAssembler generation from ADLC | |
| 85 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { | |
| 86 return ::as_Register(reg(ra_, node)); | |
| 87 } | |
| 88 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
| 89 return ::as_Register(reg(ra_, node, idx)); | |
| 90 } | |
| 91 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
| 92 return ::as_FloatRegister(reg(ra_, node)); | |
| 93 } | |
| 94 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
| 95 return ::as_FloatRegister(reg(ra_, node, idx)); | |
| 96 } | |
| 97 | |
| 98 #if defined(IA32) || defined(AMD64) | |
| 99 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
| 100 return ::as_XMMRegister(reg(ra_, node)); | |
| 101 } | |
| 102 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
| 103 return ::as_XMMRegister(reg(ra_, node, idx)); | |
| 104 } | |
| 105 #endif | |
| 106 | |
| 107 virtual intptr_t constant() const; | |
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108 virtual relocInfo::relocType constant_reloc() const; |
| 0 | 109 virtual jdouble constantD() const; |
| 110 virtual jfloat constantF() const; | |
| 111 virtual jlong constantL() const; | |
| 112 virtual TypeOopPtr *oop() const; | |
| 113 virtual int ccode() const; | |
| 114 // A zero, default, indicates this value is not needed. | |
| 115 // May need to lookup the base register, as done in int_ and ext_format | |
| 116 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
| 117 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
| 118 virtual int scale() const; | |
| 119 // Parameters needed to support MEMORY_INTERFACE access to stackSlot | |
| 120 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
| 121 // Check for PC-Relative displacement | |
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122 virtual relocInfo::relocType disp_reloc() const; |
| 0 | 123 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot |
| 124 virtual int base_position() const; // base edge position, or -1 | |
| 125 virtual int index_position() const; // index edge position, or -1 | |
| 126 | |
| 127 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP | |
| 128 // Only returns non-null value for i486.ad's indOffset32X | |
| 129 virtual const TypePtr *disp_as_type() const { return NULL; } | |
| 130 | |
| 131 // Return the label | |
| 132 virtual Label *label() const; | |
| 133 | |
| 134 // Return the method's address | |
| 135 virtual intptr_t method() const; | |
| 136 | |
| 137 // Hash and compare over operands are currently identical | |
| 138 virtual uint hash() const; | |
| 139 virtual uint cmp( const MachOper &oper ) const; | |
| 140 | |
| 141 // Virtual clone, since I do not know how big the MachOper is. | |
| 142 virtual MachOper *clone(Compile* C) const = 0; | |
| 143 | |
| 144 // Return ideal Type from simple operands. Fail for complex operands. | |
| 145 virtual const Type *type() const; | |
| 146 | |
| 147 // Set an integer offset if we have one, or error otherwise | |
| 148 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } | |
| 149 | |
| 150 #ifndef PRODUCT | |
| 151 // Return name of operand | |
| 152 virtual const char *Name() const { return "???";} | |
| 153 | |
| 154 // Methods to output the text version of the operand | |
| 155 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; | |
| 156 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; | |
| 157 | |
| 158 virtual void dump_spec(outputStream *st) const; // Print per-operand info | |
| 159 #endif | |
| 160 }; | |
| 161 | |
| 162 //------------------------------MachNode--------------------------------------- | |
| 163 // Base type for all machine specific nodes. All node classes generated by the | |
| 164 // ADLC inherit from this class. | |
| 165 class MachNode : public Node { | |
| 166 public: | |
| 167 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { | |
| 168 init_class_id(Class_Mach); | |
| 169 } | |
| 170 // Required boilerplate | |
| 171 virtual uint size_of() const { return sizeof(MachNode); } | |
| 172 virtual int Opcode() const; // Always equal to MachNode | |
| 173 virtual uint rule() const = 0; // Machine-specific opcode | |
| 174 // Number of inputs which come before the first operand. | |
| 175 // Generally at least 1, to skip the Control input | |
| 176 virtual uint oper_input_base() const { return 1; } | |
| 177 | |
| 178 // Copy inputs and operands to new node of instruction. | |
| 179 // Called from cisc_version() and short_branch_version(). | |
| 180 // !!!! The method's body is defined in ad_<arch>.cpp file. | |
| 181 void fill_new_machnode(MachNode *n, Compile* C) const; | |
| 182 | |
| 183 // Return an equivalent instruction using memory for cisc_operand position | |
| 184 virtual MachNode *cisc_version(int offset, Compile* C); | |
| 185 // Modify this instruction's register mask to use stack version for cisc_operand | |
| 186 virtual void use_cisc_RegMask(); | |
| 187 | |
| 188 // Support for short branches | |
| 189 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } | |
| 190 | |
| 3851 | 191 // Avoid back to back some instructions on some CPUs. |
| 192 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; } | |
| 193 | |
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194 // instruction implemented with a call |
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195 bool has_call() const { return (flags() & Flag_has_call) != 0; } |
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196 |
| 0 | 197 // First index in _in[] corresponding to operand, or -1 if there is none |
| 198 int operand_index(uint operand) const; | |
| 199 | |
| 200 // Register class input is expected in | |
| 201 virtual const RegMask &in_RegMask(uint) const; | |
| 202 | |
| 203 // cisc-spillable instructions redefine for use by in_RegMask | |
| 204 virtual const RegMask *cisc_RegMask() const { return NULL; } | |
| 205 | |
| 206 // If this instruction is a 2-address instruction, then return the | |
| 207 // index of the input which must match the output. Not nessecary | |
| 208 // for instructions which bind the input and output register to the | |
| 209 // same singleton regiser (e.g., Intel IDIV which binds AX to be | |
| 210 // both an input and an output). It is nessecary when the input and | |
| 211 // output have choices - but they must use the same choice. | |
| 212 virtual uint two_adr( ) const { return 0; } | |
| 213 | |
| 214 // Array of complex operand pointers. Each corresponds to zero or | |
| 215 // more leafs. Must be set by MachNode constructor to point to an | |
| 216 // internal array of MachOpers. The MachOper array is sized by | |
| 217 // specific MachNodes described in the ADL. | |
| 218 uint _num_opnds; | |
| 219 MachOper **_opnds; | |
| 220 uint num_opnds() const { return _num_opnds; } | |
| 221 | |
| 222 // Emit bytes into cbuf | |
| 223 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 224 // Size of instruction in bytes | |
| 225 virtual uint size(PhaseRegAlloc *ra_) const; | |
| 226 // Helper function that computes size by emitting code | |
| 227 virtual uint emit_size(PhaseRegAlloc *ra_) const; | |
| 228 | |
| 229 // Return the alignment required (in units of relocInfo::addr_unit()) | |
| 230 // for this instruction (must be a power of 2) | |
| 231 virtual int alignment_required() const { return 1; } | |
| 232 | |
| 233 // Return the padding (in bytes) to be emitted before this | |
| 234 // instruction to properly align it. | |
| 235 virtual int compute_padding(int current_offset) const { return 0; } | |
| 236 | |
| 237 // Return number of relocatable values contained in this instruction | |
| 238 virtual int reloc() const { return 0; } | |
| 239 | |
| 240 // Hash and compare over operands. Used to do GVN on machine Nodes. | |
| 241 virtual uint hash() const; | |
| 242 virtual uint cmp( const Node &n ) const; | |
| 243 | |
| 244 // Expand method for MachNode, replaces nodes representing pseudo | |
| 245 // instructions with a set of nodes which represent real machine | |
| 246 // instructions and compute the same value. | |
| 1203 | 247 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } |
| 0 | 248 |
| 249 // Bottom_type call; value comes from operand0 | |
| 250 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } | |
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251 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); } |
| 0 | 252 |
| 253 // If this is a memory op, return the base pointer and fixed offset. | |
| 254 // If there are no such, return NULL. If there are multiple addresses | |
| 255 // or the address is indeterminate (rare cases) then return (Node*)-1, | |
| 256 // which serves as node bottom. | |
| 257 // If the offset is not statically determined, set it to Type::OffsetBot. | |
| 258 // This method is free to ignore stack slots if that helps. | |
| 259 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) | |
| 260 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible | |
| 261 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; | |
| 262 | |
| 263 // Helper for get_base_and_disp: find the base and index input nodes. | |
| 264 // Returns the MachOper as determined by memory_operand(), for use, if | |
| 265 // needed by the caller. If (MachOper *)-1 is returned, base and index | |
| 266 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and | |
| 267 // index are set to NULL. | |
| 268 const MachOper* memory_inputs(Node* &base, Node* &index) const; | |
| 269 | |
| 270 // Helper for memory_inputs: Which operand carries the necessary info? | |
| 271 // By default, returns NULL, which means there is no such operand. | |
| 272 // If it returns (MachOper*)-1, this means there are multiple memories. | |
| 273 virtual const MachOper* memory_operand() const { return NULL; } | |
| 274 | |
| 275 // Call "get_base_and_disp" to decide which category of memory is used here. | |
| 276 virtual const class TypePtr *adr_type() const; | |
| 277 | |
| 278 // Apply peephole rule(s) to this instruction | |
| 279 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); | |
| 280 | |
| 281 // Top-level ideal Opcode matched | |
| 282 virtual int ideal_Opcode() const { return Op_Node; } | |
| 283 | |
| 284 // Adds the label for the case | |
| 285 virtual void add_case_label( int switch_val, Label* blockLabel); | |
| 286 | |
| 287 // Set the absolute address for methods | |
| 288 virtual void method_set( intptr_t addr ); | |
| 289 | |
| 290 // Should we clone rather than spill this instruction? | |
| 291 bool rematerialize() const; | |
| 292 | |
| 293 // Get the pipeline info | |
| 294 static const Pipeline *pipeline_class(); | |
| 295 virtual const Pipeline *pipeline() const; | |
| 296 | |
| 297 #ifndef PRODUCT | |
| 298 virtual const char *Name() const = 0; // Machine-specific name | |
| 299 virtual void dump_spec(outputStream *st) const; // Print per-node info | |
| 300 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual | |
| 301 #endif | |
| 302 }; | |
| 303 | |
| 304 //------------------------------MachIdealNode---------------------------- | |
| 305 // Machine specific versions of nodes that must be defined by user. | |
| 306 // These are not converted by matcher from ideal nodes to machine nodes | |
| 307 // but are inserted into the code by the compiler. | |
| 308 class MachIdealNode : public MachNode { | |
| 309 public: | |
| 310 MachIdealNode( ) {} | |
| 311 | |
| 312 // Define the following defaults for non-matched machine nodes | |
| 313 virtual uint oper_input_base() const { return 0; } | |
| 314 virtual uint rule() const { return 9999999; } | |
| 315 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } | |
| 316 }; | |
| 317 | |
| 318 //------------------------------MachTypeNode---------------------------- | |
| 319 // Machine Nodes that need to retain a known Type. | |
| 320 class MachTypeNode : public MachNode { | |
| 321 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
| 322 public: | |
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323 MachTypeNode( ) {} |
| 0 | 324 const Type *_bottom_type; |
| 325 | |
| 326 virtual const class Type *bottom_type() const { return _bottom_type; } | |
| 327 #ifndef PRODUCT | |
| 328 virtual void dump_spec(outputStream *st) const; | |
| 329 #endif | |
| 330 }; | |
| 331 | |
| 332 //------------------------------MachBreakpointNode---------------------------- | |
| 333 // Machine breakpoint or interrupt Node | |
| 334 class MachBreakpointNode : public MachIdealNode { | |
| 335 public: | |
| 336 MachBreakpointNode( ) {} | |
| 337 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 338 virtual uint size(PhaseRegAlloc *ra_) const; | |
| 339 | |
| 340 #ifndef PRODUCT | |
| 341 virtual const char *Name() const { return "Breakpoint"; } | |
| 342 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
| 343 #endif | |
| 344 }; | |
| 345 | |
| 2008 | 346 //------------------------------MachConstantBaseNode-------------------------- |
| 347 // Machine node that represents the base address of the constant table. | |
| 348 class MachConstantBaseNode : public MachIdealNode { | |
| 349 public: | |
| 350 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). | |
| 351 | |
| 352 public: | |
| 353 MachConstantBaseNode() : MachIdealNode() { | |
| 354 init_class_id(Class_MachConstantBase); | |
| 355 } | |
| 356 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } | |
| 357 virtual uint ideal_reg() const { return Op_RegP; } | |
| 358 virtual uint oper_input_base() const { return 1; } | |
| 359 | |
| 360 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; | |
| 361 virtual uint size(PhaseRegAlloc* ra_) const; | |
| 362 virtual bool pinned() const { return UseRDPCForConstantTableBase; } | |
| 363 | |
| 364 static const RegMask& static_out_RegMask() { return _out_RegMask; } | |
| 365 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } | |
| 366 | |
| 367 #ifndef PRODUCT | |
| 368 virtual const char* Name() const { return "MachConstantBaseNode"; } | |
| 369 virtual void format(PhaseRegAlloc*, outputStream* st) const; | |
| 370 #endif | |
| 371 }; | |
| 372 | |
| 373 //------------------------------MachConstantNode------------------------------- | |
| 374 // Machine node that holds a constant which is stored in the constant table. | |
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375 class MachConstantNode : public MachTypeNode { |
| 2008 | 376 protected: |
| 377 Compile::Constant _constant; // This node's constant. | |
| 378 | |
| 379 public: | |
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380 MachConstantNode() : MachTypeNode() { |
| 2008 | 381 init_class_id(Class_MachConstant); |
| 382 } | |
| 383 | |
| 384 virtual void eval_constant(Compile* C) { | |
| 385 #ifdef ASSERT | |
| 386 tty->print("missing MachConstantNode eval_constant function: "); | |
| 387 dump(); | |
| 388 #endif | |
| 389 ShouldNotCallThis(); | |
| 390 } | |
| 391 | |
| 392 virtual const RegMask &in_RegMask(uint idx) const { | |
| 393 if (idx == mach_constant_base_node_input()) | |
| 394 return MachConstantBaseNode::static_out_RegMask(); | |
| 395 return MachNode::in_RegMask(idx); | |
| 396 } | |
| 397 | |
| 398 // Input edge of MachConstantBaseNode. | |
| 399 uint mach_constant_base_node_input() const { return req() - 1; } | |
| 400 | |
| 401 int constant_offset(); | |
| 402 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } | |
| 403 }; | |
| 404 | |
| 0 | 405 //------------------------------MachUEPNode----------------------------------- |
| 406 // Machine Unvalidated Entry Point Node | |
| 407 class MachUEPNode : public MachIdealNode { | |
| 408 public: | |
| 409 MachUEPNode( ) {} | |
| 410 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 411 virtual uint size(PhaseRegAlloc *ra_) const; | |
| 412 | |
| 413 #ifndef PRODUCT | |
| 414 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } | |
| 415 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
| 416 #endif | |
| 417 }; | |
| 418 | |
| 419 //------------------------------MachPrologNode-------------------------------- | |
| 420 // Machine function Prolog Node | |
| 421 class MachPrologNode : public MachIdealNode { | |
| 422 public: | |
| 423 MachPrologNode( ) {} | |
| 424 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 425 virtual uint size(PhaseRegAlloc *ra_) const; | |
| 426 virtual int reloc() const; | |
| 427 | |
| 428 #ifndef PRODUCT | |
| 429 virtual const char *Name() const { return "Prolog"; } | |
| 430 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
| 431 #endif | |
| 432 }; | |
| 433 | |
| 434 //------------------------------MachEpilogNode-------------------------------- | |
| 435 // Machine function Epilog Node | |
| 436 class MachEpilogNode : public MachIdealNode { | |
| 437 public: | |
| 438 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} | |
| 439 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 440 virtual uint size(PhaseRegAlloc *ra_) const; | |
| 441 virtual int reloc() const; | |
| 442 virtual const Pipeline *pipeline() const; | |
| 443 | |
| 444 private: | |
| 445 bool _do_polling; | |
| 446 | |
| 447 public: | |
| 448 bool do_polling() const { return _do_polling; } | |
| 449 | |
| 450 // Offset of safepoint from the beginning of the node | |
| 451 int safepoint_offset() const; | |
| 452 | |
| 453 #ifndef PRODUCT | |
| 454 virtual const char *Name() const { return "Epilog"; } | |
| 455 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
| 456 #endif | |
| 457 }; | |
| 458 | |
| 459 //------------------------------MachNopNode----------------------------------- | |
| 460 // Machine function Nop Node | |
| 461 class MachNopNode : public MachIdealNode { | |
| 462 private: | |
| 463 int _count; | |
| 464 public: | |
| 465 MachNopNode( ) : _count(1) {} | |
| 466 MachNopNode( int count ) : _count(count) {} | |
| 467 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 468 virtual uint size(PhaseRegAlloc *ra_) const; | |
| 469 | |
| 470 virtual const class Type *bottom_type() const { return Type::CONTROL; } | |
| 471 | |
| 472 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp | |
| 473 virtual const Pipeline *pipeline() const; | |
| 474 #ifndef PRODUCT | |
| 475 virtual const char *Name() const { return "Nop"; } | |
| 476 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
| 477 virtual void dump_spec(outputStream *st) const { } // No per-operand info | |
| 478 #endif | |
| 479 }; | |
| 480 | |
| 481 //------------------------------MachSpillCopyNode------------------------------ | |
| 482 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any | |
| 483 // location (stack or register). | |
| 484 class MachSpillCopyNode : public MachIdealNode { | |
| 485 const RegMask *_in; // RegMask for input | |
| 486 const RegMask *_out; // RegMask for output | |
| 487 const Type *_type; | |
| 488 public: | |
| 489 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) : | |
| 490 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) { | |
| 491 init_class_id(Class_MachSpillCopy); | |
| 492 init_flags(Flag_is_Copy); | |
| 493 add_req(NULL); | |
| 494 add_req(n); | |
| 495 } | |
| 496 virtual uint size_of() const { return sizeof(*this); } | |
| 497 void set_out_RegMask(const RegMask &out) { _out = &out; } | |
| 498 void set_in_RegMask(const RegMask &in) { _in = ∈ } | |
| 499 virtual const RegMask &out_RegMask() const { return *_out; } | |
| 500 virtual const RegMask &in_RegMask(uint) const { return *_in; } | |
| 501 virtual const class Type *bottom_type() const { return _type; } | |
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502 virtual uint ideal_reg() const { return _type->ideal_reg(); } |
| 0 | 503 virtual uint oper_input_base() const { return 1; } |
| 504 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; | |
| 505 | |
| 506 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 507 virtual uint size(PhaseRegAlloc *ra_) const; | |
| 508 | |
| 509 #ifndef PRODUCT | |
| 510 virtual const char *Name() const { return "MachSpillCopy"; } | |
| 511 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
| 512 #endif | |
| 513 }; | |
| 514 | |
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515 //------------------------------MachBranchNode-------------------------------- |
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516 // Abstract machine branch Node |
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517 class MachBranchNode : public MachIdealNode { |
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518 public: |
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519 MachBranchNode() : MachIdealNode() { |
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520 init_class_id(Class_MachBranch); |
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521 } |
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522 virtual void label_set(Label* label, uint block_num) = 0; |
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523 virtual void save_label(Label** label, uint* block_num) = 0; |
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524 |
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525 // Support for short branches |
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526 virtual MachNode *short_branch_version(Compile* C) { return NULL; } |
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527 |
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528 virtual bool pinned() const { return true; }; |
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529 }; |
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530 |
| 0 | 531 //------------------------------MachNullChkNode-------------------------------- |
| 532 // Machine-dependent null-pointer-check Node. Points a real MachNode that is | |
| 533 // also some kind of memory op. Turns the indicated MachNode into a | |
| 534 // conditional branch with good latency on the ptr-not-null path and awful | |
| 535 // latency on the pointer-is-null path. | |
| 536 | |
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537 class MachNullCheckNode : public MachBranchNode { |
| 0 | 538 public: |
| 539 const uint _vidx; // Index of memop being tested | |
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540 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { |
| 0 | 541 init_class_id(Class_MachNullCheck); |
| 542 add_req(ctrl); | |
| 543 add_req(memop); | |
| 544 } | |
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545 virtual uint size_of() const { return sizeof(*this); } |
| 0 | 546 |
| 547 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
| 3839 | 548 virtual void label_set(Label* label, uint block_num); |
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549 virtual void save_label(Label** label, uint* block_num); |
| 0 | 550 virtual void negate() { } |
| 551 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } | |
| 552 virtual uint ideal_reg() const { return NotAMachineReg; } | |
| 553 virtual const RegMask &in_RegMask(uint) const; | |
| 554 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } | |
| 555 #ifndef PRODUCT | |
| 556 virtual const char *Name() const { return "NullCheck"; } | |
| 557 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
| 558 #endif | |
| 559 }; | |
| 560 | |
| 561 //------------------------------MachProjNode---------------------------------- | |
| 562 // Machine-dependent Ideal projections (how is that for an oxymoron). Really | |
| 563 // just MachNodes made by the Ideal world that replicate simple projections | |
| 564 // but with machine-dependent input & output register masks. Generally | |
| 565 // produced as part of calling conventions. Normally I make MachNodes as part | |
| 566 // of the Matcher process, but the Matcher is ill suited to issues involving | |
| 567 // frame handling, so frame handling is all done in the Ideal world with | |
| 568 // occasional callbacks to the machine model for important info. | |
| 569 class MachProjNode : public ProjNode { | |
| 570 public: | |
| 3842 | 571 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { |
| 572 init_class_id(Class_MachProj); | |
| 573 } | |
| 0 | 574 RegMask _rout; |
| 575 const uint _ideal_reg; | |
| 576 enum projType { | |
| 577 unmatched_proj = 0, // Projs for Control, I/O, memory not matched | |
| 578 fat_proj = 999 // Projs killing many regs, defined by _rout | |
| 579 }; | |
| 580 virtual int Opcode() const; | |
| 581 virtual const Type *bottom_type() const; | |
| 582 virtual const TypePtr *adr_type() const; | |
| 583 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } | |
| 584 virtual const RegMask &out_RegMask() const { return _rout; } | |
| 585 virtual uint ideal_reg() const { return _ideal_reg; } | |
| 586 // Need size_of() for virtual ProjNode::clone() | |
| 587 virtual uint size_of() const { return sizeof(MachProjNode); } | |
| 588 #ifndef PRODUCT | |
| 589 virtual void dump_spec(outputStream *st) const; | |
| 590 #endif | |
| 591 }; | |
| 592 | |
| 593 //------------------------------MachIfNode------------------------------------- | |
| 594 // Machine-specific versions of IfNodes | |
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595 class MachIfNode : public MachBranchNode { |
| 0 | 596 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
| 597 public: | |
| 598 float _prob; // Probability branch goes either way | |
| 599 float _fcnt; // Frequency counter | |
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600 MachIfNode() : MachBranchNode() { |
| 0 | 601 init_class_id(Class_MachIf); |
| 602 } | |
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603 // Negate conditional branches. |
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604 virtual void negate() = 0; |
| 0 | 605 #ifndef PRODUCT |
| 606 virtual void dump_spec(outputStream *st) const; | |
| 607 #endif | |
| 608 }; | |
| 609 | |
| 3842 | 610 //------------------------------MachGotoNode----------------------------------- |
| 611 // Machine-specific versions of GotoNodes | |
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612 class MachGotoNode : public MachBranchNode { |
| 3842 | 613 public: |
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614 MachGotoNode() : MachBranchNode() { |
| 3842 | 615 init_class_id(Class_MachGoto); |
| 616 } | |
| 617 }; | |
| 618 | |
| 0 | 619 //------------------------------MachFastLockNode------------------------------------- |
| 620 // Machine-specific versions of FastLockNodes | |
| 621 class MachFastLockNode : public MachNode { | |
| 622 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
| 623 public: | |
| 17780 | 624 BiasedLockingCounters* _counters; |
| 625 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks | |
| 626 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks | |
| 0 | 627 MachFastLockNode() : MachNode() {} |
| 628 }; | |
| 629 | |
| 630 //------------------------------MachReturnNode-------------------------------- | |
| 631 // Machine-specific versions of subroutine returns | |
| 632 class MachReturnNode : public MachNode { | |
| 633 virtual uint size_of() const; // Size is bigger | |
| 634 public: | |
| 635 RegMask *_in_rms; // Input register masks, set during allocation | |
| 636 ReallocMark _nesting; // assertion check for reallocations | |
| 637 const TypePtr* _adr_type; // memory effects of call or return | |
| 638 MachReturnNode() : MachNode() { | |
| 639 init_class_id(Class_MachReturn); | |
| 640 _adr_type = TypePtr::BOTTOM; // the default: all of memory | |
| 641 } | |
| 642 | |
| 643 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } | |
| 644 | |
| 645 virtual const RegMask &in_RegMask(uint) const; | |
| 646 virtual bool pinned() const { return true; }; | |
| 647 virtual const TypePtr *adr_type() const; | |
| 648 }; | |
| 649 | |
| 650 //------------------------------MachSafePointNode----------------------------- | |
| 651 // Machine-specific versions of safepoints | |
| 652 class MachSafePointNode : public MachReturnNode { | |
| 653 public: | |
| 654 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC | |
| 655 JVMState* _jvms; // Pointer to list of JVM State Objects | |
| 656 uint _jvmadj; // Extra delta to jvms indexes (mach. args) | |
| 657 OopMap* oop_map() const { return _oop_map; } | |
| 658 void set_oop_map(OopMap* om) { _oop_map = om; } | |
| 659 | |
| 660 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { | |
| 661 init_class_id(Class_MachSafePoint); | |
| 662 } | |
| 663 | |
| 664 virtual JVMState* jvms() const { return _jvms; } | |
| 665 void set_jvms(JVMState* s) { | |
| 666 _jvms = s; | |
| 667 } | |
| 668 virtual const Type *bottom_type() const; | |
| 669 | |
| 670 virtual const RegMask &in_RegMask(uint) const; | |
| 671 | |
| 672 // Functionality from old debug nodes | |
| 673 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } | |
| 674 Node *frameptr () const { return in(TypeFunc::FramePtr); } | |
| 675 | |
| 676 Node *local(const JVMState* jvms, uint idx) const { | |
| 677 assert(verify_jvms(jvms), "jvms must match"); | |
| 678 return in(_jvmadj + jvms->locoff() + idx); | |
| 679 } | |
| 680 Node *stack(const JVMState* jvms, uint idx) const { | |
| 681 assert(verify_jvms(jvms), "jvms must match"); | |
| 682 return in(_jvmadj + jvms->stkoff() + idx); | |
| 683 } | |
| 684 Node *monitor_obj(const JVMState* jvms, uint idx) const { | |
| 685 assert(verify_jvms(jvms), "jvms must match"); | |
| 686 return in(_jvmadj + jvms->monitor_obj_offset(idx)); | |
| 687 } | |
| 688 Node *monitor_box(const JVMState* jvms, uint idx) const { | |
| 689 assert(verify_jvms(jvms), "jvms must match"); | |
| 690 return in(_jvmadj + jvms->monitor_box_offset(idx)); | |
| 691 } | |
| 692 void set_local(const JVMState* jvms, uint idx, Node *c) { | |
| 693 assert(verify_jvms(jvms), "jvms must match"); | |
| 694 set_req(_jvmadj + jvms->locoff() + idx, c); | |
| 695 } | |
| 696 void set_stack(const JVMState* jvms, uint idx, Node *c) { | |
| 697 assert(verify_jvms(jvms), "jvms must match"); | |
| 698 set_req(_jvmadj + jvms->stkoff() + idx, c); | |
| 699 } | |
| 700 void set_monitor(const JVMState* jvms, uint idx, Node *c) { | |
| 701 assert(verify_jvms(jvms), "jvms must match"); | |
| 702 set_req(_jvmadj + jvms->monoff() + idx, c); | |
| 703 } | |
| 704 }; | |
| 705 | |
| 706 //------------------------------MachCallNode---------------------------------- | |
| 707 // Machine-specific versions of subroutine calls | |
| 708 class MachCallNode : public MachSafePointNode { | |
| 709 protected: | |
| 710 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash | |
| 711 virtual uint cmp( const Node &n ) const; | |
| 712 virtual uint size_of() const = 0; // Size is bigger | |
| 713 public: | |
| 714 const TypeFunc *_tf; // Function type | |
| 715 address _entry_point; // Address of the method being called | |
| 716 float _cnt; // Estimate of number of times called | |
| 717 uint _argsize; // Size of argument block on stack | |
| 718 | |
| 719 const TypeFunc* tf() const { return _tf; } | |
| 720 const address entry_point() const { return _entry_point; } | |
| 721 const float cnt() const { return _cnt; } | |
| 722 uint argsize() const { return _argsize; } | |
| 723 | |
| 724 void set_tf(const TypeFunc* tf) { _tf = tf; } | |
| 725 void set_entry_point(address p) { _entry_point = p; } | |
| 726 void set_cnt(float c) { _cnt = c; } | |
| 727 void set_argsize(int s) { _argsize = s; } | |
| 728 | |
| 729 MachCallNode() : MachSafePointNode() { | |
| 730 init_class_id(Class_MachCall); | |
| 731 } | |
| 732 | |
| 733 virtual const Type *bottom_type() const; | |
| 734 virtual bool pinned() const { return false; } | |
| 735 virtual const Type *Value( PhaseTransform *phase ) const; | |
| 736 virtual const RegMask &in_RegMask(uint) const; | |
| 737 virtual int ret_addr_offset() { return 0; } | |
| 738 | |
| 739 bool returns_long() const { return tf()->return_type() == T_LONG; } | |
| 740 bool return_value_is_used() const; | |
| 741 #ifndef PRODUCT | |
| 742 virtual void dump_spec(outputStream *st) const; | |
| 743 #endif | |
| 744 }; | |
| 745 | |
| 746 //------------------------------MachCallJavaNode------------------------------ | |
| 747 // "Base" class for machine-specific versions of subroutine calls | |
| 748 class MachCallJavaNode : public MachCallNode { | |
| 749 protected: | |
| 750 virtual uint cmp( const Node &n ) const; | |
| 751 virtual uint size_of() const; // Size is bigger | |
| 752 public: | |
| 753 ciMethod* _method; // Method being direct called | |
| 754 int _bci; // Byte Code index of call byte code | |
| 755 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual | |
| 1137 | 756 bool _method_handle_invoke; // Tells if the call has to preserve SP |
| 0 | 757 MachCallJavaNode() : MachCallNode() { |
| 758 init_class_id(Class_MachCallJava); | |
| 759 } | |
| 1137 | 760 |
| 761 virtual const RegMask &in_RegMask(uint) const; | |
| 762 | |
| 0 | 763 #ifndef PRODUCT |
| 764 virtual void dump_spec(outputStream *st) const; | |
| 765 #endif | |
| 766 }; | |
| 767 | |
| 768 //------------------------------MachCallStaticJavaNode------------------------ | |
| 769 // Machine-specific versions of monomorphic subroutine calls | |
| 770 class MachCallStaticJavaNode : public MachCallJavaNode { | |
| 771 virtual uint cmp( const Node &n ) const; | |
| 772 virtual uint size_of() const; // Size is bigger | |
| 773 public: | |
| 774 const char *_name; // Runtime wrapper name | |
| 775 MachCallStaticJavaNode() : MachCallJavaNode() { | |
| 776 init_class_id(Class_MachCallStaticJava); | |
| 777 } | |
| 778 | |
| 779 // If this is an uncommon trap, return the request code, else zero. | |
| 780 int uncommon_trap_request() const; | |
| 781 | |
| 782 virtual int ret_addr_offset(); | |
| 783 #ifndef PRODUCT | |
| 784 virtual void dump_spec(outputStream *st) const; | |
| 785 void dump_trap_args(outputStream *st) const; | |
| 786 #endif | |
| 787 }; | |
| 788 | |
| 789 //------------------------------MachCallDynamicJavaNode------------------------ | |
| 790 // Machine-specific versions of possibly megamorphic subroutine calls | |
| 791 class MachCallDynamicJavaNode : public MachCallJavaNode { | |
| 792 public: | |
| 793 int _vtable_index; | |
| 794 MachCallDynamicJavaNode() : MachCallJavaNode() { | |
| 795 init_class_id(Class_MachCallDynamicJava); | |
| 796 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized | |
| 797 } | |
| 798 virtual int ret_addr_offset(); | |
| 799 #ifndef PRODUCT | |
| 800 virtual void dump_spec(outputStream *st) const; | |
| 801 #endif | |
| 802 }; | |
| 803 | |
| 804 //------------------------------MachCallRuntimeNode---------------------------- | |
| 805 // Machine-specific versions of subroutine calls | |
| 806 class MachCallRuntimeNode : public MachCallNode { | |
| 807 virtual uint cmp( const Node &n ) const; | |
| 808 virtual uint size_of() const; // Size is bigger | |
| 809 public: | |
| 810 const char *_name; // Printable name, if _method is NULL | |
| 811 MachCallRuntimeNode() : MachCallNode() { | |
| 812 init_class_id(Class_MachCallRuntime); | |
| 813 } | |
| 814 virtual int ret_addr_offset(); | |
| 815 #ifndef PRODUCT | |
| 816 virtual void dump_spec(outputStream *st) const; | |
| 817 #endif | |
| 818 }; | |
| 819 | |
| 820 class MachCallLeafNode: public MachCallRuntimeNode { | |
| 821 public: | |
| 822 MachCallLeafNode() : MachCallRuntimeNode() { | |
| 823 init_class_id(Class_MachCallLeaf); | |
| 824 } | |
| 825 }; | |
| 826 | |
| 827 //------------------------------MachHaltNode----------------------------------- | |
| 828 // Machine-specific versions of halt nodes | |
| 829 class MachHaltNode : public MachReturnNode { | |
| 830 public: | |
| 831 virtual JVMState* jvms() const; | |
| 832 }; | |
| 833 | |
| 834 | |
| 835 //------------------------------MachTempNode----------------------------------- | |
| 836 // Node used by the adlc to construct inputs to represent temporary registers | |
| 837 class MachTempNode : public MachNode { | |
| 838 private: | |
| 839 MachOper *_opnd_array[1]; | |
| 840 | |
| 841 public: | |
| 842 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } | |
| 843 virtual uint rule() const { return 9999999; } | |
| 844 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} | |
| 845 | |
| 846 MachTempNode(MachOper* oper) { | |
| 847 init_class_id(Class_MachTemp); | |
| 848 _num_opnds = 1; | |
| 849 _opnds = _opnd_array; | |
| 850 add_req(NULL); | |
| 851 _opnds[0] = oper; | |
| 852 } | |
| 853 virtual uint size_of() const { return sizeof(MachTempNode); } | |
| 854 | |
| 855 #ifndef PRODUCT | |
| 856 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} | |
| 857 virtual const char *Name() const { return "MachTemp";} | |
| 858 #endif | |
| 859 }; | |
| 860 | |
| 861 | |
| 862 | |
| 863 //------------------------------labelOper-------------------------------------- | |
| 864 // Machine-independent version of label operand | |
| 865 class labelOper : public MachOper { | |
| 866 private: | |
| 867 virtual uint num_edges() const { return 0; } | |
| 868 public: | |
| 869 // Supported for fixed size branches | |
| 870 Label* _label; // Label for branch(es) | |
| 871 | |
| 872 uint _block_num; | |
| 873 | |
| 874 labelOper() : _block_num(0), _label(0) {} | |
| 875 | |
| 876 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} | |
| 877 | |
| 878 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} | |
| 879 | |
| 880 virtual MachOper *clone(Compile* C) const; | |
| 881 | |
| 3839 | 882 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } |
| 0 | 883 |
| 884 virtual uint opcode() const; | |
| 885 | |
| 886 virtual uint hash() const; | |
| 887 virtual uint cmp( const MachOper &oper ) const; | |
| 888 #ifndef PRODUCT | |
| 889 virtual const char *Name() const { return "Label";} | |
| 890 | |
| 891 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
| 892 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
| 893 #endif | |
| 894 }; | |
| 895 | |
| 896 | |
| 897 //------------------------------methodOper-------------------------------------- | |
| 898 // Machine-independent version of method operand | |
| 899 class methodOper : public MachOper { | |
| 900 private: | |
| 901 virtual uint num_edges() const { return 0; } | |
| 902 public: | |
| 903 intptr_t _method; // Address of method | |
| 904 methodOper() : _method(0) {} | |
| 905 methodOper(intptr_t method) : _method(method) {} | |
| 906 | |
| 907 virtual MachOper *clone(Compile* C) const; | |
| 908 | |
| 909 virtual intptr_t method() const { return _method; } | |
| 910 | |
| 911 virtual uint opcode() const; | |
| 912 | |
| 913 virtual uint hash() const; | |
| 914 virtual uint cmp( const MachOper &oper ) const; | |
| 915 #ifndef PRODUCT | |
| 916 virtual const char *Name() const { return "Method";} | |
| 917 | |
| 918 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
| 919 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
| 920 #endif | |
| 921 }; | |
| 1972 | 922 |
| 923 #endif // SHARE_VM_OPTO_MACHNODE_HPP |