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annotate graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotMove.java @ 15023:652564fe42d5
Use CompressionNode for accessing compressed Klass pointers.
author | Roland Schatz <roland.schatz@oracle.com> |
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date | Tue, 08 Apr 2014 15:55:18 +0200 |
parents | db4254246f9a |
children | 895e9ecedfe8 |
rev | line source |
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1 /* |
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2 * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.oracle.graal.hotspot.amd64; |
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24 |
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25 import static com.oracle.graal.api.code.ValueUtil.*; |
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26 import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; |
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27 |
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28 import com.oracle.graal.amd64.*; |
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29 import com.oracle.graal.api.code.*; |
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30 import com.oracle.graal.api.meta.*; |
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31 import com.oracle.graal.asm.*; |
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32 import com.oracle.graal.asm.amd64.*; |
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33 import com.oracle.graal.asm.amd64.AMD64Assembler.ConditionFlag; |
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34 import com.oracle.graal.graph.*; |
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35 import com.oracle.graal.hotspot.HotSpotVMConfig.CompressEncoding; |
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36 import com.oracle.graal.hotspot.data.*; |
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37 import com.oracle.graal.hotspot.meta.*; |
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38 import com.oracle.graal.lir.*; |
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39 import com.oracle.graal.lir.amd64.*; |
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40 import com.oracle.graal.lir.amd64.AMD64Move.LoadOp; |
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41 import com.oracle.graal.lir.amd64.AMD64Move.StoreConstantOp; |
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42 import com.oracle.graal.lir.asm.*; |
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43 |
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44 public class AMD64HotSpotMove { |
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45 |
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46 public static class StoreCompressedConstantOp extends StoreConstantOp { |
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47 |
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48 public StoreCompressedConstantOp(Kind kind, AMD64AddressValue address, Constant input, LIRFrameState state) { |
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49 super(kind, address, input, state); |
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50 } |
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51 |
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52 @Override |
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53 public void emitMemAccess(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
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54 if (kind == Kind.Long) { |
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55 if (NumUtil.isInt(input.asLong())) { |
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56 if (input instanceof HotSpotMetaspaceConstant) { |
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57 crb.recordInlineDataInCode(new MetaspaceData(0, input.asLong(), HotSpotMetaspaceConstant.getMetaspaceObject(input), true)); |
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58 } |
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59 masm.movl(address.toAddress(), (int) input.asLong()); |
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60 } else { |
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61 throw GraalInternalError.shouldNotReachHere("Cannot store 64-bit constants to memory"); |
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62 } |
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63 } else if (kind == Kind.Object) { |
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64 if (input.isNull()) { |
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65 masm.movl(address.toAddress(), 0); |
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66 } else if (crb.target.inlineObjects) { |
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67 crb.recordInlineDataInCode(new OopData(0, HotSpotObjectConstant.asObject(input), true)); |
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68 masm.movl(address.toAddress(), 0xDEADDEAD); |
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69 } else { |
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70 throw GraalInternalError.shouldNotReachHere("Cannot store 64-bit constants to memory"); |
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71 } |
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72 } else { |
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73 throw GraalInternalError.shouldNotReachHere("Attempt to store compressed constant of wrong type."); |
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74 } |
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75 } |
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76 } |
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77 |
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78 public static class CompressPointer extends AMD64LIRInstruction { |
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79 |
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80 private final CompressEncoding encoding; |
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81 |
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82 @Def({REG, HINT}) protected AllocatableValue result; |
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83 @Use({REG}) protected AllocatableValue input; |
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84 @Use({REG, ILLEGAL}) protected AllocatableValue baseRegister; |
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85 |
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86 public CompressPointer(AllocatableValue result, AllocatableValue input, AllocatableValue baseRegister, CompressEncoding encoding) { |
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87 this.result = result; |
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88 this.input = input; |
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89 this.baseRegister = baseRegister; |
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90 this.encoding = encoding; |
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91 } |
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92 |
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93 @Override |
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94 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
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95 AMD64Move.move(Kind.Long, crb, masm, result, input); |
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96 Register base = encoding.base != 0 ? asRegister(baseRegister) : null; |
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97 encodePointer(masm, asRegister(result), base, encoding); |
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98 } |
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99 } |
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100 |
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101 public static class UncompressPointer extends AMD64LIRInstruction { |
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102 |
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103 private final CompressEncoding encoding; |
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104 |
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105 @Def({REG, HINT}) protected AllocatableValue result; |
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106 @Use({REG}) protected AllocatableValue input; |
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107 @Use({REG, ILLEGAL}) protected AllocatableValue baseRegister; |
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108 |
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109 public UncompressPointer(AllocatableValue result, AllocatableValue input, AllocatableValue baseRegister, CompressEncoding encoding) { |
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110 this.result = result; |
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111 this.input = input; |
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112 this.baseRegister = baseRegister; |
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113 this.encoding = encoding; |
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114 } |
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115 |
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116 @Override |
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117 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
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118 AMD64Move.move(Kind.Int, crb, masm, result, input); |
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119 Register base = encoding.base != 0 ? asRegister(baseRegister) : null; |
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120 decodePointer(masm, asRegister(result), base, encoding); |
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121 } |
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122 } |
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123 |
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124 public static class LoadCompressedPointer extends LoadOp { |
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125 |
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126 private final CompressEncoding encoding; |
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127 @Temp({REG, ILLEGAL}) protected AllocatableValue scratch; |
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128 |
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129 public LoadCompressedPointer(Kind kind, AllocatableValue result, AllocatableValue scratch, AMD64AddressValue address, LIRFrameState state, CompressEncoding encoding) { |
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130 super(kind, result, address, state); |
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131 this.encoding = encoding; |
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132 this.scratch = scratch != null ? scratch : Value.ILLEGAL; |
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133 assert kind == Kind.Object || kind == Kind.Long; |
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134 } |
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135 |
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136 @Override |
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137 public void emitMemAccess(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
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138 Register resRegister = asRegister(result); |
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139 if (kind == Kind.Object) { |
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140 masm.movl(resRegister, address.toAddress()); |
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141 decodePointer(masm, resRegister, asRegister(scratch), encoding); |
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142 } else { |
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143 Register base = scratch.equals(Value.ILLEGAL) ? null : asRegister(scratch); |
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144 decodeKlassPointer(masm, resRegister, base, address.toAddress(), encoding); |
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145 } |
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146 } |
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147 } |
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148 |
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149 public static class StoreCompressedPointer extends AMD64LIRInstruction { |
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150 |
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151 protected final Kind kind; |
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152 private final Register heapBaseReg; |
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153 private final CompressEncoding encoding; |
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154 @Temp({REG}) private AllocatableValue scratch; |
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155 @Alive({REG}) protected Value input; |
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156 @Alive({COMPOSITE}) protected AMD64AddressValue address; |
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157 @State protected LIRFrameState state; |
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158 |
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159 public StoreCompressedPointer(Kind kind, AMD64AddressValue address, AllocatableValue input, AllocatableValue scratch, LIRFrameState state, CompressEncoding encoding, Register heapBaseReg) { |
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160 this.encoding = encoding; |
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161 this.heapBaseReg = heapBaseReg; |
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162 this.scratch = scratch; |
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163 this.kind = kind; |
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164 this.address = address; |
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165 this.state = state; |
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166 this.input = input; |
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167 assert kind == Kind.Object || kind == Kind.Long; |
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168 } |
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169 |
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|
170 @Override |
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171 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
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172 masm.movq(asRegister(scratch), asRegister(input)); |
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173 if (kind == Kind.Long && (encoding.base & 0xffffffffL) == 0 && encoding.shift == 0) { |
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174 // Compressing the pointer won't change the low 32 bits, so just store it |
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175 masm.movl(address.toAddress(), asRegister(input)); |
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176 } else if (kind == Kind.Object) { |
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177 encodePointer(masm, asRegister(scratch), heapBaseReg, encoding); |
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178 } else { |
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179 masm.movq(asRegister(scratch), asRegister(input)); |
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180 if (kind == Kind.Object) { |
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181 encodePointer(masm, asRegister(scratch), heapBaseReg, encoding); |
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182 } else { |
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|
183 assert !asRegister(scratch).equals(heapBaseReg) : "need to restore value otherwise"; |
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184 encodeKlassPointer(masm, asRegister(scratch), heapBaseReg, encoding); |
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185 } |
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186 if (state != null) { |
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187 crb.recordImplicitException(masm.position(), state); |
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188 } |
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189 masm.movl(address.toAddress(), asRegister(scratch)); |
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190 } |
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191 if (state != null) { |
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192 crb.recordImplicitException(masm.position(), state); |
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193 } |
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194 masm.movl(address.toAddress(), asRegister(scratch)); |
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195 } |
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196 } |
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197 |
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|
198 @Opcode("CAS") |
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199 public static class CompareAndSwapCompressedOp extends AMD64LIRInstruction { |
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200 |
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|
201 @Def protected AllocatableValue result; |
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|
202 @Alive({COMPOSITE}) protected AMD64AddressValue address; |
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203 @Alive protected AllocatableValue cmpValue; |
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204 @Alive protected AllocatableValue newValue; |
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|
205 @Temp({REG}) protected AllocatableValue scratch; |
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206 |
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|
207 private CompressEncoding encoding; |
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|
208 private final Register heapBaseReg; |
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209 |
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210 public CompareAndSwapCompressedOp(AllocatableValue result, AMD64AddressValue address, AllocatableValue cmpValue, AllocatableValue newValue, AllocatableValue scratch, |
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211 CompressEncoding encoding, Register heapBaseReg) { |
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212 this.heapBaseReg = heapBaseReg; |
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|
213 this.scratch = scratch; |
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214 this.encoding = encoding; |
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|
215 this.result = result; |
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|
216 this.address = address; |
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|
217 this.cmpValue = cmpValue; |
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|
218 this.newValue = newValue; |
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219 assert cmpValue.getKind() == Kind.Object; |
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220 } |
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|
221 |
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|
222 @Override |
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renamed TargetMethodAssembler to CompilationResultBuilder
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|
223 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
13520
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224 compareAndSwapCompressed(crb, masm, result, address, cmpValue, newValue, scratch, encoding, heapBaseReg); |
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225 } |
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226 } |
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227 |
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228 protected static void compareAndSwapCompressed(CompilationResultBuilder crb, AMD64MacroAssembler masm, AllocatableValue result, AMD64AddressValue address, AllocatableValue cmpValue, |
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229 AllocatableValue newValue, AllocatableValue scratch, CompressEncoding encoding, Register heapBaseReg) { |
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230 assert AMD64.rax.equals(asRegister(cmpValue)) && AMD64.rax.equals(asRegister(result)); |
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231 final Register scratchRegister = asRegister(scratch); |
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232 final Register cmpRegister = asRegister(cmpValue); |
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233 final Register newRegister = asRegister(newValue); |
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234 Register heapBase = heapBaseReg; |
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235 encodePointer(masm, cmpRegister, heapBase, encoding); |
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236 masm.movq(scratchRegister, newRegister); |
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237 encodePointer(masm, scratchRegister, heapBase, encoding); |
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238 if (crb.target.isMP) { |
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239 masm.lock(); |
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240 } |
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241 masm.cmpxchgl(scratchRegister, address.toAddress()); |
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242 } |
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243 |
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244 private static void encodePointer(AMD64MacroAssembler masm, Register scratchRegister, Register heapBaseRegister, CompressEncoding encoding) { |
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245 // If the base is zero, the uncompressed address has to be shifted right |
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246 // in order to be compressed. |
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247 if (encoding.base == 0) { |
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248 if (encoding.shift != 0) { |
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249 assert encoding.alignment == encoding.shift : "Encode algorithm is wrong"; |
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250 masm.shrq(scratchRegister, encoding.alignment); |
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251 } |
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252 } else { |
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253 // Otherwise the heap base, which resides always in register 12, is subtracted |
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254 // followed by right shift. |
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255 masm.testq(scratchRegister, scratchRegister); |
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256 // If the stored reference is null, move the heap to scratch |
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257 // register and then calculate the compressed oop value. |
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258 masm.cmovq(ConditionFlag.Equal, scratchRegister, heapBaseRegister); |
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259 masm.subq(scratchRegister, heapBaseRegister); |
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260 masm.shrq(scratchRegister, encoding.alignment); |
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261 } |
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262 } |
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263 |
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264 public static void decodePointer(AMD64MacroAssembler masm, Register resRegister, Register heapBaseRegister, CompressEncoding encoding) { |
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265 // If the base is zero, the compressed address has to be shifted left |
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266 // in order to be uncompressed. |
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267 if (encoding.base == 0) { |
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268 if (encoding.shift != 0) { |
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269 assert encoding.alignment == encoding.shift : "Decode algorithm is wrong"; |
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270 masm.shlq(resRegister, encoding.alignment); |
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271 } |
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272 } else { |
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273 Label done = new Label(); |
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274 masm.shlq(resRegister, encoding.alignment); |
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275 masm.jccb(ConditionFlag.Equal, done); |
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276 // Otherwise the heap base is added to the shifted address. |
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277 masm.addq(resRegister, heapBaseRegister); |
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278 masm.bind(done); |
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279 } |
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280 } |
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281 |
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282 private static void encodeKlassPointer(AMD64MacroAssembler masm, Register scratchRegister, Register heapBaseRegister, CompressEncoding encoding) { |
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283 if (encoding.base != 0) { |
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284 masm.movq(heapBaseRegister, encoding.base); |
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285 masm.subq(scratchRegister, heapBaseRegister); |
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286 } |
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287 if (encoding.shift != 0) { |
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288 assert encoding.alignment == encoding.shift : "Encode algorithm is wrong"; |
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289 masm.shrq(scratchRegister, encoding.alignment); |
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290 } |
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291 } |
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292 |
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293 public static void decodeKlassPointer(AMD64MacroAssembler masm, Register register, Register scratch, AMD64Address address, CompressEncoding encoding) { |
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294 masm.movl(register, address); |
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295 if (encoding.shift != 0) { |
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296 assert encoding.alignment == encoding.shift : "Decode algorithm is wrong"; |
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297 masm.shlq(register, encoding.alignment); |
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298 } |
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299 if (encoding.base != 0) { |
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300 masm.movq(scratch, encoding.base); |
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301 masm.addq(register, scratch); |
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302 } |
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303 } |
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304 |
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305 } |