Mercurial > hg > truffle

annotate src/cpu/sparc/vm/assembler_sparc.inline.hpp @ 17524:89152779163c

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Merge with jdk8-b132
author Gilles Duboscq <duboscq@ssw.jku.at>
date Wed, 15 Oct 2014 11:59:32 +0200
parents 4ca6dc0799b6
children 52b4284cb496
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1 /*
17524
89152779163c Merge with jdk8-b132
Gilles Duboscq <duboscq@ssw.jku.at>
parents: 14909
diff changeset
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
a61af66fc99e Initial load
duke
parents:
diff changeset
4 *
a61af66fc99e Initial load
duke
parents:
diff changeset
5 * This code is free software; you can redistribute it and/or modify it
a61af66fc99e Initial load
duke
parents:
diff changeset
6 * under the terms of the GNU General Public License version 2 only, as
a61af66fc99e Initial load
duke
parents:
diff changeset
7 * published by the Free Software Foundation.
a61af66fc99e Initial load
duke
parents:
diff changeset
8 *
a61af66fc99e Initial load
duke
parents:
diff changeset
9 * This code is distributed in the hope that it will be useful, but WITHOUT
a61af66fc99e Initial load
duke
parents:
diff changeset
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
a61af66fc99e Initial load
duke
parents:
diff changeset
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
a61af66fc99e Initial load
duke
parents:
diff changeset
12 * version 2 for more details (a copy is included in the LICENSE file that
a61af66fc99e Initial load
duke
parents:
diff changeset
13 * accompanied this code).
a61af66fc99e Initial load
duke
parents:
diff changeset
14 *
a61af66fc99e Initial load
duke
parents:
diff changeset
15 * You should have received a copy of the GNU General Public License version
a61af66fc99e Initial load
duke
parents:
diff changeset
16 * 2 along with this work; if not, write to the Free Software Foundation,
a61af66fc99e Initial load
duke
parents:
diff changeset
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
a61af66fc99e Initial load
duke
parents:
diff changeset
18 *
1552
c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories
trims
parents: 1547
diff changeset
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories
trims
parents: 1547
diff changeset
20 * or visit www.oracle.com if you need additional information or have any
c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories
trims
parents: 1547
diff changeset
21 * questions.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
22 *
a61af66fc99e Initial load
duke
parents:
diff changeset
23 */
a61af66fc99e Initial load
duke
parents:
diff changeset
24
1972
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1911
diff changeset
25 #ifndef CPU_SPARC_VM_ASSEMBLER_SPARC_INLINE_HPP
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1911
diff changeset
26 #define CPU_SPARC_VM_ASSEMBLER_SPARC_INLINE_HPP
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1911
diff changeset
27
7204
f0c2369fda5a 8003250: SPARC: move MacroAssembler into separate file
twisti
parents: 6795
diff changeset
28 #include "asm/assembler.hpp"
0
a61af66fc99e Initial load
duke
parents:
diff changeset
29
a61af66fc99e Initial load
duke
parents:
diff changeset
30
a61af66fc99e Initial load
duke
parents:
diff changeset
31 inline void Assembler::check_delay() {
a61af66fc99e Initial load
duke
parents:
diff changeset
32 # ifdef CHECK_DELAY
a61af66fc99e Initial load
duke
parents:
diff changeset
33 guarantee( delay_state != at_delay_slot, "must say delayed() when filling delay slot");
a61af66fc99e Initial load
duke
parents:
diff changeset
34 delay_state = no_delay;
a61af66fc99e Initial load
duke
parents:
diff changeset
35 # endif
a61af66fc99e Initial load
duke
parents:
diff changeset
36 }
a61af66fc99e Initial load
duke
parents:
diff changeset
37
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
38 inline void Assembler::emit_int32(int x) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
39 check_delay();
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
40 AbstractAssembler::emit_int32(x);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
41 }
a61af66fc99e Initial load
duke
parents:
diff changeset
42
a61af66fc99e Initial load
duke
parents:
diff changeset
43 inline void Assembler::emit_data(int x, relocInfo::relocType rtype) {
a61af66fc99e Initial load
duke
parents:
diff changeset
44 relocate(rtype);
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
45 emit_int32(x);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
46 }
a61af66fc99e Initial load
duke
parents:
diff changeset
47
a61af66fc99e Initial load
duke
parents:
diff changeset
48 inline void Assembler::emit_data(int x, RelocationHolder const& rspec) {
a61af66fc99e Initial load
duke
parents:
diff changeset
49 relocate(rspec);
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
50 emit_int32(x);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
51 }
a61af66fc99e Initial load
duke
parents:
diff changeset
52
a61af66fc99e Initial load
duke
parents:
diff changeset
53
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
54 inline void Assembler::add(Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(add_op3) | rs1(s1) | rs2(s2) ); }
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
55 inline void Assembler::add(Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(add_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
56
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
57 inline void Assembler::bpr( RCondition c, bool a, Predict p, Register s1, address d, relocInfo::relocType rt ) { v9_only(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(bpr_op2) | wdisp16(intptr_t(d), intptr_t(pc())) | predict(p) | rs1(s1), rt); has_delay_slot(); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
58 inline void Assembler::bpr( RCondition c, bool a, Predict p, Register s1, Label& L) { bpr( c, a, p, s1, target(L)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
59
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
60 inline void Assembler::fb( Condition c, bool a, address d, relocInfo::relocType rt ) { v9_dep(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(fb_op2) | wdisp(intptr_t(d), intptr_t(pc()), 22), rt); has_delay_slot(); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
61 inline void Assembler::fb( Condition c, bool a, Label& L ) { fb(c, a, target(L)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
62
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
63 inline void Assembler::fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt ) { v9_only(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(fbp_op2) | branchcc(cc) | predict(p) | wdisp(intptr_t(d), intptr_t(pc()), 19), rt); has_delay_slot(); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
64 inline void Assembler::fbp( Condition c, bool a, CC cc, Predict p, Label& L ) { fbp(c, a, cc, p, target(L)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
65
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
66 inline void Assembler::br( Condition c, bool a, address d, relocInfo::relocType rt ) { v9_dep(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(br_op2) | wdisp(intptr_t(d), intptr_t(pc()), 22), rt); has_delay_slot(); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
67 inline void Assembler::br( Condition c, bool a, Label& L ) { br(c, a, target(L)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
68
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
69 inline void Assembler::bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt ) { v9_only(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(bp_op2) | branchcc(cc) | predict(p) | wdisp(intptr_t(d), intptr_t(pc()), 19), rt); has_delay_slot(); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
70 inline void Assembler::bp( Condition c, bool a, CC cc, Predict p, Label& L ) { bp(c, a, cc, p, target(L)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
71
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
72 // compare and branch
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
73 inline void Assembler::cbcond(Condition c, CC cc, Register s1, Register s2, Label& L) { cti(); no_cbcond_before(); emit_data(op(branch_op) | cond_cbcond(c) | op2(bpr_op2) | branchcc(cc) | wdisp10(intptr_t(target(L)), intptr_t(pc())) | rs1(s1) | rs2(s2)); }
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
74 inline void Assembler::cbcond(Condition c, CC cc, Register s1, int simm5, Label& L) { cti(); no_cbcond_before(); emit_data(op(branch_op) | cond_cbcond(c) | op2(bpr_op2) | branchcc(cc) | wdisp10(intptr_t(target(L)), intptr_t(pc())) | rs1(s1) | immed(true) | simm(simm5, 5)); }
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
75
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
76 inline void Assembler::call( address d, relocInfo::relocType rt ) { cti(); emit_data( op(call_op) | wdisp(intptr_t(d), intptr_t(pc()), 30), rt); has_delay_slot(); assert(rt != relocInfo::virtual_call_type, "must use virtual_call_Relocation::spec"); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
77 inline void Assembler::call( Label& L, relocInfo::relocType rt ) { call( target(L), rt); }
a61af66fc99e Initial load
duke
parents:
diff changeset
78
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
79 inline void Assembler::flush( Register s1, Register s2) { emit_int32( op(arith_op) | op3(flush_op3) | rs1(s1) | rs2(s2)); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
80 inline void Assembler::flush( Register s1, int simm13a) { emit_data( op(arith_op) | op3(flush_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
81
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
82 inline void Assembler::jmpl( Register s1, Register s2, Register d ) { cti(); emit_int32( op(arith_op) | rd(d) | op3(jmpl_op3) | rs1(s1) | rs2(s2)); has_delay_slot(); }
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
83 inline void Assembler::jmpl( Register s1, int simm13a, Register d, RelocationHolder const& rspec ) { cti(); emit_data( op(arith_op) | rd(d) | op3(jmpl_op3) | rs1(s1) | immed(true) | simm(simm13a, 13), rspec); has_delay_slot(); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
84
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
85 inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d) { emit_int32( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3, w) | rs1(s1) | rs2(s2) ); }
727
6b2273dd6fa9 6822110: Add AddressLiteral class on SPARC
twisti
parents: 710
diff changeset
86 inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, int simm13a, FloatRegister d, RelocationHolder const& rspec) { emit_data( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3, w) | rs1(s1) | immed(true) | simm(simm13a, 13), rspec); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
87
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
88 inline void Assembler::ldxfsr( Register s1, Register s2) { v9_only(); emit_int32( op(ldst_op) | rd(G1) | op3(ldfsr_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
89 inline void Assembler::ldxfsr( Register s1, int simm13a) { v9_only(); emit_data( op(ldst_op) | rd(G1) | op3(ldfsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
90
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
91 inline void Assembler::ldsb( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(ldsb_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
92 inline void Assembler::ldsb( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(ldsb_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
93
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
94 inline void Assembler::ldsh( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(ldsh_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
95 inline void Assembler::ldsh( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(ldsh_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
96 inline void Assembler::ldsw( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(ldsw_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
97 inline void Assembler::ldsw( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(ldsw_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
98 inline void Assembler::ldub( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(ldub_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
99 inline void Assembler::ldub( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(ldub_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
100 inline void Assembler::lduh( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(lduh_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
101 inline void Assembler::lduh( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(lduh_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
102 inline void Assembler::lduw( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(lduw_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
103 inline void Assembler::lduw( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(lduw_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
104
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
105 inline void Assembler::ldx( Register s1, Register s2, Register d) { v9_only(); emit_int32( op(ldst_op) | rd(d) | op3(ldx_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
106 inline void Assembler::ldx( Register s1, int simm13a, Register d) { v9_only(); emit_data( op(ldst_op) | rd(d) | op3(ldx_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
107 inline void Assembler::ldd( Register s1, Register s2, Register d) { v9_dep(); assert(d->is_even(), "not even"); emit_int32( op(ldst_op) | rd(d) | op3(ldd_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
108 inline void Assembler::ldd( Register s1, int simm13a, Register d) { v9_dep(); assert(d->is_even(), "not even"); emit_data( op(ldst_op) | rd(d) | op3(ldd_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
109
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
110 inline void Assembler::rett( Register s1, Register s2 ) { cti(); emit_int32( op(arith_op) | op3(rett_op3) | rs1(s1) | rs2(s2)); has_delay_slot(); }
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 3442
diff changeset
111 inline void Assembler::rett( Register s1, int simm13a, relocInfo::relocType rt) { cti(); emit_data( op(arith_op) | op3(rett_op3) | rs1(s1) | immed(true) | simm(simm13a, 13), rt); has_delay_slot(); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
112
a61af66fc99e Initial load
duke
parents:
diff changeset
113 inline void Assembler::sethi( int imm22a, Register d, RelocationHolder const& rspec ) { emit_data( op(branch_op) | rd(d) | op2(sethi_op2) | hi22(imm22a), rspec); }
a61af66fc99e Initial load
duke
parents:
diff changeset
114
a61af66fc99e Initial load
duke
parents:
diff changeset
115 // pp 222
a61af66fc99e Initial load
duke
parents:
diff changeset
116
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
117 inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, Register s2) { emit_int32( op(ldst_op) | fd(d, w) | alt_op3(stf_op3, w) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
118 inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, int simm13a) { emit_data( op(ldst_op) | fd(d, w) | alt_op3(stf_op3, w) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
119
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
120 inline void Assembler::stxfsr( Register s1, Register s2) { v9_only(); emit_int32( op(ldst_op) | rd(G1) | op3(stfsr_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
121 inline void Assembler::stxfsr( Register s1, int simm13a) { v9_only(); emit_data( op(ldst_op) | rd(G1) | op3(stfsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
122
a61af66fc99e Initial load
duke
parents:
diff changeset
123 // p 226
a61af66fc99e Initial load
duke
parents:
diff changeset
124
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
125 inline void Assembler::stb( Register d, Register s1, Register s2) { emit_int32( op(ldst_op) | rd(d) | op3(stb_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
126 inline void Assembler::stb( Register d, Register s1, int simm13a) { emit_data( op(ldst_op) | rd(d) | op3(stb_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
127 inline void Assembler::sth( Register d, Register s1, Register s2) { emit_int32( op(ldst_op) | rd(d) | op3(sth_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
128 inline void Assembler::sth( Register d, Register s1, int simm13a) { emit_data( op(ldst_op) | rd(d) | op3(sth_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
129 inline void Assembler::stw( Register d, Register s1, Register s2) { emit_int32( op(ldst_op) | rd(d) | op3(stw_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
130 inline void Assembler::stw( Register d, Register s1, int simm13a) { emit_data( op(ldst_op) | rd(d) | op3(stw_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
131
a61af66fc99e Initial load
duke
parents:
diff changeset
132
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
133 inline void Assembler::stx( Register d, Register s1, Register s2) { v9_only(); emit_int32( op(ldst_op) | rd(d) | op3(stx_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
134 inline void Assembler::stx( Register d, Register s1, int simm13a) { v9_only(); emit_data( op(ldst_op) | rd(d) | op3(stx_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
135 inline void Assembler::std( Register d, Register s1, Register s2) { v9_dep(); assert(d->is_even(), "not even"); emit_int32( op(ldst_op) | rd(d) | op3(std_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
136 inline void Assembler::std( Register d, Register s1, int simm13a) { v9_dep(); assert(d->is_even(), "not even"); emit_data( op(ldst_op) | rd(d) | op3(std_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
137
a61af66fc99e Initial load
duke
parents:
diff changeset
138 // pp 231
a61af66fc99e Initial load
duke
parents:
diff changeset
139
7476
ffa87474d7a4 8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents: 7204
diff changeset
140 inline void Assembler::swap( Register s1, Register s2, Register d) { v9_dep(); emit_int32( op(ldst_op) | rd(d) | op3(swap_op3) | rs1(s1) | rs2(s2) ); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
141 inline void Assembler::swap( Register s1, int simm13a, Register d) { v9_dep(); emit_data( op(ldst_op) | rd(d) | op3(swap_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
142
1972
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1911
diff changeset
143 #endif // CPU_SPARC_VM_ASSEMBLER_SPARC_INLINE_HPP