annotate test/compiler/codegen/BMI1.java @ 17729:8a8ff6b577ed

8031321: Support Intel bit manipulation instructions Summary: Add support for BMI1 instructions Reviewed-by: kvn, roland
author iveresov
date Wed, 12 Mar 2014 11:24:26 -0700
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1 /*
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2 * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23
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24 /*
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25 * @test
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26 * @bug 8031321
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27 * @summary Support BMI1 instructions on x86/x64
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28 * @run main/othervm -Xbatch -XX:-TieredCompilation -XX:CompileCommand=compileonly,BMITests.* BMI1
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29 *
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30 */
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31
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32 class MemI {
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33 public int x;
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34 public MemI(int x) { this.x = x; }
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35 }
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36
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37 class MemL {
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38 public long x;
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39 public MemL(long x) { this.x = x; }
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40 }
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41
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42 class BMITests {
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43 static int andnl(int src1, int src2) {
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44 return ~src1 & src2;
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45 }
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46 static long andnq(long src1, long src2) {
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47 return ~src1 & src2;
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48 }
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49 static int andnl(int src1, MemI src2) {
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50 return ~src1 & src2.x;
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51 }
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52 static long andnq(long src1, MemL src2) {
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53 return ~src1 & src2.x;
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54 }
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55 static int blsil(int src1) {
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56 return src1 & -src1;
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57 }
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58 static long blsiq(long src1) {
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59 return src1 & -src1;
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60 }
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61 static int blsil(MemI src1) {
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62 return src1.x & -src1.x;
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63 }
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64 static long blsiq(MemL src1) {
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65 return src1.x & -src1.x;
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66 }
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67 static int blsmskl(int src1) {
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68 return (src1 - 1) ^ src1;
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69 }
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70 static long blsmskq(long src1) {
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71 return (src1 - 1) ^ src1;
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72 }
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73 static int blsmskl(MemI src1) {
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74 return (src1.x - 1) ^ src1.x;
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75 }
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76 static long blsmskq(MemL src1) {
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77 return (src1.x - 1) ^ src1.x;
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78 }
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79 static int blsrl(int src1) {
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80 return (src1 - 1) & src1;
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81 }
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82 static long blsrq(long src1) {
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83 return (src1 - 1) & src1;
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84 }
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85 static int blsrl(MemI src1) {
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86 return (src1.x - 1) & src1.x;
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87 }
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88 static long blsrq(MemL src1) {
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89 return (src1.x - 1) & src1.x;
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90 }
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91 static int lzcntl(int src1) {
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92 return Integer.numberOfLeadingZeros(src1);
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93 }
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94 static int lzcntq(long src1) {
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95 return Long.numberOfLeadingZeros(src1);
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96 }
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97 static int tzcntl(int src1) {
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98 return Integer.numberOfTrailingZeros(src1);
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99 }
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100 static int tzcntq(long src1) {
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101 return Long.numberOfTrailingZeros(src1);
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102 }
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103 }
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104
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105 public class BMI1 {
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106 private final static int ITERATIONS = 1000000;
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107
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108 public static void main(String[] args) {
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109 int ix = 0x01234567;
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110 int iy = 0x89abcdef;
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111 MemI imy = new MemI(iy);
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112 long lx = 0x0123456701234567L;
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113 long ly = 0x89abcdef89abcdefL;
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114 MemL lmy = new MemL(ly);
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115
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116 { // match(Set dst (AndI (XorI src1 minus_1) src2))
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117 int z = BMITests.andnl(ix, iy);
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118 for (int i = 0; i < ITERATIONS; i++) {
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119 int ii = BMITests.andnl(ix, iy);
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120 if (ii != z) {
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121 throw new Error("andnl with register failed");
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122 }
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123 }
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124 }
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125 { // match(Set dst (AndL (XorL src1 minus_1) src2))
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126 long z = BMITests.andnq(lx, ly);
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127 for (int i = 0; i < ITERATIONS; i++) {
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128 long ll = BMITests.andnq(lx, ly);
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129 if (ll != z) {
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130 throw new Error("andnq with register failed");
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131 }
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132 }
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133 }
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134 { // match(Set dst (AndI (XorI src1 minus_1) (LoadI src2)))
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135 int z = BMITests.andnl(ix, imy);
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136 for (int i = 0; i < ITERATIONS; i++) {
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137 int ii = BMITests.andnl(ix, imy);
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138 if (ii != z) {
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139 throw new Error("andnl with memory failed");
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140 }
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141 }
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142 }
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143 { // match(Set dst (AndL (XorL src1 minus_1) (LoadL src2)))
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144 long z = BMITests.andnq(lx, lmy);
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145 for (int i = 0; i < ITERATIONS; i++) {
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146 long ll = BMITests.andnq(lx, lmy);
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147 if (ll != z) {
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148 throw new Error("andnq with memory failed");
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149 }
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150 }
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151 }
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152 { // match(Set dst (AndI (SubI imm_zero src) src))
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153 int z = BMITests.blsil(ix);
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154 for (int i = 0; i < ITERATIONS; i++) {
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155 int ii = BMITests.blsil(ix);
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156 if (ii != z) {
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157 throw new Error("blsil with register failed");
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158 }
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159 }
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160 }
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161 { // match(Set dst (AndL (SubL imm_zero src) src))
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162 long z = BMITests.blsiq(lx);
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163 for (int i = 0; i < ITERATIONS; i++) {
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164 long ll = BMITests.blsiq(lx);
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165 if (ll != z) {
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166 throw new Error("blsiq with register failed");
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167 }
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168 }
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169 }
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170 { // match(Set dst (AndI (SubI imm_zero (LoadI src) ) (LoadI src) ))
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171 int z = BMITests.blsil(imy);
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172 for (int i = 0; i < ITERATIONS; i++) {
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173 int ii = BMITests.blsil(imy);
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174 if (ii != z) {
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175 throw new Error("blsil with memory failed");
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176 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
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177 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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178 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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179 { // match(Set dst (AndL (SubL imm_zero (LoadL src) ) (LoadL src) ))
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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180 long z = BMITests.blsiq(lmy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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181 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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182 long ll = BMITests.blsiq(lmy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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183 if (ll != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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184 throw new Error("blsiq with memory failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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185 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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186 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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187 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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188
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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189 { // match(Set dst (XorI (AddI src minus_1) src))
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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190 int z = BMITests.blsmskl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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191 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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192 int ii = BMITests.blsmskl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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193 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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194 throw new Error("blsmskl with register failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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195 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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196 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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197 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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198 { // match(Set dst (XorL (AddL src minus_1) src))
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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199 long z = BMITests.blsmskq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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200 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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201 long ll = BMITests.blsmskq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
202 if (ll != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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203 throw new Error("blsmskq with register failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
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204 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
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205 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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206 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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207 { // match(Set dst (XorI (AddI (LoadI src) minus_1) (LoadI src) ) )
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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208 int z = BMITests.blsmskl(imy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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209 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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210 int ii = BMITests.blsmskl(imy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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211 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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212 throw new Error("blsmskl with memory failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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213 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
214 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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215 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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216 { // match(Set dst (XorL (AddL (LoadL src) minus_1) (LoadL src) ) )
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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217 long z = BMITests.blsmskq(lmy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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218 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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219 long ll = BMITests.blsmskq(lmy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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220 if (ll != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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221 throw new Error("blsmskq with memory failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
222 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
223 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
224 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
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225
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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226 { // match(Set dst (AndI (AddI src minus_1) src) )
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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227 int z = BMITests.blsrl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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228 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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229 int ii = BMITests.blsrl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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230 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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231 throw new Error("blsrl with register failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
232 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
233 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
234 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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235 { // match(Set dst (AndL (AddL src minus_1) src) )
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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236 long z = BMITests.blsrq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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237 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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238 long ll = BMITests.blsrq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
239 if (ll != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
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240 throw new Error("blsrq with register failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
241 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
242 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
243 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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244 { // match(Set dst (AndI (AddI (LoadI src) minus_1) (LoadI src) ) )
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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245 int z = BMITests.blsrl(imy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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246 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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247 int ii = BMITests.blsrl(imy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
248 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
249 throw new Error("blsrl with memory failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
250 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
251 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
252 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
253 { // match(Set dst (AndL (AddL (LoadL src) minus_1) (LoadL src)) )
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
254 long z = BMITests.blsrq(lmy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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255 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
256 long ll = BMITests.blsrq(lmy);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
257 if (ll != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
258 throw new Error("blsrq with memory failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
259 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
260 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
261 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
262
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
263 {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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264 int z = BMITests.lzcntl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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265 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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266 int ii = BMITests.lzcntl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
267 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
268 throw new Error("lzcntl failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
269 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
270 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
271 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
272 {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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273 int z = BMITests.lzcntq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
274 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
275 int ii = BMITests.lzcntq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
276 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
277 throw new Error("lzcntq failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
278 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
279 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
280 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
281
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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parents:
diff changeset
282 {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
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diff changeset
283 int z = BMITests.tzcntl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
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diff changeset
284 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
285 int ii = BMITests.tzcntl(ix);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
286 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
287 throw new Error("tzcntl failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
288 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
289 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
290 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
291 {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
292 int z = BMITests.tzcntq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
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diff changeset
293 for (int i = 0; i < ITERATIONS; i++) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
294 int ii = BMITests.tzcntq(lx);
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
295 if (ii != z) {
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
296 throw new Error("tzcntq failed");
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
297 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
298 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
299 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
300 }
8a8ff6b577ed 8031321: Support Intel bit manipulation instructions
iveresov
parents:
diff changeset
301 }