annotate graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCBitManipulationOp.java @ 14908:8db6e76cb658

Formatter: Keep one enum constant per line
author Gilles Duboscq <duboscq@ssw.jku.at>
date Tue, 01 Apr 2014 14:09:03 +0200
parents c132602c640e
children 64dcb92ee75a
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1 /*
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2 * Copyright (c) 2012, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23 package com.oracle.graal.lir.sparc;
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24
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25 import static com.oracle.graal.api.code.ValueUtil.*;
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26 import static com.oracle.graal.asm.sparc.SPARCAssembler.*;
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27 import static com.oracle.graal.asm.sparc.SPARCMacroAssembler.*;
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28 import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*;
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29 import static com.oracle.graal.sparc.SPARC.*;
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30
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31 import com.oracle.graal.api.code.*;
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32 import com.oracle.graal.api.meta.*;
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33 import com.oracle.graal.asm.sparc.*;
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34 import com.oracle.graal.graph.*;
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35 import com.oracle.graal.lir.*;
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36 import com.oracle.graal.lir.asm.*;
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37 import com.oracle.graal.nodes.spi.*;
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38
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39 public class SPARCBitManipulationOp extends SPARCLIRInstruction {
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40
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41 public enum IntrinsicOpcode {
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42 IPOPCNT,
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43 LPOPCNT,
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44 IBSR,
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45 LBSR,
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46 BSF;
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47 }
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48
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49 @Opcode private final IntrinsicOpcode opcode;
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50 @Def protected AllocatableValue result;
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51 @Use({REG}) protected AllocatableValue input;
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52 @Def({REG}) protected Value scratch;
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53
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54 public SPARCBitManipulationOp(IntrinsicOpcode opcode, AllocatableValue result, AllocatableValue input, LIRGeneratorTool gen) {
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55 this.opcode = opcode;
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56 this.result = result;
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57 this.input = input;
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58 if (opcode == IntrinsicOpcode.IBSR || opcode == IntrinsicOpcode.LBSR) {
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59 scratch = gen.newVariable(input.getKind());
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60 }
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61 }
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62
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63 @Override
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64 public void emitCode(CompilationResultBuilder crb, SPARCMacroAssembler masm) {
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65 Register dst = asIntReg(result);
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66 if (isRegister(input)) {
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67 Register src = asRegister(input);
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68 switch (opcode) {
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69 case IPOPCNT:
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70 // clear upper word for 64 bit POPC
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71 new Srl(src, g0, dst).emit(masm);
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72 new Popc(src, dst).emit(masm);
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73 break;
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74 case LPOPCNT:
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75 new Popc(src, dst).emit(masm);
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76 break;
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77 case BSF:
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78 Kind tkind = input.getKind();
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79 if (tkind == Kind.Int) {
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80 new Sub(src, 1, dst).emit(masm);
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81 new Andn(dst, src, dst).emit(masm);
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82 new Srl(dst, g0, dst).emit(masm);
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83 new Popc(dst, dst).emit(masm);
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84 } else if (tkind == Kind.Long) {
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85 new Sub(src, 1, dst).emit(masm);
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86 new Andn(dst, src, dst).emit(masm);
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87 new Popc(dst, dst).emit(masm);
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88 } else {
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89 throw GraalInternalError.shouldNotReachHere("missing: " + tkind);
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90 }
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91 break;
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92 case IBSR: {
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93 Kind ikind = input.getKind();
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94 assert ikind == Kind.Int;
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95 Register tmp = asRegister(scratch);
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96 new Srl(src, 1, tmp).emit(masm);
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97 new Srl(src, 0, dst).emit(masm);
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98 new Or(src, tmp, dst).emit(masm);
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99 new Srl(dst, 2, tmp).emit(masm);
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100 new Or(dst, tmp, dst).emit(masm);
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101 new Srl(dst, 4, tmp).emit(masm);
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102 new Or(dst, tmp, dst).emit(masm);
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103 new Srl(dst, 8, tmp).emit(masm);
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104 new Or(dst, tmp, dst).emit(masm);
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105 new Srl(dst, 16, tmp).emit(masm);
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106 new Or(dst, tmp, dst).emit(masm);
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107 new Popc(dst, dst).emit(masm);
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108 new Mov(ikind.getBitCount(), tmp).emit(masm);
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109 new Sub(tmp, dst, dst).emit(masm);
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110 break;
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111 }
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112 case LBSR: {
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113 Kind lkind = input.getKind();
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114 assert lkind == Kind.Int;
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115 Register tmp = asRegister(scratch);
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116 new Srlx(src, 1, tmp).emit(masm);
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117 new Or(src, tmp, dst).emit(masm);
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118 new Srlx(dst, 2, tmp).emit(masm);
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119 new Or(dst, tmp, dst).emit(masm);
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120 new Srlx(dst, 4, tmp).emit(masm);
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121 new Or(dst, tmp, dst).emit(masm);
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122 new Srlx(dst, 8, tmp).emit(masm);
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123 new Or(dst, tmp, dst).emit(masm);
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124 new Srlx(dst, 16, tmp).emit(masm);
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125 new Or(dst, tmp, dst).emit(masm);
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126 new Srlx(dst, 32, tmp).emit(masm);
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127 new Or(dst, tmp, dst).emit(masm);
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128 new Popc(dst, dst).emit(masm);
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129 new Mov(lkind.getBitCount(), tmp).emit(masm);
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130 new Sub(tmp, dst, dst).emit(masm);
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131 break;
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132 }
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133 default:
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134 throw GraalInternalError.shouldNotReachHere();
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135
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136 }
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137 } else if (isConstant(input) && isSimm13(crb.asIntConst(input))) {
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138 switch (opcode) {
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139 case IPOPCNT:
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140 new Popc(crb.asIntConst(input), dst).emit(masm);
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141 break;
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142 case LPOPCNT:
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143 new Popc(crb.asIntConst(input), dst).emit(masm);
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144 break;
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145 default:
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146 throw GraalInternalError.shouldNotReachHere();
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147 }
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148 } else {
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149 throw GraalInternalError.shouldNotReachHere();
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150 // SPARCAddress src = (SPARCAddress) crb.asAddress(input);
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151 // switch (opcode) {
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152 // case IPOPCNT:
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153 // new Ldsw(src, tmp).emit(masm);
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154 // // clear upper word for 64 bit POPC
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155 // new Srl(tmp, g0, dst).emit(masm);
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156 // new Popc(tmp, dst).emit(masm);
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157 // break;
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158 // case LPOPCNT:
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159 // new Ldx(src, tmp).emit(masm);
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160 // new Popc(tmp, dst).emit(masm);
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161 // break;
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162 // case BSF:
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163 // assert input.getKind() == Kind.Int;
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164 // new Ldsw(src, tmp).emit(masm);
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165 // new Srl(tmp, 1, tmp).emit(masm);
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166 // new Srl(tmp, 0, dst).emit(masm);
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167 // new Or(tmp, tmp, dst).emit(masm);
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168 // new Srl(dst, 2, tmp).emit(masm);
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169 // new Or(dst, tmp, dst).emit(masm);
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170 // new Srl(dst, 4, tmp).emit(masm);
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171 // new Or(dst, tmp, dst).emit(masm);
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172 // new Srl(dst, 8, tmp).emit(masm);
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173 // new Or(dst, tmp, dst).emit(masm);
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174 // new Srl(dst, 16, tmp).emit(masm);
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175 // new Or(dst, tmp, dst).emit(masm);
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176 // new Popc(dst, dst).emit(masm);
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177 // new Mov(Kind.Int.getBitCount(), tmp).emit(masm);
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178 // new Sub(tmp, dst, dst).emit(masm);
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179 // break;
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180 // case IBSR:
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181 // // masm.bsrl(dst, src);
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182 // // countLeadingZerosI_bsr masm.bsrq(dst, src);
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183 // // masm.bsrl(dst, src);
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184 // case LBSR:
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185 // // masm.bsrq(dst, src);
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186 // default:
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187 // throw GraalInternalError.shouldNotReachHere("missing: " + opcode);
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188 // }
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189 }
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190 }
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191
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192 }