annotate src/cpu/sparc/vm/icBuffer_sparc.cpp @ 20304:a22acf6d7598

8048112: G1 Full GC needs to support the case when the very first region is not available Summary: Refactor preparation for compaction during Full GC so that it lazily initializes the first compaction point. This also avoids problems later when the first region may not be committed. Also reviewed by K. Barrett. Reviewed-by: brutisso
author tschatzl
date Mon, 21 Jul 2014 10:00:31 +0200
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1 /*
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "asm/macroAssembler.inline.hpp"
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27 #include "code/icBuffer.hpp"
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28 #include "gc_interface/collectedHeap.inline.hpp"
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29 #include "interpreter/bytecodes.hpp"
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30 #include "memory/resourceArea.hpp"
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31 #include "nativeInst_sparc.hpp"
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32 #include "oops/oop.inline.hpp"
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33 #include "oops/oop.inline2.hpp"
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35 int InlineCacheBuffer::ic_stub_code_size() {
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36 #ifdef _LP64
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37 if (TraceJumps) return 600 * wordSize;
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38 return (NativeMovConstReg::instruction_size + // sethi;add
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39 NativeJump::instruction_size + // sethi; jmp; delay slot
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40 (1*BytesPerInstWord) + 1); // flush + 1 extra byte
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41 #else
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42 if (TraceJumps) return 300 * wordSize;
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43 return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer
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44 #endif
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45 }
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46
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47 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
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48 ResourceMark rm;
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49 CodeBuffer code(code_begin, ic_stub_code_size());
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50 MacroAssembler* masm = new MacroAssembler(&code);
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51 // note: even though the code contains an embedded metadata, we do not need reloc info
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52 // because
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53 // (1) the metadata is old (i.e., doesn't matter for scavenges)
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54 // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
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55 AddressLiteral cached_value_addrlit((address)cached_value, relocInfo::none);
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56 // Force the set to generate the fixed sequence so next_instruction_address works
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57 masm->patchable_set(cached_value_addrlit, G5_inline_cache_reg);
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58 assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");
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59 assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");
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60 AddressLiteral entry(entry_point);
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61 masm->JUMP(entry, G3_scratch, 0);
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62 masm->delayed()->nop();
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63 masm->flush();
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64 }
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67 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
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68 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
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69 NativeJump* jump = nativeJump_at(move->next_instruction_address());
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70 return jump->jump_destination();
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71 }
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73
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74 void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
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75 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
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76 NativeJump* jump = nativeJump_at(move->next_instruction_address());
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77 void* o = (void*)move->data();
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78 return o;
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79 }