annotate src/cpu/x86/vm/c1_MacroAssembler_x86.cpp @ 20304:a22acf6d7598

8048112: G1 Full GC needs to support the case when the very first region is not available Summary: Refactor preparation for compaction during Full GC so that it lazily initializes the first compaction point. This also avoids problems later when the first region may not be committed. Also reviewed by K. Barrett. Reviewed-by: brutisso
author tschatzl
date Mon, 21 Jul 2014 10:00:31 +0200
parents 0bf37f737702
children 52b4284cb496
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1 /*
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2 * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "c1/c1_MacroAssembler.hpp"
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27 #include "c1/c1_Runtime1.hpp"
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28 #include "classfile/systemDictionary.hpp"
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29 #include "gc_interface/collectedHeap.hpp"
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30 #include "interpreter/interpreter.hpp"
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31 #include "oops/arrayOop.hpp"
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32 #include "oops/markOop.hpp"
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33 #include "runtime/basicLock.hpp"
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34 #include "runtime/biasedLocking.hpp"
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35 #include "runtime/os.hpp"
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36 #include "runtime/stubRoutines.hpp"
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38 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register scratch, Label& slow_case) {
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39 const int aligned_mask = BytesPerWord -1;
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40 const int hdr_offset = oopDesc::mark_offset_in_bytes();
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41 assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
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42 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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43 Label done;
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44 int null_check_offset = -1;
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45
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46 verify_oop(obj);
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47
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48 // save object being locked into the BasicObjectLock
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49 movptr(Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()), obj);
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51 if (UseBiasedLocking) {
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52 assert(scratch != noreg, "should have scratch register at this point");
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53 null_check_offset = biased_locking_enter(disp_hdr, obj, hdr, scratch, false, done, &slow_case);
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54 } else {
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55 null_check_offset = offset();
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56 }
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57
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58 // Load object header
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59 movptr(hdr, Address(obj, hdr_offset));
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60 // and mark it as unlocked
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61 orptr(hdr, markOopDesc::unlocked_value);
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62 // save unlocked object header into the displaced header location on the stack
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63 movptr(Address(disp_hdr, 0), hdr);
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64 // test if object header is still the same (i.e. unlocked), and if so, store the
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65 // displaced header address in the object header - if it is not the same, get the
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66 // object header instead
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67 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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68 cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
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69 // if the object header was the same, we're done
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70 if (PrintBiasedLockingStatistics) {
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71 cond_inc32(Assembler::equal,
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72 ExternalAddress((address)BiasedLocking::fast_path_entry_count_addr()));
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73 }
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74 jcc(Assembler::equal, done);
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75 // if the object header was not the same, it is now in the hdr register
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76 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
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77 //
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78 // 1) (hdr & aligned_mask) == 0
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79 // 2) rsp <= hdr
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80 // 3) hdr <= rsp + page_size
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81 //
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82 // these 3 tests can be done by evaluating the following expression:
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83 //
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84 // (hdr - rsp) & (aligned_mask - page_size)
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85 //
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86 // assuming both the stack pointer and page_size have their least
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87 // significant 2 bits cleared and page_size is a power of 2
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88 subptr(hdr, rsp);
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89 andptr(hdr, aligned_mask - os::vm_page_size());
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90 // for recursive locking, the result is zero => save it in the displaced header
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91 // location (NULL in the displaced hdr location indicates recursive locking)
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92 movptr(Address(disp_hdr, 0), hdr);
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93 // otherwise we don't care about the result and handle locking via runtime call
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94 jcc(Assembler::notZero, slow_case);
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95 // done
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96 bind(done);
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97 return null_check_offset;
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98 }
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99
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100
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101 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
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102 const int aligned_mask = BytesPerWord -1;
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103 const int hdr_offset = oopDesc::mark_offset_in_bytes();
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104 assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
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105 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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106 Label done;
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107
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108 if (UseBiasedLocking) {
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109 // load object
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110 movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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111 biased_locking_exit(obj, hdr, done);
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112 }
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113
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114 // load displaced header
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115 movptr(hdr, Address(disp_hdr, 0));
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116 // if the loaded hdr is NULL we had recursive locking
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117 testptr(hdr, hdr);
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118 // if we had recursive locking, we are done
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119 jcc(Assembler::zero, done);
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120 if (!UseBiasedLocking) {
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121 // load object
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122 movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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123 }
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124 verify_oop(obj);
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125 // test if object header is pointing to the displaced header, and if so, restore
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126 // the displaced header in the object - if the object header is not pointing to
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127 // the displaced header, get the object header instead
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128 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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129 cmpxchgptr(hdr, Address(obj, hdr_offset));
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130 // if the object header was not pointing to the displaced header,
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131 // we do unlocking via runtime call
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132 jcc(Assembler::notEqual, slow_case);
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133 // done
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134 bind(done);
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135 }
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136
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137
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138 // Defines obj, preserves var_size_in_bytes
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139 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
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140 if (UseTLAB) {
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141 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
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142 } else {
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143 eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
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144 incr_allocated_bytes(noreg, var_size_in_bytes, con_size_in_bytes, t1);
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145 }
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146 }
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147
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148
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149 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
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150 assert_different_registers(obj, klass, len);
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151 if (UseBiasedLocking && !len->is_valid()) {
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152 assert_different_registers(obj, klass, len, t1, t2);
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153 movptr(t1, Address(klass, Klass::prototype_header_offset()));
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154 movptr(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
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155 } else {
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156 // This assumes that all prototype bits fit in an int32_t
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157 movptr(Address(obj, oopDesc::mark_offset_in_bytes ()), (int32_t)(intptr_t)markOopDesc::prototype());
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158 }
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159 #ifdef _LP64
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160 if (UseCompressedClassPointers) { // Take care not to kill klass
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161 movptr(t1, klass);
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162 encode_klass_not_null(t1);
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163 movl(Address(obj, oopDesc::klass_offset_in_bytes()), t1);
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164 } else
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165 #endif
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166 {
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167 movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
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168 }
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169
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170 if (len->is_valid()) {
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171 movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
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172 }
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173 #ifdef _LP64
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174 else if (UseCompressedClassPointers) {
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175 xorptr(t1, t1);
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176 store_klass_gap(obj, t1);
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177 }
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178 #endif
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179 }
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180
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181
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182 // preserves obj, destroys len_in_bytes
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183 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
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184 Label done;
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185 assert(obj != len_in_bytes && obj != t1 && t1 != len_in_bytes, "registers must be different");
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186 assert((hdr_size_in_bytes & (BytesPerWord - 1)) == 0, "header size is not a multiple of BytesPerWord");
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187 Register index = len_in_bytes;
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188 // index is positive and ptr sized
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189 subptr(index, hdr_size_in_bytes);
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190 jcc(Assembler::zero, done);
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191 // initialize topmost word, divide index by 2, check if odd and test if zero
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192 // note: for the remaining code to work, index must be a multiple of BytesPerWord
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193 #ifdef ASSERT
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194 { Label L;
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195 testptr(index, BytesPerWord - 1);
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196 jcc(Assembler::zero, L);
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197 stop("index is not a multiple of BytesPerWord");
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198 bind(L);
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199 }
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200 #endif
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201 xorptr(t1, t1); // use _zero reg to clear memory (shorter code)
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202 if (UseIncDec) {
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203 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
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204 } else {
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205 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
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206 shrptr(index, 1);
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207 }
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208 #ifndef _LP64
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209 // index could have been not a multiple of 8 (i.e., bit 2 was set)
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210 { Label even;
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211 // note: if index was a multiple of 8, than it cannot
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212 // be 0 now otherwise it must have been 0 before
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213 // => if it is even, we don't need to check for 0 again
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214 jcc(Assembler::carryClear, even);
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215 // clear topmost word (no jump needed if conditional assignment would work here)
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216 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 0*BytesPerWord), t1);
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217 // index could be 0 now, need to check again
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218 jcc(Assembler::zero, done);
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219 bind(even);
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220 }
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221 #endif // !_LP64
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222 // initialize remaining object fields: rdx is a multiple of 2 now
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223 { Label loop;
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224 bind(loop);
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225 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 1*BytesPerWord), t1);
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226 NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 2*BytesPerWord), t1);)
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227 decrement(index);
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228 jcc(Assembler::notZero, loop);
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229 }
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230
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231 // done
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232 bind(done);
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233 }
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234
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235
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236 void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
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237 assert(obj == rax, "obj must be in rax, for cmpxchg");
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238 assert_different_registers(obj, t1, t2); // XXX really?
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239 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
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240
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241 try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
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242
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243 initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2);
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244 }
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245
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246 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2) {
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247 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
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248 "con_size_in_bytes is not multiple of alignment");
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249 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
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250
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251 initialize_header(obj, klass, noreg, t1, t2);
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252
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253 // clear rest of allocated space
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254 const Register t1_zero = t1;
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255 const Register index = t2;
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256 const int threshold = 6 * BytesPerWord; // approximate break even point for code size (see comments below)
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257 if (var_size_in_bytes != noreg) {
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258 mov(index, var_size_in_bytes);
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259 initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
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260 } else if (con_size_in_bytes <= threshold) {
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261 // use explicit null stores
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262 // code size = 2 + 3*n bytes (n = number of fields to clear)
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263 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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264 for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
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265 movptr(Address(obj, i), t1_zero);
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266 } else if (con_size_in_bytes > hdr_size_in_bytes) {
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267 // use loop to null out the fields
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268 // code size = 16 bytes for even n (n = number of fields to clear)
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269 // initialize last object field first if odd number of fields
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270 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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271 movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
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272 // initialize last object field if constant size is odd
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273 if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
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274 movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
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275 // initialize remaining object fields: rdx is a multiple of 2
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276 { Label loop;
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277 bind(loop);
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278 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
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279 t1_zero);
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280 NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
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281 t1_zero);)
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282 decrement(index);
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283 jcc(Assembler::notZero, loop);
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284 }
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285 }
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286
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287 if (CURRENT_ENV->dtrace_alloc_probes()) {
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288 assert(obj == rax, "must be");
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289 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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290 }
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291
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292 verify_oop(obj);
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293 }
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294
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295 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int header_size, Address::ScaleFactor f, Register klass, Label& slow_case) {
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296 assert(obj == rax, "obj must be in rax, for cmpxchg");
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297 assert_different_registers(obj, len, t1, t2, klass);
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298
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299 // determine alignment mask
304
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300 assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
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301
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302 // check for negative or excessive length
304
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303 cmpptr(len, (int32_t)max_array_allocation_length);
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304 jcc(Assembler::above, slow_case);
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305
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306 const Register arr_size = t2; // okay to be the same
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307 // align object end
304
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308 movptr(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
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309 lea(arr_size, Address(arr_size, len, f));
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310 andptr(arr_size, ~MinObjAlignmentInBytesMask);
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311
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312 try_allocate(obj, arr_size, 0, t1, t2, slow_case);
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313
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314 initialize_header(obj, klass, len, t1, t2);
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315
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316 // clear rest of allocated space
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317 const Register len_zero = len;
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318 initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
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319
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320 if (CURRENT_ENV->dtrace_alloc_probes()) {
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321 assert(obj == rax, "must be");
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322 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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323 }
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324
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325 verify_oop(obj);
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326 }
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327
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328
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329
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330 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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331 verify_oop(receiver);
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332 // explicit NULL check not needed since load from [klass_offset] causes a trap
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333 // check against inline cache
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334 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
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335 int start_offset = offset();
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336
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337 if (UseCompressedClassPointers) {
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338 load_klass(rscratch1, receiver);
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339 cmpptr(rscratch1, iCache);
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340 } else {
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341 cmpptr(iCache, Address(receiver, oopDesc::klass_offset_in_bytes()));
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342 }
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343 // if icache check fails, then jump to runtime routine
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344 // Note: RECEIVER must still contain the receiver!
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345 jump_cc(Assembler::notEqual,
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346 RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
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347 const int ic_cmp_size = LP64_ONLY(10) NOT_LP64(9);
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348 assert(UseCompressedClassPointers || offset() - start_offset == ic_cmp_size, "check alignment in emit_method_entry");
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349 }
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350
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351
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352 void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes) {
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353 assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
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354 // Make sure there is enough stack space for this method's activation.
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355 // Note that we do this before doing an enter(). This matches the
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356 // ordering of C2's stack overflow check / rsp decrement and allows
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357 // the SharedRuntime stack overflow handling to be consistent
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358 // between the two compilers.
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359 generate_stack_overflow_check(bang_size_in_bytes);
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360
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361 push(rbp);
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362 #ifdef TIERED
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363 // c2 leaves fpu stack dirty. Clean it on entry
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364 if (UseSSE < 2 ) {
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365 empty_FPU_stack();
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366 }
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367 #endif // TIERED
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368 decrement(rsp, frame_size_in_bytes); // does not emit code for frame_size == 0
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369 }
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370
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371
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372 void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
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373 increment(rsp, frame_size_in_bytes); // Does not emit code for frame_size == 0
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374 pop(rbp);
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375 }
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376
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377
0
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378 void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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379 if (C1Breakpoint) int3();
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380 inline_cache_check(receiver, ic_klass);
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381 }
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382
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383
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384 void C1_MacroAssembler::verified_entry() {
4947
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385 if (C1Breakpoint || VerifyFPU || !UseStackBanging) {
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386 // Verified Entry first instruction should be 5 bytes long for correct
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387 // patching by patch_verified_entry().
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388 //
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389 // C1Breakpoint and VerifyFPU have one byte first instruction.
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390 // Also first instruction will be one byte "push(rbp)" if stack banging
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391 // code is not generated (see build_frame() above).
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392 // For all these cases generate long instruction first.
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393 fat_nop();
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394 }
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395 if (C1Breakpoint)int3();
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396 // build frame
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397 verify_FPU(0, "method_entry");
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398 }
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399
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400
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401 #ifndef PRODUCT
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402
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403 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
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404 if (!VerifyOops) return;
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405 verify_oop_addr(Address(rsp, stack_offset));
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406 }
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407
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408 void C1_MacroAssembler::verify_not_null_oop(Register r) {
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409 if (!VerifyOops) return;
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410 Label not_null;
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411 testptr(r, r);
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412 jcc(Assembler::notZero, not_null);
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413 stop("non-null oop required");
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414 bind(not_null);
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415 verify_oop(r);
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416 }
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417
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418 void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
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419 #ifdef ASSERT
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420 if (inv_rax) movptr(rax, 0xDEAD);
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421 if (inv_rbx) movptr(rbx, 0xDEAD);
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422 if (inv_rcx) movptr(rcx, 0xDEAD);
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423 if (inv_rdx) movptr(rdx, 0xDEAD);
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424 if (inv_rsi) movptr(rsi, 0xDEAD);
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425 if (inv_rdi) movptr(rdi, 0xDEAD);
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426 #endif
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427 }
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428
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429 #endif // ifndef PRODUCT