0
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1 /*
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2 * Copyright 2005-2006 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 # include "incls/_precompiled.incl"
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26 # include "incls/_c1_LIRGenerator_x86.cpp.incl"
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27
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28 #ifdef ASSERT
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29 #define __ gen()->lir(__FILE__, __LINE__)->
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30 #else
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31 #define __ gen()->lir()->
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32 #endif
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33
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34 // Item will be loaded into a byte register; Intel only
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35 void LIRItem::load_byte_item() {
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36 load_item();
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37 LIR_Opr res = result();
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38
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39 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
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40 // make sure that it is a byte register
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41 assert(!value()->type()->is_float() && !value()->type()->is_double(),
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42 "can't load floats in byte register");
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43 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
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44 __ move(res, reg);
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45
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46 _result = reg;
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47 }
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48 }
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49
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50
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51 void LIRItem::load_nonconstant() {
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52 LIR_Opr r = value()->operand();
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53 if (r->is_constant()) {
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54 _result = r;
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55 } else {
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56 load_item();
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57 }
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58 }
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59
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60 //--------------------------------------------------------------
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61 // LIRGenerator
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62 //--------------------------------------------------------------
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63
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64
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65 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
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66 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
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67 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
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68 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
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69 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
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70 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
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71 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
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72 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
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73
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74
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75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
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76 LIR_Opr opr;
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77 switch (type->tag()) {
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78 case intTag: opr = FrameMap::rax_opr; break;
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79 case objectTag: opr = FrameMap::rax_oop_opr; break;
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80 case longTag: opr = FrameMap::rax_rdx_long_opr; break;
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81 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
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82 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
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83
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84 case addressTag:
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85 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
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86 }
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87
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88 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
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89 return opr;
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90 }
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91
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92
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93 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
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94 LIR_Opr reg = new_register(T_INT);
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95 set_vreg_flag(reg, LIRGenerator::byte_reg);
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96 return reg;
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97 }
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98
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99
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100 //--------- loading items into registers --------------------------------
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101
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102
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103 // i486 instructions can inline constants
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104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
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105 if (type == T_SHORT || type == T_CHAR) {
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106 // there is no immediate move of word values in asembler_i486.?pp
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107 return false;
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108 }
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109 Constant* c = v->as_Constant();
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110 if (c && c->state() == NULL) {
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111 // constants of any type can be stored directly, except for
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112 // unloaded object constants.
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113 return true;
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114 }
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115 return false;
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116 }
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117
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118
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119 bool LIRGenerator::can_inline_as_constant(Value v) const {
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120 return v->type()->tag() != objectTag ||
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121 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
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122 }
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123
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124
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125 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
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126 return c->type() != T_OBJECT || c->as_jobject() == NULL;
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127 }
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128
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129
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130 LIR_Opr LIRGenerator::safepoint_poll_register() {
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131 return LIR_OprFact::illegalOpr;
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132 }
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133
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134
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135 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
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136 int shift, int disp, BasicType type) {
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137 assert(base->is_register(), "must be");
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138 if (index->is_constant()) {
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139 return new LIR_Address(base,
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140 (index->as_constant_ptr()->as_jint() << shift) + disp,
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141 type);
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142 } else {
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143 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
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144 }
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145 }
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146
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147
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148 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
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149 BasicType type, bool needs_card_mark) {
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150 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
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151
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152 LIR_Address* addr;
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153 if (index_opr->is_constant()) {
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154 int elem_size = type2aelembytes[type];
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155 addr = new LIR_Address(array_opr,
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156 offset_in_bytes + index_opr->as_jint() * elem_size, type);
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157 } else {
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158 addr = new LIR_Address(array_opr,
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159 index_opr,
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160 LIR_Address::scale(type),
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161 offset_in_bytes, type);
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162 }
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163 if (needs_card_mark) {
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164 // This store will need a precise card mark, so go ahead and
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165 // compute the full adddres instead of computing once for the
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166 // store and again for the card mark.
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167 LIR_Opr tmp = new_register(T_INT);
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168 __ leal(LIR_OprFact::address(addr), tmp);
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169 return new LIR_Address(tmp, 0, type);
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170 } else {
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171 return addr;
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172 }
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173 }
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174
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175
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176 void LIRGenerator::increment_counter(address counter, int step) {
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177 LIR_Opr temp = new_register(T_INT);
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178 LIR_Opr pointer = new_register(T_INT);
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179 __ move(LIR_OprFact::intConst((int)counter), pointer);
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180 LIR_Address* addr = new LIR_Address(pointer, 0, T_INT);
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181 increment_counter(addr, step);
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182 }
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183
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184
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185 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
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186 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
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187 }
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188
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189
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190 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
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191 __ cmp_mem_int(condition, base, disp, c, info);
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192 }
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193
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194
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195 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
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196 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
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197 }
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198
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199
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200 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
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201 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
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202 }
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203
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204
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205 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
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206 if (tmp->is_valid()) {
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207 if (is_power_of_2(c + 1)) {
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208 __ move(left, tmp);
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209 __ shift_left(left, log2_intptr(c + 1), left);
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210 __ sub(left, tmp, result);
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211 return true;
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212 } else if (is_power_of_2(c - 1)) {
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213 __ move(left, tmp);
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214 __ shift_left(left, log2_intptr(c - 1), left);
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215 __ add(left, tmp, result);
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216 return true;
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217 }
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218 }
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219 return false;
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220 }
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221
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222
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223 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
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224 BasicType type = item->type();
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225 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
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226 }
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227
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228 //----------------------------------------------------------------------
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229 // visitor functions
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230 //----------------------------------------------------------------------
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231
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232
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233 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
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234 assert(x->is_root(),"");
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235 bool needs_range_check = true;
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236 bool use_length = x->length() != NULL;
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237 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
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238 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
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239 !get_jobject_constant(x->value())->is_null_object());
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240
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241 LIRItem array(x->array(), this);
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242 LIRItem index(x->index(), this);
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243 LIRItem value(x->value(), this);
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244 LIRItem length(this);
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245
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246 array.load_item();
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247 index.load_nonconstant();
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248
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249 if (use_length) {
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250 needs_range_check = x->compute_needs_range_check();
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251 if (needs_range_check) {
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252 length.set_instruction(x->length());
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253 length.load_item();
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254 }
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255 }
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256 if (needs_store_check) {
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257 value.load_item();
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258 } else {
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259 value.load_for_store(x->elt_type());
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260 }
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261
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262 set_no_result(x);
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263
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264 // the CodeEmitInfo must be duplicated for each different
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265 // LIR-instruction because spilling can occur anywhere between two
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266 // instructions and so the debug information must be different
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267 CodeEmitInfo* range_check_info = state_for(x);
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268 CodeEmitInfo* null_check_info = NULL;
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269 if (x->needs_null_check()) {
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270 null_check_info = new CodeEmitInfo(range_check_info);
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271 }
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272
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273 // emit array address setup early so it schedules better
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274 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
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275
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276 if (GenerateRangeChecks && needs_range_check) {
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277 if (use_length) {
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278 __ cmp(lir_cond_belowEqual, length.result(), index.result());
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279 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
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280 } else {
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281 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
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282 // range_check also does the null check
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283 null_check_info = NULL;
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284 }
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285 }
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286
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287 if (GenerateArrayStoreCheck && needs_store_check) {
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288 LIR_Opr tmp1 = new_register(objectType);
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289 LIR_Opr tmp2 = new_register(objectType);
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290 LIR_Opr tmp3 = new_register(objectType);
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291
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292 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
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293 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
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294 }
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295
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296 if (obj_store) {
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297 __ move(value.result(), array_addr, null_check_info);
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298 // Seems to be a precise
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299 post_barrier(LIR_OprFact::address(array_addr), value.result());
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300 } else {
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301 __ move(value.result(), array_addr, null_check_info);
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302 }
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303 }
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304
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305
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306 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
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307 assert(x->is_root(),"");
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308 LIRItem obj(x->obj(), this);
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309 obj.load_item();
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310
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311 set_no_result(x);
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312
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313 // "lock" stores the address of the monitor stack slot, so this is not an oop
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314 LIR_Opr lock = new_register(T_INT);
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315 // Need a scratch register for biased locking on x86
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316 LIR_Opr scratch = LIR_OprFact::illegalOpr;
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317 if (UseBiasedLocking) {
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318 scratch = new_register(T_INT);
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319 }
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320
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321 CodeEmitInfo* info_for_exception = NULL;
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322 if (x->needs_null_check()) {
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323 info_for_exception = state_for(x, x->lock_stack_before());
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324 }
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325 // this CodeEmitInfo must not have the xhandlers because here the
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326 // object is already locked (xhandlers expect object to be unlocked)
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327 CodeEmitInfo* info = state_for(x, x->state(), true);
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328 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
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329 x->monitor_no(), info_for_exception, info);
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330 }
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331
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332
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333 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
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334 assert(x->is_root(),"");
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335
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336 LIRItem obj(x->obj(), this);
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337 obj.dont_load_item();
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338
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339 LIR_Opr lock = new_register(T_INT);
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340 LIR_Opr obj_temp = new_register(T_INT);
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341 set_no_result(x);
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342 monitor_exit(obj_temp, lock, syncTempOpr(), x->monitor_no());
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343 }
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344
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345
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346 // _ineg, _lneg, _fneg, _dneg
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347 void LIRGenerator::do_NegateOp(NegateOp* x) {
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348 LIRItem value(x->x(), this);
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349 value.set_destroys_register();
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350 value.load_item();
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351 LIR_Opr reg = rlock(x);
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352 __ negate(value.result(), reg);
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353
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354 set_result(x, round_item(reg));
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355 }
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356
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357
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358 // for _fadd, _fmul, _fsub, _fdiv, _frem
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359 // _dadd, _dmul, _dsub, _ddiv, _drem
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360 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
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361 LIRItem left(x->x(), this);
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362 LIRItem right(x->y(), this);
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363 LIRItem* left_arg = &left;
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364 LIRItem* right_arg = &right;
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365 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
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366 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
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367 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
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368 left.load_item();
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369 } else {
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370 left.dont_load_item();
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371 }
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372
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373 // do not load right operand if it is a constant. only 0 and 1 are
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374 // loaded because there are special instructions for loading them
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375 // without memory access (not needed for SSE2 instructions)
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376 bool must_load_right = false;
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377 if (right.is_constant()) {
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378 LIR_Const* c = right.result()->as_constant_ptr();
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379 assert(c != NULL, "invalid constant");
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380 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
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381
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382 if (c->type() == T_FLOAT) {
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383 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
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384 } else {
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385 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
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386 }
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387 }
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388
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389 if (must_load_both) {
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390 // frem and drem destroy also right operand, so move it to a new register
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391 right.set_destroys_register();
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392 right.load_item();
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393 } else if (right.is_register() || must_load_right) {
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394 right.load_item();
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395 } else {
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396 right.dont_load_item();
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397 }
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398 LIR_Opr reg = rlock(x);
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399 LIR_Opr tmp = LIR_OprFact::illegalOpr;
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400 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
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401 tmp = new_register(T_DOUBLE);
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402 }
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403
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404 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
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405 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
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406 LIR_Opr fpu0, fpu1;
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407 if (x->op() == Bytecodes::_frem) {
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408 fpu0 = LIR_OprFact::single_fpu(0);
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409 fpu1 = LIR_OprFact::single_fpu(1);
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410 } else {
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411 fpu0 = LIR_OprFact::double_fpu(0);
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412 fpu1 = LIR_OprFact::double_fpu(1);
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413 }
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414 __ move(right.result(), fpu1); // order of left and right operand is important!
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415 __ move(left.result(), fpu0);
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416 __ rem (fpu0, fpu1, fpu0);
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417 __ move(fpu0, reg);
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418
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419 } else {
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420 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
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421 }
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422
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423 set_result(x, round_item(reg));
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424 }
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425
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426
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427 // for _ladd, _lmul, _lsub, _ldiv, _lrem
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428 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
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429 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
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430 // long division is implemented as a direct call into the runtime
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431 LIRItem left(x->x(), this);
|
|
432 LIRItem right(x->y(), this);
|
|
433
|
|
434 // the check for division by zero destroys the right operand
|
|
435 right.set_destroys_register();
|
|
436
|
|
437 BasicTypeList signature(2);
|
|
438 signature.append(T_LONG);
|
|
439 signature.append(T_LONG);
|
|
440 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
|
|
441
|
|
442 // check for division by zero (destroys registers of right operand!)
|
|
443 CodeEmitInfo* info = state_for(x);
|
|
444
|
|
445 const LIR_Opr result_reg = result_register_for(x->type());
|
|
446 left.load_item_force(cc->at(1));
|
|
447 right.load_item();
|
|
448
|
|
449 __ move(right.result(), cc->at(0));
|
|
450
|
|
451 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
|
|
452 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
|
|
453
|
|
454 address entry;
|
|
455 switch (x->op()) {
|
|
456 case Bytecodes::_lrem:
|
|
457 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
|
|
458 break; // check if dividend is 0 is done elsewhere
|
|
459 case Bytecodes::_ldiv:
|
|
460 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
|
|
461 break; // check if dividend is 0 is done elsewhere
|
|
462 case Bytecodes::_lmul:
|
|
463 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
|
|
464 break;
|
|
465 default:
|
|
466 ShouldNotReachHere();
|
|
467 }
|
|
468
|
|
469 LIR_Opr result = rlock_result(x);
|
|
470 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
|
|
471 __ move(result_reg, result);
|
|
472 } else if (x->op() == Bytecodes::_lmul) {
|
|
473 // missing test if instr is commutative and if we should swap
|
|
474 LIRItem left(x->x(), this);
|
|
475 LIRItem right(x->y(), this);
|
|
476
|
|
477 // right register is destroyed by the long mul, so it must be
|
|
478 // copied to a new register.
|
|
479 right.set_destroys_register();
|
|
480
|
|
481 left.load_item();
|
|
482 right.load_item();
|
|
483
|
|
484 LIR_Opr reg = FrameMap::rax_rdx_long_opr;
|
|
485 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
|
|
486 LIR_Opr result = rlock_result(x);
|
|
487 __ move(reg, result);
|
|
488 } else {
|
|
489 // missing test if instr is commutative and if we should swap
|
|
490 LIRItem left(x->x(), this);
|
|
491 LIRItem right(x->y(), this);
|
|
492
|
|
493 left.load_item();
|
|
494 // dont load constants to save register
|
|
495 right.load_nonconstant();
|
|
496 rlock_result(x);
|
|
497 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
|
|
498 }
|
|
499 }
|
|
500
|
|
501
|
|
502
|
|
503 // for: _iadd, _imul, _isub, _idiv, _irem
|
|
504 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
|
|
505 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
|
|
506 // The requirements for division and modulo
|
|
507 // input : rax,: dividend min_int
|
|
508 // reg: divisor (may not be rax,/rdx) -1
|
|
509 //
|
|
510 // output: rax,: quotient (= rax, idiv reg) min_int
|
|
511 // rdx: remainder (= rax, irem reg) 0
|
|
512
|
|
513 // rax, and rdx will be destroyed
|
|
514
|
|
515 // Note: does this invalidate the spec ???
|
|
516 LIRItem right(x->y(), this);
|
|
517 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
|
|
518
|
|
519 // call state_for before load_item_force because state_for may
|
|
520 // force the evaluation of other instructions that are needed for
|
|
521 // correct debug info. Otherwise the live range of the fix
|
|
522 // register might be too long.
|
|
523 CodeEmitInfo* info = state_for(x);
|
|
524
|
|
525 left.load_item_force(divInOpr());
|
|
526
|
|
527 right.load_item();
|
|
528
|
|
529 LIR_Opr result = rlock_result(x);
|
|
530 LIR_Opr result_reg;
|
|
531 if (x->op() == Bytecodes::_idiv) {
|
|
532 result_reg = divOutOpr();
|
|
533 } else {
|
|
534 result_reg = remOutOpr();
|
|
535 }
|
|
536
|
|
537 if (!ImplicitDiv0Checks) {
|
|
538 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
|
|
539 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
|
|
540 }
|
|
541 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
|
|
542 if (x->op() == Bytecodes::_irem) {
|
|
543 __ irem(left.result(), right.result(), result_reg, tmp, info);
|
|
544 } else if (x->op() == Bytecodes::_idiv) {
|
|
545 __ idiv(left.result(), right.result(), result_reg, tmp, info);
|
|
546 } else {
|
|
547 ShouldNotReachHere();
|
|
548 }
|
|
549
|
|
550 __ move(result_reg, result);
|
|
551 } else {
|
|
552 // missing test if instr is commutative and if we should swap
|
|
553 LIRItem left(x->x(), this);
|
|
554 LIRItem right(x->y(), this);
|
|
555 LIRItem* left_arg = &left;
|
|
556 LIRItem* right_arg = &right;
|
|
557 if (x->is_commutative() && left.is_stack() && right.is_register()) {
|
|
558 // swap them if left is real stack (or cached) and right is real register(not cached)
|
|
559 left_arg = &right;
|
|
560 right_arg = &left;
|
|
561 }
|
|
562
|
|
563 left_arg->load_item();
|
|
564
|
|
565 // do not need to load right, as we can handle stack and constants
|
|
566 if (x->op() == Bytecodes::_imul ) {
|
|
567 // check if we can use shift instead
|
|
568 bool use_constant = false;
|
|
569 bool use_tmp = false;
|
|
570 if (right_arg->is_constant()) {
|
|
571 int iconst = right_arg->get_jint_constant();
|
|
572 if (iconst > 0) {
|
|
573 if (is_power_of_2(iconst)) {
|
|
574 use_constant = true;
|
|
575 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
|
|
576 use_constant = true;
|
|
577 use_tmp = true;
|
|
578 }
|
|
579 }
|
|
580 }
|
|
581 if (use_constant) {
|
|
582 right_arg->dont_load_item();
|
|
583 } else {
|
|
584 right_arg->load_item();
|
|
585 }
|
|
586 LIR_Opr tmp = LIR_OprFact::illegalOpr;
|
|
587 if (use_tmp) {
|
|
588 tmp = new_register(T_INT);
|
|
589 }
|
|
590 rlock_result(x);
|
|
591
|
|
592 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
|
|
593 } else {
|
|
594 right_arg->dont_load_item();
|
|
595 rlock_result(x);
|
|
596 LIR_Opr tmp = LIR_OprFact::illegalOpr;
|
|
597 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
|
|
598 }
|
|
599 }
|
|
600 }
|
|
601
|
|
602
|
|
603 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
|
|
604 // when an operand with use count 1 is the left operand, then it is
|
|
605 // likely that no move for 2-operand-LIR-form is necessary
|
|
606 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
|
|
607 x->swap_operands();
|
|
608 }
|
|
609
|
|
610 ValueTag tag = x->type()->tag();
|
|
611 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
|
|
612 switch (tag) {
|
|
613 case floatTag:
|
|
614 case doubleTag: do_ArithmeticOp_FPU(x); return;
|
|
615 case longTag: do_ArithmeticOp_Long(x); return;
|
|
616 case intTag: do_ArithmeticOp_Int(x); return;
|
|
617 }
|
|
618 ShouldNotReachHere();
|
|
619 }
|
|
620
|
|
621
|
|
622 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
|
|
623 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
|
|
624 // count must always be in rcx
|
|
625 LIRItem value(x->x(), this);
|
|
626 LIRItem count(x->y(), this);
|
|
627
|
|
628 ValueTag elemType = x->type()->tag();
|
|
629 bool must_load_count = !count.is_constant() || elemType == longTag;
|
|
630 if (must_load_count) {
|
|
631 // count for long must be in register
|
|
632 count.load_item_force(shiftCountOpr());
|
|
633 } else {
|
|
634 count.dont_load_item();
|
|
635 }
|
|
636 value.load_item();
|
|
637 LIR_Opr reg = rlock_result(x);
|
|
638
|
|
639 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
|
|
640 }
|
|
641
|
|
642
|
|
643 // _iand, _land, _ior, _lor, _ixor, _lxor
|
|
644 void LIRGenerator::do_LogicOp(LogicOp* x) {
|
|
645 // when an operand with use count 1 is the left operand, then it is
|
|
646 // likely that no move for 2-operand-LIR-form is necessary
|
|
647 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
|
|
648 x->swap_operands();
|
|
649 }
|
|
650
|
|
651 LIRItem left(x->x(), this);
|
|
652 LIRItem right(x->y(), this);
|
|
653
|
|
654 left.load_item();
|
|
655 right.load_nonconstant();
|
|
656 LIR_Opr reg = rlock_result(x);
|
|
657
|
|
658 logic_op(x->op(), reg, left.result(), right.result());
|
|
659 }
|
|
660
|
|
661
|
|
662
|
|
663 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
|
|
664 void LIRGenerator::do_CompareOp(CompareOp* x) {
|
|
665 LIRItem left(x->x(), this);
|
|
666 LIRItem right(x->y(), this);
|
|
667 ValueTag tag = x->x()->type()->tag();
|
|
668 if (tag == longTag) {
|
|
669 left.set_destroys_register();
|
|
670 }
|
|
671 left.load_item();
|
|
672 right.load_item();
|
|
673 LIR_Opr reg = rlock_result(x);
|
|
674
|
|
675 if (x->x()->type()->is_float_kind()) {
|
|
676 Bytecodes::Code code = x->op();
|
|
677 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
|
|
678 } else if (x->x()->type()->tag() == longTag) {
|
|
679 __ lcmp2int(left.result(), right.result(), reg);
|
|
680 } else {
|
|
681 Unimplemented();
|
|
682 }
|
|
683 }
|
|
684
|
|
685
|
|
686 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
|
|
687 assert(x->number_of_arguments() == 3, "wrong type");
|
|
688 LIRItem obj (x->argument_at(0), this); // AtomicLong object
|
|
689 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field
|
|
690 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value
|
|
691
|
|
692 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
|
|
693 cmp_value.load_item_force(FrameMap::rax_rdx_long_opr);
|
|
694
|
|
695 // new value must be in rcx,ebx (hi,lo)
|
|
696 new_value.load_item_force(FrameMap::rbx_rcx_long_opr);
|
|
697
|
|
698 // object pointer register is overwritten with field address
|
|
699 obj.load_item();
|
|
700
|
|
701 // generate compare-and-swap; produces zero condition if swap occurs
|
|
702 int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
|
|
703 LIR_Opr addr = obj.result();
|
|
704 __ add(addr, LIR_OprFact::intConst(value_offset), addr);
|
|
705 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed
|
|
706 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed
|
|
707 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
|
|
708
|
|
709 // generate conditional move of boolean result
|
|
710 LIR_Opr result = rlock_result(x);
|
|
711 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
|
|
712 }
|
|
713
|
|
714
|
|
715 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
|
|
716 assert(x->number_of_arguments() == 4, "wrong type");
|
|
717 LIRItem obj (x->argument_at(0), this); // object
|
|
718 LIRItem offset(x->argument_at(1), this); // offset of field
|
|
719 LIRItem cmp (x->argument_at(2), this); // value to compare with field
|
|
720 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
|
|
721
|
|
722 assert(obj.type()->tag() == objectTag, "invalid type");
|
|
723 assert(offset.type()->tag() == intTag, "invalid type");
|
|
724 assert(cmp.type()->tag() == type->tag(), "invalid type");
|
|
725 assert(val.type()->tag() == type->tag(), "invalid type");
|
|
726
|
|
727 // get address of field
|
|
728 obj.load_item();
|
|
729 offset.load_nonconstant();
|
|
730
|
|
731 if (type == objectType) {
|
|
732 cmp.load_item_force(FrameMap::rax_oop_opr);
|
|
733 val.load_item();
|
|
734 } else if (type == intType) {
|
|
735 cmp.load_item_force(FrameMap::rax_opr);
|
|
736 val.load_item();
|
|
737 } else if (type == longType) {
|
|
738 cmp.load_item_force(FrameMap::rax_rdx_long_opr);
|
|
739 val.load_item_force(FrameMap::rbx_rcx_long_opr);
|
|
740 } else {
|
|
741 ShouldNotReachHere();
|
|
742 }
|
|
743
|
|
744 LIR_Opr addr = new_pointer_register();
|
|
745 __ move(obj.result(), addr);
|
|
746 __ add(addr, offset.result(), addr);
|
|
747
|
|
748
|
|
749
|
|
750 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
|
|
751 if (type == objectType)
|
|
752 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
|
|
753 else if (type == intType)
|
|
754 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
|
|
755 else if (type == longType)
|
|
756 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
|
|
757 else {
|
|
758 ShouldNotReachHere();
|
|
759 }
|
|
760
|
|
761 // generate conditional move of boolean result
|
|
762 LIR_Opr result = rlock_result(x);
|
|
763 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
|
|
764 if (type == objectType) { // Write-barrier needed for Object fields.
|
|
765 // Seems to be precise
|
|
766 post_barrier(addr, val.result());
|
|
767 }
|
|
768 }
|
|
769
|
|
770
|
|
771 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
|
|
772 assert(x->number_of_arguments() == 1, "wrong type");
|
|
773 LIRItem value(x->argument_at(0), this);
|
|
774
|
|
775 bool use_fpu = false;
|
|
776 if (UseSSE >= 2) {
|
|
777 switch(x->id()) {
|
|
778 case vmIntrinsics::_dsin:
|
|
779 case vmIntrinsics::_dcos:
|
|
780 case vmIntrinsics::_dtan:
|
|
781 case vmIntrinsics::_dlog:
|
|
782 case vmIntrinsics::_dlog10:
|
|
783 use_fpu = true;
|
|
784 }
|
|
785 } else {
|
|
786 value.set_destroys_register();
|
|
787 }
|
|
788
|
|
789 value.load_item();
|
|
790
|
|
791 LIR_Opr calc_input = value.result();
|
|
792 LIR_Opr calc_result = rlock_result(x);
|
|
793
|
|
794 // sin and cos need two free fpu stack slots, so register two temporary operands
|
|
795 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
|
|
796 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
|
|
797
|
|
798 if (use_fpu) {
|
|
799 LIR_Opr tmp = FrameMap::fpu0_double_opr;
|
|
800 __ move(calc_input, tmp);
|
|
801
|
|
802 calc_input = tmp;
|
|
803 calc_result = tmp;
|
|
804 tmp1 = FrameMap::caller_save_fpu_reg_at(1);
|
|
805 tmp2 = FrameMap::caller_save_fpu_reg_at(2);
|
|
806 }
|
|
807
|
|
808 switch(x->id()) {
|
|
809 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
|
|
810 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
|
|
811 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break;
|
|
812 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break;
|
|
813 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break;
|
|
814 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
|
|
815 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, LIR_OprFact::illegalOpr); break;
|
|
816 default: ShouldNotReachHere();
|
|
817 }
|
|
818
|
|
819 if (use_fpu) {
|
|
820 __ move(calc_result, x->operand());
|
|
821 }
|
|
822 }
|
|
823
|
|
824
|
|
825 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
|
|
826 assert(x->number_of_arguments() == 5, "wrong type");
|
|
827 LIRItem src(x->argument_at(0), this);
|
|
828 LIRItem src_pos(x->argument_at(1), this);
|
|
829 LIRItem dst(x->argument_at(2), this);
|
|
830 LIRItem dst_pos(x->argument_at(3), this);
|
|
831 LIRItem length(x->argument_at(4), this);
|
|
832
|
|
833 // operands for arraycopy must use fixed registers, otherwise
|
|
834 // LinearScan will fail allocation (because arraycopy always needs a
|
|
835 // call)
|
|
836 src.load_item_force (FrameMap::rcx_oop_opr);
|
|
837 src_pos.load_item_force (FrameMap::rdx_opr);
|
|
838 dst.load_item_force (FrameMap::rax_oop_opr);
|
|
839 dst_pos.load_item_force (FrameMap::rbx_opr);
|
|
840 length.load_item_force (FrameMap::rdi_opr);
|
|
841 LIR_Opr tmp = (FrameMap::rsi_opr);
|
|
842 set_no_result(x);
|
|
843
|
|
844 int flags;
|
|
845 ciArrayKlass* expected_type;
|
|
846 arraycopy_helper(x, &flags, &expected_type);
|
|
847
|
|
848 CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?)
|
|
849 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
|
|
850 }
|
|
851
|
|
852
|
|
853 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
|
|
854 // _i2b, _i2c, _i2s
|
|
855 LIR_Opr fixed_register_for(BasicType type) {
|
|
856 switch (type) {
|
|
857 case T_FLOAT: return FrameMap::fpu0_float_opr;
|
|
858 case T_DOUBLE: return FrameMap::fpu0_double_opr;
|
|
859 case T_INT: return FrameMap::rax_opr;
|
|
860 case T_LONG: return FrameMap::rax_rdx_long_opr;
|
|
861 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
|
|
862 }
|
|
863 }
|
|
864
|
|
865 void LIRGenerator::do_Convert(Convert* x) {
|
|
866 // flags that vary for the different operations and different SSE-settings
|
|
867 bool fixed_input, fixed_result, round_result, needs_stub;
|
|
868
|
|
869 switch (x->op()) {
|
|
870 case Bytecodes::_i2l: // fall through
|
|
871 case Bytecodes::_l2i: // fall through
|
|
872 case Bytecodes::_i2b: // fall through
|
|
873 case Bytecodes::_i2c: // fall through
|
|
874 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
|
|
875
|
|
876 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
|
|
877 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
|
|
878 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
|
|
879 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
|
|
880 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
|
|
881 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
|
|
882 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
|
|
883 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
|
|
884 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
|
|
885 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
|
|
886 default: ShouldNotReachHere();
|
|
887 }
|
|
888
|
|
889 LIRItem value(x->value(), this);
|
|
890 value.load_item();
|
|
891 LIR_Opr input = value.result();
|
|
892 LIR_Opr result = rlock(x);
|
|
893
|
|
894 // arguments of lir_convert
|
|
895 LIR_Opr conv_input = input;
|
|
896 LIR_Opr conv_result = result;
|
|
897 ConversionStub* stub = NULL;
|
|
898
|
|
899 if (fixed_input) {
|
|
900 conv_input = fixed_register_for(input->type());
|
|
901 __ move(input, conv_input);
|
|
902 }
|
|
903
|
|
904 assert(fixed_result == false || round_result == false, "cannot set both");
|
|
905 if (fixed_result) {
|
|
906 conv_result = fixed_register_for(result->type());
|
|
907 } else if (round_result) {
|
|
908 result = new_register(result->type());
|
|
909 set_vreg_flag(result, must_start_in_memory);
|
|
910 }
|
|
911
|
|
912 if (needs_stub) {
|
|
913 stub = new ConversionStub(x->op(), conv_input, conv_result);
|
|
914 }
|
|
915
|
|
916 __ convert(x->op(), conv_input, conv_result, stub);
|
|
917
|
|
918 if (result != conv_result) {
|
|
919 __ move(conv_result, result);
|
|
920 }
|
|
921
|
|
922 assert(result->is_virtual(), "result must be virtual register");
|
|
923 set_result(x, result);
|
|
924 }
|
|
925
|
|
926
|
|
927 void LIRGenerator::do_NewInstance(NewInstance* x) {
|
|
928 if (PrintNotLoaded && !x->klass()->is_loaded()) {
|
|
929 tty->print_cr(" ###class not loaded at new bci %d", x->bci());
|
|
930 }
|
|
931 CodeEmitInfo* info = state_for(x, x->state());
|
|
932 LIR_Opr reg = result_register_for(x->type());
|
|
933 LIR_Opr klass_reg = new_register(objectType);
|
|
934 new_instance(reg, x->klass(),
|
|
935 FrameMap::rcx_oop_opr,
|
|
936 FrameMap::rdi_oop_opr,
|
|
937 FrameMap::rsi_oop_opr,
|
|
938 LIR_OprFact::illegalOpr,
|
|
939 FrameMap::rdx_oop_opr, info);
|
|
940 LIR_Opr result = rlock_result(x);
|
|
941 __ move(reg, result);
|
|
942 }
|
|
943
|
|
944
|
|
945 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
|
|
946 CodeEmitInfo* info = state_for(x, x->state());
|
|
947
|
|
948 LIRItem length(x->length(), this);
|
|
949 length.load_item_force(FrameMap::rbx_opr);
|
|
950
|
|
951 LIR_Opr reg = result_register_for(x->type());
|
|
952 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
|
|
953 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
|
|
954 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
|
|
955 LIR_Opr tmp4 = reg;
|
|
956 LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
|
|
957 LIR_Opr len = length.result();
|
|
958 BasicType elem_type = x->elt_type();
|
|
959
|
|
960 __ oop2reg(ciTypeArrayKlass::make(elem_type)->encoding(), klass_reg);
|
|
961
|
|
962 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
|
|
963 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
|
|
964
|
|
965 LIR_Opr result = rlock_result(x);
|
|
966 __ move(reg, result);
|
|
967 }
|
|
968
|
|
969
|
|
970 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
|
|
971 LIRItem length(x->length(), this);
|
|
972 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
|
|
973 // and therefore provide the state before the parameters have been consumed
|
|
974 CodeEmitInfo* patching_info = NULL;
|
|
975 if (!x->klass()->is_loaded() || PatchALot) {
|
|
976 patching_info = state_for(x, x->state_before());
|
|
977 }
|
|
978
|
|
979 CodeEmitInfo* info = state_for(x, x->state());
|
|
980
|
|
981 const LIR_Opr reg = result_register_for(x->type());
|
|
982 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
|
|
983 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
|
|
984 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
|
|
985 LIR_Opr tmp4 = reg;
|
|
986 LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
|
|
987
|
|
988 length.load_item_force(FrameMap::rbx_opr);
|
|
989 LIR_Opr len = length.result();
|
|
990
|
|
991 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
|
|
992 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
|
|
993 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
|
|
994 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
|
|
995 }
|
|
996 jobject2reg_with_patching(klass_reg, obj, patching_info);
|
|
997 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
|
|
998
|
|
999 LIR_Opr result = rlock_result(x);
|
|
1000 __ move(reg, result);
|
|
1001 }
|
|
1002
|
|
1003
|
|
1004 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
|
|
1005 Values* dims = x->dims();
|
|
1006 int i = dims->length();
|
|
1007 LIRItemList* items = new LIRItemList(dims->length(), NULL);
|
|
1008 while (i-- > 0) {
|
|
1009 LIRItem* size = new LIRItem(dims->at(i), this);
|
|
1010 items->at_put(i, size);
|
|
1011 }
|
|
1012
|
|
1013 // need to get the info before, as the items may become invalid through item_free
|
|
1014 CodeEmitInfo* patching_info = NULL;
|
|
1015 if (!x->klass()->is_loaded() || PatchALot) {
|
|
1016 patching_info = state_for(x, x->state_before());
|
|
1017
|
|
1018 // cannot re-use same xhandlers for multiple CodeEmitInfos, so
|
|
1019 // clone all handlers.
|
|
1020 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
|
|
1021 }
|
|
1022
|
|
1023 CodeEmitInfo* info = state_for(x, x->state());
|
|
1024
|
|
1025 i = dims->length();
|
|
1026 while (i-- > 0) {
|
|
1027 LIRItem* size = items->at(i);
|
|
1028 size->load_nonconstant();
|
|
1029
|
|
1030 store_stack_parameter(size->result(), in_ByteSize(i*4));
|
|
1031 }
|
|
1032
|
|
1033 LIR_Opr reg = result_register_for(x->type());
|
|
1034 jobject2reg_with_patching(reg, x->klass(), patching_info);
|
|
1035
|
|
1036 LIR_Opr rank = FrameMap::rbx_opr;
|
|
1037 __ move(LIR_OprFact::intConst(x->rank()), rank);
|
|
1038 LIR_Opr varargs = FrameMap::rcx_opr;
|
|
1039 __ move(FrameMap::rsp_opr, varargs);
|
|
1040 LIR_OprList* args = new LIR_OprList(3);
|
|
1041 args->append(reg);
|
|
1042 args->append(rank);
|
|
1043 args->append(varargs);
|
|
1044 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
|
|
1045 LIR_OprFact::illegalOpr,
|
|
1046 reg, args, info);
|
|
1047
|
|
1048 LIR_Opr result = rlock_result(x);
|
|
1049 __ move(reg, result);
|
|
1050 }
|
|
1051
|
|
1052
|
|
1053 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
|
|
1054 // nothing to do for now
|
|
1055 }
|
|
1056
|
|
1057
|
|
1058 void LIRGenerator::do_CheckCast(CheckCast* x) {
|
|
1059 LIRItem obj(x->obj(), this);
|
|
1060
|
|
1061 CodeEmitInfo* patching_info = NULL;
|
|
1062 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
|
|
1063 // must do this before locking the destination register as an oop register,
|
|
1064 // and before the obj is loaded (the latter is for deoptimization)
|
|
1065 patching_info = state_for(x, x->state_before());
|
|
1066 }
|
|
1067 obj.load_item();
|
|
1068
|
|
1069 // info for exceptions
|
|
1070 CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks());
|
|
1071
|
|
1072 CodeStub* stub;
|
|
1073 if (x->is_incompatible_class_change_check()) {
|
|
1074 assert(patching_info == NULL, "can't patch this");
|
|
1075 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
|
|
1076 } else {
|
|
1077 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
|
|
1078 }
|
|
1079 LIR_Opr reg = rlock_result(x);
|
|
1080 __ checkcast(reg, obj.result(), x->klass(),
|
|
1081 new_register(objectType), new_register(objectType),
|
|
1082 !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr,
|
|
1083 x->direct_compare(), info_for_exception, patching_info, stub,
|
|
1084 x->profiled_method(), x->profiled_bci());
|
|
1085 }
|
|
1086
|
|
1087
|
|
1088 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
|
|
1089 LIRItem obj(x->obj(), this);
|
|
1090
|
|
1091 // result and test object may not be in same register
|
|
1092 LIR_Opr reg = rlock_result(x);
|
|
1093 CodeEmitInfo* patching_info = NULL;
|
|
1094 if ((!x->klass()->is_loaded() || PatchALot)) {
|
|
1095 // must do this before locking the destination register as an oop register
|
|
1096 patching_info = state_for(x, x->state_before());
|
|
1097 }
|
|
1098 obj.load_item();
|
|
1099 LIR_Opr tmp = new_register(objectType);
|
|
1100 __ instanceof(reg, obj.result(), x->klass(),
|
|
1101 tmp, new_register(objectType), LIR_OprFact::illegalOpr,
|
|
1102 x->direct_compare(), patching_info);
|
|
1103 }
|
|
1104
|
|
1105
|
|
1106 void LIRGenerator::do_If(If* x) {
|
|
1107 assert(x->number_of_sux() == 2, "inconsistency");
|
|
1108 ValueTag tag = x->x()->type()->tag();
|
|
1109 bool is_safepoint = x->is_safepoint();
|
|
1110
|
|
1111 If::Condition cond = x->cond();
|
|
1112
|
|
1113 LIRItem xitem(x->x(), this);
|
|
1114 LIRItem yitem(x->y(), this);
|
|
1115 LIRItem* xin = &xitem;
|
|
1116 LIRItem* yin = &yitem;
|
|
1117
|
|
1118 if (tag == longTag) {
|
|
1119 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
|
|
1120 // mirror for other conditions
|
|
1121 if (cond == If::gtr || cond == If::leq) {
|
|
1122 cond = Instruction::mirror(cond);
|
|
1123 xin = &yitem;
|
|
1124 yin = &xitem;
|
|
1125 }
|
|
1126 xin->set_destroys_register();
|
|
1127 }
|
|
1128 xin->load_item();
|
|
1129 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
|
|
1130 // inline long zero
|
|
1131 yin->dont_load_item();
|
|
1132 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
|
|
1133 // longs cannot handle constants at right side
|
|
1134 yin->load_item();
|
|
1135 } else {
|
|
1136 yin->dont_load_item();
|
|
1137 }
|
|
1138
|
|
1139 // add safepoint before generating condition code so it can be recomputed
|
|
1140 if (x->is_safepoint()) {
|
|
1141 // increment backedge counter if needed
|
|
1142 increment_backedge_counter(state_for(x, x->state_before()));
|
|
1143
|
|
1144 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
|
|
1145 }
|
|
1146 set_no_result(x);
|
|
1147
|
|
1148 LIR_Opr left = xin->result();
|
|
1149 LIR_Opr right = yin->result();
|
|
1150 __ cmp(lir_cond(cond), left, right);
|
|
1151 profile_branch(x, cond);
|
|
1152 move_to_phi(x->state());
|
|
1153 if (x->x()->type()->is_float_kind()) {
|
|
1154 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
|
|
1155 } else {
|
|
1156 __ branch(lir_cond(cond), right->type(), x->tsux());
|
|
1157 }
|
|
1158 assert(x->default_sux() == x->fsux(), "wrong destination above");
|
|
1159 __ jump(x->default_sux());
|
|
1160 }
|
|
1161
|
|
1162
|
|
1163 LIR_Opr LIRGenerator::getThreadPointer() {
|
|
1164 LIR_Opr result = new_register(T_INT);
|
|
1165 __ get_thread(result);
|
|
1166 return result;
|
|
1167 }
|
|
1168
|
|
1169 void LIRGenerator::trace_block_entry(BlockBegin* block) {
|
|
1170 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
|
|
1171 LIR_OprList* args = new LIR_OprList();
|
|
1172 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
|
|
1173 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
|
|
1174 }
|
|
1175
|
|
1176
|
|
1177 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
|
|
1178 CodeEmitInfo* info) {
|
|
1179 if (address->type() == T_LONG) {
|
|
1180 address = new LIR_Address(address->base(),
|
|
1181 address->index(), address->scale(),
|
|
1182 address->disp(), T_DOUBLE);
|
|
1183 // Transfer the value atomically by using FP moves. This means
|
|
1184 // the value has to be moved between CPU and FPU registers. It
|
|
1185 // always has to be moved through spill slot since there's no
|
|
1186 // quick way to pack the value into an SSE register.
|
|
1187 LIR_Opr temp_double = new_register(T_DOUBLE);
|
|
1188 LIR_Opr spill = new_register(T_LONG);
|
|
1189 set_vreg_flag(spill, must_start_in_memory);
|
|
1190 __ move(value, spill);
|
|
1191 __ volatile_move(spill, temp_double, T_LONG);
|
|
1192 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
|
|
1193 } else {
|
|
1194 __ store(value, address, info);
|
|
1195 }
|
|
1196 }
|
|
1197
|
|
1198
|
|
1199
|
|
1200 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
|
|
1201 CodeEmitInfo* info) {
|
|
1202 if (address->type() == T_LONG) {
|
|
1203 address = new LIR_Address(address->base(),
|
|
1204 address->index(), address->scale(),
|
|
1205 address->disp(), T_DOUBLE);
|
|
1206 // Transfer the value atomically by using FP moves. This means
|
|
1207 // the value has to be moved between CPU and FPU registers. In
|
|
1208 // SSE0 and SSE1 mode it has to be moved through spill slot but in
|
|
1209 // SSE2+ mode it can be moved directly.
|
|
1210 LIR_Opr temp_double = new_register(T_DOUBLE);
|
|
1211 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
|
|
1212 __ volatile_move(temp_double, result, T_LONG);
|
|
1213 if (UseSSE < 2) {
|
|
1214 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
|
|
1215 set_vreg_flag(result, must_start_in_memory);
|
|
1216 }
|
|
1217 } else {
|
|
1218 __ load(address, result, info);
|
|
1219 }
|
|
1220 }
|
|
1221
|
|
1222 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
|
|
1223 BasicType type, bool is_volatile) {
|
|
1224 if (is_volatile && type == T_LONG) {
|
|
1225 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
|
|
1226 LIR_Opr tmp = new_register(T_DOUBLE);
|
|
1227 __ load(addr, tmp);
|
|
1228 LIR_Opr spill = new_register(T_LONG);
|
|
1229 set_vreg_flag(spill, must_start_in_memory);
|
|
1230 __ move(tmp, spill);
|
|
1231 __ move(spill, dst);
|
|
1232 } else {
|
|
1233 LIR_Address* addr = new LIR_Address(src, offset, type);
|
|
1234 __ load(addr, dst);
|
|
1235 }
|
|
1236 }
|
|
1237
|
|
1238
|
|
1239 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
|
|
1240 BasicType type, bool is_volatile) {
|
|
1241 if (is_volatile && type == T_LONG) {
|
|
1242 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
|
|
1243 LIR_Opr tmp = new_register(T_DOUBLE);
|
|
1244 LIR_Opr spill = new_register(T_DOUBLE);
|
|
1245 set_vreg_flag(spill, must_start_in_memory);
|
|
1246 __ move(data, spill);
|
|
1247 __ move(spill, tmp);
|
|
1248 __ move(tmp, addr);
|
|
1249 } else {
|
|
1250 LIR_Address* addr = new LIR_Address(src, offset, type);
|
|
1251 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
|
|
1252 if (is_obj) {
|
|
1253 __ move(data, addr);
|
|
1254 assert(src->is_register(), "must be register");
|
|
1255 // Seems to be a precise address
|
|
1256 post_barrier(LIR_OprFact::address(addr), data);
|
|
1257 } else {
|
|
1258 __ move(data, addr);
|
|
1259 }
|
|
1260 }
|
|
1261 }
|