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1 /*
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2 * Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 #include "incls/_precompiled.incl"
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26 #include "incls/_assembler_solaris_sparc.cpp.incl"
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27
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28 #include <sys/trap.h> // For trap numbers
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29 #include <v9/sys/psr_compat.h> // For V8 compatibility
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30
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31 bool MacroAssembler::needs_explicit_null_check(intptr_t offset) {
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32 // The first page of virtual addresses is unmapped on SPARC.
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33 // Thus, any access the VM makes through a null pointer with an offset of
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34 // less than 4K will get a recognizable SIGSEGV, which the signal handler
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35 // will transform into a NullPointerException.
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36 // (Actually, the first 64K or so is unmapped, but it's simpler
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37 // to depend only on the first 4K or so.)
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38
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39 bool offset_in_first_page = 0 <= offset && offset < os::vm_page_size();
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40 return !offset_in_first_page;
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41 }
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42
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43 void MacroAssembler::read_ccr_trap(Register ccr_save) {
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44 // Execute a trap to get the PSR, mask and shift
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45 // to get the condition codes.
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46 get_psr_trap();
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47 nop();
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48 set(PSR_ICC, ccr_save);
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49 and3(O0, ccr_save, ccr_save);
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50 srl(ccr_save, PSR_ICC_SHIFT, ccr_save);
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51 }
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52
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53 void MacroAssembler::write_ccr_trap(Register ccr_save, Register scratch1, Register scratch2) {
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54 // Execute a trap to get the PSR, shift back
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55 // the condition codes, mask the condition codes
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56 // back into and PSR and trap to write back the
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57 // PSR.
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58 sll(ccr_save, PSR_ICC_SHIFT, scratch2);
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59 get_psr_trap();
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60 nop();
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61 set(~PSR_ICC, scratch1);
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62 and3(O0, scratch1, O0);
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63 or3(O0, scratch2, O0);
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64 set_psr_trap();
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65 nop();
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66 }
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67
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68 void MacroAssembler::flush_windows_trap() { trap(ST_FLUSH_WINDOWS); }
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69 void MacroAssembler::clean_windows_trap() { trap(ST_CLEAN_WINDOWS); }
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70 void MacroAssembler::get_psr_trap() { trap(ST_GETPSR); }
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71 void MacroAssembler::set_psr_trap() { trap(ST_SETPSR); }
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