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0
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1 /*
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2 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 # include "incls/_precompiled.incl"
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26 # include "incls/_c1_LIRAssembler.cpp.incl"
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27
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28
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29 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
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30 // we must have enough patching space so that call can be inserted
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31 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeCall::instruction_size) {
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32 _masm->nop();
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33 }
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34 patch->install(_masm, patch_code, obj, info);
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35 append_patching_stub(patch);
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36
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37 #ifdef ASSERT
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38 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->bci());
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39 if (patch->id() == PatchingStub::access_field_id) {
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40 switch (code) {
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41 case Bytecodes::_putstatic:
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42 case Bytecodes::_getstatic:
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43 case Bytecodes::_putfield:
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44 case Bytecodes::_getfield:
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45 break;
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46 default:
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47 ShouldNotReachHere();
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48 }
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49 } else if (patch->id() == PatchingStub::load_klass_id) {
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50 switch (code) {
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51 case Bytecodes::_putstatic:
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52 case Bytecodes::_getstatic:
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53 case Bytecodes::_new:
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54 case Bytecodes::_anewarray:
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55 case Bytecodes::_multianewarray:
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56 case Bytecodes::_instanceof:
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57 case Bytecodes::_checkcast:
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58 case Bytecodes::_ldc:
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59 case Bytecodes::_ldc_w:
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60 break;
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61 default:
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62 ShouldNotReachHere();
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63 }
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64 } else {
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65 ShouldNotReachHere();
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66 }
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67 #endif
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68 }
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69
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70
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71 //---------------------------------------------------------------
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72
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73
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74 LIR_Assembler::LIR_Assembler(Compilation* c):
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75 _compilation(c)
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76 , _masm(c->masm())
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77 , _frame_map(c->frame_map())
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78 , _current_block(NULL)
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79 , _pending_non_safepoint(NULL)
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80 , _pending_non_safepoint_offset(0)
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81 {
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82 _slow_case_stubs = new CodeStubList();
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83 }
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84
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85
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86 LIR_Assembler::~LIR_Assembler() {
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87 }
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88
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89
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90 void LIR_Assembler::append_patching_stub(PatchingStub* stub) {
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91 _slow_case_stubs->append(stub);
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92 }
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93
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94
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95 void LIR_Assembler::check_codespace() {
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96 CodeSection* cs = _masm->code_section();
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97 if (cs->remaining() < (int)(1*K)) {
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98 BAILOUT("CodeBuffer overflow");
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99 }
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100 }
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101
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102
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103 void LIR_Assembler::emit_code_stub(CodeStub* stub) {
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104 _slow_case_stubs->append(stub);
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105 }
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106
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107 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
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108 for (int m = 0; m < stub_list->length(); m++) {
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109 CodeStub* s = (*stub_list)[m];
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110
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111 check_codespace();
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112 CHECK_BAILOUT();
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113
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114 #ifndef PRODUCT
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115 if (CommentedAssembly) {
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116 stringStream st;
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117 s->print_name(&st);
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118 st.print(" slow case");
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119 _masm->block_comment(st.as_string());
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120 }
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121 #endif
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122 s->emit_code(this);
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123 #ifdef ASSERT
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124 s->assert_no_unbound_labels();
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125 #endif
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126 }
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127 }
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128
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129
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130 void LIR_Assembler::emit_slow_case_stubs() {
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131 emit_stubs(_slow_case_stubs);
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132 }
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133
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134
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135 bool LIR_Assembler::needs_icache(ciMethod* method) const {
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136 return !method->is_static();
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137 }
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138
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139
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140 int LIR_Assembler::code_offset() const {
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141 return _masm->offset();
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142 }
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143
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144
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145 address LIR_Assembler::pc() const {
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146 return _masm->pc();
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147 }
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148
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149
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150 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
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151 for (int i = 0; i < info_list->length(); i++) {
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152 XHandlers* handlers = info_list->at(i)->exception_handlers();
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153
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154 for (int j = 0; j < handlers->length(); j++) {
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155 XHandler* handler = handlers->handler_at(j);
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156 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
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157 assert(handler->entry_code() == NULL ||
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158 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
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159 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
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160
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161 if (handler->entry_pco() == -1) {
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162 // entry code not emitted yet
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163 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
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164 handler->set_entry_pco(code_offset());
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165 if (CommentedAssembly) {
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166 _masm->block_comment("Exception adapter block");
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167 }
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168 emit_lir_list(handler->entry_code());
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169 } else {
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170 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
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171 }
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172
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173 assert(handler->entry_pco() != -1, "must be set now");
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174 }
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175 }
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176 }
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177 }
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178
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179
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180 void LIR_Assembler::emit_code(BlockList* hir) {
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181 if (PrintLIR) {
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182 print_LIR(hir);
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183 }
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184
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185 int n = hir->length();
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186 for (int i = 0; i < n; i++) {
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187 emit_block(hir->at(i));
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188 CHECK_BAILOUT();
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189 }
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190
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191 flush_debug_info(code_offset());
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192
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193 DEBUG_ONLY(check_no_unbound_labels());
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194 }
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195
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196
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197 void LIR_Assembler::emit_block(BlockBegin* block) {
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198 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
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199 align_backward_branch_target();
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200 }
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201
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202 // if this block is the start of an exception handler, record the
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203 // PC offset of the first instruction for later construction of
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204 // the ExceptionHandlerTable
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205 if (block->is_set(BlockBegin::exception_entry_flag)) {
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206 block->set_exception_handler_pco(code_offset());
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207 }
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208
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209 #ifndef PRODUCT
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210 if (PrintLIRWithAssembly) {
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211 // don't print Phi's
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212 InstructionPrinter ip(false);
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213 block->print(ip);
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214 }
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215 #endif /* PRODUCT */
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216
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217 assert(block->lir() != NULL, "must have LIR");
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218 IA32_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
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219
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220 #ifndef PRODUCT
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221 if (CommentedAssembly) {
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222 stringStream st;
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223 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->bci());
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224 _masm->block_comment(st.as_string());
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225 }
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226 #endif
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227
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228 emit_lir_list(block->lir());
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229
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230 IA32_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
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231 }
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232
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233
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234 void LIR_Assembler::emit_lir_list(LIR_List* list) {
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235 peephole(list);
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236
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237 int n = list->length();
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238 for (int i = 0; i < n; i++) {
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239 LIR_Op* op = list->at(i);
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240
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241 check_codespace();
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242 CHECK_BAILOUT();
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243
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244 #ifndef PRODUCT
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245 if (CommentedAssembly) {
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246 // Don't record out every op since that's too verbose. Print
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247 // branches since they include block and stub names. Also print
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248 // patching moves since they generate funny looking code.
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249 if (op->code() == lir_branch ||
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250 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) {
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251 stringStream st;
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252 op->print_on(&st);
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253 _masm->block_comment(st.as_string());
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254 }
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255 }
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256 if (PrintLIRWithAssembly) {
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257 // print out the LIR operation followed by the resulting assembly
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258 list->at(i)->print(); tty->cr();
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259 }
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260 #endif /* PRODUCT */
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261
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262 op->emit_code(this);
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263
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264 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
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265 process_debug_info(op);
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266 }
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267
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268 #ifndef PRODUCT
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269 if (PrintLIRWithAssembly) {
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270 _masm->code()->decode();
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271 }
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272 #endif /* PRODUCT */
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273 }
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274 }
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275
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276 #ifdef ASSERT
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277 void LIR_Assembler::check_no_unbound_labels() {
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278 CHECK_BAILOUT();
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279
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280 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
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281 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
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282 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
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283 assert(false, "unbound label");
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284 }
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285 }
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286 }
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287 #endif
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288
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289 //----------------------------------debug info--------------------------------
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290
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291
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292 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
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293 _masm->code_section()->relocate(pc(), relocInfo::poll_type);
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294 int pc_offset = code_offset();
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295 flush_debug_info(pc_offset);
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296 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
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297 if (info->exception_handlers() != NULL) {
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298 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
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299 }
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300 }
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301
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302
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303 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
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304 flush_debug_info(pc_offset);
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305 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
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306 if (cinfo->exception_handlers() != NULL) {
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307 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
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308 }
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309 }
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310
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311 static ValueStack* debug_info(Instruction* ins) {
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312 StateSplit* ss = ins->as_StateSplit();
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313 if (ss != NULL) return ss->state();
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314 return ins->lock_stack();
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315 }
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316
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317 void LIR_Assembler::process_debug_info(LIR_Op* op) {
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318 Instruction* src = op->source();
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319 if (src == NULL) return;
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320 int pc_offset = code_offset();
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321 if (_pending_non_safepoint == src) {
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322 _pending_non_safepoint_offset = pc_offset;
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323 return;
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324 }
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325 ValueStack* vstack = debug_info(src);
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326 if (vstack == NULL) return;
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327 if (_pending_non_safepoint != NULL) {
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328 // Got some old debug info. Get rid of it.
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329 if (_pending_non_safepoint->bci() == src->bci() &&
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330 debug_info(_pending_non_safepoint) == vstack) {
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331 _pending_non_safepoint_offset = pc_offset;
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332 return;
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333 }
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334 if (_pending_non_safepoint_offset < pc_offset) {
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335 record_non_safepoint_debug_info();
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336 }
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337 _pending_non_safepoint = NULL;
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338 }
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339 // Remember the debug info.
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340 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
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341 _pending_non_safepoint = src;
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342 _pending_non_safepoint_offset = pc_offset;
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343 }
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344 }
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345
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346 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
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347 // Return NULL if n is too large.
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348 // Returns the caller_bci for the next-younger state, also.
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349 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
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350 ValueStack* t = s;
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351 for (int i = 0; i < n; i++) {
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352 if (t == NULL) break;
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353 t = t->caller_state();
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354 }
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355 if (t == NULL) return NULL;
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356 for (;;) {
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357 ValueStack* tc = t->caller_state();
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358 if (tc == NULL) return s;
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359 t = tc;
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360 bci_result = s->scope()->caller_bci();
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361 s = s->caller_state();
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362 }
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363 }
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364
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365 void LIR_Assembler::record_non_safepoint_debug_info() {
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366 int pc_offset = _pending_non_safepoint_offset;
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367 ValueStack* vstack = debug_info(_pending_non_safepoint);
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368 int bci = _pending_non_safepoint->bci();
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369
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370 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
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371 assert(debug_info->recording_non_safepoints(), "sanity");
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372
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373 debug_info->add_non_safepoint(pc_offset);
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374
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375 // Visit scopes from oldest to youngest.
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376 for (int n = 0; ; n++) {
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377 int s_bci = bci;
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378 ValueStack* s = nth_oldest(vstack, n, s_bci);
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379 if (s == NULL) break;
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380 IRScope* scope = s->scope();
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381 debug_info->describe_scope(pc_offset, scope->method(), s_bci);
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382 }
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383
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384 debug_info->end_non_safepoint(pc_offset);
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385 }
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386
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387
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388 void LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
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389 add_debug_info_for_null_check(code_offset(), cinfo);
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390 }
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391
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392 void LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
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393 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
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394 emit_code_stub(stub);
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395 }
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396
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397 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
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398 add_debug_info_for_div0(code_offset(), info);
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399 }
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400
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401 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
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402 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
|
|
|
403 emit_code_stub(stub);
|
|
|
404 }
|
|
|
405
|
|
|
406 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
|
|
|
407 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
|
|
|
408 }
|
|
|
409
|
|
|
410
|
|
|
411 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
|
|
|
412 verify_oop_map(op->info());
|
|
|
413
|
|
|
414 if (os::is_MP()) {
|
|
|
415 // must align calls sites, otherwise they can't be updated atomically on MP hardware
|
|
|
416 align_call(op->code());
|
|
|
417 }
|
|
|
418
|
|
|
419 // emit the static call stub stuff out of line
|
|
|
420 emit_static_call_stub();
|
|
|
421
|
|
|
422 switch (op->code()) {
|
|
|
423 case lir_static_call:
|
|
|
424 call(op->addr(), relocInfo::static_call_type, op->info());
|
|
|
425 break;
|
|
|
426 case lir_optvirtual_call:
|
|
|
427 call(op->addr(), relocInfo::opt_virtual_call_type, op->info());
|
|
|
428 break;
|
|
|
429 case lir_icvirtual_call:
|
|
|
430 ic_call(op->addr(), op->info());
|
|
|
431 break;
|
|
|
432 case lir_virtual_call:
|
|
|
433 vtable_call(op->vtable_offset(), op->info());
|
|
|
434 break;
|
|
|
435 default: ShouldNotReachHere();
|
|
|
436 }
|
|
|
437 #if defined(IA32) && defined(TIERED)
|
|
|
438 // C2 leave fpu stack dirty clean it
|
|
|
439 if (UseSSE < 2) {
|
|
|
440 int i;
|
|
|
441 for ( i = 1; i <= 7 ; i++ ) {
|
|
|
442 ffree(i);
|
|
|
443 }
|
|
|
444 if (!op->result_opr()->is_float_kind()) {
|
|
|
445 ffree(0);
|
|
|
446 }
|
|
|
447 }
|
|
|
448 #endif // IA32 && TIERED
|
|
|
449 }
|
|
|
450
|
|
|
451
|
|
|
452 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
|
|
|
453 _masm->bind (*(op->label()));
|
|
|
454 }
|
|
|
455
|
|
|
456
|
|
|
457 void LIR_Assembler::emit_op1(LIR_Op1* op) {
|
|
|
458 switch (op->code()) {
|
|
|
459 case lir_move:
|
|
|
460 if (op->move_kind() == lir_move_volatile) {
|
|
|
461 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
|
|
|
462 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
|
|
|
463 } else {
|
|
|
464 move_op(op->in_opr(), op->result_opr(), op->type(),
|
|
|
465 op->patch_code(), op->info(), op->pop_fpu_stack(), op->move_kind() == lir_move_unaligned);
|
|
|
466 }
|
|
|
467 break;
|
|
|
468
|
|
|
469 case lir_prefetchr:
|
|
|
470 prefetchr(op->in_opr());
|
|
|
471 break;
|
|
|
472
|
|
|
473 case lir_prefetchw:
|
|
|
474 prefetchw(op->in_opr());
|
|
|
475 break;
|
|
|
476
|
|
|
477 case lir_roundfp: {
|
|
|
478 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
|
|
|
479 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
|
|
|
480 break;
|
|
|
481 }
|
|
|
482
|
|
|
483 case lir_return:
|
|
|
484 return_op(op->in_opr());
|
|
|
485 break;
|
|
|
486
|
|
|
487 case lir_safepoint:
|
|
|
488 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
|
|
|
489 _masm->nop();
|
|
|
490 }
|
|
|
491 safepoint_poll(op->in_opr(), op->info());
|
|
|
492 break;
|
|
|
493
|
|
|
494 case lir_fxch:
|
|
|
495 fxch(op->in_opr()->as_jint());
|
|
|
496 break;
|
|
|
497
|
|
|
498 case lir_fld:
|
|
|
499 fld(op->in_opr()->as_jint());
|
|
|
500 break;
|
|
|
501
|
|
|
502 case lir_ffree:
|
|
|
503 ffree(op->in_opr()->as_jint());
|
|
|
504 break;
|
|
|
505
|
|
|
506 case lir_branch:
|
|
|
507 break;
|
|
|
508
|
|
|
509 case lir_push:
|
|
|
510 push(op->in_opr());
|
|
|
511 break;
|
|
|
512
|
|
|
513 case lir_pop:
|
|
|
514 pop(op->in_opr());
|
|
|
515 break;
|
|
|
516
|
|
|
517 case lir_neg:
|
|
|
518 negate(op->in_opr(), op->result_opr());
|
|
|
519 break;
|
|
|
520
|
|
|
521 case lir_leal:
|
|
|
522 leal(op->in_opr(), op->result_opr());
|
|
|
523 break;
|
|
|
524
|
|
|
525 case lir_null_check:
|
|
|
526 if (GenerateCompilerNullChecks) {
|
|
|
527 add_debug_info_for_null_check_here(op->info());
|
|
|
528
|
|
|
529 if (op->in_opr()->is_single_cpu()) {
|
|
|
530 _masm->null_check(op->in_opr()->as_register());
|
|
|
531 } else {
|
|
|
532 Unimplemented();
|
|
|
533 }
|
|
|
534 }
|
|
|
535 break;
|
|
|
536
|
|
|
537 case lir_monaddr:
|
|
|
538 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
|
|
|
539 break;
|
|
|
540
|
|
|
541 default:
|
|
|
542 Unimplemented();
|
|
|
543 break;
|
|
|
544 }
|
|
|
545 }
|
|
|
546
|
|
|
547
|
|
|
548 void LIR_Assembler::emit_op0(LIR_Op0* op) {
|
|
|
549 switch (op->code()) {
|
|
|
550 case lir_word_align: {
|
|
|
551 while (code_offset() % BytesPerWord != 0) {
|
|
|
552 _masm->nop();
|
|
|
553 }
|
|
|
554 break;
|
|
|
555 }
|
|
|
556
|
|
|
557 case lir_nop:
|
|
|
558 assert(op->info() == NULL, "not supported");
|
|
|
559 _masm->nop();
|
|
|
560 break;
|
|
|
561
|
|
|
562 case lir_label:
|
|
|
563 Unimplemented();
|
|
|
564 break;
|
|
|
565
|
|
|
566 case lir_build_frame:
|
|
|
567 build_frame();
|
|
|
568 break;
|
|
|
569
|
|
|
570 case lir_std_entry:
|
|
|
571 // init offsets
|
|
|
572 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
|
|
|
573 _masm->align(CodeEntryAlignment);
|
|
|
574 if (needs_icache(compilation()->method())) {
|
|
|
575 check_icache();
|
|
|
576 }
|
|
|
577 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
|
|
|
578 _masm->verified_entry();
|
|
|
579 build_frame();
|
|
|
580 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
|
|
|
581 break;
|
|
|
582
|
|
|
583 case lir_osr_entry:
|
|
|
584 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
|
|
|
585 osr_entry();
|
|
|
586 break;
|
|
|
587
|
|
|
588 case lir_24bit_FPU:
|
|
|
589 set_24bit_FPU();
|
|
|
590 break;
|
|
|
591
|
|
|
592 case lir_reset_FPU:
|
|
|
593 reset_FPU();
|
|
|
594 break;
|
|
|
595
|
|
|
596 case lir_breakpoint:
|
|
|
597 breakpoint();
|
|
|
598 break;
|
|
|
599
|
|
|
600 case lir_fpop_raw:
|
|
|
601 fpop();
|
|
|
602 break;
|
|
|
603
|
|
|
604 case lir_membar:
|
|
|
605 membar();
|
|
|
606 break;
|
|
|
607
|
|
|
608 case lir_membar_acquire:
|
|
|
609 membar_acquire();
|
|
|
610 break;
|
|
|
611
|
|
|
612 case lir_membar_release:
|
|
|
613 membar_release();
|
|
|
614 break;
|
|
|
615
|
|
|
616 case lir_get_thread:
|
|
|
617 get_thread(op->result_opr());
|
|
|
618 break;
|
|
|
619
|
|
|
620 default:
|
|
|
621 ShouldNotReachHere();
|
|
|
622 break;
|
|
|
623 }
|
|
|
624 }
|
|
|
625
|
|
|
626
|
|
|
627 void LIR_Assembler::emit_op2(LIR_Op2* op) {
|
|
|
628 switch (op->code()) {
|
|
|
629 case lir_cmp:
|
|
|
630 if (op->info() != NULL) {
|
|
|
631 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
|
|
|
632 "shouldn't be codeemitinfo for non-address operands");
|
|
|
633 add_debug_info_for_null_check_here(op->info()); // exception possible
|
|
|
634 }
|
|
|
635 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
|
|
|
636 break;
|
|
|
637
|
|
|
638 case lir_cmp_l2i:
|
|
|
639 case lir_cmp_fd2i:
|
|
|
640 case lir_ucmp_fd2i:
|
|
|
641 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
|
|
|
642 break;
|
|
|
643
|
|
|
644 case lir_cmove:
|
|
|
645 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr());
|
|
|
646 break;
|
|
|
647
|
|
|
648 case lir_shl:
|
|
|
649 case lir_shr:
|
|
|
650 case lir_ushr:
|
|
|
651 if (op->in_opr2()->is_constant()) {
|
|
|
652 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
|
|
|
653 } else {
|
|
|
654 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp_opr());
|
|
|
655 }
|
|
|
656 break;
|
|
|
657
|
|
|
658 case lir_add:
|
|
|
659 case lir_sub:
|
|
|
660 case lir_mul:
|
|
|
661 case lir_mul_strictfp:
|
|
|
662 case lir_div:
|
|
|
663 case lir_div_strictfp:
|
|
|
664 case lir_rem:
|
|
|
665 assert(op->fpu_pop_count() < 2, "");
|
|
|
666 arith_op(
|
|
|
667 op->code(),
|
|
|
668 op->in_opr1(),
|
|
|
669 op->in_opr2(),
|
|
|
670 op->result_opr(),
|
|
|
671 op->info(),
|
|
|
672 op->fpu_pop_count() == 1);
|
|
|
673 break;
|
|
|
674
|
|
|
675 case lir_abs:
|
|
|
676 case lir_sqrt:
|
|
|
677 case lir_sin:
|
|
|
678 case lir_tan:
|
|
|
679 case lir_cos:
|
|
|
680 case lir_log:
|
|
|
681 case lir_log10:
|
|
|
682 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
|
|
|
683 break;
|
|
|
684
|
|
|
685 case lir_logic_and:
|
|
|
686 case lir_logic_or:
|
|
|
687 case lir_logic_xor:
|
|
|
688 logic_op(
|
|
|
689 op->code(),
|
|
|
690 op->in_opr1(),
|
|
|
691 op->in_opr2(),
|
|
|
692 op->result_opr());
|
|
|
693 break;
|
|
|
694
|
|
|
695 case lir_throw:
|
|
|
696 case lir_unwind:
|
|
|
697 throw_op(op->in_opr1(), op->in_opr2(), op->info(), op->code() == lir_unwind);
|
|
|
698 break;
|
|
|
699
|
|
|
700 default:
|
|
|
701 Unimplemented();
|
|
|
702 break;
|
|
|
703 }
|
|
|
704 }
|
|
|
705
|
|
|
706
|
|
|
707 void LIR_Assembler::build_frame() {
|
|
|
708 _masm->build_frame(initial_frame_size_in_bytes());
|
|
|
709 }
|
|
|
710
|
|
|
711
|
|
|
712 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
|
|
|
713 assert((src->is_single_fpu() && dest->is_single_stack()) ||
|
|
|
714 (src->is_double_fpu() && dest->is_double_stack()),
|
|
|
715 "round_fp: rounds register -> stack location");
|
|
|
716
|
|
|
717 reg2stack (src, dest, src->type(), pop_fpu_stack);
|
|
|
718 }
|
|
|
719
|
|
|
720
|
|
|
721 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned) {
|
|
|
722 if (src->is_register()) {
|
|
|
723 if (dest->is_register()) {
|
|
|
724 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
|
|
|
725 reg2reg(src, dest);
|
|
|
726 } else if (dest->is_stack()) {
|
|
|
727 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
|
|
|
728 reg2stack(src, dest, type, pop_fpu_stack);
|
|
|
729 } else if (dest->is_address()) {
|
|
|
730 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, unaligned);
|
|
|
731 } else {
|
|
|
732 ShouldNotReachHere();
|
|
|
733 }
|
|
|
734
|
|
|
735 } else if (src->is_stack()) {
|
|
|
736 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
|
|
|
737 if (dest->is_register()) {
|
|
|
738 stack2reg(src, dest, type);
|
|
|
739 } else if (dest->is_stack()) {
|
|
|
740 stack2stack(src, dest, type);
|
|
|
741 } else {
|
|
|
742 ShouldNotReachHere();
|
|
|
743 }
|
|
|
744
|
|
|
745 } else if (src->is_constant()) {
|
|
|
746 if (dest->is_register()) {
|
|
|
747 const2reg(src, dest, patch_code, info); // patching is possible
|
|
|
748 } else if (dest->is_stack()) {
|
|
|
749 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
|
|
|
750 const2stack(src, dest);
|
|
|
751 } else if (dest->is_address()) {
|
|
|
752 assert(patch_code == lir_patch_none, "no patching allowed here");
|
|
|
753 const2mem(src, dest, type, info);
|
|
|
754 } else {
|
|
|
755 ShouldNotReachHere();
|
|
|
756 }
|
|
|
757
|
|
|
758 } else if (src->is_address()) {
|
|
|
759 mem2reg(src, dest, type, patch_code, info, unaligned);
|
|
|
760
|
|
|
761 } else {
|
|
|
762 ShouldNotReachHere();
|
|
|
763 }
|
|
|
764 }
|
|
|
765
|
|
|
766
|
|
|
767 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
|
|
|
768 #ifndef PRODUCT
|
|
|
769 if (VerifyOopMaps || VerifyOops) {
|
|
|
770 bool v = VerifyOops;
|
|
|
771 VerifyOops = true;
|
|
|
772 OopMapStream s(info->oop_map());
|
|
|
773 while (!s.is_done()) {
|
|
|
774 OopMapValue v = s.current();
|
|
|
775 if (v.is_oop()) {
|
|
|
776 VMReg r = v.reg();
|
|
|
777 if (!r->is_stack()) {
|
|
|
778 stringStream st;
|
|
|
779 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
|
|
|
780 #ifdef SPARC
|
|
|
781 _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__);
|
|
|
782 #else
|
|
|
783 _masm->verify_oop(r->as_Register());
|
|
|
784 #endif
|
|
|
785 } else {
|
|
|
786 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
|
|
|
787 }
|
|
|
788 }
|
|
|
789 s.next();
|
|
|
790 }
|
|
|
791 VerifyOops = v;
|
|
|
792 }
|
|
|
793 #endif
|
|
|
794 }
|
