Mercurial > hg > truffle
annotate src/share/vm/opto/machnode.cpp @ 113:ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
Summary: Compressed oops in instances, arrays, and headers. Code contributors are coleenp, phh, never, swamyv
Reviewed-by: jmasa, kamg, acorn, tbell, kvn, rasbold
| author | coleenp |
|---|---|
| date | Sun, 13 Apr 2008 17:43:42 -0400 |
| parents | a61af66fc99e |
| children | d1605aabd0a1 8d191a7697e2 |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 2 * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved. | |
| 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
| 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 21 * have any questions. | |
| 22 * | |
| 23 */ | |
| 24 | |
| 25 #include "incls/_precompiled.incl" | |
| 26 #include "incls/_machnode.cpp.incl" | |
| 27 | |
| 28 //============================================================================= | |
| 29 // Return the value requested | |
| 30 // result register lookup, corresponding to int_format | |
| 31 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const { | |
| 32 return (int)ra_->get_encode(node); | |
| 33 } | |
| 34 // input register lookup, corresponding to ext_format | |
| 35 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
| 36 return (int)(ra_->get_encode(node->in(idx))); | |
| 37 } | |
| 38 intptr_t MachOper::constant() const { return 0x00; } | |
| 39 bool MachOper::constant_is_oop() const { return false; } | |
| 40 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; } | |
| 41 jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; } | |
| 42 jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; } | |
| 43 TypeOopPtr *MachOper::oop() const { return NULL; } | |
| 44 int MachOper::ccode() const { return 0x00; } | |
| 45 // A zero, default, indicates this value is not needed. | |
| 46 // May need to lookup the base register, as done in int_ and ext_format | |
| 47 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 48 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 49 int MachOper::scale() const { return 0x00; } | |
| 50 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 51 int MachOper::constant_disp() const { return 0; } | |
| 52 int MachOper::base_position() const { return -1; } // no base input | |
| 53 int MachOper::index_position() const { return -1; } // no index input | |
| 54 // Check for PC-Relative displacement | |
| 55 bool MachOper::disp_is_oop() const { return false; } | |
| 56 // Return the label | |
| 57 Label* MachOper::label() const { ShouldNotReachHere(); return 0; } | |
| 58 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; } | |
| 59 | |
| 60 | |
| 61 //------------------------------negate----------------------------------------- | |
| 62 // Negate conditional branches. Error for non-branch operands | |
| 63 void MachOper::negate() { | |
| 64 ShouldNotCallThis(); | |
| 65 } | |
| 66 | |
| 67 //-----------------------------type-------------------------------------------- | |
| 68 const Type *MachOper::type() const { | |
| 69 return Type::BOTTOM; | |
| 70 } | |
| 71 | |
| 72 //------------------------------in_RegMask------------------------------------- | |
| 73 const RegMask *MachOper::in_RegMask(int index) const { | |
| 74 ShouldNotReachHere(); | |
| 75 return NULL; | |
| 76 } | |
| 77 | |
| 78 //------------------------------dump_spec-------------------------------------- | |
| 79 // Print any per-operand special info | |
| 80 #ifndef PRODUCT | |
| 81 void MachOper::dump_spec(outputStream *st) const { } | |
| 82 #endif | |
| 83 | |
| 84 //------------------------------hash------------------------------------------- | |
| 85 // Print any per-operand special info | |
| 86 uint MachOper::hash() const { | |
| 87 ShouldNotCallThis(); | |
| 88 return 5; | |
| 89 } | |
| 90 | |
| 91 //------------------------------cmp-------------------------------------------- | |
| 92 // Print any per-operand special info | |
| 93 uint MachOper::cmp( const MachOper &oper ) const { | |
| 94 ShouldNotCallThis(); | |
| 95 return opcode() == oper.opcode(); | |
| 96 } | |
| 97 | |
| 98 //------------------------------hash------------------------------------------- | |
| 99 // Print any per-operand special info | |
| 100 uint labelOper::hash() const { | |
| 101 return _block_num; | |
| 102 } | |
| 103 | |
| 104 //------------------------------cmp-------------------------------------------- | |
| 105 // Print any per-operand special info | |
| 106 uint labelOper::cmp( const MachOper &oper ) const { | |
| 107 return (opcode() == oper.opcode()) && (_label == oper.label()); | |
| 108 } | |
| 109 | |
| 110 //------------------------------hash------------------------------------------- | |
| 111 // Print any per-operand special info | |
| 112 uint methodOper::hash() const { | |
| 113 return (uint)_method; | |
| 114 } | |
| 115 | |
| 116 //------------------------------cmp-------------------------------------------- | |
| 117 // Print any per-operand special info | |
| 118 uint methodOper::cmp( const MachOper &oper ) const { | |
| 119 return (opcode() == oper.opcode()) && (_method == oper.method()); | |
| 120 } | |
| 121 | |
| 122 | |
| 123 //============================================================================= | |
| 124 //------------------------------MachNode--------------------------------------- | |
| 125 | |
| 126 //------------------------------emit------------------------------------------- | |
| 127 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
| 128 #ifdef ASSERT | |
| 129 tty->print("missing MachNode emit function: "); | |
| 130 dump(); | |
| 131 #endif | |
| 132 ShouldNotCallThis(); | |
| 133 } | |
| 134 | |
| 135 //------------------------------size------------------------------------------- | |
| 136 // Size of instruction in bytes | |
| 137 uint MachNode::size(PhaseRegAlloc *ra_) const { | |
| 138 // If a virtual was not defined for this specific instruction, | |
| 139 // Call the helper which finds the size by emiting the bits. | |
| 140 return MachNode::emit_size(ra_); | |
| 141 } | |
| 142 | |
| 143 //------------------------------size------------------------------------------- | |
| 144 // Helper function that computes size by emitting code | |
| 145 uint MachNode::emit_size(PhaseRegAlloc *ra_) const { | |
| 146 // Emit into a trash buffer and count bytes emitted. | |
| 147 assert(ra_ == ra_->C->regalloc(), "sanity"); | |
| 148 return ra_->C->scratch_emit_size(this); | |
| 149 } | |
| 150 | |
| 151 | |
| 152 | |
| 153 //------------------------------hash------------------------------------------- | |
| 154 uint MachNode::hash() const { | |
| 155 uint no = num_opnds(); | |
| 156 uint sum = rule(); | |
| 157 for( uint i=0; i<no; i++ ) | |
| 158 sum += _opnds[i]->hash(); | |
| 159 return sum+Node::hash(); | |
| 160 } | |
| 161 | |
| 162 //-----------------------------cmp--------------------------------------------- | |
| 163 uint MachNode::cmp( const Node &node ) const { | |
| 164 MachNode& n = *((Node&)node).as_Mach(); | |
| 165 uint no = num_opnds(); | |
| 166 if( no != n.num_opnds() ) return 0; | |
| 167 if( rule() != n.rule() ) return 0; | |
| 168 for( uint i=0; i<no; i++ ) // All operands must match | |
| 169 if( !_opnds[i]->cmp( *n._opnds[i] ) ) | |
| 170 return 0; // mis-matched operands | |
| 171 return 1; // match | |
| 172 } | |
| 173 | |
| 174 // Return an equivalent instruction using memory for cisc_operand position | |
| 175 MachNode *MachNode::cisc_version(int offset, Compile* C) { | |
| 176 ShouldNotCallThis(); | |
| 177 return NULL; | |
| 178 } | |
| 179 | |
| 180 void MachNode::use_cisc_RegMask() { | |
| 181 ShouldNotReachHere(); | |
| 182 } | |
| 183 | |
| 184 | |
| 185 //-----------------------------in_RegMask-------------------------------------- | |
| 186 const RegMask &MachNode::in_RegMask( uint idx ) const { | |
| 187 uint numopnds = num_opnds(); // Virtual call for number of operands | |
| 188 uint skipped = oper_input_base(); // Sum of leaves skipped so far | |
| 189 if( idx < skipped ) { | |
| 190 assert( ideal_Opcode() == Op_AddP, "expected base ptr here" ); | |
| 191 assert( idx == 1, "expected base ptr here" ); | |
| 192 // debug info can be anywhere | |
| 193 return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP]; | |
| 194 } | |
| 195 uint opcnt = 1; // First operand | |
| 196 uint num_edges = _opnds[1]->num_edges(); // leaves for first operand | |
| 197 while( idx >= skipped+num_edges ) { | |
| 198 skipped += num_edges; | |
| 199 opcnt++; // Bump operand count | |
| 200 assert( opcnt < numopnds, "Accessing non-existent operand" ); | |
| 201 num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand | |
| 202 } | |
| 203 | |
| 204 const RegMask *rm = cisc_RegMask(); | |
| 205 if( rm == NULL || (int)opcnt != cisc_operand() ) { | |
| 206 rm = _opnds[opcnt]->in_RegMask(idx-skipped); | |
| 207 } | |
| 208 return *rm; | |
| 209 } | |
| 210 | |
| 211 //-----------------------------memory_inputs-------------------------------- | |
| 212 const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const { | |
| 213 const MachOper* oper = memory_operand(); | |
| 214 | |
| 215 if (oper == (MachOper*)-1) { | |
| 216 base = NodeSentinel; | |
| 217 index = NodeSentinel; | |
| 218 } else { | |
| 219 base = NULL; | |
| 220 index = NULL; | |
| 221 if (oper != NULL) { | |
| 222 // It has a unique memory operand. Find its index. | |
| 223 int oper_idx = num_opnds(); | |
| 224 while (--oper_idx >= 0) { | |
| 225 if (_opnds[oper_idx] == oper) break; | |
| 226 } | |
| 227 int oper_pos = operand_index(oper_idx); | |
| 228 int base_pos = oper->base_position(); | |
| 229 if (base_pos >= 0) { | |
| 230 base = _in[oper_pos+base_pos]; | |
| 231 } | |
| 232 int index_pos = oper->index_position(); | |
| 233 if (index_pos >= 0) { | |
| 234 index = _in[oper_pos+index_pos]; | |
| 235 } | |
| 236 } | |
| 237 } | |
| 238 | |
| 239 return oper; | |
| 240 } | |
| 241 | |
| 242 //-----------------------------get_base_and_disp---------------------------- | |
| 243 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const { | |
| 244 | |
| 245 // Find the memory inputs using our helper function | |
| 246 Node* base; | |
| 247 Node* index; | |
| 248 const MachOper* oper = memory_inputs(base, index); | |
| 249 | |
| 250 if (oper == NULL) { | |
| 251 // Base has been set to NULL | |
| 252 offset = 0; | |
| 253 } else if (oper == (MachOper*)-1) { | |
| 254 // Base has been set to NodeSentinel | |
| 255 // There is not a unique memory use here. We will fall to AliasIdxBot. | |
| 256 offset = Type::OffsetBot; | |
| 257 } else { | |
| 258 // Base may be NULL, even if offset turns out to be != 0 | |
| 259 | |
| 260 intptr_t disp = oper->constant_disp(); | |
| 261 int scale = oper->scale(); | |
| 262 // Now we have collected every part of the ADLC MEMORY_INTER. | |
| 263 // See if it adds up to a base + offset. | |
| 264 if (index != NULL) { | |
| 265 if (!index->is_Con()) { | |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
266 const TypeNarrowOop* narrowoop = index->bottom_type()->isa_narrowoop(); |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
267 if (narrowoop != NULL) { |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
268 // Memory references through narrow oops have a |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
269 // funny base so grab the type from the index. |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
270 adr_type = narrowoop->make_oopptr(); |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
271 return NULL; |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
272 } |
| 0 | 273 disp = Type::OffsetBot; |
| 274 } else if (disp != Type::OffsetBot) { | |
| 275 const TypeX* ti = index->bottom_type()->isa_intptr_t(); | |
| 276 if (ti == NULL) { | |
| 277 disp = Type::OffsetBot; // a random constant?? | |
| 278 } else { | |
| 279 disp += ti->get_con() << scale; | |
| 280 } | |
| 281 } | |
| 282 } | |
| 283 offset = disp; | |
| 284 | |
| 285 // In i486.ad, indOffset32X uses base==RegI and disp==RegP, | |
| 286 // this will prevent alias analysis without the following support: | |
| 287 // Lookup the TypePtr used by indOffset32X, a compile-time constant oop, | |
| 288 // Add the offset determined by the "base", or use Type::OffsetBot. | |
| 289 if( adr_type == TYPE_PTR_SENTINAL ) { | |
| 290 const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X | |
| 291 if (t_disp != NULL) { | |
| 292 offset = Type::OffsetBot; | |
| 293 const Type* t_base = base->bottom_type(); | |
| 294 if (t_base->isa_intptr_t()) { | |
| 295 const TypeX *t_offset = t_base->is_intptr_t(); | |
| 296 if( t_offset->is_con() ) { | |
| 297 offset = t_offset->get_con(); | |
| 298 } | |
| 299 } | |
| 300 adr_type = t_disp->add_offset(offset); | |
| 301 } | |
| 302 } | |
| 303 | |
| 304 } | |
| 305 return base; | |
| 306 } | |
| 307 | |
| 308 | |
| 309 //---------------------------------adr_type--------------------------------- | |
| 310 const class TypePtr *MachNode::adr_type() const { | |
| 311 intptr_t offset = 0; | |
| 312 const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type | |
| 313 const Node *base = get_base_and_disp(offset, adr_type); | |
| 314 if( adr_type != TYPE_PTR_SENTINAL ) { | |
| 315 return adr_type; // get_base_and_disp has the answer | |
| 316 } | |
| 317 | |
| 318 // Direct addressing modes have no base node, simply an indirect | |
| 319 // offset, which is always to raw memory. | |
| 320 // %%%%% Someday we'd like to allow constant oop offsets which | |
| 321 // would let Intel load from static globals in 1 instruction. | |
| 322 // Currently Intel requires 2 instructions and a register temp. | |
| 323 if (base == NULL) { | |
| 324 // NULL base, zero offset means no memory at all (a null pointer!) | |
| 325 if (offset == 0) { | |
| 326 return NULL; | |
| 327 } | |
| 328 // NULL base, any offset means any pointer whatever | |
| 329 if (offset == Type::OffsetBot) { | |
| 330 return TypePtr::BOTTOM; | |
| 331 } | |
| 332 // %%% make offset be intptr_t | |
| 333 assert(!Universe::heap()->is_in_reserved((oop)offset), "must be a raw ptr"); | |
| 334 return TypeRawPtr::BOTTOM; | |
| 335 } | |
| 336 | |
| 337 // base of -1 with no particular offset means all of memory | |
| 338 if (base == NodeSentinel) return TypePtr::BOTTOM; | |
| 339 | |
| 340 const Type* t = base->bottom_type(); | |
| 341 if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) { | |
| 342 // We cannot assert that the offset does not look oop-ish here. | |
| 343 // Depending on the heap layout the cardmark base could land | |
| 344 // inside some oopish region. It definitely does for Win2K. | |
| 345 // The sum of cardmark-base plus shift-by-9-oop lands outside | |
| 346 // the oop-ish area but we can't assert for that statically. | |
| 347 return TypeRawPtr::BOTTOM; | |
| 348 } | |
| 349 | |
| 350 const TypePtr *tp = t->isa_ptr(); | |
| 351 | |
| 352 // be conservative if we do not recognize the type | |
| 353 if (tp == NULL) { | |
| 354 return TypePtr::BOTTOM; | |
| 355 } | |
| 356 assert(tp->base() != Type::AnyPtr, "not a bare pointer"); | |
| 357 | |
| 358 return tp->add_offset(offset); | |
| 359 } | |
| 360 | |
| 361 | |
| 362 //-----------------------------operand_index--------------------------------- | |
| 363 int MachNode::operand_index( uint operand ) const { | |
| 364 if( operand < 1 ) return -1; | |
| 365 assert(operand < num_opnds(), "oob"); | |
| 366 if( _opnds[operand]->num_edges() == 0 ) return -1; | |
| 367 | |
| 368 uint skipped = oper_input_base(); // Sum of leaves skipped so far | |
| 369 for (uint opcnt = 1; opcnt < operand; opcnt++) { | |
| 370 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand | |
| 371 skipped += num_edges; | |
| 372 } | |
| 373 return skipped; | |
| 374 } | |
| 375 | |
| 376 | |
| 377 //------------------------------negate----------------------------------------- | |
| 378 // Negate conditional branches. Error for non-branch Nodes | |
| 379 void MachNode::negate() { | |
| 380 ShouldNotCallThis(); | |
| 381 } | |
| 382 | |
| 383 //------------------------------peephole--------------------------------------- | |
| 384 // Apply peephole rule(s) to this instruction | |
| 385 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) { | |
| 386 return NULL; | |
| 387 } | |
| 388 | |
| 389 //------------------------------add_case_label--------------------------------- | |
| 390 // Adds the label for the case | |
| 391 void MachNode::add_case_label( int index_num, Label* blockLabel) { | |
| 392 ShouldNotCallThis(); | |
| 393 } | |
| 394 | |
| 395 //------------------------------label_set-------------------------------------- | |
| 396 // Set the Label for a LabelOper, if an operand for this instruction | |
| 397 void MachNode::label_set( Label& label, uint block_num ) { | |
| 398 ShouldNotCallThis(); | |
| 399 } | |
| 400 | |
| 401 //------------------------------method_set------------------------------------- | |
| 402 // Set the absolute address of a method | |
| 403 void MachNode::method_set( intptr_t addr ) { | |
| 404 ShouldNotCallThis(); | |
| 405 } | |
| 406 | |
| 407 //------------------------------rematerialize---------------------------------- | |
| 408 bool MachNode::rematerialize() const { | |
| 409 // Temps are always rematerializable | |
| 410 if (is_MachTemp()) return true; | |
| 411 | |
| 412 uint r = rule(); // Match rule | |
| 413 if( r < Matcher::_begin_rematerialize || | |
| 414 r >= Matcher::_end_rematerialize ) | |
| 415 return false; | |
| 416 | |
| 417 // For 2-address instructions, the input live range is also the output | |
| 418 // live range. Remateralizing does not make progress on the that live range. | |
| 419 if( two_adr() ) return false; | |
| 420 | |
| 421 // Check for rematerializing float constants, or not | |
| 422 if( !Matcher::rematerialize_float_constants ) { | |
| 423 int op = ideal_Opcode(); | |
| 424 if( op == Op_ConF || op == Op_ConD ) | |
| 425 return false; | |
| 426 } | |
| 427 | |
| 428 // Defining flags - can't spill these! Must remateralize. | |
| 429 if( ideal_reg() == Op_RegFlags ) | |
| 430 return true; | |
| 431 | |
| 432 // Stretching lots of inputs - don't do it. | |
| 433 if( req() > 2 ) | |
| 434 return false; | |
| 435 | |
| 436 // Don't remateralize somebody with bound inputs - it stretches a | |
| 437 // fixed register lifetime. | |
| 438 uint idx = oper_input_base(); | |
| 439 if( req() > idx ) { | |
| 440 const RegMask &rm = in_RegMask(idx); | |
| 441 if( rm.is_bound1() || rm.is_bound2() ) | |
| 442 return false; | |
| 443 } | |
| 444 | |
| 445 return true; | |
| 446 } | |
| 447 | |
| 448 #ifndef PRODUCT | |
| 449 //------------------------------dump_spec-------------------------------------- | |
| 450 // Print any per-operand special info | |
| 451 void MachNode::dump_spec(outputStream *st) const { | |
| 452 uint cnt = num_opnds(); | |
| 453 for( uint i=0; i<cnt; i++ ) | |
| 454 _opnds[i]->dump_spec(st); | |
| 455 const TypePtr *t = adr_type(); | |
| 456 if( t ) { | |
| 457 Compile* C = Compile::current(); | |
| 458 if( C->alias_type(t)->is_volatile() ) | |
| 459 st->print(" Volatile!"); | |
| 460 } | |
| 461 } | |
| 462 | |
| 463 //------------------------------dump_format------------------------------------ | |
| 464 // access to virtual | |
| 465 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const { | |
| 466 format(ra, st); // access to virtual | |
| 467 } | |
| 468 #endif | |
| 469 | |
| 470 //============================================================================= | |
| 471 #ifndef PRODUCT | |
| 472 void MachTypeNode::dump_spec(outputStream *st) const { | |
| 473 _bottom_type->dump_on(st); | |
| 474 } | |
| 475 #endif | |
| 476 | |
| 477 //============================================================================= | |
| 478 #ifndef PRODUCT | |
| 479 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const { | |
| 480 int reg = ra_->get_reg_first(in(1)->in(_vidx)); | |
| 481 tty->print("%s %s", Name(), Matcher::regName[reg]); | |
| 482 } | |
| 483 #endif | |
| 484 | |
| 485 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
| 486 // only emits entries in the null-pointer exception handler table | |
| 487 } | |
| 488 | |
| 489 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const { | |
| 490 if( idx == 0 ) return RegMask::Empty; | |
| 491 else return in(1)->as_Mach()->out_RegMask(); | |
| 492 } | |
| 493 | |
| 494 //============================================================================= | |
| 495 const Type *MachProjNode::bottom_type() const { | |
| 496 if( _ideal_reg == fat_proj ) return Type::BOTTOM; | |
| 497 // Try the normal mechanism first | |
| 498 const Type *t = in(0)->bottom_type(); | |
| 499 if( t->base() == Type::Tuple ) { | |
| 500 const TypeTuple *tt = t->is_tuple(); | |
| 501 if (_con < tt->cnt()) | |
| 502 return tt->field_at(_con); | |
| 503 } | |
| 504 // Else use generic type from ideal register set | |
| 505 assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds"); | |
| 506 return Type::mreg2type[_ideal_reg]; | |
| 507 } | |
| 508 | |
| 509 const TypePtr *MachProjNode::adr_type() const { | |
| 510 if (bottom_type() == Type::MEMORY) { | |
| 511 // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM | |
| 512 const TypePtr* adr_type = in(0)->adr_type(); | |
| 513 #ifdef ASSERT | |
| 514 if (!is_error_reported() && !Node::in_dump()) | |
| 515 assert(adr_type != NULL, "source must have adr_type"); | |
| 516 #endif | |
| 517 return adr_type; | |
| 518 } | |
| 519 assert(bottom_type()->base() != Type::Memory, "no other memories?"); | |
| 520 return NULL; | |
| 521 } | |
| 522 | |
| 523 #ifndef PRODUCT | |
| 524 void MachProjNode::dump_spec(outputStream *st) const { | |
| 525 ProjNode::dump_spec(st); | |
| 526 switch (_ideal_reg) { | |
| 527 case unmatched_proj: st->print("/unmatched"); break; | |
| 528 case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break; | |
| 529 } | |
| 530 } | |
| 531 #endif | |
| 532 | |
| 533 //============================================================================= | |
| 534 #ifndef PRODUCT | |
| 535 void MachIfNode::dump_spec(outputStream *st) const { | |
| 536 st->print("P=%f, C=%f",_prob, _fcnt); | |
| 537 } | |
| 538 #endif | |
| 539 | |
| 540 //============================================================================= | |
| 541 uint MachReturnNode::size_of() const { return sizeof(*this); } | |
| 542 | |
| 543 //------------------------------Registers-------------------------------------- | |
| 544 const RegMask &MachReturnNode::in_RegMask( uint idx ) const { | |
| 545 return _in_rms[idx]; | |
| 546 } | |
| 547 | |
| 548 const TypePtr *MachReturnNode::adr_type() const { | |
| 549 // most returns and calls are assumed to consume & modify all of memory | |
| 550 // the matcher will copy non-wide adr_types from ideal originals | |
| 551 return _adr_type; | |
| 552 } | |
| 553 | |
| 554 //============================================================================= | |
| 555 const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; } | |
| 556 | |
| 557 //------------------------------Registers-------------------------------------- | |
| 558 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const { | |
| 559 // Values in the domain use the users calling convention, embodied in the | |
| 560 // _in_rms array of RegMasks. | |
| 561 if( idx < TypeFunc::Parms ) return _in_rms[idx]; | |
| 562 | |
| 563 if (SafePointNode::needs_polling_address_input() && | |
| 564 idx == TypeFunc::Parms && | |
| 565 ideal_Opcode() == Op_SafePoint) { | |
| 566 return MachNode::in_RegMask(idx); | |
| 567 } | |
| 568 | |
| 569 // Values outside the domain represent debug info | |
| 570 return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()]; | |
| 571 } | |
| 572 | |
| 573 | |
| 574 //============================================================================= | |
| 575 | |
| 576 uint MachCallNode::cmp( const Node &n ) const | |
| 577 { return _tf == ((MachCallNode&)n)._tf; } | |
| 578 const Type *MachCallNode::bottom_type() const { return tf()->range(); } | |
| 579 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); } | |
| 580 | |
| 581 #ifndef PRODUCT | |
| 582 void MachCallNode::dump_spec(outputStream *st) const { | |
| 583 st->print("# "); | |
| 584 tf()->dump_on(st); | |
| 585 if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt); | |
| 586 if (jvms() != NULL) jvms()->dump_spec(st); | |
| 587 } | |
| 588 #endif | |
| 589 | |
| 590 | |
| 591 bool MachCallNode::return_value_is_used() const { | |
| 592 if (tf()->range()->cnt() == TypeFunc::Parms) { | |
| 593 // void return | |
| 594 return false; | |
| 595 } | |
| 596 | |
| 597 // find the projection corresponding to the return value | |
| 598 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) { | |
| 599 Node *use = fast_out(i); | |
| 600 if (!use->is_Proj()) continue; | |
| 601 if (use->as_Proj()->_con == TypeFunc::Parms) { | |
| 602 return true; | |
| 603 } | |
| 604 } | |
| 605 return false; | |
| 606 } | |
| 607 | |
| 608 | |
| 609 //------------------------------Registers-------------------------------------- | |
| 610 const RegMask &MachCallNode::in_RegMask( uint idx ) const { | |
| 611 // Values in the domain use the users calling convention, embodied in the | |
| 612 // _in_rms array of RegMasks. | |
| 613 if (idx < tf()->domain()->cnt()) return _in_rms[idx]; | |
| 614 // Values outside the domain represent debug info | |
| 615 return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()]; | |
| 616 } | |
| 617 | |
| 618 //============================================================================= | |
| 619 uint MachCallJavaNode::size_of() const { return sizeof(*this); } | |
| 620 uint MachCallJavaNode::cmp( const Node &n ) const { | |
| 621 MachCallJavaNode &call = (MachCallJavaNode&)n; | |
| 622 return MachCallNode::cmp(call) && _method->equals(call._method); | |
| 623 } | |
| 624 #ifndef PRODUCT | |
| 625 void MachCallJavaNode::dump_spec(outputStream *st) const { | |
| 626 if( _method ) { | |
| 627 _method->print_short_name(st); | |
| 628 st->print(" "); | |
| 629 } | |
| 630 MachCallNode::dump_spec(st); | |
| 631 } | |
| 632 #endif | |
| 633 | |
| 634 //============================================================================= | |
| 635 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); } | |
| 636 uint MachCallStaticJavaNode::cmp( const Node &n ) const { | |
| 637 MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n; | |
| 638 return MachCallJavaNode::cmp(call) && _name == call._name; | |
| 639 } | |
| 640 | |
| 641 //----------------------------uncommon_trap_request---------------------------- | |
| 642 // If this is an uncommon trap, return the request code, else zero. | |
| 643 int MachCallStaticJavaNode::uncommon_trap_request() const { | |
| 644 if (_name != NULL && !strcmp(_name, "uncommon_trap")) { | |
| 645 return CallStaticJavaNode::extract_uncommon_trap_request(this); | |
| 646 } | |
| 647 return 0; | |
| 648 } | |
| 649 | |
| 650 #ifndef PRODUCT | |
| 651 // Helper for summarizing uncommon_trap arguments. | |
| 652 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const { | |
| 653 int trap_req = uncommon_trap_request(); | |
| 654 if (trap_req != 0) { | |
| 655 char buf[100]; | |
| 656 st->print("(%s)", | |
| 657 Deoptimization::format_trap_request(buf, sizeof(buf), | |
| 658 trap_req)); | |
| 659 } | |
| 660 } | |
| 661 | |
| 662 void MachCallStaticJavaNode::dump_spec(outputStream *st) const { | |
| 663 st->print("Static "); | |
| 664 if (_name != NULL) { | |
| 665 st->print("wrapper for: %s", _name ); | |
| 666 dump_trap_args(st); | |
| 667 st->print(" "); | |
| 668 } | |
| 669 MachCallJavaNode::dump_spec(st); | |
| 670 } | |
| 671 #endif | |
| 672 | |
| 673 //============================================================================= | |
| 674 #ifndef PRODUCT | |
| 675 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const { | |
| 676 st->print("Dynamic "); | |
| 677 MachCallJavaNode::dump_spec(st); | |
| 678 } | |
| 679 #endif | |
| 680 //============================================================================= | |
| 681 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); } | |
| 682 uint MachCallRuntimeNode::cmp( const Node &n ) const { | |
| 683 MachCallRuntimeNode &call = (MachCallRuntimeNode&)n; | |
| 684 return MachCallNode::cmp(call) && !strcmp(_name,call._name); | |
| 685 } | |
| 686 #ifndef PRODUCT | |
| 687 void MachCallRuntimeNode::dump_spec(outputStream *st) const { | |
| 688 st->print("%s ",_name); | |
| 689 MachCallNode::dump_spec(st); | |
| 690 } | |
| 691 #endif | |
| 692 //============================================================================= | |
| 693 // A shared JVMState for all HaltNodes. Indicates the start of debug info | |
| 694 // is at TypeFunc::Parms. Only required for SOE register spill handling - | |
| 695 // to indicate where the stack-slot-only debug info inputs begin. | |
| 696 // There is no other JVM state needed here. | |
| 697 JVMState jvms_for_throw(0); | |
| 698 JVMState *MachHaltNode::jvms() const { | |
| 699 return &jvms_for_throw; | |
| 700 } | |
| 701 | |
| 702 //============================================================================= | |
| 703 #ifndef PRODUCT | |
| 704 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { | |
| 705 st->print("B%d", _block_num); | |
| 706 } | |
| 707 #endif // PRODUCT | |
| 708 | |
| 709 //============================================================================= | |
| 710 #ifndef PRODUCT | |
| 711 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { | |
| 712 st->print(INTPTR_FORMAT, _method); | |
| 713 } | |
| 714 #endif // PRODUCT |