Mercurial > hg > truffle
annotate src/cpu/sparc/vm/stubGenerator_sparc.cpp @ 644:c517646eef23
6813212: factor duplicated assembly code for general subclass check (for 6655638)
Summary: Code in interp_masm, stubGenerator, c1_LIRAssembler, and AD files moved into MacroAssembler.
Reviewed-by: kvn
| author | jrose |
|---|---|
| date | Fri, 13 Mar 2009 18:39:22 -0700 |
| parents | 660978a2a31a |
| children | d0994e5bebce |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 196 | 2 * Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
| 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 21 * have any questions. | |
| 22 * | |
| 23 */ | |
| 24 | |
| 25 #include "incls/_precompiled.incl" | |
| 26 #include "incls/_stubGenerator_sparc.cpp.incl" | |
| 27 | |
| 28 // Declaration and definition of StubGenerator (no .hpp file). | |
| 29 // For a more detailed description of the stub routine structure | |
| 30 // see the comment in stubRoutines.hpp. | |
| 31 | |
| 32 #define __ _masm-> | |
| 33 | |
| 34 #ifdef PRODUCT | |
| 35 #define BLOCK_COMMENT(str) /* nothing */ | |
| 36 #else | |
| 37 #define BLOCK_COMMENT(str) __ block_comment(str) | |
| 38 #endif | |
| 39 | |
| 40 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") | |
| 41 | |
| 42 // Note: The register L7 is used as L7_thread_cache, and may not be used | |
| 43 // any other way within this module. | |
| 44 | |
| 45 | |
| 46 static const Register& Lstub_temp = L2; | |
| 47 | |
| 48 // ------------------------------------------------------------------------------------------------------------------------- | |
| 49 // Stub Code definitions | |
| 50 | |
| 51 static address handle_unsafe_access() { | |
| 52 JavaThread* thread = JavaThread::current(); | |
| 53 address pc = thread->saved_exception_pc(); | |
| 54 address npc = thread->saved_exception_npc(); | |
| 55 // pc is the instruction which we must emulate | |
| 56 // doing a no-op is fine: return garbage from the load | |
| 57 | |
| 58 // request an async exception | |
| 59 thread->set_pending_unsafe_access_error(); | |
| 60 | |
| 61 // return address of next instruction to execute | |
| 62 return npc; | |
| 63 } | |
| 64 | |
| 65 class StubGenerator: public StubCodeGenerator { | |
| 66 private: | |
| 67 | |
| 68 #ifdef PRODUCT | |
| 69 #define inc_counter_np(a,b,c) (0) | |
| 70 #else | |
| 71 void inc_counter_np_(int& counter, Register t1, Register t2) { | |
| 72 Address counter_addr(t2, (address) &counter); | |
| 73 __ sethi(counter_addr); | |
| 74 __ ld(counter_addr, t1); | |
| 75 __ inc(t1); | |
| 76 __ st(t1, counter_addr); | |
| 77 } | |
| 78 #define inc_counter_np(counter, t1, t2) \ | |
| 79 BLOCK_COMMENT("inc_counter " #counter); \ | |
| 80 inc_counter_np_(counter, t1, t2); | |
| 81 #endif | |
| 82 | |
| 83 //---------------------------------------------------------------------------------------------------- | |
| 84 // Call stubs are used to call Java from C | |
| 85 | |
| 86 address generate_call_stub(address& return_pc) { | |
| 87 StubCodeMark mark(this, "StubRoutines", "call_stub"); | |
| 88 address start = __ pc(); | |
| 89 | |
| 90 // Incoming arguments: | |
| 91 // | |
| 92 // o0 : call wrapper address | |
| 93 // o1 : result (address) | |
| 94 // o2 : result type | |
| 95 // o3 : method | |
| 96 // o4 : (interpreter) entry point | |
| 97 // o5 : parameters (address) | |
| 98 // [sp + 0x5c]: parameter size (in words) | |
| 99 // [sp + 0x60]: thread | |
| 100 // | |
| 101 // +---------------+ <--- sp + 0 | |
| 102 // | | | |
| 103 // . reg save area . | |
| 104 // | | | |
| 105 // +---------------+ <--- sp + 0x40 | |
| 106 // | | | |
| 107 // . extra 7 slots . | |
| 108 // | | | |
| 109 // +---------------+ <--- sp + 0x5c | |
| 110 // | param. size | | |
| 111 // +---------------+ <--- sp + 0x60 | |
| 112 // | thread | | |
| 113 // +---------------+ | |
| 114 // | | | |
| 115 | |
| 116 // note: if the link argument position changes, adjust | |
| 117 // the code in frame::entry_frame_call_wrapper() | |
| 118 | |
| 119 const Argument link = Argument(0, false); // used only for GC | |
| 120 const Argument result = Argument(1, false); | |
| 121 const Argument result_type = Argument(2, false); | |
| 122 const Argument method = Argument(3, false); | |
| 123 const Argument entry_point = Argument(4, false); | |
| 124 const Argument parameters = Argument(5, false); | |
| 125 const Argument parameter_size = Argument(6, false); | |
| 126 const Argument thread = Argument(7, false); | |
| 127 | |
| 128 // setup thread register | |
| 129 __ ld_ptr(thread.as_address(), G2_thread); | |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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130 __ reinit_heapbase(); |
| 0 | 131 |
| 132 #ifdef ASSERT | |
| 133 // make sure we have no pending exceptions | |
| 134 { const Register t = G3_scratch; | |
| 135 Label L; | |
| 136 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), t); | |
| 137 __ br_null(t, false, Assembler::pt, L); | |
| 138 __ delayed()->nop(); | |
| 139 __ stop("StubRoutines::call_stub: entered with pending exception"); | |
| 140 __ bind(L); | |
| 141 } | |
| 142 #endif | |
| 143 | |
| 144 // create activation frame & allocate space for parameters | |
| 145 { const Register t = G3_scratch; | |
| 146 __ ld_ptr(parameter_size.as_address(), t); // get parameter size (in words) | |
| 147 __ add(t, frame::memory_parameter_word_sp_offset, t); // add space for save area (in words) | |
| 148 __ round_to(t, WordsPerLong); // make sure it is multiple of 2 (in words) | |
| 149 __ sll(t, Interpreter::logStackElementSize(), t); // compute number of bytes | |
| 150 __ neg(t); // negate so it can be used with save | |
| 151 __ save(SP, t, SP); // setup new frame | |
| 152 } | |
| 153 | |
| 154 // +---------------+ <--- sp + 0 | |
| 155 // | | | |
| 156 // . reg save area . | |
| 157 // | | | |
| 158 // +---------------+ <--- sp + 0x40 | |
| 159 // | | | |
| 160 // . extra 7 slots . | |
| 161 // | | | |
| 162 // +---------------+ <--- sp + 0x5c | |
| 163 // | empty slot | (only if parameter size is even) | |
| 164 // +---------------+ | |
| 165 // | | | |
| 166 // . parameters . | |
| 167 // | | | |
| 168 // +---------------+ <--- fp + 0 | |
| 169 // | | | |
| 170 // . reg save area . | |
| 171 // | | | |
| 172 // +---------------+ <--- fp + 0x40 | |
| 173 // | | | |
| 174 // . extra 7 slots . | |
| 175 // | | | |
| 176 // +---------------+ <--- fp + 0x5c | |
| 177 // | param. size | | |
| 178 // +---------------+ <--- fp + 0x60 | |
| 179 // | thread | | |
| 180 // +---------------+ | |
| 181 // | | | |
| 182 | |
| 183 // pass parameters if any | |
| 184 BLOCK_COMMENT("pass parameters if any"); | |
| 185 { const Register src = parameters.as_in().as_register(); | |
| 186 const Register dst = Lentry_args; | |
| 187 const Register tmp = G3_scratch; | |
| 188 const Register cnt = G4_scratch; | |
| 189 | |
| 190 // test if any parameters & setup of Lentry_args | |
| 191 Label exit; | |
| 192 __ ld_ptr(parameter_size.as_in().as_address(), cnt); // parameter counter | |
| 193 __ add( FP, STACK_BIAS, dst ); | |
| 194 __ tst(cnt); | |
| 195 __ br(Assembler::zero, false, Assembler::pn, exit); | |
| 196 __ delayed()->sub(dst, BytesPerWord, dst); // setup Lentry_args | |
| 197 | |
| 198 // copy parameters if any | |
| 199 Label loop; | |
| 200 __ BIND(loop); | |
| 201 // Store tag first. | |
| 202 if (TaggedStackInterpreter) { | |
| 203 __ ld_ptr(src, 0, tmp); | |
| 204 __ add(src, BytesPerWord, src); // get next | |
| 205 __ st_ptr(tmp, dst, Interpreter::tag_offset_in_bytes()); | |
| 206 } | |
| 207 // Store parameter value | |
| 208 __ ld_ptr(src, 0, tmp); | |
| 209 __ add(src, BytesPerWord, src); | |
| 210 __ st_ptr(tmp, dst, Interpreter::value_offset_in_bytes()); | |
| 211 __ deccc(cnt); | |
| 212 __ br(Assembler::greater, false, Assembler::pt, loop); | |
| 213 __ delayed()->sub(dst, Interpreter::stackElementSize(), dst); | |
| 214 | |
| 215 // done | |
| 216 __ BIND(exit); | |
| 217 } | |
| 218 | |
| 219 // setup parameters, method & call Java function | |
| 220 #ifdef ASSERT | |
| 221 // layout_activation_impl checks it's notion of saved SP against | |
| 222 // this register, so if this changes update it as well. | |
| 223 const Register saved_SP = Lscratch; | |
| 224 __ mov(SP, saved_SP); // keep track of SP before call | |
| 225 #endif | |
| 226 | |
| 227 // setup parameters | |
| 228 const Register t = G3_scratch; | |
| 229 __ ld_ptr(parameter_size.as_in().as_address(), t); // get parameter size (in words) | |
| 230 __ sll(t, Interpreter::logStackElementSize(), t); // compute number of bytes | |
| 231 __ sub(FP, t, Gargs); // setup parameter pointer | |
| 232 #ifdef _LP64 | |
| 233 __ add( Gargs, STACK_BIAS, Gargs ); // Account for LP64 stack bias | |
| 234 #endif | |
| 235 __ mov(SP, O5_savedSP); | |
| 236 | |
| 237 | |
| 238 // do the call | |
| 239 // | |
| 240 // the following register must be setup: | |
| 241 // | |
| 242 // G2_thread | |
| 243 // G5_method | |
| 244 // Gargs | |
| 245 BLOCK_COMMENT("call Java function"); | |
| 246 __ jmpl(entry_point.as_in().as_register(), G0, O7); | |
| 247 __ delayed()->mov(method.as_in().as_register(), G5_method); // setup method | |
| 248 | |
| 249 BLOCK_COMMENT("call_stub_return_address:"); | |
| 250 return_pc = __ pc(); | |
| 251 | |
| 252 // The callee, if it wasn't interpreted, can return with SP changed so | |
| 253 // we can no longer assert of change of SP. | |
| 254 | |
| 255 // store result depending on type | |
| 256 // (everything that is not T_OBJECT, T_LONG, T_FLOAT, or T_DOUBLE | |
| 257 // is treated as T_INT) | |
| 258 { const Register addr = result .as_in().as_register(); | |
| 259 const Register type = result_type.as_in().as_register(); | |
| 260 Label is_long, is_float, is_double, is_object, exit; | |
| 261 __ cmp(type, T_OBJECT); __ br(Assembler::equal, false, Assembler::pn, is_object); | |
| 262 __ delayed()->cmp(type, T_FLOAT); __ br(Assembler::equal, false, Assembler::pn, is_float); | |
| 263 __ delayed()->cmp(type, T_DOUBLE); __ br(Assembler::equal, false, Assembler::pn, is_double); | |
| 264 __ delayed()->cmp(type, T_LONG); __ br(Assembler::equal, false, Assembler::pn, is_long); | |
| 265 __ delayed()->nop(); | |
| 266 | |
| 267 // store int result | |
| 268 __ st(O0, addr, G0); | |
| 269 | |
| 270 __ BIND(exit); | |
| 271 __ ret(); | |
| 272 __ delayed()->restore(); | |
| 273 | |
| 274 __ BIND(is_object); | |
| 275 __ ba(false, exit); | |
| 276 __ delayed()->st_ptr(O0, addr, G0); | |
| 277 | |
| 278 __ BIND(is_float); | |
| 279 __ ba(false, exit); | |
| 280 __ delayed()->stf(FloatRegisterImpl::S, F0, addr, G0); | |
| 281 | |
| 282 __ BIND(is_double); | |
| 283 __ ba(false, exit); | |
| 284 __ delayed()->stf(FloatRegisterImpl::D, F0, addr, G0); | |
| 285 | |
| 286 __ BIND(is_long); | |
| 287 #ifdef _LP64 | |
| 288 __ ba(false, exit); | |
| 289 __ delayed()->st_long(O0, addr, G0); // store entire long | |
| 290 #else | |
| 291 #if defined(COMPILER2) | |
| 292 // All return values are where we want them, except for Longs. C2 returns | |
| 293 // longs in G1 in the 32-bit build whereas the interpreter wants them in O0/O1. | |
| 294 // Since the interpreter will return longs in G1 and O0/O1 in the 32bit | |
| 295 // build we simply always use G1. | |
| 296 // Note: I tried to make c2 return longs in O0/O1 and G1 so we wouldn't have to | |
| 297 // do this here. Unfortunately if we did a rethrow we'd see an machepilog node | |
| 298 // first which would move g1 -> O0/O1 and destroy the exception we were throwing. | |
| 299 | |
| 300 __ ba(false, exit); | |
| 301 __ delayed()->stx(G1, addr, G0); // store entire long | |
| 302 #else | |
| 303 __ st(O1, addr, BytesPerInt); | |
| 304 __ ba(false, exit); | |
| 305 __ delayed()->st(O0, addr, G0); | |
| 306 #endif /* COMPILER2 */ | |
| 307 #endif /* _LP64 */ | |
| 308 } | |
| 309 return start; | |
| 310 } | |
| 311 | |
| 312 | |
| 313 //---------------------------------------------------------------------------------------------------- | |
| 314 // Return point for a Java call if there's an exception thrown in Java code. | |
| 315 // The exception is caught and transformed into a pending exception stored in | |
| 316 // JavaThread that can be tested from within the VM. | |
| 317 // | |
| 318 // Oexception: exception oop | |
| 319 | |
| 320 address generate_catch_exception() { | |
| 321 StubCodeMark mark(this, "StubRoutines", "catch_exception"); | |
| 322 | |
| 323 address start = __ pc(); | |
| 324 // verify that thread corresponds | |
| 325 __ verify_thread(); | |
| 326 | |
| 327 const Register& temp_reg = Gtemp; | |
| 328 Address pending_exception_addr (G2_thread, 0, in_bytes(Thread::pending_exception_offset())); | |
| 329 Address exception_file_offset_addr(G2_thread, 0, in_bytes(Thread::exception_file_offset ())); | |
| 330 Address exception_line_offset_addr(G2_thread, 0, in_bytes(Thread::exception_line_offset ())); | |
| 331 | |
| 332 // set pending exception | |
| 333 __ verify_oop(Oexception); | |
| 334 __ st_ptr(Oexception, pending_exception_addr); | |
| 335 __ set((intptr_t)__FILE__, temp_reg); | |
| 336 __ st_ptr(temp_reg, exception_file_offset_addr); | |
| 337 __ set((intptr_t)__LINE__, temp_reg); | |
| 338 __ st(temp_reg, exception_line_offset_addr); | |
| 339 | |
| 340 // complete return to VM | |
| 341 assert(StubRoutines::_call_stub_return_address != NULL, "must have been generated before"); | |
| 342 | |
| 343 Address stub_ret(temp_reg, StubRoutines::_call_stub_return_address); | |
| 344 __ jump_to(stub_ret); | |
| 345 __ delayed()->nop(); | |
| 346 | |
| 347 return start; | |
| 348 } | |
| 349 | |
| 350 | |
| 351 //---------------------------------------------------------------------------------------------------- | |
| 352 // Continuation point for runtime calls returning with a pending exception | |
| 353 // The pending exception check happened in the runtime or native call stub | |
| 354 // The pending exception in Thread is converted into a Java-level exception | |
| 355 // | |
| 356 // Contract with Java-level exception handler: O0 = exception | |
| 357 // O1 = throwing pc | |
| 358 | |
| 359 address generate_forward_exception() { | |
| 360 StubCodeMark mark(this, "StubRoutines", "forward_exception"); | |
| 361 address start = __ pc(); | |
| 362 | |
| 363 // Upon entry, O7 has the return address returning into Java | |
| 364 // (interpreted or compiled) code; i.e. the return address | |
| 365 // becomes the throwing pc. | |
| 366 | |
| 367 const Register& handler_reg = Gtemp; | |
| 368 | |
| 369 Address exception_addr (G2_thread, 0, in_bytes(Thread::pending_exception_offset())); | |
| 370 | |
| 371 #ifdef ASSERT | |
| 372 // make sure that this code is only executed if there is a pending exception | |
| 373 { Label L; | |
| 374 __ ld_ptr(exception_addr, Gtemp); | |
| 375 __ br_notnull(Gtemp, false, Assembler::pt, L); | |
| 376 __ delayed()->nop(); | |
| 377 __ stop("StubRoutines::forward exception: no pending exception (1)"); | |
| 378 __ bind(L); | |
| 379 } | |
| 380 #endif | |
| 381 | |
| 382 // compute exception handler into handler_reg | |
| 383 __ get_thread(); | |
| 384 __ ld_ptr(exception_addr, Oexception); | |
| 385 __ verify_oop(Oexception); | |
| 386 __ save_frame(0); // compensates for compiler weakness | |
| 387 __ add(O7->after_save(), frame::pc_return_offset, Lscratch); // save the issuing PC | |
| 388 BLOCK_COMMENT("call exception_handler_for_return_address"); | |
| 389 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), Lscratch); | |
| 390 __ mov(O0, handler_reg); | |
| 391 __ restore(); // compensates for compiler weakness | |
| 392 | |
| 393 __ ld_ptr(exception_addr, Oexception); | |
| 394 __ add(O7, frame::pc_return_offset, Oissuing_pc); // save the issuing PC | |
| 395 | |
| 396 #ifdef ASSERT | |
| 397 // make sure exception is set | |
| 398 { Label L; | |
| 399 __ br_notnull(Oexception, false, Assembler::pt, L); | |
| 400 __ delayed()->nop(); | |
| 401 __ stop("StubRoutines::forward exception: no pending exception (2)"); | |
| 402 __ bind(L); | |
| 403 } | |
| 404 #endif | |
| 405 // jump to exception handler | |
| 406 __ jmp(handler_reg, 0); | |
| 407 // clear pending exception | |
| 408 __ delayed()->st_ptr(G0, exception_addr); | |
| 409 | |
| 410 return start; | |
| 411 } | |
| 412 | |
| 413 | |
| 414 //------------------------------------------------------------------------------------------------------------------------ | |
| 415 // Continuation point for throwing of implicit exceptions that are not handled in | |
| 416 // the current activation. Fabricates an exception oop and initiates normal | |
| 417 // exception dispatching in this frame. Only callee-saved registers are preserved | |
| 418 // (through the normal register window / RegisterMap handling). | |
| 419 // If the compiler needs all registers to be preserved between the fault | |
| 420 // point and the exception handler then it must assume responsibility for that in | |
| 421 // AbstractCompiler::continuation_for_implicit_null_exception or | |
| 422 // continuation_for_implicit_division_by_zero_exception. All other implicit | |
| 423 // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are | |
| 424 // either at call sites or otherwise assume that stack unwinding will be initiated, | |
| 425 // so caller saved registers were assumed volatile in the compiler. | |
| 426 | |
| 427 // Note that we generate only this stub into a RuntimeStub, because it needs to be | |
| 428 // properly traversed and ignored during GC, so we change the meaning of the "__" | |
| 429 // macro within this method. | |
| 430 #undef __ | |
| 431 #define __ masm-> | |
| 432 | |
| 433 address generate_throw_exception(const char* name, address runtime_entry, bool restore_saved_exception_pc) { | |
| 434 #ifdef ASSERT | |
| 435 int insts_size = VerifyThread ? 1 * K : 600; | |
| 436 #else | |
| 437 int insts_size = VerifyThread ? 1 * K : 256; | |
| 438 #endif /* ASSERT */ | |
| 439 int locs_size = 32; | |
| 440 | |
| 441 CodeBuffer code(name, insts_size, locs_size); | |
| 442 MacroAssembler* masm = new MacroAssembler(&code); | |
| 443 | |
| 444 __ verify_thread(); | |
| 445 | |
| 446 // This is an inlined and slightly modified version of call_VM | |
| 447 // which has the ability to fetch the return PC out of thread-local storage | |
| 448 __ assert_not_delayed(); | |
| 449 | |
| 450 // Note that we always push a frame because on the SPARC | |
| 451 // architecture, for all of our implicit exception kinds at call | |
| 452 // sites, the implicit exception is taken before the callee frame | |
| 453 // is pushed. | |
| 454 __ save_frame(0); | |
| 455 | |
| 456 int frame_complete = __ offset(); | |
| 457 | |
| 458 if (restore_saved_exception_pc) { | |
| 459 Address saved_exception_pc(G2_thread, 0, in_bytes(JavaThread::saved_exception_pc_offset())); | |
| 460 __ ld_ptr(saved_exception_pc, I7); | |
| 461 __ sub(I7, frame::pc_return_offset, I7); | |
| 462 } | |
| 463 | |
| 464 // Note that we always have a runtime stub frame on the top of stack by this point | |
| 465 Register last_java_sp = SP; | |
| 466 // 64-bit last_java_sp is biased! | |
| 467 __ set_last_Java_frame(last_java_sp, G0); | |
| 468 if (VerifyThread) __ mov(G2_thread, O0); // about to be smashed; pass early | |
| 469 __ save_thread(noreg); | |
| 470 // do the call | |
| 471 BLOCK_COMMENT("call runtime_entry"); | |
| 472 __ call(runtime_entry, relocInfo::runtime_call_type); | |
| 473 if (!VerifyThread) | |
| 474 __ delayed()->mov(G2_thread, O0); // pass thread as first argument | |
| 475 else | |
| 476 __ delayed()->nop(); // (thread already passed) | |
| 477 __ restore_thread(noreg); | |
| 478 __ reset_last_Java_frame(); | |
| 479 | |
| 480 // check for pending exceptions. use Gtemp as scratch register. | |
| 481 #ifdef ASSERT | |
| 482 Label L; | |
| 483 | |
| 484 Address exception_addr(G2_thread, 0, in_bytes(Thread::pending_exception_offset())); | |
| 485 Register scratch_reg = Gtemp; | |
| 486 __ ld_ptr(exception_addr, scratch_reg); | |
| 487 __ br_notnull(scratch_reg, false, Assembler::pt, L); | |
| 488 __ delayed()->nop(); | |
| 489 __ should_not_reach_here(); | |
| 490 __ bind(L); | |
| 491 #endif // ASSERT | |
| 492 BLOCK_COMMENT("call forward_exception_entry"); | |
| 493 __ call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type); | |
| 494 // we use O7 linkage so that forward_exception_entry has the issuing PC | |
| 495 __ delayed()->restore(); | |
| 496 | |
| 497 RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, masm->total_frame_size_in_bytes(0), NULL, false); | |
| 498 return stub->entry_point(); | |
| 499 } | |
| 500 | |
| 501 #undef __ | |
| 502 #define __ _masm-> | |
| 503 | |
| 504 | |
| 505 // Generate a routine that sets all the registers so we | |
| 506 // can tell if the stop routine prints them correctly. | |
| 507 address generate_test_stop() { | |
| 508 StubCodeMark mark(this, "StubRoutines", "test_stop"); | |
| 509 address start = __ pc(); | |
| 510 | |
| 511 int i; | |
| 512 | |
| 513 __ save_frame(0); | |
| 514 | |
| 515 static jfloat zero = 0.0, one = 1.0; | |
| 516 | |
| 517 // put addr in L0, then load through L0 to F0 | |
| 518 __ set((intptr_t)&zero, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F0); | |
| 519 __ set((intptr_t)&one, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F1); // 1.0 to F1 | |
| 520 | |
| 521 // use add to put 2..18 in F2..F18 | |
| 522 for ( i = 2; i <= 18; ++i ) { | |
| 523 __ fadd( FloatRegisterImpl::S, F1, as_FloatRegister(i-1), as_FloatRegister(i)); | |
| 524 } | |
| 525 | |
| 526 // Now put double 2 in F16, double 18 in F18 | |
| 527 __ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F2, F16 ); | |
| 528 __ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F18, F18 ); | |
| 529 | |
| 530 // use add to put 20..32 in F20..F32 | |
| 531 for (i = 20; i < 32; i += 2) { | |
| 532 __ fadd( FloatRegisterImpl::D, F16, as_FloatRegister(i-2), as_FloatRegister(i)); | |
| 533 } | |
| 534 | |
| 535 // put 0..7 in i's, 8..15 in l's, 16..23 in o's, 24..31 in g's | |
| 536 for ( i = 0; i < 8; ++i ) { | |
| 537 if (i < 6) { | |
| 538 __ set( i, as_iRegister(i)); | |
| 539 __ set(16 + i, as_oRegister(i)); | |
| 540 __ set(24 + i, as_gRegister(i)); | |
| 541 } | |
| 542 __ set( 8 + i, as_lRegister(i)); | |
| 543 } | |
| 544 | |
| 545 __ stop("testing stop"); | |
| 546 | |
| 547 | |
| 548 __ ret(); | |
| 549 __ delayed()->restore(); | |
| 550 | |
| 551 return start; | |
| 552 } | |
| 553 | |
| 554 | |
| 555 address generate_stop_subroutine() { | |
| 556 StubCodeMark mark(this, "StubRoutines", "stop_subroutine"); | |
| 557 address start = __ pc(); | |
| 558 | |
| 559 __ stop_subroutine(); | |
| 560 | |
| 561 return start; | |
| 562 } | |
| 563 | |
| 564 address generate_flush_callers_register_windows() { | |
| 565 StubCodeMark mark(this, "StubRoutines", "flush_callers_register_windows"); | |
| 566 address start = __ pc(); | |
| 567 | |
| 568 __ flush_windows(); | |
| 569 __ retl(false); | |
| 570 __ delayed()->add( FP, STACK_BIAS, O0 ); | |
| 571 // The returned value must be a stack pointer whose register save area | |
| 572 // is flushed, and will stay flushed while the caller executes. | |
| 573 | |
| 574 return start; | |
| 575 } | |
| 576 | |
| 577 // Helper functions for v8 atomic operations. | |
| 578 // | |
| 579 void get_v8_oop_lock_ptr(Register lock_ptr_reg, Register mark_oop_reg, Register scratch_reg) { | |
| 580 if (mark_oop_reg == noreg) { | |
| 581 address lock_ptr = (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(); | |
| 582 __ set((intptr_t)lock_ptr, lock_ptr_reg); | |
| 583 } else { | |
| 584 assert(scratch_reg != noreg, "just checking"); | |
| 585 address lock_ptr = (address)StubRoutines::Sparc::_v8_oop_lock_cache; | |
| 586 __ set((intptr_t)lock_ptr, lock_ptr_reg); | |
| 587 __ and3(mark_oop_reg, StubRoutines::Sparc::v8_oop_lock_mask_in_place, scratch_reg); | |
| 588 __ add(lock_ptr_reg, scratch_reg, lock_ptr_reg); | |
| 589 } | |
| 590 } | |
| 591 | |
| 592 void generate_v8_lock_prologue(Register lock_reg, Register lock_ptr_reg, Register yield_reg, Label& retry, Label& dontyield, Register mark_oop_reg = noreg, Register scratch_reg = noreg) { | |
| 593 | |
| 594 get_v8_oop_lock_ptr(lock_ptr_reg, mark_oop_reg, scratch_reg); | |
| 595 __ set(StubRoutines::Sparc::locked, lock_reg); | |
| 596 // Initialize yield counter | |
| 597 __ mov(G0,yield_reg); | |
| 598 | |
| 599 __ BIND(retry); | |
| 600 __ cmp(yield_reg, V8AtomicOperationUnderLockSpinCount); | |
| 601 __ br(Assembler::less, false, Assembler::pt, dontyield); | |
| 602 __ delayed()->nop(); | |
| 603 | |
| 604 // This code can only be called from inside the VM, this | |
| 605 // stub is only invoked from Atomic::add(). We do not | |
| 606 // want to use call_VM, because _last_java_sp and such | |
| 607 // must already be set. | |
| 608 // | |
| 609 // Save the regs and make space for a C call | |
| 610 __ save(SP, -96, SP); | |
| 611 __ save_all_globals_into_locals(); | |
| 612 BLOCK_COMMENT("call os::naked_sleep"); | |
| 613 __ call(CAST_FROM_FN_PTR(address, os::naked_sleep)); | |
| 614 __ delayed()->nop(); | |
| 615 __ restore_globals_from_locals(); | |
| 616 __ restore(); | |
| 617 // reset the counter | |
| 618 __ mov(G0,yield_reg); | |
| 619 | |
| 620 __ BIND(dontyield); | |
| 621 | |
| 622 // try to get lock | |
| 623 __ swap(lock_ptr_reg, 0, lock_reg); | |
| 624 | |
| 625 // did we get the lock? | |
| 626 __ cmp(lock_reg, StubRoutines::Sparc::unlocked); | |
| 627 __ br(Assembler::notEqual, true, Assembler::pn, retry); | |
| 628 __ delayed()->add(yield_reg,1,yield_reg); | |
| 629 | |
| 630 // yes, got lock. do the operation here. | |
| 631 } | |
| 632 | |
| 633 void generate_v8_lock_epilogue(Register lock_reg, Register lock_ptr_reg, Register yield_reg, Label& retry, Label& dontyield, Register mark_oop_reg = noreg, Register scratch_reg = noreg) { | |
| 634 __ st(lock_reg, lock_ptr_reg, 0); // unlock | |
| 635 } | |
| 636 | |
| 637 // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest). | |
| 638 // | |
| 639 // Arguments : | |
| 640 // | |
| 641 // exchange_value: O0 | |
| 642 // dest: O1 | |
| 643 // | |
| 644 // Results: | |
| 645 // | |
| 646 // O0: the value previously stored in dest | |
| 647 // | |
| 648 address generate_atomic_xchg() { | |
| 649 StubCodeMark mark(this, "StubRoutines", "atomic_xchg"); | |
| 650 address start = __ pc(); | |
| 651 | |
| 652 if (UseCASForSwap) { | |
| 653 // Use CAS instead of swap, just in case the MP hardware | |
| 654 // prefers to work with just one kind of synch. instruction. | |
| 655 Label retry; | |
| 656 __ BIND(retry); | |
| 657 __ mov(O0, O3); // scratch copy of exchange value | |
| 658 __ ld(O1, 0, O2); // observe the previous value | |
| 659 // try to replace O2 with O3 | |
| 660 __ cas_under_lock(O1, O2, O3, | |
| 661 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(),false); | |
| 662 __ cmp(O2, O3); | |
| 663 __ br(Assembler::notEqual, false, Assembler::pn, retry); | |
| 664 __ delayed()->nop(); | |
| 665 | |
| 666 __ retl(false); | |
| 667 __ delayed()->mov(O2, O0); // report previous value to caller | |
| 668 | |
| 669 } else { | |
| 670 if (VM_Version::v9_instructions_work()) { | |
| 671 __ retl(false); | |
| 672 __ delayed()->swap(O1, 0, O0); | |
| 673 } else { | |
| 674 const Register& lock_reg = O2; | |
| 675 const Register& lock_ptr_reg = O3; | |
| 676 const Register& yield_reg = O4; | |
| 677 | |
| 678 Label retry; | |
| 679 Label dontyield; | |
| 680 | |
| 681 generate_v8_lock_prologue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 682 // got the lock, do the swap | |
| 683 __ swap(O1, 0, O0); | |
| 684 | |
| 685 generate_v8_lock_epilogue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 686 __ retl(false); | |
| 687 __ delayed()->nop(); | |
| 688 } | |
| 689 } | |
| 690 | |
| 691 return start; | |
| 692 } | |
| 693 | |
| 694 | |
| 695 // Support for jint Atomic::cmpxchg(jint exchange_value, volatile jint* dest, jint compare_value) | |
| 696 // | |
| 697 // Arguments : | |
| 698 // | |
| 699 // exchange_value: O0 | |
| 700 // dest: O1 | |
| 701 // compare_value: O2 | |
| 702 // | |
| 703 // Results: | |
| 704 // | |
| 705 // O0: the value previously stored in dest | |
| 706 // | |
| 707 // Overwrites (v8): O3,O4,O5 | |
| 708 // | |
| 709 address generate_atomic_cmpxchg() { | |
| 710 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg"); | |
| 711 address start = __ pc(); | |
| 712 | |
| 713 // cmpxchg(dest, compare_value, exchange_value) | |
| 714 __ cas_under_lock(O1, O2, O0, | |
| 715 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(),false); | |
| 716 __ retl(false); | |
| 717 __ delayed()->nop(); | |
| 718 | |
| 719 return start; | |
| 720 } | |
| 721 | |
| 722 // Support for jlong Atomic::cmpxchg(jlong exchange_value, volatile jlong *dest, jlong compare_value) | |
| 723 // | |
| 724 // Arguments : | |
| 725 // | |
| 726 // exchange_value: O1:O0 | |
| 727 // dest: O2 | |
| 728 // compare_value: O4:O3 | |
| 729 // | |
| 730 // Results: | |
| 731 // | |
| 732 // O1:O0: the value previously stored in dest | |
| 733 // | |
| 734 // This only works on V9, on V8 we don't generate any | |
| 735 // code and just return NULL. | |
| 736 // | |
| 737 // Overwrites: G1,G2,G3 | |
| 738 // | |
| 739 address generate_atomic_cmpxchg_long() { | |
| 740 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long"); | |
| 741 address start = __ pc(); | |
| 742 | |
| 743 if (!VM_Version::supports_cx8()) | |
| 744 return NULL;; | |
| 745 __ sllx(O0, 32, O0); | |
| 746 __ srl(O1, 0, O1); | |
| 747 __ or3(O0,O1,O0); // O0 holds 64-bit value from compare_value | |
| 748 __ sllx(O3, 32, O3); | |
| 749 __ srl(O4, 0, O4); | |
| 750 __ or3(O3,O4,O3); // O3 holds 64-bit value from exchange_value | |
| 751 __ casx(O2, O3, O0); | |
| 752 __ srl(O0, 0, O1); // unpacked return value in O1:O0 | |
| 753 __ retl(false); | |
| 754 __ delayed()->srlx(O0, 32, O0); | |
| 755 | |
| 756 return start; | |
| 757 } | |
| 758 | |
| 759 | |
| 760 // Support for jint Atomic::add(jint add_value, volatile jint* dest). | |
| 761 // | |
| 762 // Arguments : | |
| 763 // | |
| 764 // add_value: O0 (e.g., +1 or -1) | |
| 765 // dest: O1 | |
| 766 // | |
| 767 // Results: | |
| 768 // | |
| 769 // O0: the new value stored in dest | |
| 770 // | |
| 771 // Overwrites (v9): O3 | |
| 772 // Overwrites (v8): O3,O4,O5 | |
| 773 // | |
| 774 address generate_atomic_add() { | |
| 775 StubCodeMark mark(this, "StubRoutines", "atomic_add"); | |
| 776 address start = __ pc(); | |
| 777 __ BIND(_atomic_add_stub); | |
| 778 | |
| 779 if (VM_Version::v9_instructions_work()) { | |
| 780 Label(retry); | |
| 781 __ BIND(retry); | |
| 782 | |
| 783 __ lduw(O1, 0, O2); | |
| 784 __ add(O0, O2, O3); | |
| 785 __ cas(O1, O2, O3); | |
| 786 __ cmp( O2, O3); | |
| 787 __ br(Assembler::notEqual, false, Assembler::pn, retry); | |
| 788 __ delayed()->nop(); | |
| 789 __ retl(false); | |
| 790 __ delayed()->add(O0, O2, O0); // note that cas made O2==O3 | |
| 791 } else { | |
| 792 const Register& lock_reg = O2; | |
| 793 const Register& lock_ptr_reg = O3; | |
| 794 const Register& value_reg = O4; | |
| 795 const Register& yield_reg = O5; | |
| 796 | |
| 797 Label(retry); | |
| 798 Label(dontyield); | |
| 799 | |
| 800 generate_v8_lock_prologue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 801 // got lock, do the increment | |
| 802 __ ld(O1, 0, value_reg); | |
| 803 __ add(O0, value_reg, value_reg); | |
| 804 __ st(value_reg, O1, 0); | |
| 805 | |
| 806 // %%% only for RMO and PSO | |
| 807 __ membar(Assembler::StoreStore); | |
| 808 | |
| 809 generate_v8_lock_epilogue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield); | |
| 810 | |
| 811 __ retl(false); | |
| 812 __ delayed()->mov(value_reg, O0); | |
| 813 } | |
| 814 | |
| 815 return start; | |
| 816 } | |
| 817 Label _atomic_add_stub; // called from other stubs | |
| 818 | |
| 819 | |
| 820 // Support for void OrderAccess::fence(). | |
| 821 // | |
| 822 address generate_fence() { | |
| 823 StubCodeMark mark(this, "StubRoutines", "fence"); | |
| 824 address start = __ pc(); | |
| 825 | |
| 826 __ membar(Assembler::Membar_mask_bits(Assembler::LoadLoad | Assembler::LoadStore | | |
| 827 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 828 __ retl(false); | |
| 829 __ delayed()->nop(); | |
| 830 | |
| 831 return start; | |
| 832 } | |
| 833 | |
| 834 | |
| 835 //------------------------------------------------------------------------------------------------------------------------ | |
| 836 // The following routine generates a subroutine to throw an asynchronous | |
| 837 // UnknownError when an unsafe access gets a fault that could not be | |
| 838 // reasonably prevented by the programmer. (Example: SIGBUS/OBJERR.) | |
| 839 // | |
| 840 // Arguments : | |
| 841 // | |
| 842 // trapping PC: O7 | |
| 843 // | |
| 844 // Results: | |
| 845 // posts an asynchronous exception, skips the trapping instruction | |
| 846 // | |
| 847 | |
| 848 address generate_handler_for_unsafe_access() { | |
| 849 StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access"); | |
| 850 address start = __ pc(); | |
| 851 | |
| 852 const int preserve_register_words = (64 * 2); | |
| 853 Address preserve_addr(FP, 0, (-preserve_register_words * wordSize) + STACK_BIAS); | |
| 854 | |
| 855 Register Lthread = L7_thread_cache; | |
| 856 int i; | |
| 857 | |
| 858 __ save_frame(0); | |
| 859 __ mov(G1, L1); | |
| 860 __ mov(G2, L2); | |
| 861 __ mov(G3, L3); | |
| 862 __ mov(G4, L4); | |
| 863 __ mov(G5, L5); | |
| 864 for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) { | |
| 865 __ stf(FloatRegisterImpl::D, as_FloatRegister(i), preserve_addr, i * wordSize); | |
| 866 } | |
| 867 | |
| 868 address entry_point = CAST_FROM_FN_PTR(address, handle_unsafe_access); | |
| 869 BLOCK_COMMENT("call handle_unsafe_access"); | |
| 870 __ call(entry_point, relocInfo::runtime_call_type); | |
| 871 __ delayed()->nop(); | |
| 872 | |
| 873 __ mov(L1, G1); | |
| 874 __ mov(L2, G2); | |
| 875 __ mov(L3, G3); | |
| 876 __ mov(L4, G4); | |
| 877 __ mov(L5, G5); | |
| 878 for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) { | |
| 879 __ ldf(FloatRegisterImpl::D, preserve_addr, as_FloatRegister(i), i * wordSize); | |
| 880 } | |
| 881 | |
| 882 __ verify_thread(); | |
| 883 | |
| 884 __ jmp(O0, 0); | |
| 885 __ delayed()->restore(); | |
| 886 | |
| 887 return start; | |
| 888 } | |
| 889 | |
| 890 | |
| 891 // Support for uint StubRoutine::Sparc::partial_subtype_check( Klass sub, Klass super ); | |
| 892 // Arguments : | |
| 893 // | |
| 894 // ret : O0, returned | |
| 895 // icc/xcc: set as O0 (depending on wordSize) | |
| 896 // sub : O1, argument, not changed | |
| 897 // super: O2, argument, not changed | |
| 898 // raddr: O7, blown by call | |
| 899 address generate_partial_subtype_check() { | |
|
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900 __ align(CodeEntryAlignment); |
| 0 | 901 StubCodeMark mark(this, "StubRoutines", "partial_subtype_check"); |
| 902 address start = __ pc(); | |
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903 Label miss; |
| 0 | 904 |
| 905 #if defined(COMPILER2) && !defined(_LP64) | |
| 906 // Do not use a 'save' because it blows the 64-bit O registers. | |
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907 __ add(SP,-4*wordSize,SP); // Make space for 4 temps (stack must be 2 words aligned) |
| 0 | 908 __ st_ptr(L0,SP,(frame::register_save_words+0)*wordSize); |
| 909 __ st_ptr(L1,SP,(frame::register_save_words+1)*wordSize); | |
| 910 __ st_ptr(L2,SP,(frame::register_save_words+2)*wordSize); | |
| 911 __ st_ptr(L3,SP,(frame::register_save_words+3)*wordSize); | |
| 912 Register Rret = O0; | |
| 913 Register Rsub = O1; | |
| 914 Register Rsuper = O2; | |
| 915 #else | |
| 916 __ save_frame(0); | |
| 917 Register Rret = I0; | |
| 918 Register Rsub = I1; | |
| 919 Register Rsuper = I2; | |
| 920 #endif | |
| 921 | |
| 922 Register L0_ary_len = L0; | |
| 923 Register L1_ary_ptr = L1; | |
| 924 Register L2_super = L2; | |
| 925 Register L3_index = L3; | |
| 926 | |
|
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927 __ check_klass_subtype_slow_path(Rsub, Rsuper, |
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928 L0, L1, L2, L3, |
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929 NULL, &miss); |
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930 |
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931 // Match falls through here. |
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932 __ addcc(G0,0,Rret); // set Z flags, Z result |
| 0 | 933 |
| 934 #if defined(COMPILER2) && !defined(_LP64) | |
| 935 __ ld_ptr(SP,(frame::register_save_words+0)*wordSize,L0); | |
| 936 __ ld_ptr(SP,(frame::register_save_words+1)*wordSize,L1); | |
| 937 __ ld_ptr(SP,(frame::register_save_words+2)*wordSize,L2); | |
| 938 __ ld_ptr(SP,(frame::register_save_words+3)*wordSize,L3); | |
| 939 __ retl(); // Result in Rret is zero; flags set to Z | |
| 940 __ delayed()->add(SP,4*wordSize,SP); | |
| 941 #else | |
| 942 __ ret(); // Result in Rret is zero; flags set to Z | |
| 943 __ delayed()->restore(); | |
| 944 #endif | |
| 945 | |
| 946 __ BIND(miss); | |
| 947 __ addcc(G0,1,Rret); // set NZ flags, NZ result | |
| 948 | |
| 949 #if defined(COMPILER2) && !defined(_LP64) | |
| 950 __ ld_ptr(SP,(frame::register_save_words+0)*wordSize,L0); | |
| 951 __ ld_ptr(SP,(frame::register_save_words+1)*wordSize,L1); | |
| 952 __ ld_ptr(SP,(frame::register_save_words+2)*wordSize,L2); | |
| 953 __ ld_ptr(SP,(frame::register_save_words+3)*wordSize,L3); | |
| 954 __ retl(); // Result in Rret is != 0; flags set to NZ | |
| 955 __ delayed()->add(SP,4*wordSize,SP); | |
| 956 #else | |
| 957 __ ret(); // Result in Rret is != 0; flags set to NZ | |
| 958 __ delayed()->restore(); | |
| 959 #endif | |
| 960 | |
| 961 return start; | |
| 962 } | |
| 963 | |
| 964 | |
| 965 // Called from MacroAssembler::verify_oop | |
| 966 // | |
| 967 address generate_verify_oop_subroutine() { | |
| 968 StubCodeMark mark(this, "StubRoutines", "verify_oop_stub"); | |
| 969 | |
| 970 address start = __ pc(); | |
| 971 | |
| 972 __ verify_oop_subroutine(); | |
| 973 | |
| 974 return start; | |
| 975 } | |
| 976 | |
| 977 static address disjoint_byte_copy_entry; | |
| 978 static address disjoint_short_copy_entry; | |
| 979 static address disjoint_int_copy_entry; | |
| 980 static address disjoint_long_copy_entry; | |
| 981 static address disjoint_oop_copy_entry; | |
| 982 | |
| 983 static address byte_copy_entry; | |
| 984 static address short_copy_entry; | |
| 985 static address int_copy_entry; | |
| 986 static address long_copy_entry; | |
| 987 static address oop_copy_entry; | |
| 988 | |
| 989 static address checkcast_copy_entry; | |
| 990 | |
| 991 // | |
| 992 // Verify that a register contains clean 32-bits positive value | |
| 993 // (high 32-bits are 0) so it could be used in 64-bits shifts (sllx, srax). | |
| 994 // | |
| 995 // Input: | |
| 996 // Rint - 32-bits value | |
| 997 // Rtmp - scratch | |
| 998 // | |
| 999 void assert_clean_int(Register Rint, Register Rtmp) { | |
| 1000 #if defined(ASSERT) && defined(_LP64) | |
| 1001 __ signx(Rint, Rtmp); | |
| 1002 __ cmp(Rint, Rtmp); | |
| 1003 __ breakpoint_trap(Assembler::notEqual, Assembler::xcc); | |
| 1004 #endif | |
| 1005 } | |
| 1006 | |
| 1007 // | |
| 1008 // Generate overlap test for array copy stubs | |
| 1009 // | |
| 1010 // Input: | |
| 1011 // O0 - array1 | |
| 1012 // O1 - array2 | |
| 1013 // O2 - element count | |
| 1014 // | |
| 1015 // Kills temps: O3, O4 | |
| 1016 // | |
| 1017 void array_overlap_test(address no_overlap_target, int log2_elem_size) { | |
| 1018 assert(no_overlap_target != NULL, "must be generated"); | |
| 1019 array_overlap_test(no_overlap_target, NULL, log2_elem_size); | |
| 1020 } | |
| 1021 void array_overlap_test(Label& L_no_overlap, int log2_elem_size) { | |
| 1022 array_overlap_test(NULL, &L_no_overlap, log2_elem_size); | |
| 1023 } | |
| 1024 void array_overlap_test(address no_overlap_target, Label* NOLp, int log2_elem_size) { | |
| 1025 const Register from = O0; | |
| 1026 const Register to = O1; | |
| 1027 const Register count = O2; | |
| 1028 const Register to_from = O3; // to - from | |
| 1029 const Register byte_count = O4; // count << log2_elem_size | |
| 1030 | |
| 1031 __ subcc(to, from, to_from); | |
| 1032 __ sll_ptr(count, log2_elem_size, byte_count); | |
| 1033 if (NOLp == NULL) | |
| 1034 __ brx(Assembler::lessEqualUnsigned, false, Assembler::pt, no_overlap_target); | |
| 1035 else | |
| 1036 __ brx(Assembler::lessEqualUnsigned, false, Assembler::pt, (*NOLp)); | |
| 1037 __ delayed()->cmp(to_from, byte_count); | |
| 1038 if (NOLp == NULL) | |
| 1039 __ brx(Assembler::greaterEqual, false, Assembler::pt, no_overlap_target); | |
| 1040 else | |
| 1041 __ brx(Assembler::greaterEqual, false, Assembler::pt, (*NOLp)); | |
| 1042 __ delayed()->nop(); | |
| 1043 } | |
| 1044 | |
| 1045 // | |
| 1046 // Generate pre-write barrier for array. | |
| 1047 // | |
| 1048 // Input: | |
| 1049 // addr - register containing starting address | |
| 1050 // count - register containing element count | |
| 1051 // tmp - scratch register | |
| 1052 // | |
| 1053 // The input registers are overwritten. | |
| 1054 // | |
| 1055 void gen_write_ref_array_pre_barrier(Register addr, Register count) { | |
| 1056 BarrierSet* bs = Universe::heap()->barrier_set(); | |
| 1057 if (bs->has_write_ref_pre_barrier()) { | |
| 1058 assert(bs->has_write_ref_array_pre_opt(), | |
| 1059 "Else unsupported barrier set."); | |
| 1060 | |
| 1061 __ save_frame(0); | |
| 1062 // Save the necessary global regs... will be used after. | |
|
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1063 if (addr->is_global()) { |
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1064 __ mov(addr, L0); |
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1065 } |
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1066 if (count->is_global()) { |
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1067 __ mov(count, L1); |
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1068 } |
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1069 __ mov(addr->after_save(), O0); |
| 0 | 1070 // Get the count into O1 |
| 1071 __ call(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre)); | |
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1072 __ delayed()->mov(count->after_save(), O1); |
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1073 if (addr->is_global()) { |
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1074 __ mov(L0, addr); |
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1075 } |
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1076 if (count->is_global()) { |
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1077 __ mov(L1, count); |
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1078 } |
| 0 | 1079 __ restore(); |
| 1080 } | |
| 1081 } | |
| 1082 // | |
| 1083 // Generate post-write barrier for array. | |
| 1084 // | |
| 1085 // Input: | |
| 1086 // addr - register containing starting address | |
| 1087 // count - register containing element count | |
| 1088 // tmp - scratch register | |
| 1089 // | |
| 1090 // The input registers are overwritten. | |
| 1091 // | |
| 1092 void gen_write_ref_array_post_barrier(Register addr, Register count, | |
| 1093 Register tmp) { | |
| 1094 BarrierSet* bs = Universe::heap()->barrier_set(); | |
| 1095 | |
| 1096 switch (bs->kind()) { | |
| 1097 case BarrierSet::G1SATBCT: | |
| 1098 case BarrierSet::G1SATBCTLogging: | |
| 1099 { | |
| 1100 // Get some new fresh output registers. | |
| 1101 __ save_frame(0); | |
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1102 __ mov(addr->after_save(), O0); |
| 0 | 1103 __ call(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post)); |
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1104 __ delayed()->mov(count->after_save(), O1); |
| 0 | 1105 __ restore(); |
| 1106 } | |
| 1107 break; | |
| 1108 case BarrierSet::CardTableModRef: | |
| 1109 case BarrierSet::CardTableExtension: | |
| 1110 { | |
| 1111 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
| 1112 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); | |
| 1113 assert_different_registers(addr, count, tmp); | |
| 1114 | |
| 1115 Label L_loop; | |
| 1116 | |
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1117 __ sll_ptr(count, LogBytesPerHeapOop, count); |
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1118 __ sub(count, BytesPerHeapOop, count); |
| 0 | 1119 __ add(count, addr, count); |
| 1120 // Use two shifts to clear out those low order two bits! (Cannot opt. into 1.) | |
| 1121 __ srl_ptr(addr, CardTableModRefBS::card_shift, addr); | |
| 1122 __ srl_ptr(count, CardTableModRefBS::card_shift, count); | |
| 1123 __ sub(count, addr, count); | |
| 1124 Address rs(tmp, (address)ct->byte_map_base); | |
| 1125 __ load_address(rs); | |
| 1126 __ BIND(L_loop); | |
| 1127 __ stb(G0, rs.base(), addr); | |
| 1128 __ subcc(count, 1, count); | |
| 1129 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 1130 __ delayed()->add(addr, 1, addr); | |
| 1131 | |
| 1132 } | |
| 1133 break; | |
| 1134 case BarrierSet::ModRef: | |
| 1135 break; | |
| 1136 default : | |
| 1137 ShouldNotReachHere(); | |
| 1138 | |
| 1139 } | |
| 1140 } | |
| 1141 | |
| 1142 | |
| 1143 // Copy big chunks forward with shift | |
| 1144 // | |
| 1145 // Inputs: | |
| 1146 // from - source arrays | |
| 1147 // to - destination array aligned to 8-bytes | |
| 1148 // count - elements count to copy >= the count equivalent to 16 bytes | |
| 1149 // count_dec - elements count's decrement equivalent to 16 bytes | |
| 1150 // L_copy_bytes - copy exit label | |
| 1151 // | |
| 1152 void copy_16_bytes_forward_with_shift(Register from, Register to, | |
| 1153 Register count, int count_dec, Label& L_copy_bytes) { | |
| 1154 Label L_loop, L_aligned_copy, L_copy_last_bytes; | |
| 1155 | |
| 1156 // if both arrays have the same alignment mod 8, do 8 bytes aligned copy | |
| 1157 __ andcc(from, 7, G1); // misaligned bytes | |
| 1158 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 1159 __ delayed()->nop(); | |
| 1160 | |
| 1161 const Register left_shift = G1; // left shift bit counter | |
| 1162 const Register right_shift = G5; // right shift bit counter | |
| 1163 | |
| 1164 __ sll(G1, LogBitsPerByte, left_shift); | |
| 1165 __ mov(64, right_shift); | |
| 1166 __ sub(right_shift, left_shift, right_shift); | |
| 1167 | |
| 1168 // | |
| 1169 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 1170 // to form 2 aligned 8-bytes chunks to store. | |
| 1171 // | |
| 1172 __ deccc(count, count_dec); // Pre-decrement 'count' | |
| 1173 __ andn(from, 7, from); // Align address | |
| 1174 __ ldx(from, 0, O3); | |
| 1175 __ inc(from, 8); | |
| 1176 __ align(16); | |
| 1177 __ BIND(L_loop); | |
| 1178 __ ldx(from, 0, O4); | |
| 1179 __ deccc(count, count_dec); // Can we do next iteration after this one? | |
| 1180 __ ldx(from, 8, G4); | |
| 1181 __ inc(to, 16); | |
| 1182 __ inc(from, 16); | |
| 1183 __ sllx(O3, left_shift, O3); | |
| 1184 __ srlx(O4, right_shift, G3); | |
| 1185 __ bset(G3, O3); | |
| 1186 __ stx(O3, to, -16); | |
| 1187 __ sllx(O4, left_shift, O4); | |
| 1188 __ srlx(G4, right_shift, G3); | |
| 1189 __ bset(G3, O4); | |
| 1190 __ stx(O4, to, -8); | |
| 1191 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 1192 __ delayed()->mov(G4, O3); | |
| 1193 | |
| 1194 __ inccc(count, count_dec>>1 ); // + 8 bytes | |
| 1195 __ brx(Assembler::negative, true, Assembler::pn, L_copy_last_bytes); | |
| 1196 __ delayed()->inc(count, count_dec>>1); // restore 'count' | |
| 1197 | |
| 1198 // copy 8 bytes, part of them already loaded in O3 | |
| 1199 __ ldx(from, 0, O4); | |
| 1200 __ inc(to, 8); | |
| 1201 __ inc(from, 8); | |
| 1202 __ sllx(O3, left_shift, O3); | |
| 1203 __ srlx(O4, right_shift, G3); | |
| 1204 __ bset(O3, G3); | |
| 1205 __ stx(G3, to, -8); | |
| 1206 | |
| 1207 __ BIND(L_copy_last_bytes); | |
| 1208 __ srl(right_shift, LogBitsPerByte, right_shift); // misaligned bytes | |
| 1209 __ br(Assembler::always, false, Assembler::pt, L_copy_bytes); | |
| 1210 __ delayed()->sub(from, right_shift, from); // restore address | |
| 1211 | |
| 1212 __ BIND(L_aligned_copy); | |
| 1213 } | |
| 1214 | |
| 1215 // Copy big chunks backward with shift | |
| 1216 // | |
| 1217 // Inputs: | |
| 1218 // end_from - source arrays end address | |
| 1219 // end_to - destination array end address aligned to 8-bytes | |
| 1220 // count - elements count to copy >= the count equivalent to 16 bytes | |
| 1221 // count_dec - elements count's decrement equivalent to 16 bytes | |
| 1222 // L_aligned_copy - aligned copy exit label | |
| 1223 // L_copy_bytes - copy exit label | |
| 1224 // | |
| 1225 void copy_16_bytes_backward_with_shift(Register end_from, Register end_to, | |
| 1226 Register count, int count_dec, | |
| 1227 Label& L_aligned_copy, Label& L_copy_bytes) { | |
| 1228 Label L_loop, L_copy_last_bytes; | |
| 1229 | |
| 1230 // if both arrays have the same alignment mod 8, do 8 bytes aligned copy | |
| 1231 __ andcc(end_from, 7, G1); // misaligned bytes | |
| 1232 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 1233 __ delayed()->deccc(count, count_dec); // Pre-decrement 'count' | |
| 1234 | |
| 1235 const Register left_shift = G1; // left shift bit counter | |
| 1236 const Register right_shift = G5; // right shift bit counter | |
| 1237 | |
| 1238 __ sll(G1, LogBitsPerByte, left_shift); | |
| 1239 __ mov(64, right_shift); | |
| 1240 __ sub(right_shift, left_shift, right_shift); | |
| 1241 | |
| 1242 // | |
| 1243 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 1244 // to form 2 aligned 8-bytes chunks to store. | |
| 1245 // | |
| 1246 __ andn(end_from, 7, end_from); // Align address | |
| 1247 __ ldx(end_from, 0, O3); | |
| 1248 __ align(16); | |
| 1249 __ BIND(L_loop); | |
| 1250 __ ldx(end_from, -8, O4); | |
| 1251 __ deccc(count, count_dec); // Can we do next iteration after this one? | |
| 1252 __ ldx(end_from, -16, G4); | |
| 1253 __ dec(end_to, 16); | |
| 1254 __ dec(end_from, 16); | |
| 1255 __ srlx(O3, right_shift, O3); | |
| 1256 __ sllx(O4, left_shift, G3); | |
| 1257 __ bset(G3, O3); | |
| 1258 __ stx(O3, end_to, 8); | |
| 1259 __ srlx(O4, right_shift, O4); | |
| 1260 __ sllx(G4, left_shift, G3); | |
| 1261 __ bset(G3, O4); | |
| 1262 __ stx(O4, end_to, 0); | |
| 1263 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_loop); | |
| 1264 __ delayed()->mov(G4, O3); | |
| 1265 | |
| 1266 __ inccc(count, count_dec>>1 ); // + 8 bytes | |
| 1267 __ brx(Assembler::negative, true, Assembler::pn, L_copy_last_bytes); | |
| 1268 __ delayed()->inc(count, count_dec>>1); // restore 'count' | |
| 1269 | |
| 1270 // copy 8 bytes, part of them already loaded in O3 | |
| 1271 __ ldx(end_from, -8, O4); | |
| 1272 __ dec(end_to, 8); | |
| 1273 __ dec(end_from, 8); | |
| 1274 __ srlx(O3, right_shift, O3); | |
| 1275 __ sllx(O4, left_shift, G3); | |
| 1276 __ bset(O3, G3); | |
| 1277 __ stx(G3, end_to, 0); | |
| 1278 | |
| 1279 __ BIND(L_copy_last_bytes); | |
| 1280 __ srl(left_shift, LogBitsPerByte, left_shift); // misaligned bytes | |
| 1281 __ br(Assembler::always, false, Assembler::pt, L_copy_bytes); | |
| 1282 __ delayed()->add(end_from, left_shift, end_from); // restore address | |
| 1283 } | |
| 1284 | |
| 1285 // | |
| 1286 // Generate stub for disjoint byte copy. If "aligned" is true, the | |
| 1287 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1288 // | |
| 1289 // Arguments for generated stub: | |
| 1290 // from: O0 | |
| 1291 // to: O1 | |
| 1292 // count: O2 treated as signed | |
| 1293 // | |
| 1294 address generate_disjoint_byte_copy(bool aligned, const char * name) { | |
| 1295 __ align(CodeEntryAlignment); | |
| 1296 StubCodeMark mark(this, "StubRoutines", name); | |
| 1297 address start = __ pc(); | |
| 1298 | |
| 1299 Label L_skip_alignment, L_align; | |
| 1300 Label L_copy_byte, L_copy_byte_loop, L_exit; | |
| 1301 | |
| 1302 const Register from = O0; // source array address | |
| 1303 const Register to = O1; // destination array address | |
| 1304 const Register count = O2; // elements count | |
| 1305 const Register offset = O5; // offset from start of arrays | |
| 1306 // O3, O4, G3, G4 are used as temp registers | |
| 1307 | |
| 1308 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1309 | |
| 1310 if (!aligned) disjoint_byte_copy_entry = __ pc(); | |
| 1311 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 1312 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 1313 | |
| 1314 // for short arrays, just do single element copy | |
| 1315 __ cmp(count, 23); // 16 + 7 | |
| 1316 __ brx(Assembler::less, false, Assembler::pn, L_copy_byte); | |
| 1317 __ delayed()->mov(G0, offset); | |
| 1318 | |
| 1319 if (aligned) { | |
| 1320 // 'aligned' == true when it is known statically during compilation | |
| 1321 // of this arraycopy call site that both 'from' and 'to' addresses | |
| 1322 // are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). | |
| 1323 // | |
| 1324 // Aligned arrays have 4 bytes alignment in 32-bits VM | |
| 1325 // and 8 bytes - in 64-bits VM. So we do it only for 32-bits VM | |
| 1326 // | |
| 1327 #ifndef _LP64 | |
| 1328 // copy a 4-bytes word if necessary to align 'to' to 8 bytes | |
| 1329 __ andcc(to, 7, G0); | |
| 1330 __ br(Assembler::zero, false, Assembler::pn, L_skip_alignment); | |
| 1331 __ delayed()->ld(from, 0, O3); | |
| 1332 __ inc(from, 4); | |
| 1333 __ inc(to, 4); | |
| 1334 __ dec(count, 4); | |
| 1335 __ st(O3, to, -4); | |
| 1336 __ BIND(L_skip_alignment); | |
| 1337 #endif | |
| 1338 } else { | |
| 1339 // copy bytes to align 'to' on 8 byte boundary | |
| 1340 __ andcc(to, 7, G1); // misaligned bytes | |
| 1341 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1342 __ delayed()->neg(G1); | |
| 1343 __ inc(G1, 8); // bytes need to copy to next 8-bytes alignment | |
| 1344 __ sub(count, G1, count); | |
| 1345 __ BIND(L_align); | |
| 1346 __ ldub(from, 0, O3); | |
| 1347 __ deccc(G1); | |
| 1348 __ inc(from); | |
| 1349 __ stb(O3, to, 0); | |
| 1350 __ br(Assembler::notZero, false, Assembler::pt, L_align); | |
| 1351 __ delayed()->inc(to); | |
| 1352 __ BIND(L_skip_alignment); | |
| 1353 } | |
| 1354 #ifdef _LP64 | |
| 1355 if (!aligned) | |
| 1356 #endif | |
| 1357 { | |
| 1358 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 1359 // the same alignment mod 8, otherwise fall through to the next | |
| 1360 // code for aligned copy. | |
| 1361 // The compare above (count >= 23) guarantes 'count' >= 16 bytes. | |
| 1362 // Also jump over aligned copy after the copy with shift completed. | |
| 1363 | |
| 1364 copy_16_bytes_forward_with_shift(from, to, count, 16, L_copy_byte); | |
| 1365 } | |
| 1366 | |
| 1367 // Both array are 8 bytes aligned, copy 16 bytes at a time | |
| 1368 __ and3(count, 7, G4); // Save count | |
| 1369 __ srl(count, 3, count); | |
| 1370 generate_disjoint_long_copy_core(aligned); | |
| 1371 __ mov(G4, count); // Restore count | |
| 1372 | |
| 1373 // copy tailing bytes | |
| 1374 __ BIND(L_copy_byte); | |
| 1375 __ br_zero(Assembler::zero, false, Assembler::pt, count, L_exit); | |
| 1376 __ delayed()->nop(); | |
| 1377 __ align(16); | |
| 1378 __ BIND(L_copy_byte_loop); | |
| 1379 __ ldub(from, offset, O3); | |
| 1380 __ deccc(count); | |
| 1381 __ stb(O3, to, offset); | |
| 1382 __ brx(Assembler::notZero, false, Assembler::pt, L_copy_byte_loop); | |
| 1383 __ delayed()->inc(offset); | |
| 1384 | |
| 1385 __ BIND(L_exit); | |
| 1386 // O3, O4 are used as temp registers | |
| 1387 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4); | |
| 1388 __ retl(); | |
| 1389 __ delayed()->mov(G0, O0); // return 0 | |
| 1390 return start; | |
| 1391 } | |
| 1392 | |
| 1393 // | |
| 1394 // Generate stub for conjoint byte copy. If "aligned" is true, the | |
| 1395 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1396 // | |
| 1397 // Arguments for generated stub: | |
| 1398 // from: O0 | |
| 1399 // to: O1 | |
| 1400 // count: O2 treated as signed | |
| 1401 // | |
| 1402 address generate_conjoint_byte_copy(bool aligned, const char * name) { | |
| 1403 // Do reverse copy. | |
| 1404 | |
| 1405 __ align(CodeEntryAlignment); | |
| 1406 StubCodeMark mark(this, "StubRoutines", name); | |
| 1407 address start = __ pc(); | |
| 1408 address nooverlap_target = aligned ? | |
| 1409 StubRoutines::arrayof_jbyte_disjoint_arraycopy() : | |
| 1410 disjoint_byte_copy_entry; | |
| 1411 | |
| 1412 Label L_skip_alignment, L_align, L_aligned_copy; | |
| 1413 Label L_copy_byte, L_copy_byte_loop, L_exit; | |
| 1414 | |
| 1415 const Register from = O0; // source array address | |
| 1416 const Register to = O1; // destination array address | |
| 1417 const Register count = O2; // elements count | |
| 1418 const Register end_from = from; // source array end address | |
| 1419 const Register end_to = to; // destination array end address | |
| 1420 | |
| 1421 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1422 | |
| 1423 if (!aligned) byte_copy_entry = __ pc(); | |
| 1424 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 1425 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 1426 | |
| 1427 array_overlap_test(nooverlap_target, 0); | |
| 1428 | |
| 1429 __ add(to, count, end_to); // offset after last copied element | |
| 1430 | |
| 1431 // for short arrays, just do single element copy | |
| 1432 __ cmp(count, 23); // 16 + 7 | |
| 1433 __ brx(Assembler::less, false, Assembler::pn, L_copy_byte); | |
| 1434 __ delayed()->add(from, count, end_from); | |
| 1435 | |
| 1436 { | |
| 1437 // Align end of arrays since they could be not aligned even | |
| 1438 // when arrays itself are aligned. | |
| 1439 | |
| 1440 // copy bytes to align 'end_to' on 8 byte boundary | |
| 1441 __ andcc(end_to, 7, G1); // misaligned bytes | |
| 1442 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1443 __ delayed()->nop(); | |
| 1444 __ sub(count, G1, count); | |
| 1445 __ BIND(L_align); | |
| 1446 __ dec(end_from); | |
| 1447 __ dec(end_to); | |
| 1448 __ ldub(end_from, 0, O3); | |
| 1449 __ deccc(G1); | |
| 1450 __ brx(Assembler::notZero, false, Assembler::pt, L_align); | |
| 1451 __ delayed()->stb(O3, end_to, 0); | |
| 1452 __ BIND(L_skip_alignment); | |
| 1453 } | |
| 1454 #ifdef _LP64 | |
| 1455 if (aligned) { | |
| 1456 // Both arrays are aligned to 8-bytes in 64-bits VM. | |
| 1457 // The 'count' is decremented in copy_16_bytes_backward_with_shift() | |
| 1458 // in unaligned case. | |
| 1459 __ dec(count, 16); | |
| 1460 } else | |
| 1461 #endif | |
| 1462 { | |
| 1463 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 1464 // the same alignment mod 8, otherwise jump to the next | |
| 1465 // code for aligned copy (and substracting 16 from 'count' before jump). | |
| 1466 // The compare above (count >= 11) guarantes 'count' >= 16 bytes. | |
| 1467 // Also jump over aligned copy after the copy with shift completed. | |
| 1468 | |
| 1469 copy_16_bytes_backward_with_shift(end_from, end_to, count, 16, | |
| 1470 L_aligned_copy, L_copy_byte); | |
| 1471 } | |
| 1472 // copy 4 elements (16 bytes) at a time | |
| 1473 __ align(16); | |
| 1474 __ BIND(L_aligned_copy); | |
| 1475 __ dec(end_from, 16); | |
| 1476 __ ldx(end_from, 8, O3); | |
| 1477 __ ldx(end_from, 0, O4); | |
| 1478 __ dec(end_to, 16); | |
| 1479 __ deccc(count, 16); | |
| 1480 __ stx(O3, end_to, 8); | |
| 1481 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); | |
| 1482 __ delayed()->stx(O4, end_to, 0); | |
| 1483 __ inc(count, 16); | |
| 1484 | |
| 1485 // copy 1 element (2 bytes) at a time | |
| 1486 __ BIND(L_copy_byte); | |
| 1487 __ br_zero(Assembler::zero, false, Assembler::pt, count, L_exit); | |
| 1488 __ delayed()->nop(); | |
| 1489 __ align(16); | |
| 1490 __ BIND(L_copy_byte_loop); | |
| 1491 __ dec(end_from); | |
| 1492 __ dec(end_to); | |
| 1493 __ ldub(end_from, 0, O4); | |
| 1494 __ deccc(count); | |
| 1495 __ brx(Assembler::greater, false, Assembler::pt, L_copy_byte_loop); | |
| 1496 __ delayed()->stb(O4, end_to, 0); | |
| 1497 | |
| 1498 __ BIND(L_exit); | |
| 1499 // O3, O4 are used as temp registers | |
| 1500 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4); | |
| 1501 __ retl(); | |
| 1502 __ delayed()->mov(G0, O0); // return 0 | |
| 1503 return start; | |
| 1504 } | |
| 1505 | |
| 1506 // | |
| 1507 // Generate stub for disjoint short copy. If "aligned" is true, the | |
| 1508 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1509 // | |
| 1510 // Arguments for generated stub: | |
| 1511 // from: O0 | |
| 1512 // to: O1 | |
| 1513 // count: O2 treated as signed | |
| 1514 // | |
| 1515 address generate_disjoint_short_copy(bool aligned, const char * name) { | |
| 1516 __ align(CodeEntryAlignment); | |
| 1517 StubCodeMark mark(this, "StubRoutines", name); | |
| 1518 address start = __ pc(); | |
| 1519 | |
| 1520 Label L_skip_alignment, L_skip_alignment2; | |
| 1521 Label L_copy_2_bytes, L_copy_2_bytes_loop, L_exit; | |
| 1522 | |
| 1523 const Register from = O0; // source array address | |
| 1524 const Register to = O1; // destination array address | |
| 1525 const Register count = O2; // elements count | |
| 1526 const Register offset = O5; // offset from start of arrays | |
| 1527 // O3, O4, G3, G4 are used as temp registers | |
| 1528 | |
| 1529 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1530 | |
| 1531 if (!aligned) disjoint_short_copy_entry = __ pc(); | |
| 1532 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 1533 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 1534 | |
| 1535 // for short arrays, just do single element copy | |
| 1536 __ cmp(count, 11); // 8 + 3 (22 bytes) | |
| 1537 __ brx(Assembler::less, false, Assembler::pn, L_copy_2_bytes); | |
| 1538 __ delayed()->mov(G0, offset); | |
| 1539 | |
| 1540 if (aligned) { | |
| 1541 // 'aligned' == true when it is known statically during compilation | |
| 1542 // of this arraycopy call site that both 'from' and 'to' addresses | |
| 1543 // are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). | |
| 1544 // | |
| 1545 // Aligned arrays have 4 bytes alignment in 32-bits VM | |
| 1546 // and 8 bytes - in 64-bits VM. | |
| 1547 // | |
| 1548 #ifndef _LP64 | |
| 1549 // copy a 2-elements word if necessary to align 'to' to 8 bytes | |
| 1550 __ andcc(to, 7, G0); | |
| 1551 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1552 __ delayed()->ld(from, 0, O3); | |
| 1553 __ inc(from, 4); | |
| 1554 __ inc(to, 4); | |
| 1555 __ dec(count, 2); | |
| 1556 __ st(O3, to, -4); | |
| 1557 __ BIND(L_skip_alignment); | |
| 1558 #endif | |
| 1559 } else { | |
| 1560 // copy 1 element if necessary to align 'to' on an 4 bytes | |
| 1561 __ andcc(to, 3, G0); | |
| 1562 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1563 __ delayed()->lduh(from, 0, O3); | |
| 1564 __ inc(from, 2); | |
| 1565 __ inc(to, 2); | |
| 1566 __ dec(count); | |
| 1567 __ sth(O3, to, -2); | |
| 1568 __ BIND(L_skip_alignment); | |
| 1569 | |
| 1570 // copy 2 elements to align 'to' on an 8 byte boundary | |
| 1571 __ andcc(to, 7, G0); | |
| 1572 __ br(Assembler::zero, false, Assembler::pn, L_skip_alignment2); | |
| 1573 __ delayed()->lduh(from, 0, O3); | |
| 1574 __ dec(count, 2); | |
| 1575 __ lduh(from, 2, O4); | |
| 1576 __ inc(from, 4); | |
| 1577 __ inc(to, 4); | |
| 1578 __ sth(O3, to, -4); | |
| 1579 __ sth(O4, to, -2); | |
| 1580 __ BIND(L_skip_alignment2); | |
| 1581 } | |
| 1582 #ifdef _LP64 | |
| 1583 if (!aligned) | |
| 1584 #endif | |
| 1585 { | |
| 1586 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 1587 // the same alignment mod 8, otherwise fall through to the next | |
| 1588 // code for aligned copy. | |
| 1589 // The compare above (count >= 11) guarantes 'count' >= 16 bytes. | |
| 1590 // Also jump over aligned copy after the copy with shift completed. | |
| 1591 | |
| 1592 copy_16_bytes_forward_with_shift(from, to, count, 8, L_copy_2_bytes); | |
| 1593 } | |
| 1594 | |
| 1595 // Both array are 8 bytes aligned, copy 16 bytes at a time | |
| 1596 __ and3(count, 3, G4); // Save | |
| 1597 __ srl(count, 2, count); | |
| 1598 generate_disjoint_long_copy_core(aligned); | |
| 1599 __ mov(G4, count); // restore | |
| 1600 | |
| 1601 // copy 1 element at a time | |
| 1602 __ BIND(L_copy_2_bytes); | |
| 1603 __ br_zero(Assembler::zero, false, Assembler::pt, count, L_exit); | |
| 1604 __ delayed()->nop(); | |
| 1605 __ align(16); | |
| 1606 __ BIND(L_copy_2_bytes_loop); | |
| 1607 __ lduh(from, offset, O3); | |
| 1608 __ deccc(count); | |
| 1609 __ sth(O3, to, offset); | |
| 1610 __ brx(Assembler::notZero, false, Assembler::pt, L_copy_2_bytes_loop); | |
| 1611 __ delayed()->inc(offset, 2); | |
| 1612 | |
| 1613 __ BIND(L_exit); | |
| 1614 // O3, O4 are used as temp registers | |
| 1615 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4); | |
| 1616 __ retl(); | |
| 1617 __ delayed()->mov(G0, O0); // return 0 | |
| 1618 return start; | |
| 1619 } | |
| 1620 | |
| 1621 // | |
| 1622 // Generate stub for conjoint short copy. If "aligned" is true, the | |
| 1623 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1624 // | |
| 1625 // Arguments for generated stub: | |
| 1626 // from: O0 | |
| 1627 // to: O1 | |
| 1628 // count: O2 treated as signed | |
| 1629 // | |
| 1630 address generate_conjoint_short_copy(bool aligned, const char * name) { | |
| 1631 // Do reverse copy. | |
| 1632 | |
| 1633 __ align(CodeEntryAlignment); | |
| 1634 StubCodeMark mark(this, "StubRoutines", name); | |
| 1635 address start = __ pc(); | |
| 1636 address nooverlap_target = aligned ? | |
| 1637 StubRoutines::arrayof_jshort_disjoint_arraycopy() : | |
| 1638 disjoint_short_copy_entry; | |
| 1639 | |
| 1640 Label L_skip_alignment, L_skip_alignment2, L_aligned_copy; | |
| 1641 Label L_copy_2_bytes, L_copy_2_bytes_loop, L_exit; | |
| 1642 | |
| 1643 const Register from = O0; // source array address | |
| 1644 const Register to = O1; // destination array address | |
| 1645 const Register count = O2; // elements count | |
| 1646 const Register end_from = from; // source array end address | |
| 1647 const Register end_to = to; // destination array end address | |
| 1648 | |
| 1649 const Register byte_count = O3; // bytes count to copy | |
| 1650 | |
| 1651 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1652 | |
| 1653 if (!aligned) short_copy_entry = __ pc(); | |
| 1654 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 1655 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 1656 | |
| 1657 array_overlap_test(nooverlap_target, 1); | |
| 1658 | |
| 1659 __ sllx(count, LogBytesPerShort, byte_count); | |
| 1660 __ add(to, byte_count, end_to); // offset after last copied element | |
| 1661 | |
| 1662 // for short arrays, just do single element copy | |
| 1663 __ cmp(count, 11); // 8 + 3 (22 bytes) | |
| 1664 __ brx(Assembler::less, false, Assembler::pn, L_copy_2_bytes); | |
| 1665 __ delayed()->add(from, byte_count, end_from); | |
| 1666 | |
| 1667 { | |
| 1668 // Align end of arrays since they could be not aligned even | |
| 1669 // when arrays itself are aligned. | |
| 1670 | |
| 1671 // copy 1 element if necessary to align 'end_to' on an 4 bytes | |
| 1672 __ andcc(end_to, 3, G0); | |
| 1673 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1674 __ delayed()->lduh(end_from, -2, O3); | |
| 1675 __ dec(end_from, 2); | |
| 1676 __ dec(end_to, 2); | |
| 1677 __ dec(count); | |
| 1678 __ sth(O3, end_to, 0); | |
| 1679 __ BIND(L_skip_alignment); | |
| 1680 | |
| 1681 // copy 2 elements to align 'end_to' on an 8 byte boundary | |
| 1682 __ andcc(end_to, 7, G0); | |
| 1683 __ br(Assembler::zero, false, Assembler::pn, L_skip_alignment2); | |
| 1684 __ delayed()->lduh(end_from, -2, O3); | |
| 1685 __ dec(count, 2); | |
| 1686 __ lduh(end_from, -4, O4); | |
| 1687 __ dec(end_from, 4); | |
| 1688 __ dec(end_to, 4); | |
| 1689 __ sth(O3, end_to, 2); | |
| 1690 __ sth(O4, end_to, 0); | |
| 1691 __ BIND(L_skip_alignment2); | |
| 1692 } | |
| 1693 #ifdef _LP64 | |
| 1694 if (aligned) { | |
| 1695 // Both arrays are aligned to 8-bytes in 64-bits VM. | |
| 1696 // The 'count' is decremented in copy_16_bytes_backward_with_shift() | |
| 1697 // in unaligned case. | |
| 1698 __ dec(count, 8); | |
| 1699 } else | |
| 1700 #endif | |
| 1701 { | |
| 1702 // Copy with shift 16 bytes per iteration if arrays do not have | |
| 1703 // the same alignment mod 8, otherwise jump to the next | |
| 1704 // code for aligned copy (and substracting 8 from 'count' before jump). | |
| 1705 // The compare above (count >= 11) guarantes 'count' >= 16 bytes. | |
| 1706 // Also jump over aligned copy after the copy with shift completed. | |
| 1707 | |
| 1708 copy_16_bytes_backward_with_shift(end_from, end_to, count, 8, | |
| 1709 L_aligned_copy, L_copy_2_bytes); | |
| 1710 } | |
| 1711 // copy 4 elements (16 bytes) at a time | |
| 1712 __ align(16); | |
| 1713 __ BIND(L_aligned_copy); | |
| 1714 __ dec(end_from, 16); | |
| 1715 __ ldx(end_from, 8, O3); | |
| 1716 __ ldx(end_from, 0, O4); | |
| 1717 __ dec(end_to, 16); | |
| 1718 __ deccc(count, 8); | |
| 1719 __ stx(O3, end_to, 8); | |
| 1720 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); | |
| 1721 __ delayed()->stx(O4, end_to, 0); | |
| 1722 __ inc(count, 8); | |
| 1723 | |
| 1724 // copy 1 element (2 bytes) at a time | |
| 1725 __ BIND(L_copy_2_bytes); | |
| 1726 __ br_zero(Assembler::zero, false, Assembler::pt, count, L_exit); | |
| 1727 __ delayed()->nop(); | |
| 1728 __ BIND(L_copy_2_bytes_loop); | |
| 1729 __ dec(end_from, 2); | |
| 1730 __ dec(end_to, 2); | |
| 1731 __ lduh(end_from, 0, O4); | |
| 1732 __ deccc(count); | |
| 1733 __ brx(Assembler::greater, false, Assembler::pt, L_copy_2_bytes_loop); | |
| 1734 __ delayed()->sth(O4, end_to, 0); | |
| 1735 | |
| 1736 __ BIND(L_exit); | |
| 1737 // O3, O4 are used as temp registers | |
| 1738 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4); | |
| 1739 __ retl(); | |
| 1740 __ delayed()->mov(G0, O0); // return 0 | |
| 1741 return start; | |
| 1742 } | |
| 1743 | |
| 1744 // | |
| 1745 // Generate core code for disjoint int copy (and oop copy on 32-bit). | |
| 1746 // If "aligned" is true, the "from" and "to" addresses are assumed | |
| 1747 // to be heapword aligned. | |
| 1748 // | |
| 1749 // Arguments: | |
| 1750 // from: O0 | |
| 1751 // to: O1 | |
| 1752 // count: O2 treated as signed | |
| 1753 // | |
| 1754 void generate_disjoint_int_copy_core(bool aligned) { | |
| 1755 | |
| 1756 Label L_skip_alignment, L_aligned_copy; | |
| 1757 Label L_copy_16_bytes, L_copy_4_bytes, L_copy_4_bytes_loop, L_exit; | |
| 1758 | |
| 1759 const Register from = O0; // source array address | |
| 1760 const Register to = O1; // destination array address | |
| 1761 const Register count = O2; // elements count | |
| 1762 const Register offset = O5; // offset from start of arrays | |
| 1763 // O3, O4, G3, G4 are used as temp registers | |
| 1764 | |
| 1765 // 'aligned' == true when it is known statically during compilation | |
| 1766 // of this arraycopy call site that both 'from' and 'to' addresses | |
| 1767 // are HeapWordSize aligned (see LibraryCallKit::basictype2arraycopy()). | |
| 1768 // | |
| 1769 // Aligned arrays have 4 bytes alignment in 32-bits VM | |
| 1770 // and 8 bytes - in 64-bits VM. | |
| 1771 // | |
| 1772 #ifdef _LP64 | |
| 1773 if (!aligned) | |
| 1774 #endif | |
| 1775 { | |
| 1776 // The next check could be put under 'ifndef' since the code in | |
| 1777 // generate_disjoint_long_copy_core() has own checks and set 'offset'. | |
| 1778 | |
| 1779 // for short arrays, just do single element copy | |
| 1780 __ cmp(count, 5); // 4 + 1 (20 bytes) | |
| 1781 __ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_4_bytes); | |
| 1782 __ delayed()->mov(G0, offset); | |
| 1783 | |
| 1784 // copy 1 element to align 'to' on an 8 byte boundary | |
| 1785 __ andcc(to, 7, G0); | |
| 1786 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1787 __ delayed()->ld(from, 0, O3); | |
| 1788 __ inc(from, 4); | |
| 1789 __ inc(to, 4); | |
| 1790 __ dec(count); | |
| 1791 __ st(O3, to, -4); | |
| 1792 __ BIND(L_skip_alignment); | |
| 1793 | |
| 1794 // if arrays have same alignment mod 8, do 4 elements copy | |
| 1795 __ andcc(from, 7, G0); | |
| 1796 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 1797 __ delayed()->ld(from, 0, O3); | |
| 1798 | |
| 1799 // | |
| 1800 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 1801 // to form 2 aligned 8-bytes chunks to store. | |
| 1802 // | |
| 1803 // copy_16_bytes_forward_with_shift() is not used here since this | |
| 1804 // code is more optimal. | |
| 1805 | |
| 1806 // copy with shift 4 elements (16 bytes) at a time | |
| 1807 __ dec(count, 4); // The cmp at the beginning guaranty count >= 4 | |
| 1808 | |
| 1809 __ align(16); | |
| 1810 __ BIND(L_copy_16_bytes); | |
| 1811 __ ldx(from, 4, O4); | |
| 1812 __ deccc(count, 4); // Can we do next iteration after this one? | |
| 1813 __ ldx(from, 12, G4); | |
| 1814 __ inc(to, 16); | |
| 1815 __ inc(from, 16); | |
| 1816 __ sllx(O3, 32, O3); | |
| 1817 __ srlx(O4, 32, G3); | |
| 1818 __ bset(G3, O3); | |
| 1819 __ stx(O3, to, -16); | |
| 1820 __ sllx(O4, 32, O4); | |
| 1821 __ srlx(G4, 32, G3); | |
| 1822 __ bset(G3, O4); | |
| 1823 __ stx(O4, to, -8); | |
| 1824 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_copy_16_bytes); | |
| 1825 __ delayed()->mov(G4, O3); | |
| 1826 | |
| 1827 __ br(Assembler::always, false, Assembler::pt, L_copy_4_bytes); | |
| 1828 __ delayed()->inc(count, 4); // restore 'count' | |
| 1829 | |
| 1830 __ BIND(L_aligned_copy); | |
| 1831 } | |
| 1832 // copy 4 elements (16 bytes) at a time | |
| 1833 __ and3(count, 1, G4); // Save | |
| 1834 __ srl(count, 1, count); | |
| 1835 generate_disjoint_long_copy_core(aligned); | |
| 1836 __ mov(G4, count); // Restore | |
| 1837 | |
| 1838 // copy 1 element at a time | |
| 1839 __ BIND(L_copy_4_bytes); | |
| 1840 __ br_zero(Assembler::zero, false, Assembler::pt, count, L_exit); | |
| 1841 __ delayed()->nop(); | |
| 1842 __ BIND(L_copy_4_bytes_loop); | |
| 1843 __ ld(from, offset, O3); | |
| 1844 __ deccc(count); | |
| 1845 __ st(O3, to, offset); | |
| 1846 __ brx(Assembler::notZero, false, Assembler::pt, L_copy_4_bytes_loop); | |
| 1847 __ delayed()->inc(offset, 4); | |
| 1848 __ BIND(L_exit); | |
| 1849 } | |
| 1850 | |
| 1851 // | |
| 1852 // Generate stub for disjoint int copy. If "aligned" is true, the | |
| 1853 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1854 // | |
| 1855 // Arguments for generated stub: | |
| 1856 // from: O0 | |
| 1857 // to: O1 | |
| 1858 // count: O2 treated as signed | |
| 1859 // | |
| 1860 address generate_disjoint_int_copy(bool aligned, const char * name) { | |
| 1861 __ align(CodeEntryAlignment); | |
| 1862 StubCodeMark mark(this, "StubRoutines", name); | |
| 1863 address start = __ pc(); | |
| 1864 | |
| 1865 const Register count = O2; | |
| 1866 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 1867 | |
| 1868 if (!aligned) disjoint_int_copy_entry = __ pc(); | |
| 1869 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 1870 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 1871 | |
| 1872 generate_disjoint_int_copy_core(aligned); | |
| 1873 | |
| 1874 // O3, O4 are used as temp registers | |
| 1875 inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4); | |
| 1876 __ retl(); | |
| 1877 __ delayed()->mov(G0, O0); // return 0 | |
| 1878 return start; | |
| 1879 } | |
| 1880 | |
| 1881 // | |
| 1882 // Generate core code for conjoint int copy (and oop copy on 32-bit). | |
| 1883 // If "aligned" is true, the "from" and "to" addresses are assumed | |
| 1884 // to be heapword aligned. | |
| 1885 // | |
| 1886 // Arguments: | |
| 1887 // from: O0 | |
| 1888 // to: O1 | |
| 1889 // count: O2 treated as signed | |
| 1890 // | |
| 1891 void generate_conjoint_int_copy_core(bool aligned) { | |
| 1892 // Do reverse copy. | |
| 1893 | |
| 1894 Label L_skip_alignment, L_aligned_copy; | |
| 1895 Label L_copy_16_bytes, L_copy_4_bytes, L_copy_4_bytes_loop, L_exit; | |
| 1896 | |
| 1897 const Register from = O0; // source array address | |
| 1898 const Register to = O1; // destination array address | |
| 1899 const Register count = O2; // elements count | |
| 1900 const Register end_from = from; // source array end address | |
| 1901 const Register end_to = to; // destination array end address | |
| 1902 // O3, O4, O5, G3 are used as temp registers | |
| 1903 | |
| 1904 const Register byte_count = O3; // bytes count to copy | |
| 1905 | |
| 1906 __ sllx(count, LogBytesPerInt, byte_count); | |
| 1907 __ add(to, byte_count, end_to); // offset after last copied element | |
| 1908 | |
| 1909 __ cmp(count, 5); // for short arrays, just do single element copy | |
| 1910 __ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_4_bytes); | |
| 1911 __ delayed()->add(from, byte_count, end_from); | |
| 1912 | |
| 1913 // copy 1 element to align 'to' on an 8 byte boundary | |
| 1914 __ andcc(end_to, 7, G0); | |
| 1915 __ br(Assembler::zero, false, Assembler::pt, L_skip_alignment); | |
| 1916 __ delayed()->nop(); | |
| 1917 __ dec(count); | |
| 1918 __ dec(end_from, 4); | |
| 1919 __ dec(end_to, 4); | |
| 1920 __ ld(end_from, 0, O4); | |
| 1921 __ st(O4, end_to, 0); | |
| 1922 __ BIND(L_skip_alignment); | |
| 1923 | |
| 1924 // Check if 'end_from' and 'end_to' has the same alignment. | |
| 1925 __ andcc(end_from, 7, G0); | |
| 1926 __ br(Assembler::zero, false, Assembler::pt, L_aligned_copy); | |
| 1927 __ delayed()->dec(count, 4); // The cmp at the start guaranty cnt >= 4 | |
| 1928 | |
| 1929 // copy with shift 4 elements (16 bytes) at a time | |
| 1930 // | |
| 1931 // Load 2 aligned 8-bytes chunks and use one from previous iteration | |
| 1932 // to form 2 aligned 8-bytes chunks to store. | |
| 1933 // | |
| 1934 __ ldx(end_from, -4, O3); | |
| 1935 __ align(16); | |
| 1936 __ BIND(L_copy_16_bytes); | |
| 1937 __ ldx(end_from, -12, O4); | |
| 1938 __ deccc(count, 4); | |
| 1939 __ ldx(end_from, -20, O5); | |
| 1940 __ dec(end_to, 16); | |
| 1941 __ dec(end_from, 16); | |
| 1942 __ srlx(O3, 32, O3); | |
| 1943 __ sllx(O4, 32, G3); | |
| 1944 __ bset(G3, O3); | |
| 1945 __ stx(O3, end_to, 8); | |
| 1946 __ srlx(O4, 32, O4); | |
| 1947 __ sllx(O5, 32, G3); | |
| 1948 __ bset(O4, G3); | |
| 1949 __ stx(G3, end_to, 0); | |
| 1950 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_copy_16_bytes); | |
| 1951 __ delayed()->mov(O5, O3); | |
| 1952 | |
| 1953 __ br(Assembler::always, false, Assembler::pt, L_copy_4_bytes); | |
| 1954 __ delayed()->inc(count, 4); | |
| 1955 | |
| 1956 // copy 4 elements (16 bytes) at a time | |
| 1957 __ align(16); | |
| 1958 __ BIND(L_aligned_copy); | |
| 1959 __ dec(end_from, 16); | |
| 1960 __ ldx(end_from, 8, O3); | |
| 1961 __ ldx(end_from, 0, O4); | |
| 1962 __ dec(end_to, 16); | |
| 1963 __ deccc(count, 4); | |
| 1964 __ stx(O3, end_to, 8); | |
| 1965 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_aligned_copy); | |
| 1966 __ delayed()->stx(O4, end_to, 0); | |
| 1967 __ inc(count, 4); | |
| 1968 | |
| 1969 // copy 1 element (4 bytes) at a time | |
| 1970 __ BIND(L_copy_4_bytes); | |
| 1971 __ br_zero(Assembler::zero, false, Assembler::pt, count, L_exit); | |
| 1972 __ delayed()->nop(); | |
| 1973 __ BIND(L_copy_4_bytes_loop); | |
| 1974 __ dec(end_from, 4); | |
| 1975 __ dec(end_to, 4); | |
| 1976 __ ld(end_from, 0, O4); | |
| 1977 __ deccc(count); | |
| 1978 __ brx(Assembler::greater, false, Assembler::pt, L_copy_4_bytes_loop); | |
| 1979 __ delayed()->st(O4, end_to, 0); | |
| 1980 __ BIND(L_exit); | |
| 1981 } | |
| 1982 | |
| 1983 // | |
| 1984 // Generate stub for conjoint int copy. If "aligned" is true, the | |
| 1985 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 1986 // | |
| 1987 // Arguments for generated stub: | |
| 1988 // from: O0 | |
| 1989 // to: O1 | |
| 1990 // count: O2 treated as signed | |
| 1991 // | |
| 1992 address generate_conjoint_int_copy(bool aligned, const char * name) { | |
| 1993 __ align(CodeEntryAlignment); | |
| 1994 StubCodeMark mark(this, "StubRoutines", name); | |
| 1995 address start = __ pc(); | |
| 1996 | |
| 1997 address nooverlap_target = aligned ? | |
| 1998 StubRoutines::arrayof_jint_disjoint_arraycopy() : | |
| 1999 disjoint_int_copy_entry; | |
| 2000 | |
| 2001 assert_clean_int(O2, O3); // Make sure 'count' is clean int. | |
| 2002 | |
| 2003 if (!aligned) int_copy_entry = __ pc(); | |
| 2004 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 2005 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 2006 | |
| 2007 array_overlap_test(nooverlap_target, 2); | |
| 2008 | |
| 2009 generate_conjoint_int_copy_core(aligned); | |
| 2010 | |
| 2011 // O3, O4 are used as temp registers | |
| 2012 inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4); | |
| 2013 __ retl(); | |
| 2014 __ delayed()->mov(G0, O0); // return 0 | |
| 2015 return start; | |
| 2016 } | |
| 2017 | |
| 2018 // | |
| 2019 // Generate core code for disjoint long copy (and oop copy on 64-bit). | |
| 2020 // "aligned" is ignored, because we must make the stronger | |
| 2021 // assumption that both addresses are always 64-bit aligned. | |
| 2022 // | |
| 2023 // Arguments: | |
| 2024 // from: O0 | |
| 2025 // to: O1 | |
| 2026 // count: O2 treated as signed | |
| 2027 // | |
| 2028 void generate_disjoint_long_copy_core(bool aligned) { | |
| 2029 Label L_copy_8_bytes, L_copy_16_bytes, L_exit; | |
| 2030 const Register from = O0; // source array address | |
| 2031 const Register to = O1; // destination array address | |
| 2032 const Register count = O2; // elements count | |
| 2033 const Register offset0 = O4; // element offset | |
| 2034 const Register offset8 = O5; // next element offset | |
| 2035 | |
| 2036 __ deccc(count, 2); | |
| 2037 __ mov(G0, offset0); // offset from start of arrays (0) | |
| 2038 __ brx(Assembler::negative, false, Assembler::pn, L_copy_8_bytes ); | |
| 2039 __ delayed()->add(offset0, 8, offset8); | |
| 2040 __ align(16); | |
| 2041 __ BIND(L_copy_16_bytes); | |
| 2042 __ ldx(from, offset0, O3); | |
| 2043 __ ldx(from, offset8, G3); | |
| 2044 __ deccc(count, 2); | |
| 2045 __ stx(O3, to, offset0); | |
| 2046 __ inc(offset0, 16); | |
| 2047 __ stx(G3, to, offset8); | |
| 2048 __ brx(Assembler::greaterEqual, false, Assembler::pt, L_copy_16_bytes); | |
| 2049 __ delayed()->inc(offset8, 16); | |
| 2050 | |
| 2051 __ BIND(L_copy_8_bytes); | |
| 2052 __ inccc(count, 2); | |
| 2053 __ brx(Assembler::zero, true, Assembler::pn, L_exit ); | |
| 2054 __ delayed()->mov(offset0, offset8); // Set O5 used by other stubs | |
| 2055 __ ldx(from, offset0, O3); | |
| 2056 __ stx(O3, to, offset0); | |
| 2057 __ BIND(L_exit); | |
| 2058 } | |
| 2059 | |
| 2060 // | |
| 2061 // Generate stub for disjoint long copy. | |
| 2062 // "aligned" is ignored, because we must make the stronger | |
| 2063 // assumption that both addresses are always 64-bit aligned. | |
| 2064 // | |
| 2065 // Arguments for generated stub: | |
| 2066 // from: O0 | |
| 2067 // to: O1 | |
| 2068 // count: O2 treated as signed | |
| 2069 // | |
| 2070 address generate_disjoint_long_copy(bool aligned, const char * name) { | |
| 2071 __ align(CodeEntryAlignment); | |
| 2072 StubCodeMark mark(this, "StubRoutines", name); | |
| 2073 address start = __ pc(); | |
| 2074 | |
| 2075 assert_clean_int(O2, O3); // Make sure 'count' is clean int. | |
| 2076 | |
| 2077 if (!aligned) disjoint_long_copy_entry = __ pc(); | |
| 2078 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 2079 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 2080 | |
| 2081 generate_disjoint_long_copy_core(aligned); | |
| 2082 | |
| 2083 // O3, O4 are used as temp registers | |
| 2084 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4); | |
| 2085 __ retl(); | |
| 2086 __ delayed()->mov(G0, O0); // return 0 | |
| 2087 return start; | |
| 2088 } | |
| 2089 | |
| 2090 // | |
| 2091 // Generate core code for conjoint long copy (and oop copy on 64-bit). | |
| 2092 // "aligned" is ignored, because we must make the stronger | |
| 2093 // assumption that both addresses are always 64-bit aligned. | |
| 2094 // | |
| 2095 // Arguments: | |
| 2096 // from: O0 | |
| 2097 // to: O1 | |
| 2098 // count: O2 treated as signed | |
| 2099 // | |
| 2100 void generate_conjoint_long_copy_core(bool aligned) { | |
| 2101 // Do reverse copy. | |
| 2102 Label L_copy_8_bytes, L_copy_16_bytes, L_exit; | |
| 2103 const Register from = O0; // source array address | |
| 2104 const Register to = O1; // destination array address | |
| 2105 const Register count = O2; // elements count | |
| 2106 const Register offset8 = O4; // element offset | |
| 2107 const Register offset0 = O5; // previous element offset | |
| 2108 | |
| 2109 __ subcc(count, 1, count); | |
| 2110 __ brx(Assembler::lessEqual, false, Assembler::pn, L_copy_8_bytes ); | |
| 2111 __ delayed()->sllx(count, LogBytesPerLong, offset8); | |
| 2112 __ sub(offset8, 8, offset0); | |
| 2113 __ align(16); | |
| 2114 __ BIND(L_copy_16_bytes); | |
| 2115 __ ldx(from, offset8, O2); | |
| 2116 __ ldx(from, offset0, O3); | |
| 2117 __ stx(O2, to, offset8); | |
| 2118 __ deccc(offset8, 16); // use offset8 as counter | |
| 2119 __ stx(O3, to, offset0); | |
| 2120 __ brx(Assembler::greater, false, Assembler::pt, L_copy_16_bytes); | |
| 2121 __ delayed()->dec(offset0, 16); | |
| 2122 | |
| 2123 __ BIND(L_copy_8_bytes); | |
| 2124 __ brx(Assembler::negative, false, Assembler::pn, L_exit ); | |
| 2125 __ delayed()->nop(); | |
| 2126 __ ldx(from, 0, O3); | |
| 2127 __ stx(O3, to, 0); | |
| 2128 __ BIND(L_exit); | |
| 2129 } | |
| 2130 | |
| 2131 // Generate stub for conjoint long copy. | |
| 2132 // "aligned" is ignored, because we must make the stronger | |
| 2133 // assumption that both addresses are always 64-bit aligned. | |
| 2134 // | |
| 2135 // Arguments for generated stub: | |
| 2136 // from: O0 | |
| 2137 // to: O1 | |
| 2138 // count: O2 treated as signed | |
| 2139 // | |
| 2140 address generate_conjoint_long_copy(bool aligned, const char * name) { | |
| 2141 __ align(CodeEntryAlignment); | |
| 2142 StubCodeMark mark(this, "StubRoutines", name); | |
| 2143 address start = __ pc(); | |
| 2144 | |
| 2145 assert(!aligned, "usage"); | |
| 2146 address nooverlap_target = disjoint_long_copy_entry; | |
| 2147 | |
| 2148 assert_clean_int(O2, O3); // Make sure 'count' is clean int. | |
| 2149 | |
| 2150 if (!aligned) long_copy_entry = __ pc(); | |
| 2151 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory) | |
| 2152 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 2153 | |
| 2154 array_overlap_test(nooverlap_target, 3); | |
| 2155 | |
| 2156 generate_conjoint_long_copy_core(aligned); | |
| 2157 | |
| 2158 // O3, O4 are used as temp registers | |
| 2159 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4); | |
| 2160 __ retl(); | |
| 2161 __ delayed()->mov(G0, O0); // return 0 | |
| 2162 return start; | |
| 2163 } | |
| 2164 | |
| 2165 // Generate stub for disjoint oop copy. If "aligned" is true, the | |
| 2166 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 2167 // | |
| 2168 // Arguments for generated stub: | |
| 2169 // from: O0 | |
| 2170 // to: O1 | |
| 2171 // count: O2 treated as signed | |
| 2172 // | |
| 2173 address generate_disjoint_oop_copy(bool aligned, const char * name) { | |
| 2174 | |
| 2175 const Register from = O0; // source array address | |
| 2176 const Register to = O1; // destination array address | |
| 2177 const Register count = O2; // elements count | |
| 2178 | |
| 2179 __ align(CodeEntryAlignment); | |
| 2180 StubCodeMark mark(this, "StubRoutines", name); | |
| 2181 address start = __ pc(); | |
| 2182 | |
| 2183 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 2184 | |
| 2185 if (!aligned) disjoint_oop_copy_entry = __ pc(); | |
| 2186 // caller can pass a 64-bit byte count here | |
| 2187 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 2188 | |
| 2189 // save arguments for barrier generation | |
| 2190 __ mov(to, G1); | |
| 2191 __ mov(count, G5); | |
| 2192 gen_write_ref_array_pre_barrier(G1, G5); | |
| 2193 #ifdef _LP64 | |
|
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2194 assert_clean_int(count, O3); // Make sure 'count' is clean int. |
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2195 if (UseCompressedOops) { |
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2196 generate_disjoint_int_copy_core(aligned); |
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2197 } else { |
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2198 generate_disjoint_long_copy_core(aligned); |
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2199 } |
| 0 | 2200 #else |
| 2201 generate_disjoint_int_copy_core(aligned); | |
| 2202 #endif | |
| 2203 // O0 is used as temp register | |
| 2204 gen_write_ref_array_post_barrier(G1, G5, O0); | |
| 2205 | |
| 2206 // O3, O4 are used as temp registers | |
| 2207 inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4); | |
| 2208 __ retl(); | |
| 2209 __ delayed()->mov(G0, O0); // return 0 | |
| 2210 return start; | |
| 2211 } | |
| 2212 | |
| 2213 // Generate stub for conjoint oop copy. If "aligned" is true, the | |
| 2214 // "from" and "to" addresses are assumed to be heapword aligned. | |
| 2215 // | |
| 2216 // Arguments for generated stub: | |
| 2217 // from: O0 | |
| 2218 // to: O1 | |
| 2219 // count: O2 treated as signed | |
| 2220 // | |
| 2221 address generate_conjoint_oop_copy(bool aligned, const char * name) { | |
| 2222 | |
| 2223 const Register from = O0; // source array address | |
| 2224 const Register to = O1; // destination array address | |
| 2225 const Register count = O2; // elements count | |
| 2226 | |
| 2227 __ align(CodeEntryAlignment); | |
| 2228 StubCodeMark mark(this, "StubRoutines", name); | |
| 2229 address start = __ pc(); | |
| 2230 | |
| 2231 assert_clean_int(count, O3); // Make sure 'count' is clean int. | |
| 2232 | |
| 2233 if (!aligned) oop_copy_entry = __ pc(); | |
| 2234 // caller can pass a 64-bit byte count here | |
| 2235 if (!aligned) BLOCK_COMMENT("Entry:"); | |
| 2236 | |
| 2237 // save arguments for barrier generation | |
| 2238 __ mov(to, G1); | |
| 2239 __ mov(count, G5); | |
| 2240 | |
| 2241 gen_write_ref_array_pre_barrier(G1, G5); | |
| 2242 | |
| 2243 address nooverlap_target = aligned ? | |
| 2244 StubRoutines::arrayof_oop_disjoint_arraycopy() : | |
| 2245 disjoint_oop_copy_entry; | |
| 2246 | |
|
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2247 array_overlap_test(nooverlap_target, LogBytesPerHeapOop); |
| 0 | 2248 |
| 2249 #ifdef _LP64 | |
|
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2250 if (UseCompressedOops) { |
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2251 generate_conjoint_int_copy_core(aligned); |
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2252 } else { |
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2253 generate_conjoint_long_copy_core(aligned); |
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2254 } |
| 0 | 2255 #else |
| 2256 generate_conjoint_int_copy_core(aligned); | |
| 2257 #endif | |
| 2258 | |
| 2259 // O0 is used as temp register | |
| 2260 gen_write_ref_array_post_barrier(G1, G5, O0); | |
| 2261 | |
| 2262 // O3, O4 are used as temp registers | |
| 2263 inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4); | |
| 2264 __ retl(); | |
| 2265 __ delayed()->mov(G0, O0); // return 0 | |
| 2266 return start; | |
| 2267 } | |
| 2268 | |
| 2269 | |
| 2270 // Helper for generating a dynamic type check. | |
| 2271 // Smashes only the given temp registers. | |
| 2272 void generate_type_check(Register sub_klass, | |
| 2273 Register super_check_offset, | |
| 2274 Register super_klass, | |
| 2275 Register temp, | |
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2276 Label& L_success) { |
| 0 | 2277 assert_different_registers(sub_klass, super_check_offset, super_klass, temp); |
| 2278 | |
| 2279 BLOCK_COMMENT("type_check:"); | |
| 2280 | |
|
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2281 Label L_miss, L_pop_to_miss; |
| 0 | 2282 |
| 2283 assert_clean_int(super_check_offset, temp); | |
| 2284 | |
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2285 __ check_klass_subtype_fast_path(sub_klass, super_klass, temp, noreg, |
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2286 &L_success, &L_miss, NULL, |
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2287 super_check_offset); |
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2288 |
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2289 BLOCK_COMMENT("type_check_slow_path:"); |
| 0 | 2290 __ save_frame(0); |
|
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2291 __ check_klass_subtype_slow_path(sub_klass->after_save(), |
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2292 super_klass->after_save(), |
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2293 L0, L1, L2, L4, |
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2294 NULL, &L_pop_to_miss); |
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2295 __ ba(false, L_success); |
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2296 __ delayed()->restore(); |
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2297 |
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2298 __ bind(L_pop_to_miss); |
| 0 | 2299 __ restore(); |
| 2300 | |
| 2301 // Fall through on failure! | |
| 2302 __ BIND(L_miss); | |
| 2303 } | |
| 2304 | |
| 2305 | |
| 2306 // Generate stub for checked oop copy. | |
| 2307 // | |
| 2308 // Arguments for generated stub: | |
| 2309 // from: O0 | |
| 2310 // to: O1 | |
| 2311 // count: O2 treated as signed | |
| 2312 // ckoff: O3 (super_check_offset) | |
| 2313 // ckval: O4 (super_klass) | |
| 2314 // ret: O0 zero for success; (-1^K) where K is partial transfer count | |
| 2315 // | |
| 2316 address generate_checkcast_copy(const char* name) { | |
| 2317 | |
| 2318 const Register O0_from = O0; // source array address | |
| 2319 const Register O1_to = O1; // destination array address | |
| 2320 const Register O2_count = O2; // elements count | |
| 2321 const Register O3_ckoff = O3; // super_check_offset | |
| 2322 const Register O4_ckval = O4; // super_klass | |
| 2323 | |
| 2324 const Register O5_offset = O5; // loop var, with stride wordSize | |
| 2325 const Register G1_remain = G1; // loop var, with stride -1 | |
| 2326 const Register G3_oop = G3; // actual oop copied | |
| 2327 const Register G4_klass = G4; // oop._klass | |
| 2328 const Register G5_super = G5; // oop._klass._primary_supers[ckval] | |
| 2329 | |
| 2330 __ align(CodeEntryAlignment); | |
| 2331 StubCodeMark mark(this, "StubRoutines", name); | |
| 2332 address start = __ pc(); | |
| 2333 | |
|
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2334 gen_write_ref_array_pre_barrier(O1, O2); |
| 0 | 2335 |
| 2336 #ifdef ASSERT | |
|
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2337 // We sometimes save a frame (see generate_type_check below). |
| 0 | 2338 // If this will cause trouble, let's fail now instead of later. |
| 2339 __ save_frame(0); | |
| 2340 __ restore(); | |
| 2341 #endif | |
| 2342 | |
| 2343 #ifdef ASSERT | |
| 2344 // caller guarantees that the arrays really are different | |
| 2345 // otherwise, we would have to make conjoint checks | |
| 2346 { Label L; | |
| 2347 __ mov(O3, G1); // spill: overlap test smashes O3 | |
| 2348 __ mov(O4, G4); // spill: overlap test smashes O4 | |
|
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2349 array_overlap_test(L, LogBytesPerHeapOop); |
| 0 | 2350 __ stop("checkcast_copy within a single array"); |
| 2351 __ bind(L); | |
| 2352 __ mov(G1, O3); | |
| 2353 __ mov(G4, O4); | |
| 2354 } | |
| 2355 #endif //ASSERT | |
| 2356 | |
| 2357 assert_clean_int(O2_count, G1); // Make sure 'count' is clean int. | |
| 2358 | |
| 2359 checkcast_copy_entry = __ pc(); | |
| 2360 // caller can pass a 64-bit byte count here (from generic stub) | |
| 2361 BLOCK_COMMENT("Entry:"); | |
| 2362 | |
| 2363 Label load_element, store_element, do_card_marks, fail, done; | |
| 2364 __ addcc(O2_count, 0, G1_remain); // initialize loop index, and test it | |
| 2365 __ brx(Assembler::notZero, false, Assembler::pt, load_element); | |
| 2366 __ delayed()->mov(G0, O5_offset); // offset from start of arrays | |
| 2367 | |
| 2368 // Empty array: Nothing to do. | |
| 2369 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4); | |
| 2370 __ retl(); | |
| 2371 __ delayed()->set(0, O0); // return 0 on (trivial) success | |
| 2372 | |
| 2373 // ======== begin loop ======== | |
| 2374 // (Loop is rotated; its entry is load_element.) | |
| 2375 // Loop variables: | |
| 2376 // (O5 = 0; ; O5 += wordSize) --- offset from src, dest arrays | |
| 2377 // (O2 = len; O2 != 0; O2--) --- number of oops *remaining* | |
| 2378 // G3, G4, G5 --- current oop, oop.klass, oop.klass.super | |
| 2379 __ align(16); | |
| 2380 | |
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2381 __ BIND(store_element); |
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2382 __ deccc(G1_remain); // decrement the count |
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2383 __ store_heap_oop(G3_oop, O1_to, O5_offset); // store the oop |
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2384 __ inc(O5_offset, heapOopSize); // step to next offset |
| 0 | 2385 __ brx(Assembler::zero, true, Assembler::pt, do_card_marks); |
| 2386 __ delayed()->set(0, O0); // return -1 on success | |
| 2387 | |
| 2388 // ======== loop entry is here ======== | |
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2389 __ BIND(load_element); |
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2390 __ load_heap_oop(O0_from, O5_offset, G3_oop); // load the oop |
| 0 | 2391 __ br_null(G3_oop, true, Assembler::pt, store_element); |
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2392 __ delayed()->nop(); |
| 0 | 2393 |
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2394 __ load_klass(G3_oop, G4_klass); // query the object klass |
| 0 | 2395 |
| 2396 generate_type_check(G4_klass, O3_ckoff, O4_ckval, G5_super, | |
| 2397 // branch to this on success: | |
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2398 store_element); |
| 0 | 2399 // ======== end loop ======== |
| 2400 | |
| 2401 // It was a real error; we must depend on the caller to finish the job. | |
| 2402 // Register G1 has number of *remaining* oops, O2 number of *total* oops. | |
| 2403 // Emit GC store barriers for the oops we have copied (O2 minus G1), | |
| 2404 // and report their number to the caller. | |
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2405 __ BIND(fail); |
| 0 | 2406 __ subcc(O2_count, G1_remain, O2_count); |
| 2407 __ brx(Assembler::zero, false, Assembler::pt, done); | |
| 2408 __ delayed()->not1(O2_count, O0); // report (-1^K) to caller | |
| 2409 | |
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2410 __ BIND(do_card_marks); |
| 0 | 2411 gen_write_ref_array_post_barrier(O1_to, O2_count, O3); // store check on O1[0..O2] |
| 2412 | |
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2413 __ BIND(done); |
| 0 | 2414 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4); |
| 2415 __ retl(); | |
| 2416 __ delayed()->nop(); // return value in 00 | |
| 2417 | |
| 2418 return start; | |
| 2419 } | |
| 2420 | |
| 2421 | |
| 2422 // Generate 'unsafe' array copy stub | |
| 2423 // Though just as safe as the other stubs, it takes an unscaled | |
| 2424 // size_t argument instead of an element count. | |
| 2425 // | |
| 2426 // Arguments for generated stub: | |
| 2427 // from: O0 | |
| 2428 // to: O1 | |
| 2429 // count: O2 byte count, treated as ssize_t, can be zero | |
| 2430 // | |
| 2431 // Examines the alignment of the operands and dispatches | |
| 2432 // to a long, int, short, or byte copy loop. | |
| 2433 // | |
| 2434 address generate_unsafe_copy(const char* name) { | |
| 2435 | |
| 2436 const Register O0_from = O0; // source array address | |
| 2437 const Register O1_to = O1; // destination array address | |
| 2438 const Register O2_count = O2; // elements count | |
| 2439 | |
| 2440 const Register G1_bits = G1; // test copy of low bits | |
| 2441 | |
| 2442 __ align(CodeEntryAlignment); | |
| 2443 StubCodeMark mark(this, "StubRoutines", name); | |
| 2444 address start = __ pc(); | |
| 2445 | |
| 2446 // bump this on entry, not on exit: | |
| 2447 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr, G1, G3); | |
| 2448 | |
| 2449 __ or3(O0_from, O1_to, G1_bits); | |
| 2450 __ or3(O2_count, G1_bits, G1_bits); | |
| 2451 | |
| 2452 __ btst(BytesPerLong-1, G1_bits); | |
| 2453 __ br(Assembler::zero, true, Assembler::pt, | |
| 2454 long_copy_entry, relocInfo::runtime_call_type); | |
| 2455 // scale the count on the way out: | |
| 2456 __ delayed()->srax(O2_count, LogBytesPerLong, O2_count); | |
| 2457 | |
| 2458 __ btst(BytesPerInt-1, G1_bits); | |
| 2459 __ br(Assembler::zero, true, Assembler::pt, | |
| 2460 int_copy_entry, relocInfo::runtime_call_type); | |
| 2461 // scale the count on the way out: | |
| 2462 __ delayed()->srax(O2_count, LogBytesPerInt, O2_count); | |
| 2463 | |
| 2464 __ btst(BytesPerShort-1, G1_bits); | |
| 2465 __ br(Assembler::zero, true, Assembler::pt, | |
| 2466 short_copy_entry, relocInfo::runtime_call_type); | |
| 2467 // scale the count on the way out: | |
| 2468 __ delayed()->srax(O2_count, LogBytesPerShort, O2_count); | |
| 2469 | |
| 2470 __ br(Assembler::always, false, Assembler::pt, | |
| 2471 byte_copy_entry, relocInfo::runtime_call_type); | |
| 2472 __ delayed()->nop(); | |
| 2473 | |
| 2474 return start; | |
| 2475 } | |
| 2476 | |
| 2477 | |
| 2478 // Perform range checks on the proposed arraycopy. | |
| 2479 // Kills the two temps, but nothing else. | |
| 2480 // Also, clean the sign bits of src_pos and dst_pos. | |
| 2481 void arraycopy_range_checks(Register src, // source array oop (O0) | |
| 2482 Register src_pos, // source position (O1) | |
| 2483 Register dst, // destination array oo (O2) | |
| 2484 Register dst_pos, // destination position (O3) | |
| 2485 Register length, // length of copy (O4) | |
| 2486 Register temp1, Register temp2, | |
| 2487 Label& L_failed) { | |
| 2488 BLOCK_COMMENT("arraycopy_range_checks:"); | |
| 2489 | |
| 2490 // if (src_pos + length > arrayOop(src)->length() ) FAIL; | |
| 2491 | |
| 2492 const Register array_length = temp1; // scratch | |
| 2493 const Register end_pos = temp2; // scratch | |
| 2494 | |
| 2495 // Note: This next instruction may be in the delay slot of a branch: | |
| 2496 __ add(length, src_pos, end_pos); // src_pos + length | |
| 2497 __ lduw(src, arrayOopDesc::length_offset_in_bytes(), array_length); | |
| 2498 __ cmp(end_pos, array_length); | |
| 2499 __ br(Assembler::greater, false, Assembler::pn, L_failed); | |
| 2500 | |
| 2501 // if (dst_pos + length > arrayOop(dst)->length() ) FAIL; | |
| 2502 __ delayed()->add(length, dst_pos, end_pos); // dst_pos + length | |
| 2503 __ lduw(dst, arrayOopDesc::length_offset_in_bytes(), array_length); | |
| 2504 __ cmp(end_pos, array_length); | |
| 2505 __ br(Assembler::greater, false, Assembler::pn, L_failed); | |
| 2506 | |
| 2507 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'. | |
| 2508 // Move with sign extension can be used since they are positive. | |
| 2509 __ delayed()->signx(src_pos, src_pos); | |
| 2510 __ signx(dst_pos, dst_pos); | |
| 2511 | |
| 2512 BLOCK_COMMENT("arraycopy_range_checks done"); | |
| 2513 } | |
| 2514 | |
| 2515 | |
| 2516 // | |
| 2517 // Generate generic array copy stubs | |
| 2518 // | |
| 2519 // Input: | |
| 2520 // O0 - src oop | |
| 2521 // O1 - src_pos | |
| 2522 // O2 - dst oop | |
| 2523 // O3 - dst_pos | |
| 2524 // O4 - element count | |
| 2525 // | |
| 2526 // Output: | |
| 2527 // O0 == 0 - success | |
| 2528 // O0 == -1 - need to call System.arraycopy | |
| 2529 // | |
| 2530 address generate_generic_copy(const char *name) { | |
| 2531 | |
| 2532 Label L_failed, L_objArray; | |
| 2533 | |
| 2534 // Input registers | |
| 2535 const Register src = O0; // source array oop | |
| 2536 const Register src_pos = O1; // source position | |
| 2537 const Register dst = O2; // destination array oop | |
| 2538 const Register dst_pos = O3; // destination position | |
| 2539 const Register length = O4; // elements count | |
| 2540 | |
| 2541 // registers used as temp | |
| 2542 const Register G3_src_klass = G3; // source array klass | |
| 2543 const Register G4_dst_klass = G4; // destination array klass | |
| 2544 const Register G5_lh = G5; // layout handler | |
| 2545 const Register O5_temp = O5; | |
| 2546 | |
| 2547 __ align(CodeEntryAlignment); | |
| 2548 StubCodeMark mark(this, "StubRoutines", name); | |
| 2549 address start = __ pc(); | |
| 2550 | |
| 2551 // bump this on entry, not on exit: | |
| 2552 inc_counter_np(SharedRuntime::_generic_array_copy_ctr, G1, G3); | |
| 2553 | |
| 2554 // In principle, the int arguments could be dirty. | |
| 2555 //assert_clean_int(src_pos, G1); | |
| 2556 //assert_clean_int(dst_pos, G1); | |
| 2557 //assert_clean_int(length, G1); | |
| 2558 | |
| 2559 //----------------------------------------------------------------------- | |
| 2560 // Assembler stubs will be used for this call to arraycopy | |
| 2561 // if the following conditions are met: | |
| 2562 // | |
| 2563 // (1) src and dst must not be null. | |
| 2564 // (2) src_pos must not be negative. | |
| 2565 // (3) dst_pos must not be negative. | |
| 2566 // (4) length must not be negative. | |
| 2567 // (5) src klass and dst klass should be the same and not NULL. | |
| 2568 // (6) src and dst should be arrays. | |
| 2569 // (7) src_pos + length must not exceed length of src. | |
| 2570 // (8) dst_pos + length must not exceed length of dst. | |
| 2571 BLOCK_COMMENT("arraycopy initial argument checks"); | |
| 2572 | |
| 2573 // if (src == NULL) return -1; | |
| 2574 __ br_null(src, false, Assembler::pn, L_failed); | |
| 2575 | |
| 2576 // if (src_pos < 0) return -1; | |
| 2577 __ delayed()->tst(src_pos); | |
| 2578 __ br(Assembler::negative, false, Assembler::pn, L_failed); | |
| 2579 __ delayed()->nop(); | |
| 2580 | |
| 2581 // if (dst == NULL) return -1; | |
| 2582 __ br_null(dst, false, Assembler::pn, L_failed); | |
| 2583 | |
| 2584 // if (dst_pos < 0) return -1; | |
| 2585 __ delayed()->tst(dst_pos); | |
| 2586 __ br(Assembler::negative, false, Assembler::pn, L_failed); | |
| 2587 | |
| 2588 // if (length < 0) return -1; | |
| 2589 __ delayed()->tst(length); | |
| 2590 __ br(Assembler::negative, false, Assembler::pn, L_failed); | |
| 2591 | |
| 2592 BLOCK_COMMENT("arraycopy argument klass checks"); | |
| 2593 // get src->klass() | |
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2594 if (UseCompressedOops) { |
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2595 __ delayed()->nop(); // ??? not good |
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2596 __ load_klass(src, G3_src_klass); |
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2597 } else { |
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2598 __ delayed()->ld_ptr(src, oopDesc::klass_offset_in_bytes(), G3_src_klass); |
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2599 } |
| 0 | 2600 |
| 2601 #ifdef ASSERT | |
| 2602 // assert(src->klass() != NULL); | |
| 2603 BLOCK_COMMENT("assert klasses not null"); | |
| 2604 { Label L_a, L_b; | |
| 2605 __ br_notnull(G3_src_klass, false, Assembler::pt, L_b); // it is broken if klass is NULL | |
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2606 __ delayed()->nop(); |
| 0 | 2607 __ bind(L_a); |
| 2608 __ stop("broken null klass"); | |
| 2609 __ bind(L_b); | |
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2610 __ load_klass(dst, G4_dst_klass); |
| 0 | 2611 __ br_null(G4_dst_klass, false, Assembler::pn, L_a); // this would be broken also |
| 2612 __ delayed()->mov(G0, G4_dst_klass); // scribble the temp | |
| 2613 BLOCK_COMMENT("assert done"); | |
| 2614 } | |
| 2615 #endif | |
| 2616 | |
| 2617 // Load layout helper | |
| 2618 // | |
| 2619 // |array_tag| | header_size | element_type | |log2_element_size| | |
| 2620 // 32 30 24 16 8 2 0 | |
| 2621 // | |
| 2622 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0 | |
| 2623 // | |
| 2624 | |
| 2625 int lh_offset = klassOopDesc::header_size() * HeapWordSize + | |
| 2626 Klass::layout_helper_offset_in_bytes(); | |
| 2627 | |
| 2628 // Load 32-bits signed value. Use br() instruction with it to check icc. | |
| 2629 __ lduw(G3_src_klass, lh_offset, G5_lh); | |
| 2630 | |
|
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2631 if (UseCompressedOops) { |
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2632 __ load_klass(dst, G4_dst_klass); |
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2633 } |
| 0 | 2634 // Handle objArrays completely differently... |
| 2635 juint objArray_lh = Klass::array_layout_helper(T_OBJECT); | |
| 2636 __ set(objArray_lh, O5_temp); | |
| 2637 __ cmp(G5_lh, O5_temp); | |
| 2638 __ br(Assembler::equal, false, Assembler::pt, L_objArray); | |
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2639 if (UseCompressedOops) { |
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2640 __ delayed()->nop(); |
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2641 } else { |
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2642 __ delayed()->ld_ptr(dst, oopDesc::klass_offset_in_bytes(), G4_dst_klass); |
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2643 } |
| 0 | 2644 |
| 2645 // if (src->klass() != dst->klass()) return -1; | |
| 2646 __ cmp(G3_src_klass, G4_dst_klass); | |
| 2647 __ brx(Assembler::notEqual, false, Assembler::pn, L_failed); | |
| 2648 __ delayed()->nop(); | |
| 2649 | |
| 2650 // if (!src->is_Array()) return -1; | |
| 2651 __ cmp(G5_lh, Klass::_lh_neutral_value); // < 0 | |
| 2652 __ br(Assembler::greaterEqual, false, Assembler::pn, L_failed); | |
| 2653 | |
| 2654 // At this point, it is known to be a typeArray (array_tag 0x3). | |
| 2655 #ifdef ASSERT | |
| 2656 __ delayed()->nop(); | |
| 2657 { Label L; | |
| 2658 jint lh_prim_tag_in_place = (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift); | |
| 2659 __ set(lh_prim_tag_in_place, O5_temp); | |
| 2660 __ cmp(G5_lh, O5_temp); | |
| 2661 __ br(Assembler::greaterEqual, false, Assembler::pt, L); | |
| 2662 __ delayed()->nop(); | |
| 2663 __ stop("must be a primitive array"); | |
| 2664 __ bind(L); | |
| 2665 } | |
| 2666 #else | |
| 2667 __ delayed(); // match next insn to prev branch | |
| 2668 #endif | |
| 2669 | |
| 2670 arraycopy_range_checks(src, src_pos, dst, dst_pos, length, | |
| 2671 O5_temp, G4_dst_klass, L_failed); | |
| 2672 | |
| 2673 // typeArrayKlass | |
| 2674 // | |
| 2675 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize); | |
| 2676 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize); | |
| 2677 // | |
| 2678 | |
| 2679 const Register G4_offset = G4_dst_klass; // array offset | |
| 2680 const Register G3_elsize = G3_src_klass; // log2 element size | |
| 2681 | |
| 2682 __ srl(G5_lh, Klass::_lh_header_size_shift, G4_offset); | |
| 2683 __ and3(G4_offset, Klass::_lh_header_size_mask, G4_offset); // array_offset | |
| 2684 __ add(src, G4_offset, src); // src array offset | |
| 2685 __ add(dst, G4_offset, dst); // dst array offset | |
| 2686 __ and3(G5_lh, Klass::_lh_log2_element_size_mask, G3_elsize); // log2 element size | |
| 2687 | |
| 2688 // next registers should be set before the jump to corresponding stub | |
| 2689 const Register from = O0; // source array address | |
| 2690 const Register to = O1; // destination array address | |
| 2691 const Register count = O2; // elements count | |
| 2692 | |
| 2693 // 'from', 'to', 'count' registers should be set in this order | |
| 2694 // since they are the same as 'src', 'src_pos', 'dst'. | |
| 2695 | |
| 2696 BLOCK_COMMENT("scale indexes to element size"); | |
| 2697 __ sll_ptr(src_pos, G3_elsize, src_pos); | |
| 2698 __ sll_ptr(dst_pos, G3_elsize, dst_pos); | |
| 2699 __ add(src, src_pos, from); // src_addr | |
| 2700 __ add(dst, dst_pos, to); // dst_addr | |
| 2701 | |
| 2702 BLOCK_COMMENT("choose copy loop based on element size"); | |
| 2703 __ cmp(G3_elsize, 0); | |
| 2704 __ br(Assembler::equal,true,Assembler::pt,StubRoutines::_jbyte_arraycopy); | |
| 2705 __ delayed()->signx(length, count); // length | |
| 2706 | |
| 2707 __ cmp(G3_elsize, LogBytesPerShort); | |
| 2708 __ br(Assembler::equal,true,Assembler::pt,StubRoutines::_jshort_arraycopy); | |
| 2709 __ delayed()->signx(length, count); // length | |
| 2710 | |
| 2711 __ cmp(G3_elsize, LogBytesPerInt); | |
| 2712 __ br(Assembler::equal,true,Assembler::pt,StubRoutines::_jint_arraycopy); | |
| 2713 __ delayed()->signx(length, count); // length | |
| 2714 #ifdef ASSERT | |
| 2715 { Label L; | |
| 2716 __ cmp(G3_elsize, LogBytesPerLong); | |
| 2717 __ br(Assembler::equal, false, Assembler::pt, L); | |
| 2718 __ delayed()->nop(); | |
| 2719 __ stop("must be long copy, but elsize is wrong"); | |
| 2720 __ bind(L); | |
| 2721 } | |
| 2722 #endif | |
| 2723 __ br(Assembler::always,false,Assembler::pt,StubRoutines::_jlong_arraycopy); | |
| 2724 __ delayed()->signx(length, count); // length | |
| 2725 | |
| 2726 // objArrayKlass | |
| 2727 __ BIND(L_objArray); | |
| 2728 // live at this point: G3_src_klass, G4_dst_klass, src[_pos], dst[_pos], length | |
| 2729 | |
| 2730 Label L_plain_copy, L_checkcast_copy; | |
| 2731 // test array classes for subtyping | |
| 2732 __ cmp(G3_src_klass, G4_dst_klass); // usual case is exact equality | |
| 2733 __ brx(Assembler::notEqual, true, Assembler::pn, L_checkcast_copy); | |
| 2734 __ delayed()->lduw(G4_dst_klass, lh_offset, O5_temp); // hoisted from below | |
| 2735 | |
| 2736 // Identically typed arrays can be copied without element-wise checks. | |
| 2737 arraycopy_range_checks(src, src_pos, dst, dst_pos, length, | |
| 2738 O5_temp, G5_lh, L_failed); | |
| 2739 | |
| 2740 __ add(src, arrayOopDesc::base_offset_in_bytes(T_OBJECT), src); //src offset | |
| 2741 __ add(dst, arrayOopDesc::base_offset_in_bytes(T_OBJECT), dst); //dst offset | |
|
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2742 __ sll_ptr(src_pos, LogBytesPerHeapOop, src_pos); |
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2743 __ sll_ptr(dst_pos, LogBytesPerHeapOop, dst_pos); |
| 0 | 2744 __ add(src, src_pos, from); // src_addr |
| 2745 __ add(dst, dst_pos, to); // dst_addr | |
| 2746 __ BIND(L_plain_copy); | |
| 2747 __ br(Assembler::always, false, Assembler::pt,StubRoutines::_oop_arraycopy); | |
| 2748 __ delayed()->signx(length, count); // length | |
| 2749 | |
| 2750 __ BIND(L_checkcast_copy); | |
| 2751 // live at this point: G3_src_klass, G4_dst_klass | |
| 2752 { | |
| 2753 // Before looking at dst.length, make sure dst is also an objArray. | |
| 2754 // lduw(G4_dst_klass, lh_offset, O5_temp); // hoisted to delay slot | |
| 2755 __ cmp(G5_lh, O5_temp); | |
| 2756 __ br(Assembler::notEqual, false, Assembler::pn, L_failed); | |
| 2757 | |
| 2758 // It is safe to examine both src.length and dst.length. | |
| 2759 __ delayed(); // match next insn to prev branch | |
| 2760 arraycopy_range_checks(src, src_pos, dst, dst_pos, length, | |
| 2761 O5_temp, G5_lh, L_failed); | |
| 2762 | |
| 2763 // Marshal the base address arguments now, freeing registers. | |
| 2764 __ add(src, arrayOopDesc::base_offset_in_bytes(T_OBJECT), src); //src offset | |
| 2765 __ add(dst, arrayOopDesc::base_offset_in_bytes(T_OBJECT), dst); //dst offset | |
|
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2766 __ sll_ptr(src_pos, LogBytesPerHeapOop, src_pos); |
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2767 __ sll_ptr(dst_pos, LogBytesPerHeapOop, dst_pos); |
| 0 | 2768 __ add(src, src_pos, from); // src_addr |
| 2769 __ add(dst, dst_pos, to); // dst_addr | |
| 2770 __ signx(length, count); // length (reloaded) | |
| 2771 | |
| 2772 Register sco_temp = O3; // this register is free now | |
| 2773 assert_different_registers(from, to, count, sco_temp, | |
| 2774 G4_dst_klass, G3_src_klass); | |
| 2775 | |
| 2776 // Generate the type check. | |
| 2777 int sco_offset = (klassOopDesc::header_size() * HeapWordSize + | |
| 2778 Klass::super_check_offset_offset_in_bytes()); | |
| 2779 __ lduw(G4_dst_klass, sco_offset, sco_temp); | |
| 2780 generate_type_check(G3_src_klass, sco_temp, G4_dst_klass, | |
| 2781 O5_temp, L_plain_copy); | |
| 2782 | |
| 2783 // Fetch destination element klass from the objArrayKlass header. | |
| 2784 int ek_offset = (klassOopDesc::header_size() * HeapWordSize + | |
| 2785 objArrayKlass::element_klass_offset_in_bytes()); | |
| 2786 | |
| 2787 // the checkcast_copy loop needs two extra arguments: | |
| 2788 __ ld_ptr(G4_dst_klass, ek_offset, O4); // dest elem klass | |
| 2789 // lduw(O4, sco_offset, O3); // sco of elem klass | |
| 2790 | |
| 2791 __ br(Assembler::always, false, Assembler::pt, checkcast_copy_entry); | |
| 2792 __ delayed()->lduw(O4, sco_offset, O3); | |
| 2793 } | |
| 2794 | |
| 2795 __ BIND(L_failed); | |
| 2796 __ retl(); | |
| 2797 __ delayed()->sub(G0, 1, O0); // return -1 | |
| 2798 return start; | |
| 2799 } | |
| 2800 | |
| 2801 void generate_arraycopy_stubs() { | |
| 2802 | |
| 2803 // Note: the disjoint stubs must be generated first, some of | |
| 2804 // the conjoint stubs use them. | |
| 2805 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, "jbyte_disjoint_arraycopy"); | |
| 2806 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, "jshort_disjoint_arraycopy"); | |
| 2807 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_copy(false, "jint_disjoint_arraycopy"); | |
| 2808 StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_copy(false, "jlong_disjoint_arraycopy"); | |
| 2809 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_oop_copy(false, "oop_disjoint_arraycopy"); | |
| 2810 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(true, "arrayof_jbyte_disjoint_arraycopy"); | |
| 2811 StubRoutines::_arrayof_jshort_disjoint_arraycopy = generate_disjoint_short_copy(true, "arrayof_jshort_disjoint_arraycopy"); | |
| 2812 StubRoutines::_arrayof_jint_disjoint_arraycopy = generate_disjoint_int_copy(true, "arrayof_jint_disjoint_arraycopy"); | |
| 2813 StubRoutines::_arrayof_jlong_disjoint_arraycopy = generate_disjoint_long_copy(true, "arrayof_jlong_disjoint_arraycopy"); | |
| 2814 StubRoutines::_arrayof_oop_disjoint_arraycopy = generate_disjoint_oop_copy(true, "arrayof_oop_disjoint_arraycopy"); | |
| 2815 | |
| 2816 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, "jbyte_arraycopy"); | |
| 2817 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, "jshort_arraycopy"); | |
| 2818 StubRoutines::_jint_arraycopy = generate_conjoint_int_copy(false, "jint_arraycopy"); | |
| 2819 StubRoutines::_jlong_arraycopy = generate_conjoint_long_copy(false, "jlong_arraycopy"); | |
| 2820 StubRoutines::_oop_arraycopy = generate_conjoint_oop_copy(false, "oop_arraycopy"); | |
| 2821 StubRoutines::_arrayof_jbyte_arraycopy = generate_conjoint_byte_copy(true, "arrayof_jbyte_arraycopy"); | |
| 2822 StubRoutines::_arrayof_jshort_arraycopy = generate_conjoint_short_copy(true, "arrayof_jshort_arraycopy"); | |
| 2823 #ifdef _LP64 | |
| 2824 // since sizeof(jint) < sizeof(HeapWord), there's a different flavor: | |
| 2825 StubRoutines::_arrayof_jint_arraycopy = generate_conjoint_int_copy(true, "arrayof_jint_arraycopy"); | |
| 2826 #else | |
| 2827 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy; | |
| 2828 #endif | |
| 2829 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy; | |
| 2830 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy; | |
| 2831 | |
| 2832 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy"); | |
| 2833 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy"); | |
| 2834 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy"); | |
| 2835 } | |
| 2836 | |
| 2837 void generate_initial() { | |
| 2838 // Generates all stubs and initializes the entry points | |
| 2839 | |
| 2840 //------------------------------------------------------------------------------------------------------------------------ | |
| 2841 // entry points that exist in all platforms | |
| 2842 // Note: This is code that could be shared among different platforms - however the benefit seems to be smaller than | |
| 2843 // the disadvantage of having a much more complicated generator structure. See also comment in stubRoutines.hpp. | |
| 2844 StubRoutines::_forward_exception_entry = generate_forward_exception(); | |
| 2845 | |
| 2846 StubRoutines::_call_stub_entry = generate_call_stub(StubRoutines::_call_stub_return_address); | |
| 2847 StubRoutines::_catch_exception_entry = generate_catch_exception(); | |
| 2848 | |
| 2849 //------------------------------------------------------------------------------------------------------------------------ | |
| 2850 // entry points that are platform specific | |
| 2851 StubRoutines::Sparc::_test_stop_entry = generate_test_stop(); | |
| 2852 | |
| 2853 StubRoutines::Sparc::_stop_subroutine_entry = generate_stop_subroutine(); | |
| 2854 StubRoutines::Sparc::_flush_callers_register_windows_entry = generate_flush_callers_register_windows(); | |
| 2855 | |
| 2856 #if !defined(COMPILER2) && !defined(_LP64) | |
| 2857 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg(); | |
| 2858 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg(); | |
| 2859 StubRoutines::_atomic_add_entry = generate_atomic_add(); | |
| 2860 StubRoutines::_atomic_xchg_ptr_entry = StubRoutines::_atomic_xchg_entry; | |
| 2861 StubRoutines::_atomic_cmpxchg_ptr_entry = StubRoutines::_atomic_cmpxchg_entry; | |
| 2862 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long(); | |
| 2863 StubRoutines::_atomic_add_ptr_entry = StubRoutines::_atomic_add_entry; | |
| 2864 StubRoutines::_fence_entry = generate_fence(); | |
| 2865 #endif // COMPILER2 !=> _LP64 | |
| 2866 } | |
| 2867 | |
| 2868 | |
| 2869 void generate_all() { | |
| 2870 // Generates all stubs and initializes the entry points | |
| 2871 | |
|
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2872 // Generate partial_subtype_check first here since its code depends on |
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2873 // UseZeroBaseCompressedOops which is defined after heap initialization. |
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2874 StubRoutines::Sparc::_partial_subtype_check = generate_partial_subtype_check(); |
| 0 | 2875 // These entry points require SharedInfo::stack0 to be set up in non-core builds |
| 2876 StubRoutines::_throw_AbstractMethodError_entry = generate_throw_exception("AbstractMethodError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_AbstractMethodError), false); | |
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2877 StubRoutines::_throw_IncompatibleClassChangeError_entry= generate_throw_exception("IncompatibleClassChangeError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_IncompatibleClassChangeError), false); |
| 0 | 2878 StubRoutines::_throw_ArithmeticException_entry = generate_throw_exception("ArithmeticException throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_ArithmeticException), true); |
| 2879 StubRoutines::_throw_NullPointerException_entry = generate_throw_exception("NullPointerException throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException), true); | |
| 2880 StubRoutines::_throw_NullPointerException_at_call_entry= generate_throw_exception("NullPointerException at call throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException_at_call), false); | |
| 2881 StubRoutines::_throw_StackOverflowError_entry = generate_throw_exception("StackOverflowError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError), false); | |
| 2882 | |
| 2883 StubRoutines::_handler_for_unsafe_access_entry = | |
| 2884 generate_handler_for_unsafe_access(); | |
| 2885 | |
| 2886 // support for verify_oop (must happen after universe_init) | |
| 2887 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop_subroutine(); | |
| 2888 | |
| 2889 // arraycopy stubs used by compilers | |
| 2890 generate_arraycopy_stubs(); | |
| 2891 } | |
| 2892 | |
| 2893 | |
| 2894 public: | |
| 2895 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) { | |
| 2896 // replace the standard masm with a special one: | |
| 2897 _masm = new MacroAssembler(code); | |
| 2898 | |
| 2899 _stub_count = !all ? 0x100 : 0x200; | |
| 2900 if (all) { | |
| 2901 generate_all(); | |
| 2902 } else { | |
| 2903 generate_initial(); | |
| 2904 } | |
| 2905 | |
| 2906 // make sure this stub is available for all local calls | |
| 2907 if (_atomic_add_stub.is_unbound()) { | |
| 2908 // generate a second time, if necessary | |
| 2909 (void) generate_atomic_add(); | |
| 2910 } | |
| 2911 } | |
| 2912 | |
| 2913 | |
| 2914 private: | |
| 2915 int _stub_count; | |
| 2916 void stub_prolog(StubCodeDesc* cdesc) { | |
| 2917 # ifdef ASSERT | |
| 2918 // put extra information in the stub code, to make it more readable | |
| 2919 #ifdef _LP64 | |
| 2920 // Write the high part of the address | |
| 2921 // [RGV] Check if there is a dependency on the size of this prolog | |
| 2922 __ emit_data((intptr_t)cdesc >> 32, relocInfo::none); | |
| 2923 #endif | |
| 2924 __ emit_data((intptr_t)cdesc, relocInfo::none); | |
| 2925 __ emit_data(++_stub_count, relocInfo::none); | |
| 2926 # endif | |
| 2927 align(true); | |
| 2928 } | |
| 2929 | |
| 2930 void align(bool at_header = false) { | |
| 2931 // %%%%% move this constant somewhere else | |
| 2932 // UltraSPARC cache line size is 8 instructions: | |
| 2933 const unsigned int icache_line_size = 32; | |
| 2934 const unsigned int icache_half_line_size = 16; | |
| 2935 | |
| 2936 if (at_header) { | |
| 2937 while ((intptr_t)(__ pc()) % icache_line_size != 0) { | |
| 2938 __ emit_data(0, relocInfo::none); | |
| 2939 } | |
| 2940 } else { | |
| 2941 while ((intptr_t)(__ pc()) % icache_half_line_size != 0) { | |
| 2942 __ nop(); | |
| 2943 } | |
| 2944 } | |
| 2945 } | |
| 2946 | |
| 2947 }; // end class declaration | |
| 2948 | |
| 2949 | |
| 2950 address StubGenerator::disjoint_byte_copy_entry = NULL; | |
| 2951 address StubGenerator::disjoint_short_copy_entry = NULL; | |
| 2952 address StubGenerator::disjoint_int_copy_entry = NULL; | |
| 2953 address StubGenerator::disjoint_long_copy_entry = NULL; | |
| 2954 address StubGenerator::disjoint_oop_copy_entry = NULL; | |
| 2955 | |
| 2956 address StubGenerator::byte_copy_entry = NULL; | |
| 2957 address StubGenerator::short_copy_entry = NULL; | |
| 2958 address StubGenerator::int_copy_entry = NULL; | |
| 2959 address StubGenerator::long_copy_entry = NULL; | |
| 2960 address StubGenerator::oop_copy_entry = NULL; | |
| 2961 | |
| 2962 address StubGenerator::checkcast_copy_entry = NULL; | |
| 2963 | |
| 2964 void StubGenerator_generate(CodeBuffer* code, bool all) { | |
| 2965 StubGenerator g(code, all); | |
| 2966 } |