Mercurial > hg > truffle
annotate src/share/vm/c1/c1_LIR.cpp @ 4945:cfdfbeac0a5b
7145345: Code cache sweeper must cooperate with safepoints
Summary: Safepoint in the sweeper loop in necessary
Reviewed-by: kvn, never
author | iveresov |
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date | Wed, 15 Feb 2012 12:32:03 -0800 |
parents | b642b49f9738 |
children | 701a83c86f28 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "c1/c1_InstructionPrinter.hpp" | |
27 #include "c1/c1_LIR.hpp" | |
28 #include "c1/c1_LIRAssembler.hpp" | |
29 #include "c1/c1_ValueStack.hpp" | |
30 #include "ci/ciInstance.hpp" | |
31 #include "runtime/sharedRuntime.hpp" | |
0 | 32 |
33 Register LIR_OprDesc::as_register() const { | |
34 return FrameMap::cpu_rnr2reg(cpu_regnr()); | |
35 } | |
36 | |
37 Register LIR_OprDesc::as_register_lo() const { | |
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); | |
39 } | |
40 | |
41 Register LIR_OprDesc::as_register_hi() const { | |
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); | |
43 } | |
44 | |
304 | 45 #if defined(X86) |
0 | 46 |
47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const { | |
48 return FrameMap::nr2xmmreg(xmm_regnr()); | |
49 } | |
50 | |
51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const { | |
52 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation"); | |
53 return FrameMap::nr2xmmreg(xmm_regnrLo()); | |
54 } | |
55 | |
304 | 56 #endif // X86 |
0 | 57 |
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58 #if defined(SPARC) || defined(PPC) |
0 | 59 |
60 FloatRegister LIR_OprDesc::as_float_reg() const { | |
61 return FrameMap::nr2floatreg(fpu_regnr()); | |
62 } | |
63 | |
64 FloatRegister LIR_OprDesc::as_double_reg() const { | |
65 return FrameMap::nr2floatreg(fpu_regnrHi()); | |
66 } | |
67 | |
68 #endif | |
69 | |
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70 #ifdef ARM |
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71 |
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72 FloatRegister LIR_OprDesc::as_float_reg() const { |
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73 return as_FloatRegister(fpu_regnr()); |
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74 } |
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75 |
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76 FloatRegister LIR_OprDesc::as_double_reg() const { |
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77 return as_FloatRegister(fpu_regnrLo()); |
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78 } |
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79 |
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80 #endif |
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81 |
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82 |
0 | 83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); |
84 | |
85 LIR_Opr LIR_OprFact::value_type(ValueType* type) { | |
86 ValueTag tag = type->tag(); | |
87 switch (tag) { | |
88 case objectTag : { | |
89 ClassConstant* c = type->as_ClassConstant(); | |
90 if (c != NULL && !c->value()->is_loaded()) { | |
91 return LIR_OprFact::oopConst(NULL); | |
92 } else { | |
93 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); | |
94 } | |
95 } | |
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96 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); |
0 | 97 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); |
98 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); | |
99 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); | |
100 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); | |
304 | 101 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); |
0 | 102 } |
103 } | |
104 | |
105 | |
106 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { | |
107 switch (type->tag()) { | |
108 case objectTag: return LIR_OprFact::oopConst(NULL); | |
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109 case addressTag:return LIR_OprFact::addressConst(0); |
0 | 110 case intTag: return LIR_OprFact::intConst(0); |
111 case floatTag: return LIR_OprFact::floatConst(0.0); | |
112 case longTag: return LIR_OprFact::longConst(0); | |
113 case doubleTag: return LIR_OprFact::doubleConst(0.0); | |
304 | 114 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); |
0 | 115 } |
116 return illegalOpr; | |
117 } | |
118 | |
119 | |
120 | |
121 //--------------------------------------------------- | |
122 | |
123 | |
124 LIR_Address::Scale LIR_Address::scale(BasicType type) { | |
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125 int elem_size = type2aelembytes(type); |
0 | 126 switch (elem_size) { |
127 case 1: return LIR_Address::times_1; | |
128 case 2: return LIR_Address::times_2; | |
129 case 4: return LIR_Address::times_4; | |
130 case 8: return LIR_Address::times_8; | |
131 } | |
132 ShouldNotReachHere(); | |
133 return LIR_Address::times_1; | |
134 } | |
135 | |
136 | |
137 #ifndef PRODUCT | |
138 void LIR_Address::verify() const { | |
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139 #if defined(SPARC) || defined(PPC) |
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140 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used"); |
0 | 141 assert(disp() == 0 || index()->is_illegal(), "can't have both"); |
142 #endif | |
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143 #ifdef ARM |
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144 assert(disp() == 0 || index()->is_illegal(), "can't have both"); |
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145 // Note: offsets higher than 4096 must not be rejected here. They can |
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146 // be handled by the back-end or will be rejected if not. |
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147 #endif |
0 | 148 #ifdef _LP64 |
149 assert(base()->is_cpu_register(), "wrong base operand"); | |
150 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); | |
151 assert(base()->type() == T_OBJECT || base()->type() == T_LONG, | |
152 "wrong type for addresses"); | |
153 #else | |
154 assert(base()->is_single_cpu(), "wrong base operand"); | |
155 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); | |
156 assert(base()->type() == T_OBJECT || base()->type() == T_INT, | |
157 "wrong type for addresses"); | |
158 #endif | |
159 } | |
160 #endif | |
161 | |
162 | |
163 //--------------------------------------------------- | |
164 | |
165 char LIR_OprDesc::type_char(BasicType t) { | |
166 switch (t) { | |
167 case T_ARRAY: | |
168 t = T_OBJECT; | |
169 case T_BOOLEAN: | |
170 case T_CHAR: | |
171 case T_FLOAT: | |
172 case T_DOUBLE: | |
173 case T_BYTE: | |
174 case T_SHORT: | |
175 case T_INT: | |
176 case T_LONG: | |
177 case T_OBJECT: | |
178 case T_ADDRESS: | |
179 case T_VOID: | |
180 return ::type2char(t); | |
181 | |
182 case T_ILLEGAL: | |
183 return '?'; | |
184 | |
185 default: | |
186 ShouldNotReachHere(); | |
304 | 187 return '?'; |
0 | 188 } |
189 } | |
190 | |
191 #ifndef PRODUCT | |
192 void LIR_OprDesc::validate_type() const { | |
193 | |
194 #ifdef ASSERT | |
195 if (!is_pointer() && !is_illegal()) { | |
196 switch (as_BasicType(type_field())) { | |
197 case T_LONG: | |
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198 assert((kind_field() == cpu_register || kind_field() == stack_value) && |
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199 size_field() == double_size, "must match"); |
0 | 200 break; |
201 case T_FLOAT: | |
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202 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) |
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203 assert((kind_field() == fpu_register || kind_field() == stack_value |
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204 ARM_ONLY(|| kind_field() == cpu_register) |
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205 PPC_ONLY(|| kind_field() == cpu_register) ) && |
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206 size_field() == single_size, "must match"); |
0 | 207 break; |
208 case T_DOUBLE: | |
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209 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) |
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210 assert((kind_field() == fpu_register || kind_field() == stack_value |
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211 ARM_ONLY(|| kind_field() == cpu_register) |
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212 PPC_ONLY(|| kind_field() == cpu_register) ) && |
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213 size_field() == double_size, "must match"); |
0 | 214 break; |
215 case T_BOOLEAN: | |
216 case T_CHAR: | |
217 case T_BYTE: | |
218 case T_SHORT: | |
219 case T_INT: | |
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220 case T_ADDRESS: |
0 | 221 case T_OBJECT: |
222 case T_ARRAY: | |
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223 assert((kind_field() == cpu_register || kind_field() == stack_value) && |
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224 size_field() == single_size, "must match"); |
0 | 225 break; |
226 | |
227 case T_ILLEGAL: | |
228 // XXX TKR also means unknown right now | |
229 // assert(is_illegal(), "must match"); | |
230 break; | |
231 | |
232 default: | |
233 ShouldNotReachHere(); | |
234 } | |
235 } | |
236 #endif | |
237 | |
238 } | |
239 #endif // PRODUCT | |
240 | |
241 | |
242 bool LIR_OprDesc::is_oop() const { | |
243 if (is_pointer()) { | |
244 return pointer()->is_oop_pointer(); | |
245 } else { | |
246 OprType t= type_field(); | |
247 assert(t != unknown_type, "not set"); | |
248 return t == object_type; | |
249 } | |
250 } | |
251 | |
252 | |
253 | |
254 void LIR_Op2::verify() const { | |
255 #ifdef ASSERT | |
256 switch (code()) { | |
257 case lir_cmove: | |
258 break; | |
259 | |
260 default: | |
261 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), | |
262 "can't produce oops from arith"); | |
263 } | |
264 | |
265 if (TwoOperandLIRForm) { | |
266 switch (code()) { | |
267 case lir_add: | |
268 case lir_sub: | |
269 case lir_mul: | |
270 case lir_mul_strictfp: | |
271 case lir_div: | |
272 case lir_div_strictfp: | |
273 case lir_rem: | |
274 case lir_logic_and: | |
275 case lir_logic_or: | |
276 case lir_logic_xor: | |
277 case lir_shl: | |
278 case lir_shr: | |
279 assert(in_opr1() == result_opr(), "opr1 and result must match"); | |
280 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); | |
281 break; | |
282 | |
283 // special handling for lir_ushr because of write barriers | |
284 case lir_ushr: | |
285 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant"); | |
286 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); | |
287 break; | |
288 | |
289 } | |
290 } | |
291 #endif | |
292 } | |
293 | |
294 | |
295 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) | |
296 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
297 , _cond(cond) | |
298 , _type(type) | |
299 , _label(block->label()) | |
300 , _block(block) | |
301 , _ublock(NULL) | |
302 , _stub(NULL) { | |
303 } | |
304 | |
305 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : | |
306 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
307 , _cond(cond) | |
308 , _type(type) | |
309 , _label(stub->entry()) | |
310 , _block(NULL) | |
311 , _ublock(NULL) | |
312 , _stub(stub) { | |
313 } | |
314 | |
315 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) | |
316 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
317 , _cond(cond) | |
318 , _type(type) | |
319 , _label(block->label()) | |
320 , _block(block) | |
321 , _ublock(ublock) | |
322 , _stub(NULL) | |
323 { | |
324 } | |
325 | |
326 void LIR_OpBranch::change_block(BlockBegin* b) { | |
327 assert(_block != NULL, "must have old block"); | |
328 assert(_block->label() == label(), "must be equal"); | |
329 | |
330 _block = b; | |
331 _label = b->label(); | |
332 } | |
333 | |
334 void LIR_OpBranch::change_ublock(BlockBegin* b) { | |
335 assert(_ublock != NULL, "must have old block"); | |
336 _ublock = b; | |
337 } | |
338 | |
339 void LIR_OpBranch::negate_cond() { | |
340 switch (_cond) { | |
341 case lir_cond_equal: _cond = lir_cond_notEqual; break; | |
342 case lir_cond_notEqual: _cond = lir_cond_equal; break; | |
343 case lir_cond_less: _cond = lir_cond_greaterEqual; break; | |
344 case lir_cond_lessEqual: _cond = lir_cond_greater; break; | |
345 case lir_cond_greaterEqual: _cond = lir_cond_less; break; | |
346 case lir_cond_greater: _cond = lir_cond_lessEqual; break; | |
347 default: ShouldNotReachHere(); | |
348 } | |
349 } | |
350 | |
351 | |
352 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
353 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, | |
354 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, | |
1783 | 355 CodeStub* stub) |
356 | |
0 | 357 : LIR_Op(code, result, NULL) |
358 , _object(object) | |
359 , _array(LIR_OprFact::illegalOpr) | |
360 , _klass(klass) | |
361 , _tmp1(tmp1) | |
362 , _tmp2(tmp2) | |
363 , _tmp3(tmp3) | |
364 , _fast_check(fast_check) | |
365 , _stub(stub) | |
366 , _info_for_patch(info_for_patch) | |
367 , _info_for_exception(info_for_exception) | |
1783 | 368 , _profiled_method(NULL) |
369 , _profiled_bci(-1) | |
370 , _should_profile(false) | |
371 { | |
0 | 372 if (code == lir_checkcast) { |
373 assert(info_for_exception != NULL, "checkcast throws exceptions"); | |
374 } else if (code == lir_instanceof) { | |
375 assert(info_for_exception == NULL, "instanceof throws no exceptions"); | |
376 } else { | |
377 ShouldNotReachHere(); | |
378 } | |
379 } | |
380 | |
381 | |
382 | |
1783 | 383 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) |
0 | 384 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) |
385 , _object(object) | |
386 , _array(array) | |
387 , _klass(NULL) | |
388 , _tmp1(tmp1) | |
389 , _tmp2(tmp2) | |
390 , _tmp3(tmp3) | |
391 , _fast_check(false) | |
392 , _stub(NULL) | |
393 , _info_for_patch(NULL) | |
394 , _info_for_exception(info_for_exception) | |
1783 | 395 , _profiled_method(NULL) |
396 , _profiled_bci(-1) | |
397 , _should_profile(false) | |
398 { | |
0 | 399 if (code == lir_store_check) { |
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400 _stub = new ArrayStoreExceptionStub(object, info_for_exception); |
0 | 401 assert(info_for_exception != NULL, "store_check throws exceptions"); |
402 } else { | |
403 ShouldNotReachHere(); | |
404 } | |
405 } | |
406 | |
407 | |
408 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, | |
409 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) | |
410 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) | |
411 , _tmp(tmp) | |
412 , _src(src) | |
413 , _src_pos(src_pos) | |
414 , _dst(dst) | |
415 , _dst_pos(dst_pos) | |
416 , _flags(flags) | |
417 , _expected_type(expected_type) | |
418 , _length(length) { | |
419 _stub = new ArrayCopyStub(this); | |
420 } | |
421 | |
422 | |
423 //-------------------verify-------------------------- | |
424 | |
425 void LIR_Op1::verify() const { | |
426 switch(code()) { | |
427 case lir_move: | |
428 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); | |
429 break; | |
430 case lir_null_check: | |
431 assert(in_opr()->is_register(), "must be"); | |
432 break; | |
433 case lir_return: | |
434 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); | |
435 break; | |
436 } | |
437 } | |
438 | |
439 void LIR_OpRTCall::verify() const { | |
440 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); | |
441 } | |
442 | |
443 //-------------------visits-------------------------- | |
444 | |
445 // complete rework of LIR instruction visitor. | |
446 // The virtual calls for each instruction type is replaced by a big | |
447 // switch that adds the operands for each instruction | |
448 | |
449 void LIR_OpVisitState::visit(LIR_Op* op) { | |
450 // copy information from the LIR_Op | |
451 reset(); | |
452 set_op(op); | |
453 | |
454 switch (op->code()) { | |
455 | |
456 // LIR_Op0 | |
457 case lir_word_align: // result and info always invalid | |
458 case lir_backwardbranch_target: // result and info always invalid | |
459 case lir_build_frame: // result and info always invalid | |
460 case lir_fpop_raw: // result and info always invalid | |
461 case lir_24bit_FPU: // result and info always invalid | |
462 case lir_reset_FPU: // result and info always invalid | |
463 case lir_breakpoint: // result and info always invalid | |
464 case lir_membar: // result and info always invalid | |
465 case lir_membar_acquire: // result and info always invalid | |
466 case lir_membar_release: // result and info always invalid | |
467 { | |
468 assert(op->as_Op0() != NULL, "must be"); | |
469 assert(op->_info == NULL, "info not used by this instruction"); | |
470 assert(op->_result->is_illegal(), "not used"); | |
471 break; | |
472 } | |
473 | |
474 case lir_nop: // may have info, result always invalid | |
475 case lir_std_entry: // may have result, info always invalid | |
476 case lir_osr_entry: // may have result, info always invalid | |
477 case lir_get_thread: // may have result, info always invalid | |
478 { | |
479 assert(op->as_Op0() != NULL, "must be"); | |
480 if (op->_info != NULL) do_info(op->_info); | |
481 if (op->_result->is_valid()) do_output(op->_result); | |
482 break; | |
483 } | |
484 | |
485 | |
486 // LIR_OpLabel | |
487 case lir_label: // result and info always invalid | |
488 { | |
489 assert(op->as_OpLabel() != NULL, "must be"); | |
490 assert(op->_info == NULL, "info not used by this instruction"); | |
491 assert(op->_result->is_illegal(), "not used"); | |
492 break; | |
493 } | |
494 | |
495 | |
496 // LIR_Op1 | |
497 case lir_fxch: // input always valid, result and info always invalid | |
498 case lir_fld: // input always valid, result and info always invalid | |
499 case lir_ffree: // input always valid, result and info always invalid | |
500 case lir_push: // input always valid, result and info always invalid | |
501 case lir_pop: // input always valid, result and info always invalid | |
502 case lir_return: // input always valid, result and info always invalid | |
503 case lir_leal: // input and result always valid, info always invalid | |
504 case lir_neg: // input and result always valid, info always invalid | |
505 case lir_monaddr: // input and result always valid, info always invalid | |
506 case lir_null_check: // input and info always valid, result always invalid | |
507 case lir_move: // input and result always valid, may have info | |
1783 | 508 case lir_pack64: // input and result always valid |
509 case lir_unpack64: // input and result always valid | |
0 | 510 case lir_prefetchr: // input always valid, result and info always invalid |
511 case lir_prefetchw: // input always valid, result and info always invalid | |
512 { | |
513 assert(op->as_Op1() != NULL, "must be"); | |
514 LIR_Op1* op1 = (LIR_Op1*)op; | |
515 | |
516 if (op1->_info) do_info(op1->_info); | |
517 if (op1->_opr->is_valid()) do_input(op1->_opr); | |
518 if (op1->_result->is_valid()) do_output(op1->_result); | |
519 | |
520 break; | |
521 } | |
522 | |
523 case lir_safepoint: | |
524 { | |
525 assert(op->as_Op1() != NULL, "must be"); | |
526 LIR_Op1* op1 = (LIR_Op1*)op; | |
527 | |
528 assert(op1->_info != NULL, ""); do_info(op1->_info); | |
529 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register | |
530 assert(op1->_result->is_illegal(), "safepoint does not produce value"); | |
531 | |
532 break; | |
533 } | |
534 | |
535 // LIR_OpConvert; | |
536 case lir_convert: // input and result always valid, info always invalid | |
537 { | |
538 assert(op->as_OpConvert() != NULL, "must be"); | |
539 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; | |
540 | |
541 assert(opConvert->_info == NULL, "must be"); | |
542 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); | |
543 if (opConvert->_result->is_valid()) do_output(opConvert->_result); | |
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544 #ifdef PPC |
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545 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); |
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546 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); |
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547 #endif |
0 | 548 do_stub(opConvert->_stub); |
549 | |
550 break; | |
551 } | |
552 | |
553 // LIR_OpBranch; | |
554 case lir_branch: // may have info, input and result register always invalid | |
555 case lir_cond_float_branch: // may have info, input and result register always invalid | |
556 { | |
557 assert(op->as_OpBranch() != NULL, "must be"); | |
558 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; | |
559 | |
560 if (opBranch->_info != NULL) do_info(opBranch->_info); | |
561 assert(opBranch->_result->is_illegal(), "not used"); | |
562 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); | |
563 | |
564 break; | |
565 } | |
566 | |
567 | |
568 // LIR_OpAllocObj | |
569 case lir_alloc_object: | |
570 { | |
571 assert(op->as_OpAllocObj() != NULL, "must be"); | |
572 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; | |
573 | |
574 if (opAllocObj->_info) do_info(opAllocObj->_info); | |
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575 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); |
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576 do_temp(opAllocObj->_opr); |
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577 } |
0 | 578 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); |
579 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); | |
580 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); | |
581 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); | |
582 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); | |
583 do_stub(opAllocObj->_stub); | |
584 break; | |
585 } | |
586 | |
587 | |
588 // LIR_OpRoundFP; | |
589 case lir_roundfp: { | |
590 assert(op->as_OpRoundFP() != NULL, "must be"); | |
591 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; | |
592 | |
593 assert(op->_info == NULL, "info not used by this instruction"); | |
594 assert(opRoundFP->_tmp->is_illegal(), "not used"); | |
595 do_input(opRoundFP->_opr); | |
596 do_output(opRoundFP->_result); | |
597 | |
598 break; | |
599 } | |
600 | |
601 | |
602 // LIR_Op2 | |
603 case lir_cmp: | |
604 case lir_cmp_l2i: | |
605 case lir_ucmp_fd2i: | |
606 case lir_cmp_fd2i: | |
607 case lir_add: | |
608 case lir_sub: | |
609 case lir_mul: | |
610 case lir_div: | |
611 case lir_rem: | |
612 case lir_sqrt: | |
613 case lir_abs: | |
614 case lir_logic_and: | |
615 case lir_logic_or: | |
616 case lir_logic_xor: | |
617 case lir_shl: | |
618 case lir_shr: | |
619 case lir_ushr: | |
620 { | |
621 assert(op->as_Op2() != NULL, "must be"); | |
622 LIR_Op2* op2 = (LIR_Op2*)op; | |
623 | |
624 if (op2->_info) do_info(op2->_info); | |
625 if (op2->_opr1->is_valid()) do_input(op2->_opr1); | |
626 if (op2->_opr2->is_valid()) do_input(op2->_opr2); | |
627 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); | |
628 if (op2->_result->is_valid()) do_output(op2->_result); | |
629 | |
630 break; | |
631 } | |
632 | |
633 // special handling for cmove: right input operand must not be equal | |
634 // to the result operand, otherwise the backend fails | |
635 case lir_cmove: | |
636 { | |
637 assert(op->as_Op2() != NULL, "must be"); | |
638 LIR_Op2* op2 = (LIR_Op2*)op; | |
639 | |
640 assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used"); | |
641 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); | |
642 | |
643 do_input(op2->_opr1); | |
644 do_input(op2->_opr2); | |
645 do_temp(op2->_opr2); | |
646 do_output(op2->_result); | |
647 | |
648 break; | |
649 } | |
650 | |
651 // vspecial handling for strict operations: register input operands | |
652 // as temp to guarantee that they do not overlap with other | |
653 // registers | |
654 case lir_mul_strictfp: | |
655 case lir_div_strictfp: | |
656 { | |
657 assert(op->as_Op2() != NULL, "must be"); | |
658 LIR_Op2* op2 = (LIR_Op2*)op; | |
659 | |
660 assert(op2->_info == NULL, "not used"); | |
661 assert(op2->_opr1->is_valid(), "used"); | |
662 assert(op2->_opr2->is_valid(), "used"); | |
663 assert(op2->_result->is_valid(), "used"); | |
664 | |
665 do_input(op2->_opr1); do_temp(op2->_opr1); | |
666 do_input(op2->_opr2); do_temp(op2->_opr2); | |
667 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); | |
668 do_output(op2->_result); | |
669 | |
670 break; | |
671 } | |
672 | |
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673 case lir_throw: { |
0 | 674 assert(op->as_Op2() != NULL, "must be"); |
675 LIR_Op2* op2 = (LIR_Op2*)op; | |
676 | |
677 if (op2->_info) do_info(op2->_info); | |
678 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); | |
679 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter | |
680 assert(op2->_result->is_illegal(), "no result"); | |
681 | |
682 break; | |
683 } | |
684 | |
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685 case lir_unwind: { |
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686 assert(op->as_Op1() != NULL, "must be"); |
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687 LIR_Op1* op1 = (LIR_Op1*)op; |
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688 |
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689 assert(op1->_info == NULL, "no info"); |
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690 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); |
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691 assert(op1->_result->is_illegal(), "no result"); |
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692 |
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693 break; |
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694 } |
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695 |
0 | 696 |
697 case lir_tan: | |
698 case lir_sin: | |
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699 case lir_cos: |
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700 case lir_log: |
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701 case lir_log10: { |
0 | 702 assert(op->as_Op2() != NULL, "must be"); |
703 LIR_Op2* op2 = (LIR_Op2*)op; | |
704 | |
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705 // On x86 tan/sin/cos need two temporary fpu stack slots and |
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706 // log/log10 need one so handle opr2 and tmp as temp inputs. |
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707 // Register input operand as temp to guarantee that it doesn't |
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708 // overlap with the input. |
0 | 709 assert(op2->_info == NULL, "not used"); |
710 assert(op2->_opr1->is_valid(), "used"); | |
711 do_input(op2->_opr1); do_temp(op2->_opr1); | |
712 | |
713 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); | |
714 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); | |
715 if (op2->_result->is_valid()) do_output(op2->_result); | |
716 | |
717 break; | |
718 } | |
719 | |
720 | |
721 // LIR_Op3 | |
722 case lir_idiv: | |
723 case lir_irem: { | |
724 assert(op->as_Op3() != NULL, "must be"); | |
725 LIR_Op3* op3= (LIR_Op3*)op; | |
726 | |
727 if (op3->_info) do_info(op3->_info); | |
728 if (op3->_opr1->is_valid()) do_input(op3->_opr1); | |
729 | |
730 // second operand is input and temp, so ensure that second operand | |
731 // and third operand get not the same register | |
732 if (op3->_opr2->is_valid()) do_input(op3->_opr2); | |
733 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); | |
734 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); | |
735 | |
736 if (op3->_result->is_valid()) do_output(op3->_result); | |
737 | |
738 break; | |
739 } | |
740 | |
741 | |
742 // LIR_OpJavaCall | |
743 case lir_static_call: | |
744 case lir_optvirtual_call: | |
745 case lir_icvirtual_call: | |
1295 | 746 case lir_virtual_call: |
747 case lir_dynamic_call: { | |
748 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); | |
749 assert(opJavaCall != NULL, "must be"); | |
0 | 750 |
751 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); | |
752 | |
753 // only visit register parameters | |
754 int n = opJavaCall->_arguments->length(); | |
755 for (int i = 0; i < n; i++) { | |
756 if (!opJavaCall->_arguments->at(i)->is_pointer()) { | |
757 do_input(*opJavaCall->_arguments->adr_at(i)); | |
758 } | |
759 } | |
760 | |
761 if (opJavaCall->_info) do_info(opJavaCall->_info); | |
1564 | 762 if (opJavaCall->is_method_handle_invoke()) { |
763 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); | |
764 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); | |
765 } | |
0 | 766 do_call(); |
767 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); | |
768 | |
769 break; | |
770 } | |
771 | |
772 | |
773 // LIR_OpRTCall | |
774 case lir_rtcall: { | |
775 assert(op->as_OpRTCall() != NULL, "must be"); | |
776 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; | |
777 | |
778 // only visit register parameters | |
779 int n = opRTCall->_arguments->length(); | |
780 for (int i = 0; i < n; i++) { | |
781 if (!opRTCall->_arguments->at(i)->is_pointer()) { | |
782 do_input(*opRTCall->_arguments->adr_at(i)); | |
783 } | |
784 } | |
785 if (opRTCall->_info) do_info(opRTCall->_info); | |
786 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); | |
787 do_call(); | |
788 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); | |
789 | |
790 break; | |
791 } | |
792 | |
793 | |
794 // LIR_OpArrayCopy | |
795 case lir_arraycopy: { | |
796 assert(op->as_OpArrayCopy() != NULL, "must be"); | |
797 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; | |
798 | |
799 assert(opArrayCopy->_result->is_illegal(), "unused"); | |
800 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); | |
801 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); | |
802 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); | |
803 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); | |
804 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); | |
805 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); | |
806 if (opArrayCopy->_info) do_info(opArrayCopy->_info); | |
807 | |
808 // the implementation of arraycopy always has a call into the runtime | |
809 do_call(); | |
810 | |
811 break; | |
812 } | |
813 | |
814 | |
815 // LIR_OpLock | |
816 case lir_lock: | |
817 case lir_unlock: { | |
818 assert(op->as_OpLock() != NULL, "must be"); | |
819 LIR_OpLock* opLock = (LIR_OpLock*)op; | |
820 | |
821 if (opLock->_info) do_info(opLock->_info); | |
822 | |
823 // TODO: check if these operands really have to be temp | |
824 // (or if input is sufficient). This may have influence on the oop map! | |
825 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); | |
826 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); | |
827 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); | |
828 | |
829 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); | |
830 assert(opLock->_result->is_illegal(), "unused"); | |
831 | |
832 do_stub(opLock->_stub); | |
833 | |
834 break; | |
835 } | |
836 | |
837 | |
838 // LIR_OpDelay | |
839 case lir_delay_slot: { | |
840 assert(op->as_OpDelay() != NULL, "must be"); | |
841 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; | |
842 | |
843 visit(opDelay->delay_op()); | |
844 break; | |
845 } | |
846 | |
847 // LIR_OpTypeCheck | |
848 case lir_instanceof: | |
849 case lir_checkcast: | |
850 case lir_store_check: { | |
851 assert(op->as_OpTypeCheck() != NULL, "must be"); | |
852 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; | |
853 | |
854 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); | |
855 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); | |
856 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); | |
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857 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { |
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858 do_temp(opTypeCheck->_object); |
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859 } |
0 | 860 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); |
861 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); | |
862 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); | |
863 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); | |
864 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); | |
865 do_stub(opTypeCheck->_stub); | |
866 break; | |
867 } | |
868 | |
869 // LIR_OpCompareAndSwap | |
870 case lir_cas_long: | |
871 case lir_cas_obj: | |
872 case lir_cas_int: { | |
873 assert(op->as_OpCompareAndSwap() != NULL, "must be"); | |
874 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; | |
875 | |
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876 assert(opCompareAndSwap->_addr->is_valid(), "used"); |
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877 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); |
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878 assert(opCompareAndSwap->_new_value->is_valid(), "used"); |
0 | 879 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); |
1681
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880 do_input(opCompareAndSwap->_addr); |
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881 do_temp(opCompareAndSwap->_addr); |
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882 do_input(opCompareAndSwap->_cmp_value); |
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883 do_temp(opCompareAndSwap->_cmp_value); |
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884 do_input(opCompareAndSwap->_new_value); |
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885 do_temp(opCompareAndSwap->_new_value); |
0 | 886 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); |
887 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); | |
888 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); | |
889 | |
890 break; | |
891 } | |
892 | |
893 | |
894 // LIR_OpAllocArray; | |
895 case lir_alloc_array: { | |
896 assert(op->as_OpAllocArray() != NULL, "must be"); | |
897 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; | |
898 | |
899 if (opAllocArray->_info) do_info(opAllocArray->_info); | |
900 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); | |
901 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); | |
902 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); | |
903 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); | |
904 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); | |
905 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); | |
906 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); | |
907 do_stub(opAllocArray->_stub); | |
908 break; | |
909 } | |
910 | |
911 // LIR_OpProfileCall: | |
912 case lir_profile_call: { | |
913 assert(op->as_OpProfileCall() != NULL, "must be"); | |
914 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; | |
915 | |
916 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); | |
917 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); | |
918 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); | |
919 break; | |
920 } | |
921 default: | |
922 ShouldNotReachHere(); | |
923 } | |
924 } | |
925 | |
926 | |
927 void LIR_OpVisitState::do_stub(CodeStub* stub) { | |
928 if (stub != NULL) { | |
929 stub->visit(this); | |
930 } | |
931 } | |
932 | |
933 XHandlers* LIR_OpVisitState::all_xhandler() { | |
934 XHandlers* result = NULL; | |
935 | |
936 int i; | |
937 for (i = 0; i < info_count(); i++) { | |
938 if (info_at(i)->exception_handlers() != NULL) { | |
939 result = info_at(i)->exception_handlers(); | |
940 break; | |
941 } | |
942 } | |
943 | |
944 #ifdef ASSERT | |
945 for (i = 0; i < info_count(); i++) { | |
946 assert(info_at(i)->exception_handlers() == NULL || | |
947 info_at(i)->exception_handlers() == result, | |
948 "only one xhandler list allowed per LIR-operation"); | |
949 } | |
950 #endif | |
951 | |
952 if (result != NULL) { | |
953 return result; | |
954 } else { | |
955 return new XHandlers(); | |
956 } | |
957 | |
958 return result; | |
959 } | |
960 | |
961 | |
962 #ifdef ASSERT | |
963 bool LIR_OpVisitState::no_operands(LIR_Op* op) { | |
964 visit(op); | |
965 | |
966 return opr_count(inputMode) == 0 && | |
967 opr_count(outputMode) == 0 && | |
968 opr_count(tempMode) == 0 && | |
969 info_count() == 0 && | |
970 !has_call() && | |
971 !has_slow_case(); | |
972 } | |
973 #endif | |
974 | |
975 //--------------------------------------------------- | |
976 | |
977 | |
978 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { | |
979 masm->emit_call(this); | |
980 } | |
981 | |
982 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { | |
983 masm->emit_rtcall(this); | |
984 } | |
985 | |
986 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { | |
987 masm->emit_opLabel(this); | |
988 } | |
989 | |
990 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { | |
991 masm->emit_arraycopy(this); | |
992 masm->emit_code_stub(stub()); | |
993 } | |
994 | |
995 void LIR_Op0::emit_code(LIR_Assembler* masm) { | |
996 masm->emit_op0(this); | |
997 } | |
998 | |
999 void LIR_Op1::emit_code(LIR_Assembler* masm) { | |
1000 masm->emit_op1(this); | |
1001 } | |
1002 | |
1003 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { | |
1004 masm->emit_alloc_obj(this); | |
1005 masm->emit_code_stub(stub()); | |
1006 } | |
1007 | |
1008 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { | |
1009 masm->emit_opBranch(this); | |
1010 if (stub()) { | |
1011 masm->emit_code_stub(stub()); | |
1012 } | |
1013 } | |
1014 | |
1015 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { | |
1016 masm->emit_opConvert(this); | |
1017 if (stub() != NULL) { | |
1018 masm->emit_code_stub(stub()); | |
1019 } | |
1020 } | |
1021 | |
1022 void LIR_Op2::emit_code(LIR_Assembler* masm) { | |
1023 masm->emit_op2(this); | |
1024 } | |
1025 | |
1026 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { | |
1027 masm->emit_alloc_array(this); | |
1028 masm->emit_code_stub(stub()); | |
1029 } | |
1030 | |
1031 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { | |
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1032 masm->emit_opTypeCheck(this); |
0 | 1033 if (stub()) { |
1034 masm->emit_code_stub(stub()); | |
1035 } | |
1036 } | |
1037 | |
1038 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { | |
1039 masm->emit_compare_and_swap(this); | |
1040 } | |
1041 | |
1042 void LIR_Op3::emit_code(LIR_Assembler* masm) { | |
1043 masm->emit_op3(this); | |
1044 } | |
1045 | |
1046 void LIR_OpLock::emit_code(LIR_Assembler* masm) { | |
1047 masm->emit_lock(this); | |
1048 if (stub()) { | |
1049 masm->emit_code_stub(stub()); | |
1050 } | |
1051 } | |
1052 | |
1053 | |
1054 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { | |
1055 masm->emit_delay(this); | |
1056 } | |
1057 | |
1058 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { | |
1059 masm->emit_profile_call(this); | |
1060 } | |
1061 | |
1062 // LIR_List | |
1063 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) | |
1064 : _operations(8) | |
1065 , _compilation(compilation) | |
1066 #ifndef PRODUCT | |
1067 , _block(block) | |
1068 #endif | |
1069 #ifdef ASSERT | |
1070 , _file(NULL) | |
1071 , _line(0) | |
1072 #endif | |
1073 { } | |
1074 | |
1075 | |
1076 #ifdef ASSERT | |
1077 void LIR_List::set_file_and_line(const char * file, int line) { | |
1078 const char * f = strrchr(file, '/'); | |
1079 if (f == NULL) f = strrchr(file, '\\'); | |
1080 if (f == NULL) { | |
1081 f = file; | |
1082 } else { | |
1083 f++; | |
1084 } | |
1085 _file = f; | |
1086 _line = line; | |
1087 } | |
1088 #endif | |
1089 | |
1090 | |
1091 void LIR_List::append(LIR_InsertionBuffer* buffer) { | |
1092 assert(this == buffer->lir_list(), "wrong lir list"); | |
1093 const int n = _operations.length(); | |
1094 | |
1095 if (buffer->number_of_ops() > 0) { | |
1096 // increase size of instructions list | |
1097 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); | |
1098 // insert ops from buffer into instructions list | |
1099 int op_index = buffer->number_of_ops() - 1; | |
1100 int ip_index = buffer->number_of_insertion_points() - 1; | |
1101 int from_index = n - 1; | |
1102 int to_index = _operations.length() - 1; | |
1103 for (; ip_index >= 0; ip_index --) { | |
1104 int index = buffer->index_at(ip_index); | |
1105 // make room after insertion point | |
1106 while (index < from_index) { | |
1107 _operations.at_put(to_index --, _operations.at(from_index --)); | |
1108 } | |
1109 // insert ops from buffer | |
1110 for (int i = buffer->count_at(ip_index); i > 0; i --) { | |
1111 _operations.at_put(to_index --, buffer->op_at(op_index --)); | |
1112 } | |
1113 } | |
1114 } | |
1115 | |
1116 buffer->finish(); | |
1117 } | |
1118 | |
1119 | |
1120 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { | |
1121 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); | |
1122 } | |
1123 | |
1124 | |
1125 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1126 append(new LIR_Op1( | |
1127 lir_move, | |
1128 LIR_OprFact::address(addr), | |
1129 src, | |
1130 addr->type(), | |
1131 patch_code, | |
1132 info)); | |
1133 } | |
1134 | |
1135 | |
1136 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1137 append(new LIR_Op1( | |
1138 lir_move, | |
1139 LIR_OprFact::address(address), | |
1140 dst, | |
1141 address->type(), | |
1142 patch_code, | |
1143 info, lir_move_volatile)); | |
1144 } | |
1145 | |
1146 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1147 append(new LIR_Op1( | |
1148 lir_move, | |
1149 LIR_OprFact::address(new LIR_Address(base, offset, type)), | |
1150 dst, | |
1151 type, | |
1152 patch_code, | |
1153 info, lir_move_volatile)); | |
1154 } | |
1155 | |
1156 | |
1157 void LIR_List::prefetch(LIR_Address* addr, bool is_store) { | |
1158 append(new LIR_Op1( | |
1159 is_store ? lir_prefetchw : lir_prefetchr, | |
1160 LIR_OprFact::address(addr))); | |
1161 } | |
1162 | |
1163 | |
1164 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1165 append(new LIR_Op1( | |
1166 lir_move, | |
1167 LIR_OprFact::intConst(v), | |
1168 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), | |
1169 type, | |
1170 patch_code, | |
1171 info)); | |
1172 } | |
1173 | |
1174 | |
1175 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1176 append(new LIR_Op1( | |
1177 lir_move, | |
1178 LIR_OprFact::oopConst(o), | |
1179 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), | |
1180 type, | |
1181 patch_code, | |
1182 info)); | |
1183 } | |
1184 | |
1185 | |
1186 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1187 append(new LIR_Op1( | |
1188 lir_move, | |
1189 src, | |
1190 LIR_OprFact::address(addr), | |
1191 addr->type(), | |
1192 patch_code, | |
1193 info)); | |
1194 } | |
1195 | |
1196 | |
1197 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1198 append(new LIR_Op1( | |
1199 lir_move, | |
1200 src, | |
1201 LIR_OprFact::address(addr), | |
1202 addr->type(), | |
1203 patch_code, | |
1204 info, | |
1205 lir_move_volatile)); | |
1206 } | |
1207 | |
1208 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1209 append(new LIR_Op1( | |
1210 lir_move, | |
1211 src, | |
1212 LIR_OprFact::address(new LIR_Address(base, offset, type)), | |
1213 type, | |
1214 patch_code, | |
1215 info, lir_move_volatile)); | |
1216 } | |
1217 | |
1218 | |
1219 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1220 append(new LIR_Op3( | |
1221 lir_idiv, | |
1222 left, | |
1223 right, | |
1224 tmp, | |
1225 res, | |
1226 info)); | |
1227 } | |
1228 | |
1229 | |
1230 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1231 append(new LIR_Op3( | |
1232 lir_idiv, | |
1233 left, | |
1234 LIR_OprFact::intConst(right), | |
1235 tmp, | |
1236 res, | |
1237 info)); | |
1238 } | |
1239 | |
1240 | |
1241 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1242 append(new LIR_Op3( | |
1243 lir_irem, | |
1244 left, | |
1245 right, | |
1246 tmp, | |
1247 res, | |
1248 info)); | |
1249 } | |
1250 | |
1251 | |
1252 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1253 append(new LIR_Op3( | |
1254 lir_irem, | |
1255 left, | |
1256 LIR_OprFact::intConst(right), | |
1257 tmp, | |
1258 res, | |
1259 info)); | |
1260 } | |
1261 | |
1262 | |
1263 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
1264 append(new LIR_Op2( | |
1265 lir_cmp, | |
1266 condition, | |
1267 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), | |
1268 LIR_OprFact::intConst(c), | |
1269 info)); | |
1270 } | |
1271 | |
1272 | |
1273 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { | |
1274 append(new LIR_Op2( | |
1275 lir_cmp, | |
1276 condition, | |
1277 reg, | |
1278 LIR_OprFact::address(addr), | |
1279 info)); | |
1280 } | |
1281 | |
1282 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, | |
1283 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { | |
1284 append(new LIR_OpAllocObj( | |
1285 klass, | |
1286 dst, | |
1287 t1, | |
1288 t2, | |
1289 t3, | |
1290 t4, | |
1291 header_size, | |
1292 object_size, | |
1293 init_check, | |
1294 stub)); | |
1295 } | |
1296 | |
1297 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { | |
1298 append(new LIR_OpAllocArray( | |
1299 klass, | |
1300 len, | |
1301 dst, | |
1302 t1, | |
1303 t2, | |
1304 t3, | |
1305 t4, | |
1306 type, | |
1307 stub)); | |
1308 } | |
1309 | |
1310 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1311 append(new LIR_Op2( | |
1312 lir_shl, | |
1313 value, | |
1314 count, | |
1315 dst, | |
1316 tmp)); | |
1317 } | |
1318 | |
1319 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1320 append(new LIR_Op2( | |
1321 lir_shr, | |
1322 value, | |
1323 count, | |
1324 dst, | |
1325 tmp)); | |
1326 } | |
1327 | |
1328 | |
1329 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1330 append(new LIR_Op2( | |
1331 lir_ushr, | |
1332 value, | |
1333 count, | |
1334 dst, | |
1335 tmp)); | |
1336 } | |
1337 | |
1338 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { | |
1339 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, | |
1340 left, | |
1341 right, | |
1342 dst)); | |
1343 } | |
1344 | |
1345 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { | |
1346 append(new LIR_OpLock( | |
1347 lir_lock, | |
1348 hdr, | |
1349 obj, | |
1350 lock, | |
1351 scratch, | |
1352 stub, | |
1353 info)); | |
1354 } | |
1355 | |
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1356 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { |
0 | 1357 append(new LIR_OpLock( |
1358 lir_unlock, | |
1359 hdr, | |
1360 obj, | |
1361 lock, | |
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1362 scratch, |
0 | 1363 stub, |
1364 NULL)); | |
1365 } | |
1366 | |
1367 | |
1368 void check_LIR() { | |
1369 // cannot do the proper checking as PRODUCT and other modes return different results | |
1370 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); | |
1371 } | |
1372 | |
1373 | |
1374 | |
1375 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
1376 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
1377 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, | |
1378 ciMethod* profiled_method, int profiled_bci) { | |
1783 | 1379 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, |
1380 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); | |
1381 if (profiled_method != NULL) { | |
1382 c->set_profiled_method(profiled_method); | |
1383 c->set_profiled_bci(profiled_bci); | |
1384 c->set_should_profile(true); | |
1385 } | |
1386 append(c); | |
0 | 1387 } |
1388 | |
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1389 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { |
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1390 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); |
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1391 if (profiled_method != NULL) { |
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1392 c->set_profiled_method(profiled_method); |
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1393 c->set_profiled_bci(profiled_bci); |
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1394 c->set_should_profile(true); |
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1395 } |
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1396 append(c); |
0 | 1397 } |
1398 | |
1399 | |
3957 | 1400 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, |
1401 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { | |
1402 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); | |
1403 if (profiled_method != NULL) { | |
1404 c->set_profiled_method(profiled_method); | |
1405 c->set_profiled_bci(profiled_bci); | |
1406 c->set_should_profile(true); | |
1407 } | |
1408 append(c); | |
0 | 1409 } |
1410 | |
1411 | |
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1412 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1413 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
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1414 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1415 } |
1416 | |
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1417 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1418 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
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1419 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1420 } |
1421 | |
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1422 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1423 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
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1424 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1425 } |
1426 | |
1427 | |
1428 #ifdef PRODUCT | |
1429 | |
1430 void print_LIR(BlockList* blocks) { | |
1431 } | |
1432 | |
1433 #else | |
1434 // LIR_OprDesc | |
1435 void LIR_OprDesc::print() const { | |
1436 print(tty); | |
1437 } | |
1438 | |
1439 void LIR_OprDesc::print(outputStream* out) const { | |
1440 if (is_illegal()) { | |
1441 return; | |
1442 } | |
1443 | |
1444 out->print("["); | |
1445 if (is_pointer()) { | |
1446 pointer()->print_value_on(out); | |
1447 } else if (is_single_stack()) { | |
1448 out->print("stack:%d", single_stack_ix()); | |
1449 } else if (is_double_stack()) { | |
1450 out->print("dbl_stack:%d",double_stack_ix()); | |
1451 } else if (is_virtual()) { | |
1452 out->print("R%d", vreg_number()); | |
1453 } else if (is_single_cpu()) { | |
1454 out->print(as_register()->name()); | |
1455 } else if (is_double_cpu()) { | |
1456 out->print(as_register_hi()->name()); | |
1457 out->print(as_register_lo()->name()); | |
304 | 1458 #if defined(X86) |
0 | 1459 } else if (is_single_xmm()) { |
1460 out->print(as_xmm_float_reg()->name()); | |
1461 } else if (is_double_xmm()) { | |
1462 out->print(as_xmm_double_reg()->name()); | |
1463 } else if (is_single_fpu()) { | |
1464 out->print("fpu%d", fpu_regnr()); | |
1465 } else if (is_double_fpu()) { | |
1466 out->print("fpu%d", fpu_regnrLo()); | |
1681
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1467 #elif defined(ARM) |
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1468 } else if (is_single_fpu()) { |
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1469 out->print("s%d", fpu_regnr()); |
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1470 } else if (is_double_fpu()) { |
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1471 out->print("d%d", fpu_regnrLo() >> 1); |
0 | 1472 #else |
1473 } else if (is_single_fpu()) { | |
1474 out->print(as_float_reg()->name()); | |
1475 } else if (is_double_fpu()) { | |
1476 out->print(as_double_reg()->name()); | |
1477 #endif | |
1478 | |
1479 } else if (is_illegal()) { | |
1480 out->print("-"); | |
1481 } else { | |
1482 out->print("Unknown Operand"); | |
1483 } | |
1484 if (!is_illegal()) { | |
1485 out->print("|%c", type_char()); | |
1486 } | |
1487 if (is_register() && is_last_use()) { | |
1488 out->print("(last_use)"); | |
1489 } | |
1490 out->print("]"); | |
1491 } | |
1492 | |
1493 | |
1494 // LIR_Address | |
1495 void LIR_Const::print_value_on(outputStream* out) const { | |
1496 switch (type()) { | |
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1497 case T_ADDRESS:out->print("address:%d",as_jint()); break; |
0 | 1498 case T_INT: out->print("int:%d", as_jint()); break; |
1499 case T_LONG: out->print("lng:%lld", as_jlong()); break; | |
1500 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; | |
1501 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; | |
1502 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break; | |
1503 default: out->print("%3d:0x%x",type(), as_jdouble()); break; | |
1504 } | |
1505 } | |
1506 | |
1507 // LIR_Address | |
1508 void LIR_Address::print_value_on(outputStream* out) const { | |
1509 out->print("Base:"); _base->print(out); | |
1510 if (!_index->is_illegal()) { | |
1511 out->print(" Index:"); _index->print(out); | |
1512 switch (scale()) { | |
1513 case times_1: break; | |
1514 case times_2: out->print(" * 2"); break; | |
1515 case times_4: out->print(" * 4"); break; | |
1516 case times_8: out->print(" * 8"); break; | |
1517 } | |
1518 } | |
1519 out->print(" Disp: %d", _disp); | |
1520 } | |
1521 | |
1522 // debug output of block header without InstructionPrinter | |
1523 // (because phi functions are not necessary for LIR) | |
1524 static void print_block(BlockBegin* x) { | |
1525 // print block id | |
1526 BlockEnd* end = x->end(); | |
1527 tty->print("B%d ", x->block_id()); | |
1528 | |
1529 // print flags | |
1530 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); | |
1531 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); | |
1532 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); | |
1533 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); | |
1534 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); | |
1535 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); | |
1536 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); | |
1537 | |
1538 // print block bci range | |
1819 | 1539 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); |
0 | 1540 |
1541 // print predecessors and successors | |
1542 if (x->number_of_preds() > 0) { | |
1543 tty->print("preds: "); | |
1544 for (int i = 0; i < x->number_of_preds(); i ++) { | |
1545 tty->print("B%d ", x->pred_at(i)->block_id()); | |
1546 } | |
1547 } | |
1548 | |
1549 if (x->number_of_sux() > 0) { | |
1550 tty->print("sux: "); | |
1551 for (int i = 0; i < x->number_of_sux(); i ++) { | |
1552 tty->print("B%d ", x->sux_at(i)->block_id()); | |
1553 } | |
1554 } | |
1555 | |
1556 // print exception handlers | |
1557 if (x->number_of_exception_handlers() > 0) { | |
1558 tty->print("xhandler: "); | |
1559 for (int i = 0; i < x->number_of_exception_handlers(); i++) { | |
1560 tty->print("B%d ", x->exception_handler_at(i)->block_id()); | |
1561 } | |
1562 } | |
1563 | |
1564 tty->cr(); | |
1565 } | |
1566 | |
1567 void print_LIR(BlockList* blocks) { | |
1568 tty->print_cr("LIR:"); | |
1569 int i; | |
1570 for (i = 0; i < blocks->length(); i++) { | |
1571 BlockBegin* bb = blocks->at(i); | |
1572 print_block(bb); | |
1573 tty->print("__id_Instruction___________________________________________"); tty->cr(); | |
1574 bb->lir()->print_instructions(); | |
1575 } | |
1576 } | |
1577 | |
1578 void LIR_List::print_instructions() { | |
1579 for (int i = 0; i < _operations.length(); i++) { | |
1580 _operations.at(i)->print(); tty->cr(); | |
1581 } | |
1582 tty->cr(); | |
1583 } | |
1584 | |
1585 // LIR_Ops printing routines | |
1586 // LIR_Op | |
1587 void LIR_Op::print_on(outputStream* out) const { | |
1588 if (id() != -1 || PrintCFGToFile) { | |
1589 out->print("%4d ", id()); | |
1590 } else { | |
1591 out->print(" "); | |
1592 } | |
1593 out->print(name()); out->print(" "); | |
1594 print_instr(out); | |
1819 | 1595 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); |
0 | 1596 #ifdef ASSERT |
1597 if (Verbose && _file != NULL) { | |
1598 out->print(" (%s:%d)", _file, _line); | |
1599 } | |
1600 #endif | |
1601 } | |
1602 | |
1603 const char * LIR_Op::name() const { | |
1604 const char* s = NULL; | |
1605 switch(code()) { | |
1606 // LIR_Op0 | |
1607 case lir_membar: s = "membar"; break; | |
1608 case lir_membar_acquire: s = "membar_acquire"; break; | |
1609 case lir_membar_release: s = "membar_release"; break; | |
1610 case lir_word_align: s = "word_align"; break; | |
1611 case lir_label: s = "label"; break; | |
1612 case lir_nop: s = "nop"; break; | |
1613 case lir_backwardbranch_target: s = "backbranch"; break; | |
1614 case lir_std_entry: s = "std_entry"; break; | |
1615 case lir_osr_entry: s = "osr_entry"; break; | |
1616 case lir_build_frame: s = "build_frm"; break; | |
1617 case lir_fpop_raw: s = "fpop_raw"; break; | |
1618 case lir_24bit_FPU: s = "24bit_FPU"; break; | |
1619 case lir_reset_FPU: s = "reset_FPU"; break; | |
1620 case lir_breakpoint: s = "breakpoint"; break; | |
1621 case lir_get_thread: s = "get_thread"; break; | |
1622 // LIR_Op1 | |
1623 case lir_fxch: s = "fxch"; break; | |
1624 case lir_fld: s = "fld"; break; | |
1625 case lir_ffree: s = "ffree"; break; | |
1626 case lir_push: s = "push"; break; | |
1627 case lir_pop: s = "pop"; break; | |
1628 case lir_null_check: s = "null_check"; break; | |
1629 case lir_return: s = "return"; break; | |
1630 case lir_safepoint: s = "safepoint"; break; | |
1631 case lir_neg: s = "neg"; break; | |
1632 case lir_leal: s = "leal"; break; | |
1633 case lir_branch: s = "branch"; break; | |
1634 case lir_cond_float_branch: s = "flt_cond_br"; break; | |
1635 case lir_move: s = "move"; break; | |
1636 case lir_roundfp: s = "roundfp"; break; | |
1637 case lir_rtcall: s = "rtcall"; break; | |
1638 case lir_throw: s = "throw"; break; | |
1639 case lir_unwind: s = "unwind"; break; | |
1640 case lir_convert: s = "convert"; break; | |
1641 case lir_alloc_object: s = "alloc_obj"; break; | |
1642 case lir_monaddr: s = "mon_addr"; break; | |
1783 | 1643 case lir_pack64: s = "pack64"; break; |
1644 case lir_unpack64: s = "unpack64"; break; | |
0 | 1645 // LIR_Op2 |
1646 case lir_cmp: s = "cmp"; break; | |
1647 case lir_cmp_l2i: s = "cmp_l2i"; break; | |
1648 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; | |
1649 case lir_cmp_fd2i: s = "comp_fd2i"; break; | |
1650 case lir_cmove: s = "cmove"; break; | |
1651 case lir_add: s = "add"; break; | |
1652 case lir_sub: s = "sub"; break; | |
1653 case lir_mul: s = "mul"; break; | |
1654 case lir_mul_strictfp: s = "mul_strictfp"; break; | |
1655 case lir_div: s = "div"; break; | |
1656 case lir_div_strictfp: s = "div_strictfp"; break; | |
1657 case lir_rem: s = "rem"; break; | |
1658 case lir_abs: s = "abs"; break; | |
1659 case lir_sqrt: s = "sqrt"; break; | |
1660 case lir_sin: s = "sin"; break; | |
1661 case lir_cos: s = "cos"; break; | |
1662 case lir_tan: s = "tan"; break; | |
1663 case lir_log: s = "log"; break; | |
1664 case lir_log10: s = "log10"; break; | |
1665 case lir_logic_and: s = "logic_and"; break; | |
1666 case lir_logic_or: s = "logic_or"; break; | |
1667 case lir_logic_xor: s = "logic_xor"; break; | |
1668 case lir_shl: s = "shift_left"; break; | |
1669 case lir_shr: s = "shift_right"; break; | |
1670 case lir_ushr: s = "ushift_right"; break; | |
1671 case lir_alloc_array: s = "alloc_array"; break; | |
1672 // LIR_Op3 | |
1673 case lir_idiv: s = "idiv"; break; | |
1674 case lir_irem: s = "irem"; break; | |
1675 // LIR_OpJavaCall | |
1676 case lir_static_call: s = "static"; break; | |
1677 case lir_optvirtual_call: s = "optvirtual"; break; | |
1678 case lir_icvirtual_call: s = "icvirtual"; break; | |
1679 case lir_virtual_call: s = "virtual"; break; | |
1295 | 1680 case lir_dynamic_call: s = "dynamic"; break; |
0 | 1681 // LIR_OpArrayCopy |
1682 case lir_arraycopy: s = "arraycopy"; break; | |
1683 // LIR_OpLock | |
1684 case lir_lock: s = "lock"; break; | |
1685 case lir_unlock: s = "unlock"; break; | |
1686 // LIR_OpDelay | |
1687 case lir_delay_slot: s = "delay"; break; | |
1688 // LIR_OpTypeCheck | |
1689 case lir_instanceof: s = "instanceof"; break; | |
1690 case lir_checkcast: s = "checkcast"; break; | |
1691 case lir_store_check: s = "store_check"; break; | |
1692 // LIR_OpCompareAndSwap | |
1693 case lir_cas_long: s = "cas_long"; break; | |
1694 case lir_cas_obj: s = "cas_obj"; break; | |
1695 case lir_cas_int: s = "cas_int"; break; | |
1696 // LIR_OpProfileCall | |
1697 case lir_profile_call: s = "profile_call"; break; | |
1698 case lir_none: ShouldNotReachHere();break; | |
1699 default: s = "illegal_op"; break; | |
1700 } | |
1701 return s; | |
1702 } | |
1703 | |
1704 // LIR_OpJavaCall | |
1705 void LIR_OpJavaCall::print_instr(outputStream* out) const { | |
1706 out->print("call: "); | |
1707 out->print("[addr: 0x%x]", address()); | |
1708 if (receiver()->is_valid()) { | |
1709 out->print(" [recv: "); receiver()->print(out); out->print("]"); | |
1710 } | |
1711 if (result_opr()->is_valid()) { | |
1712 out->print(" [result: "); result_opr()->print(out); out->print("]"); | |
1713 } | |
1714 } | |
1715 | |
1716 // LIR_OpLabel | |
1717 void LIR_OpLabel::print_instr(outputStream* out) const { | |
1718 out->print("[label:0x%x]", _label); | |
1719 } | |
1720 | |
1721 // LIR_OpArrayCopy | |
1722 void LIR_OpArrayCopy::print_instr(outputStream* out) const { | |
1723 src()->print(out); out->print(" "); | |
1724 src_pos()->print(out); out->print(" "); | |
1725 dst()->print(out); out->print(" "); | |
1726 dst_pos()->print(out); out->print(" "); | |
1727 length()->print(out); out->print(" "); | |
1728 tmp()->print(out); out->print(" "); | |
1729 } | |
1730 | |
1731 // LIR_OpCompareAndSwap | |
1732 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { | |
1733 addr()->print(out); out->print(" "); | |
1734 cmp_value()->print(out); out->print(" "); | |
1735 new_value()->print(out); out->print(" "); | |
1736 tmp1()->print(out); out->print(" "); | |
1737 tmp2()->print(out); out->print(" "); | |
1738 | |
1739 } | |
1740 | |
1741 // LIR_Op0 | |
1742 void LIR_Op0::print_instr(outputStream* out) const { | |
1743 result_opr()->print(out); | |
1744 } | |
1745 | |
1746 // LIR_Op1 | |
1747 const char * LIR_Op1::name() const { | |
1748 if (code() == lir_move) { | |
1749 switch (move_kind()) { | |
1750 case lir_move_normal: | |
1751 return "move"; | |
1752 case lir_move_unaligned: | |
1753 return "unaligned move"; | |
1754 case lir_move_volatile: | |
1755 return "volatile_move"; | |
2002 | 1756 case lir_move_wide: |
1757 return "wide_move"; | |
0 | 1758 default: |
1759 ShouldNotReachHere(); | |
1760 return "illegal_op"; | |
1761 } | |
1762 } else { | |
1763 return LIR_Op::name(); | |
1764 } | |
1765 } | |
1766 | |
1767 | |
1768 void LIR_Op1::print_instr(outputStream* out) const { | |
1769 _opr->print(out); out->print(" "); | |
1770 result_opr()->print(out); out->print(" "); | |
1771 print_patch_code(out, patch_code()); | |
1772 } | |
1773 | |
1774 | |
1775 // LIR_Op1 | |
1776 void LIR_OpRTCall::print_instr(outputStream* out) const { | |
1777 intx a = (intx)addr(); | |
1778 out->print(Runtime1::name_for_address(addr())); | |
1779 out->print(" "); | |
1780 tmp()->print(out); | |
1781 } | |
1782 | |
1783 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { | |
1784 switch(code) { | |
1785 case lir_patch_none: break; | |
1786 case lir_patch_low: out->print("[patch_low]"); break; | |
1787 case lir_patch_high: out->print("[patch_high]"); break; | |
1788 case lir_patch_normal: out->print("[patch_normal]"); break; | |
1789 default: ShouldNotReachHere(); | |
1790 } | |
1791 } | |
1792 | |
1793 // LIR_OpBranch | |
1794 void LIR_OpBranch::print_instr(outputStream* out) const { | |
1795 print_condition(out, cond()); out->print(" "); | |
1796 if (block() != NULL) { | |
1797 out->print("[B%d] ", block()->block_id()); | |
1798 } else if (stub() != NULL) { | |
1799 out->print("["); | |
1800 stub()->print_name(out); | |
1801 out->print(": 0x%x]", stub()); | |
1819 | 1802 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); |
0 | 1803 } else { |
1804 out->print("[label:0x%x] ", label()); | |
1805 } | |
1806 if (ublock() != NULL) { | |
1807 out->print("unordered: [B%d] ", ublock()->block_id()); | |
1808 } | |
1809 } | |
1810 | |
1811 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { | |
1812 switch(cond) { | |
1813 case lir_cond_equal: out->print("[EQ]"); break; | |
1814 case lir_cond_notEqual: out->print("[NE]"); break; | |
1815 case lir_cond_less: out->print("[LT]"); break; | |
1816 case lir_cond_lessEqual: out->print("[LE]"); break; | |
1817 case lir_cond_greaterEqual: out->print("[GE]"); break; | |
1818 case lir_cond_greater: out->print("[GT]"); break; | |
1819 case lir_cond_belowEqual: out->print("[BE]"); break; | |
1820 case lir_cond_aboveEqual: out->print("[AE]"); break; | |
1821 case lir_cond_always: out->print("[AL]"); break; | |
1822 default: out->print("[%d]",cond); break; | |
1823 } | |
1824 } | |
1825 | |
1826 // LIR_OpConvert | |
1827 void LIR_OpConvert::print_instr(outputStream* out) const { | |
1828 print_bytecode(out, bytecode()); | |
1829 in_opr()->print(out); out->print(" "); | |
1830 result_opr()->print(out); out->print(" "); | |
1681
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1831 #ifdef PPC |
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1832 if(tmp1()->is_valid()) { |
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1833 tmp1()->print(out); out->print(" "); |
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1834 tmp2()->print(out); out->print(" "); |
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1835 } |
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1836 #endif |
0 | 1837 } |
1838 | |
1839 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { | |
1840 switch(code) { | |
1841 case Bytecodes::_d2f: out->print("[d2f] "); break; | |
1842 case Bytecodes::_d2i: out->print("[d2i] "); break; | |
1843 case Bytecodes::_d2l: out->print("[d2l] "); break; | |
1844 case Bytecodes::_f2d: out->print("[f2d] "); break; | |
1845 case Bytecodes::_f2i: out->print("[f2i] "); break; | |
1846 case Bytecodes::_f2l: out->print("[f2l] "); break; | |
1847 case Bytecodes::_i2b: out->print("[i2b] "); break; | |
1848 case Bytecodes::_i2c: out->print("[i2c] "); break; | |
1849 case Bytecodes::_i2d: out->print("[i2d] "); break; | |
1850 case Bytecodes::_i2f: out->print("[i2f] "); break; | |
1851 case Bytecodes::_i2l: out->print("[i2l] "); break; | |
1852 case Bytecodes::_i2s: out->print("[i2s] "); break; | |
1853 case Bytecodes::_l2i: out->print("[l2i] "); break; | |
1854 case Bytecodes::_l2f: out->print("[l2f] "); break; | |
1855 case Bytecodes::_l2d: out->print("[l2d] "); break; | |
1856 default: | |
1857 out->print("[?%d]",code); | |
1858 break; | |
1859 } | |
1860 } | |
1861 | |
1862 void LIR_OpAllocObj::print_instr(outputStream* out) const { | |
1863 klass()->print(out); out->print(" "); | |
1864 obj()->print(out); out->print(" "); | |
1865 tmp1()->print(out); out->print(" "); | |
1866 tmp2()->print(out); out->print(" "); | |
1867 tmp3()->print(out); out->print(" "); | |
1868 tmp4()->print(out); out->print(" "); | |
1869 out->print("[hdr:%d]", header_size()); out->print(" "); | |
1870 out->print("[obj:%d]", object_size()); out->print(" "); | |
1871 out->print("[lbl:0x%x]", stub()->entry()); | |
1872 } | |
1873 | |
1874 void LIR_OpRoundFP::print_instr(outputStream* out) const { | |
1875 _opr->print(out); out->print(" "); | |
1876 tmp()->print(out); out->print(" "); | |
1877 result_opr()->print(out); out->print(" "); | |
1878 } | |
1879 | |
1880 // LIR_Op2 | |
1881 void LIR_Op2::print_instr(outputStream* out) const { | |
1882 if (code() == lir_cmove) { | |
1883 print_condition(out, condition()); out->print(" "); | |
1884 } | |
1885 in_opr1()->print(out); out->print(" "); | |
1886 in_opr2()->print(out); out->print(" "); | |
1887 if (tmp_opr()->is_valid()) { tmp_opr()->print(out); out->print(" "); } | |
1888 result_opr()->print(out); | |
1889 } | |
1890 | |
1891 void LIR_OpAllocArray::print_instr(outputStream* out) const { | |
1892 klass()->print(out); out->print(" "); | |
1893 len()->print(out); out->print(" "); | |
1894 obj()->print(out); out->print(" "); | |
1895 tmp1()->print(out); out->print(" "); | |
1896 tmp2()->print(out); out->print(" "); | |
1897 tmp3()->print(out); out->print(" "); | |
1898 tmp4()->print(out); out->print(" "); | |
1899 out->print("[type:0x%x]", type()); out->print(" "); | |
1900 out->print("[label:0x%x]", stub()->entry()); | |
1901 } | |
1902 | |
1903 | |
1904 void LIR_OpTypeCheck::print_instr(outputStream* out) const { | |
1905 object()->print(out); out->print(" "); | |
1906 if (code() == lir_store_check) { | |
1907 array()->print(out); out->print(" "); | |
1908 } | |
1909 if (code() != lir_store_check) { | |
1910 klass()->print_name_on(out); out->print(" "); | |
1911 if (fast_check()) out->print("fast_check "); | |
1912 } | |
1913 tmp1()->print(out); out->print(" "); | |
1914 tmp2()->print(out); out->print(" "); | |
1915 tmp3()->print(out); out->print(" "); | |
1916 result_opr()->print(out); out->print(" "); | |
1819 | 1917 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); |
0 | 1918 } |
1919 | |
1920 | |
1921 // LIR_Op3 | |
1922 void LIR_Op3::print_instr(outputStream* out) const { | |
1923 in_opr1()->print(out); out->print(" "); | |
1924 in_opr2()->print(out); out->print(" "); | |
1925 in_opr3()->print(out); out->print(" "); | |
1926 result_opr()->print(out); | |
1927 } | |
1928 | |
1929 | |
1930 void LIR_OpLock::print_instr(outputStream* out) const { | |
1931 hdr_opr()->print(out); out->print(" "); | |
1932 obj_opr()->print(out); out->print(" "); | |
1933 lock_opr()->print(out); out->print(" "); | |
1934 if (_scratch->is_valid()) { | |
1935 _scratch->print(out); out->print(" "); | |
1936 } | |
1937 out->print("[lbl:0x%x]", stub()->entry()); | |
1938 } | |
1939 | |
1940 | |
1941 void LIR_OpDelay::print_instr(outputStream* out) const { | |
1942 _op->print_on(out); | |
1943 } | |
1944 | |
1945 | |
1946 // LIR_OpProfileCall | |
1947 void LIR_OpProfileCall::print_instr(outputStream* out) const { | |
1948 profiled_method()->name()->print_symbol_on(out); | |
1949 out->print("."); | |
1950 profiled_method()->holder()->name()->print_symbol_on(out); | |
1951 out->print(" @ %d ", profiled_bci()); | |
1952 mdo()->print(out); out->print(" "); | |
1953 recv()->print(out); out->print(" "); | |
1954 tmp1()->print(out); out->print(" "); | |
1955 } | |
1956 | |
1957 #endif // PRODUCT | |
1958 | |
1959 // Implementation of LIR_InsertionBuffer | |
1960 | |
1961 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { | |
1962 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); | |
1963 | |
1964 int i = number_of_insertion_points() - 1; | |
1965 if (i < 0 || index_at(i) < index) { | |
1966 append_new(index, 1); | |
1967 } else { | |
1968 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); | |
1969 assert(count_at(i) > 0, "check"); | |
1970 set_count_at(i, count_at(i) + 1); | |
1971 } | |
1972 _ops.push(op); | |
1973 | |
1974 DEBUG_ONLY(verify()); | |
1975 } | |
1976 | |
1977 #ifdef ASSERT | |
1978 void LIR_InsertionBuffer::verify() { | |
1979 int sum = 0; | |
1980 int prev_idx = -1; | |
1981 | |
1982 for (int i = 0; i < number_of_insertion_points(); i++) { | |
1983 assert(prev_idx < index_at(i), "index must be ordered ascending"); | |
1984 sum += count_at(i); | |
1985 } | |
1986 assert(sum == number_of_ops(), "wrong total sum"); | |
1987 } | |
1988 #endif |