annotate src/share/vm/opto/memnode.hpp @ 29:d5fc211aea19

6633953: type2aelembytes{T_ADDRESS} should be 8 bytes in 64 bit VM Summary: T_ADDRESS size is defined as 'int' size (4 bytes) but C2 use it for raw pointers and as memory type for StoreP and LoadP nodes. Reviewed-by: jrose
author kvn
date Mon, 25 Feb 2008 15:05:44 -0800
parents ff5961f4c095
children 3288958bf319
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1 /*
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2 * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 // Portions of code courtesy of Clifford Click
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26
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27 class MultiNode;
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28 class PhaseCCP;
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29 class PhaseTransform;
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30
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31 //------------------------------MemNode----------------------------------------
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32 // Load or Store, possibly throwing a NULL pointer exception
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33 class MemNode : public Node {
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34 protected:
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35 #ifdef ASSERT
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36 const TypePtr* _adr_type; // What kind of memory is being addressed?
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37 #endif
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38 virtual uint size_of() const; // Size is bigger (ASSERT only)
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39 public:
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40 enum { Control, // When is it safe to do this load?
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41 Memory, // Chunk of memory is being loaded from
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42 Address, // Actually address, derived from base
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43 ValueIn, // Value to store
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44 OopStore // Preceeding oop store, only in StoreCM
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45 };
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46 protected:
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47 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at )
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48 : Node(c0,c1,c2 ) {
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49 init_class_id(Class_Mem);
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50 debug_only(_adr_type=at; adr_type();)
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51 }
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52 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 )
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53 : Node(c0,c1,c2,c3) {
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54 init_class_id(Class_Mem);
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55 debug_only(_adr_type=at; adr_type();)
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56 }
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57 MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4)
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58 : Node(c0,c1,c2,c3,c4) {
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59 init_class_id(Class_Mem);
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60 debug_only(_adr_type=at; adr_type();)
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61 }
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62
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63 // Helpers for the optimizer. Documented in memnode.cpp.
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64 static bool detect_ptr_independence(Node* p1, AllocateNode* a1,
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65 Node* p2, AllocateNode* a2,
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66 PhaseTransform* phase);
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67 static bool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast);
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68
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69 public:
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70 // This one should probably be a phase-specific function:
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71 static bool detect_dominating_control(Node* dom, Node* sub);
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72
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73 // Is this Node a MemNode or some descendent? Default is YES.
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74 virtual Node *Ideal_DU_postCCP( PhaseCCP *ccp );
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75
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76 virtual const class TypePtr *adr_type() const; // returns bottom_type of address
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77
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78 // Shared code for Ideal methods:
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79 Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL.
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80
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81 // Helper function for adr_type() implementations.
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82 static const TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL);
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83
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84 // Raw access function, to allow copying of adr_type efficiently in
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85 // product builds and retain the debug info for debug builds.
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86 const TypePtr *raw_adr_type() const {
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87 #ifdef ASSERT
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88 return _adr_type;
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89 #else
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90 return 0;
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91 #endif
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92 }
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93
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94 // Map a load or store opcode to its corresponding store opcode.
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95 // (Return -1 if unknown.)
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96 virtual int store_Opcode() const { return -1; }
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97
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98 // What is the type of the value in memory? (T_VOID mean "unspecified".)
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99 virtual BasicType memory_type() const = 0;
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100 virtual int memory_size() const {
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101 #ifdef ASSERT
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102 return type2aelembytes(memory_type(), true);
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103 #else
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104 return type2aelembytes(memory_type());
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105 #endif
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106 }
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107
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108 // Search through memory states which precede this node (load or store).
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109 // Look for an exact match for the address, with no intervening
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110 // aliased stores.
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111 Node* find_previous_store(PhaseTransform* phase);
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112
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113 // Can this node (load or store) accurately see a stored value in
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114 // the given memory state? (The state may or may not be in(Memory).)
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115 Node* can_see_stored_value(Node* st, PhaseTransform* phase) const;
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116
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117 #ifndef PRODUCT
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118 static void dump_adr_type(const Node* mem, const TypePtr* adr_type, outputStream *st);
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119 virtual void dump_spec(outputStream *st) const;
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120 #endif
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121 };
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122
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123 //------------------------------LoadNode---------------------------------------
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124 // Load value; requires Memory and Address
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125 class LoadNode : public MemNode {
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126 protected:
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127 virtual uint cmp( const Node &n ) const;
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128 virtual uint size_of() const; // Size is bigger
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129 const Type* const _type; // What kind of value is loaded?
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130 public:
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131
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132 LoadNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt )
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133 : MemNode(c,mem,adr,at), _type(rt) {
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134 init_class_id(Class_Load);
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135 }
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136
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137 // Polymorphic factory method:
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138 static LoadNode* make( Compile *C, Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *rt, BasicType bt );
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139
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140 virtual uint hash() const; // Check the type
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141
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142 // Handle algebraic identities here. If we have an identity, return the Node
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143 // we are equivalent to. We look for Load of a Store.
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144 virtual Node *Identity( PhaseTransform *phase );
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145
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146 // If the load is from Field memory and the pointer is non-null, we can
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147 // zero out the control input.
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148 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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149
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150 // Recover original value from boxed values
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151 Node *eliminate_autobox(PhaseGVN *phase);
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152
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153 // Compute a new Type for this node. Basically we just do the pre-check,
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154 // then call the virtual add() to set the type.
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155 virtual const Type *Value( PhaseTransform *phase ) const;
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156
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157 virtual uint ideal_reg() const;
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158 virtual const Type *bottom_type() const;
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159 // Following method is copied from TypeNode:
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160 void set_type(const Type* t) {
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161 assert(t != NULL, "sanity");
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162 debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH);
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163 *(const Type**)&_type = t; // cast away const-ness
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164 // If this node is in the hash table, make sure it doesn't need a rehash.
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165 assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code");
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166 }
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167 const Type* type() const { assert(_type != NULL, "sanity"); return _type; };
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168
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169 // Do not match memory edge
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170 virtual uint match_edge(uint idx) const;
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171
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172 // Map a load opcode to its corresponding store opcode.
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173 virtual int store_Opcode() const = 0;
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174
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175 #ifndef PRODUCT
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176 virtual void dump_spec(outputStream *st) const;
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177 #endif
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178 protected:
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179 const Type* load_array_final_field(const TypeKlassPtr *tkls,
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180 ciKlass* klass) const;
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181 };
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182
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183 //------------------------------LoadBNode--------------------------------------
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184 // Load a byte (8bits signed) from memory
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185 class LoadBNode : public LoadNode {
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186 public:
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187 LoadBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::BYTE )
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188 : LoadNode(c,mem,adr,at,ti) {}
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189 virtual int Opcode() const;
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190 virtual uint ideal_reg() const { return Op_RegI; }
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191 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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192 virtual int store_Opcode() const { return Op_StoreB; }
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193 virtual BasicType memory_type() const { return T_BYTE; }
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194 };
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195
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196 //------------------------------LoadCNode--------------------------------------
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197 // Load a char (16bits unsigned) from memory
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198 class LoadCNode : public LoadNode {
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199 public:
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200 LoadCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
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201 : LoadNode(c,mem,adr,at,ti) {}
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202 virtual int Opcode() const;
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203 virtual uint ideal_reg() const { return Op_RegI; }
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204 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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205 virtual int store_Opcode() const { return Op_StoreC; }
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206 virtual BasicType memory_type() const { return T_CHAR; }
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207 };
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208
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209 //------------------------------LoadINode--------------------------------------
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210 // Load an integer from memory
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211 class LoadINode : public LoadNode {
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212 public:
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213 LoadINode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::INT )
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214 : LoadNode(c,mem,adr,at,ti) {}
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215 virtual int Opcode() const;
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216 virtual uint ideal_reg() const { return Op_RegI; }
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217 virtual int store_Opcode() const { return Op_StoreI; }
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218 virtual BasicType memory_type() const { return T_INT; }
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219 };
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220
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221 //------------------------------LoadRangeNode----------------------------------
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222 // Load an array length from the array
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223 class LoadRangeNode : public LoadINode {
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224 public:
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225 LoadRangeNode( Node *c, Node *mem, Node *adr, const TypeInt *ti = TypeInt::POS )
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226 : LoadINode(c,mem,adr,TypeAryPtr::RANGE,ti) {}
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227 virtual int Opcode() const;
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228 virtual const Type *Value( PhaseTransform *phase ) const;
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229 virtual Node *Identity( PhaseTransform *phase );
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230 };
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231
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232 //------------------------------LoadLNode--------------------------------------
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233 // Load a long from memory
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234 class LoadLNode : public LoadNode {
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235 virtual uint hash() const { return LoadNode::hash() + _require_atomic_access; }
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236 virtual uint cmp( const Node &n ) const {
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237 return _require_atomic_access == ((LoadLNode&)n)._require_atomic_access
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238 && LoadNode::cmp(n);
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239 }
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240 virtual uint size_of() const { return sizeof(*this); }
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241 const bool _require_atomic_access; // is piecewise load forbidden?
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242
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243 public:
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244 LoadLNode( Node *c, Node *mem, Node *adr, const TypePtr* at,
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245 const TypeLong *tl = TypeLong::LONG,
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246 bool require_atomic_access = false )
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247 : LoadNode(c,mem,adr,at,tl)
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248 , _require_atomic_access(require_atomic_access)
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249 {}
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250 virtual int Opcode() const;
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251 virtual uint ideal_reg() const { return Op_RegL; }
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252 virtual int store_Opcode() const { return Op_StoreL; }
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253 virtual BasicType memory_type() const { return T_LONG; }
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254 bool require_atomic_access() { return _require_atomic_access; }
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255 static LoadLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, const Type* rt);
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256 #ifndef PRODUCT
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257 virtual void dump_spec(outputStream *st) const {
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258 LoadNode::dump_spec(st);
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259 if (_require_atomic_access) st->print(" Atomic!");
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260 }
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261 #endif
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262 };
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263
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264 //------------------------------LoadL_unalignedNode----------------------------
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265 // Load a long from unaligned memory
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266 class LoadL_unalignedNode : public LoadLNode {
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267 public:
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268 LoadL_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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269 : LoadLNode(c,mem,adr,at) {}
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270 virtual int Opcode() const;
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271 };
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272
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273 //------------------------------LoadFNode--------------------------------------
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274 // Load a float (64 bits) from memory
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275 class LoadFNode : public LoadNode {
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276 public:
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277 LoadFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::FLOAT )
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278 : LoadNode(c,mem,adr,at,t) {}
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279 virtual int Opcode() const;
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280 virtual uint ideal_reg() const { return Op_RegF; }
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281 virtual int store_Opcode() const { return Op_StoreF; }
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282 virtual BasicType memory_type() const { return T_FLOAT; }
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283 };
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284
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285 //------------------------------LoadDNode--------------------------------------
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286 // Load a double (64 bits) from memory
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287 class LoadDNode : public LoadNode {
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288 public:
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289 LoadDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const Type *t = Type::DOUBLE )
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290 : LoadNode(c,mem,adr,at,t) {}
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291 virtual int Opcode() const;
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292 virtual uint ideal_reg() const { return Op_RegD; }
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293 virtual int store_Opcode() const { return Op_StoreD; }
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294 virtual BasicType memory_type() const { return T_DOUBLE; }
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295 };
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296
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297 //------------------------------LoadD_unalignedNode----------------------------
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298 // Load a double from unaligned memory
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299 class LoadD_unalignedNode : public LoadDNode {
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300 public:
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301 LoadD_unalignedNode( Node *c, Node *mem, Node *adr, const TypePtr* at )
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302 : LoadDNode(c,mem,adr,at) {}
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303 virtual int Opcode() const;
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304 };
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305
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306 //------------------------------LoadPNode--------------------------------------
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307 // Load a pointer from memory (either object or array)
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308 class LoadPNode : public LoadNode {
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309 public:
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310 LoadPNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypePtr* t )
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311 : LoadNode(c,mem,adr,at,t) {}
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312 virtual int Opcode() const;
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313 virtual uint ideal_reg() const { return Op_RegP; }
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314 virtual int store_Opcode() const { return Op_StoreP; }
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315 virtual BasicType memory_type() const { return T_ADDRESS; }
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316 // depends_only_on_test is almost always true, and needs to be almost always
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317 // true to enable key hoisting & commoning optimizations. However, for the
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318 // special case of RawPtr loads from TLS top & end, the control edge carries
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319 // the dependence preventing hoisting past a Safepoint instead of the memory
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320 // edge. (An unfortunate consequence of having Safepoints not set Raw
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321 // Memory; itself an unfortunate consequence of having Nodes which produce
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322 // results (new raw memory state) inside of loops preventing all manner of
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323 // other optimizations). Basically, it's ugly but so is the alternative.
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324 // See comment in macro.cpp, around line 125 expand_allocate_common().
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325 virtual bool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM; }
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326 };
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327
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328 //------------------------------LoadKlassNode----------------------------------
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329 // Load a Klass from an object
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330 class LoadKlassNode : public LoadPNode {
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331 public:
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332 LoadKlassNode( Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk = TypeKlassPtr::OBJECT )
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333 : LoadPNode(c,mem,adr,at,tk) {}
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334 virtual int Opcode() const;
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335 virtual const Type *Value( PhaseTransform *phase ) const;
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336 virtual Node *Identity( PhaseTransform *phase );
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337 virtual bool depends_only_on_test() const { return true; }
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338 };
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339
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340 //------------------------------LoadSNode--------------------------------------
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341 // Load a short (16bits signed) from memory
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342 class LoadSNode : public LoadNode {
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343 public:
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344 LoadSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::SHORT )
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345 : LoadNode(c,mem,adr,at,ti) {}
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346 virtual int Opcode() const;
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347 virtual uint ideal_reg() const { return Op_RegI; }
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348 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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349 virtual int store_Opcode() const { return Op_StoreC; }
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350 virtual BasicType memory_type() const { return T_SHORT; }
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351 };
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352
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353 //------------------------------StoreNode--------------------------------------
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354 // Store value; requires Store, Address and Value
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355 class StoreNode : public MemNode {
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356 protected:
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357 virtual uint cmp( const Node &n ) const;
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358 virtual bool depends_only_on_test() const { return false; }
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359
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360 Node *Ideal_masked_input (PhaseGVN *phase, uint mask);
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361 Node *Ideal_sign_extended_input(PhaseGVN *phase, int num_bits);
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362
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363 public:
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364 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val )
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365 : MemNode(c,mem,adr,at,val) {
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366 init_class_id(Class_Store);
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367 }
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368 StoreNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store )
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369 : MemNode(c,mem,adr,at,val,oop_store) {
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370 init_class_id(Class_Store);
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371 }
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372
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373 // Polymorphic factory method:
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374 static StoreNode* make( Compile *C, Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, BasicType bt );
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375
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376 virtual uint hash() const; // Check the type
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377
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378 // If the store is to Field memory and the pointer is non-null, we can
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379 // zero out the control input.
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380 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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381
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382 // Compute a new Type for this node. Basically we just do the pre-check,
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383 // then call the virtual add() to set the type.
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384 virtual const Type *Value( PhaseTransform *phase ) const;
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385
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386 // Check for identity function on memory (Load then Store at same address)
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387 virtual Node *Identity( PhaseTransform *phase );
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388
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389 // Do not match memory edge
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390 virtual uint match_edge(uint idx) const;
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391
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392 virtual const Type *bottom_type() const; // returns Type::MEMORY
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393
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394 // Map a store opcode to its corresponding own opcode, trivially.
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395 virtual int store_Opcode() const { return Opcode(); }
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396
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397 // have all possible loads of the value stored been optimized away?
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398 bool value_never_loaded(PhaseTransform *phase) const;
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399 };
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400
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401 //------------------------------StoreBNode-------------------------------------
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402 // Store byte to memory
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403 class StoreBNode : public StoreNode {
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404 public:
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405 StoreBNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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406 virtual int Opcode() const;
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407 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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408 virtual BasicType memory_type() const { return T_BYTE; }
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409 };
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410
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411 //------------------------------StoreCNode-------------------------------------
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412 // Store char/short to memory
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413 class StoreCNode : public StoreNode {
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414 public:
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415 StoreCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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416 virtual int Opcode() const;
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417 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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418 virtual BasicType memory_type() const { return T_CHAR; }
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419 };
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420
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421 //------------------------------StoreINode-------------------------------------
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422 // Store int to memory
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423 class StoreINode : public StoreNode {
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424 public:
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425 StoreINode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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426 virtual int Opcode() const;
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427 virtual BasicType memory_type() const { return T_INT; }
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428 };
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429
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430 //------------------------------StoreLNode-------------------------------------
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431 // Store long to memory
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432 class StoreLNode : public StoreNode {
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diff changeset
433 virtual uint hash() const { return StoreNode::hash() + _require_atomic_access; }
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434 virtual uint cmp( const Node &n ) const {
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435 return _require_atomic_access == ((StoreLNode&)n)._require_atomic_access
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436 && StoreNode::cmp(n);
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437 }
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438 virtual uint size_of() const { return sizeof(*this); }
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diff changeset
439 const bool _require_atomic_access; // is piecewise store forbidden?
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440
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441 public:
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442 StoreLNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val,
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443 bool require_atomic_access = false )
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444 : StoreNode(c,mem,adr,at,val)
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445 , _require_atomic_access(require_atomic_access)
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446 {}
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447 virtual int Opcode() const;
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448 virtual BasicType memory_type() const { return T_LONG; }
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449 bool require_atomic_access() { return _require_atomic_access; }
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450 static StoreLNode* make_atomic(Compile *C, Node* ctl, Node* mem, Node* adr, const TypePtr* adr_type, Node* val);
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451 #ifndef PRODUCT
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diff changeset
452 virtual void dump_spec(outputStream *st) const {
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453 StoreNode::dump_spec(st);
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454 if (_require_atomic_access) st->print(" Atomic!");
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455 }
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456 #endif
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457 };
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458
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459 //------------------------------StoreFNode-------------------------------------
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460 // Store float to memory
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461 class StoreFNode : public StoreNode {
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462 public:
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463 StoreFNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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464 virtual int Opcode() const;
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465 virtual BasicType memory_type() const { return T_FLOAT; }
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466 };
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467
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468 //------------------------------StoreDNode-------------------------------------
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469 // Store double to memory
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470 class StoreDNode : public StoreNode {
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471 public:
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472 StoreDNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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473 virtual int Opcode() const;
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474 virtual BasicType memory_type() const { return T_DOUBLE; }
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475 };
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476
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477 //------------------------------StorePNode-------------------------------------
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478 // Store pointer to memory
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479 class StorePNode : public StoreNode {
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480 public:
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481 StorePNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val ) : StoreNode(c,mem,adr,at,val) {}
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482 virtual int Opcode() const;
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483 virtual BasicType memory_type() const { return T_ADDRESS; }
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484 };
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485
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486 //------------------------------StoreCMNode-----------------------------------
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487 // Store card-mark byte to memory for CM
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488 // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store
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489 // Preceeding equivalent StoreCMs may be eliminated.
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490 class StoreCMNode : public StoreNode {
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491 public:
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492 StoreCMNode( Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store ) : StoreNode(c,mem,adr,at,val,oop_store) {}
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493 virtual int Opcode() const;
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494 virtual Node *Identity( PhaseTransform *phase );
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495 virtual const Type *Value( PhaseTransform *phase ) const;
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496 virtual BasicType memory_type() const { return T_VOID; } // unspecific
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497 };
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498
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499 //------------------------------LoadPLockedNode---------------------------------
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500 // Load-locked a pointer from memory (either object or array).
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501 // On Sparc & Intel this is implemented as a normal pointer load.
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502 // On PowerPC and friends it's a real load-locked.
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503 class LoadPLockedNode : public LoadPNode {
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504 public:
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505 LoadPLockedNode( Node *c, Node *mem, Node *adr )
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506 : LoadPNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM) {}
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507 virtual int Opcode() const;
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508 virtual int store_Opcode() const { return Op_StorePConditional; }
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509 virtual bool depends_only_on_test() const { return true; }
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510 };
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511
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512 //------------------------------LoadLLockedNode---------------------------------
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513 // Load-locked a pointer from memory (either object or array).
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514 // On Sparc & Intel this is implemented as a normal long load.
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515 class LoadLLockedNode : public LoadLNode {
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516 public:
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517 LoadLLockedNode( Node *c, Node *mem, Node *adr )
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518 : LoadLNode(c,mem,adr,TypeRawPtr::BOTTOM, TypeLong::LONG) {}
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519 virtual int Opcode() const;
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520 virtual int store_Opcode() const { return Op_StoreLConditional; }
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521 };
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522
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523 //------------------------------SCMemProjNode---------------------------------------
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parents:
diff changeset
524 // This class defines a projection of the memory state of a store conditional node.
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525 // These nodes return a value, but also update memory.
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526 class SCMemProjNode : public ProjNode {
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527 public:
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528 enum {SCMEMPROJCON = (uint)-2};
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529 SCMemProjNode( Node *src) : ProjNode( src, SCMEMPROJCON) { }
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530 virtual int Opcode() const;
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diff changeset
531 virtual bool is_CFG() const { return false; }
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532 virtual const Type *bottom_type() const {return Type::MEMORY;}
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533 virtual const TypePtr *adr_type() const { return in(0)->in(MemNode::Memory)->adr_type();}
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534 virtual uint ideal_reg() const { return 0;} // memory projections don't have a register
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535 virtual const Type *Value( PhaseTransform *phase ) const;
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diff changeset
536 #ifndef PRODUCT
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parents:
diff changeset
537 virtual void dump_spec(outputStream *st) const {};
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diff changeset
538 #endif
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diff changeset
539 };
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diff changeset
540
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parents:
diff changeset
541 //------------------------------LoadStoreNode---------------------------
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542 class LoadStoreNode : public Node {
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543 public:
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diff changeset
544 enum {
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545 ExpectedIn = MemNode::ValueIn+1 // One more input than MemNode
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parents:
diff changeset
546 };
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547 LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex);
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548 virtual bool depends_only_on_test() const { return false; }
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diff changeset
549 virtual const Type *bottom_type() const { return TypeInt::BOOL; }
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550 virtual uint ideal_reg() const { return Op_RegI; }
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551 virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; }
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552 };
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diff changeset
553
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554 //------------------------------StorePConditionalNode---------------------------
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parents:
diff changeset
555 // Conditionally store pointer to memory, if no change since prior
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parents:
diff changeset
556 // load-locked. Sets flags for success or failure of the store.
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parents:
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557 class StorePConditionalNode : public LoadStoreNode {
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558 public:
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diff changeset
559 StorePConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreNode(c, mem, adr, val, ll) { }
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560 virtual int Opcode() const;
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parents:
diff changeset
561 // Produces flags
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diff changeset
562 virtual uint ideal_reg() const { return Op_RegFlags; }
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diff changeset
563 };
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diff changeset
564
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diff changeset
565 //------------------------------StoreLConditionalNode---------------------------
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diff changeset
566 // Conditionally store long to memory, if no change since prior
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parents:
diff changeset
567 // load-locked. Sets flags for success or failure of the store.
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diff changeset
568 class StoreLConditionalNode : public LoadStoreNode {
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parents:
diff changeset
569 public:
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diff changeset
570 StoreLConditionalNode( Node *c, Node *mem, Node *adr, Node *val, Node *ll ) : LoadStoreNode(c, mem, adr, val, ll) { }
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571 virtual int Opcode() const;
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diff changeset
572 };
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diff changeset
573
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574
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parents:
diff changeset
575 //------------------------------CompareAndSwapLNode---------------------------
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576 class CompareAndSwapLNode : public LoadStoreNode {
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diff changeset
577 public:
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diff changeset
578 CompareAndSwapLNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
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diff changeset
579 virtual int Opcode() const;
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580 };
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diff changeset
581
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582
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parents:
diff changeset
583 //------------------------------CompareAndSwapINode---------------------------
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584 class CompareAndSwapINode : public LoadStoreNode {
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diff changeset
585 public:
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586 CompareAndSwapINode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
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587 virtual int Opcode() const;
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588 };
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diff changeset
589
a61af66fc99e Initial load
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diff changeset
590
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parents:
diff changeset
591 //------------------------------CompareAndSwapPNode---------------------------
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parents:
diff changeset
592 class CompareAndSwapPNode : public LoadStoreNode {
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parents:
diff changeset
593 public:
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594 CompareAndSwapPNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex) : LoadStoreNode(c, mem, adr, val, ex) { }
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595 virtual int Opcode() const;
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diff changeset
596 };
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parents:
diff changeset
597
a61af66fc99e Initial load
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parents:
diff changeset
598 //------------------------------ClearArray-------------------------------------
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parents:
diff changeset
599 class ClearArrayNode: public Node {
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diff changeset
600 public:
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diff changeset
601 ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base ) : Node(ctrl,arymem,word_cnt,base) {}
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parents:
diff changeset
602 virtual int Opcode() const;
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diff changeset
603 virtual const Type *bottom_type() const { return Type::MEMORY; }
a61af66fc99e Initial load
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parents:
diff changeset
604 // ClearArray modifies array elements, and so affects only the
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parents:
diff changeset
605 // array memory addressed by the bottom_type of its base address.
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diff changeset
606 virtual const class TypePtr *adr_type() const;
a61af66fc99e Initial load
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parents:
diff changeset
607 virtual Node *Identity( PhaseTransform *phase );
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parents:
diff changeset
608 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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parents:
diff changeset
609 virtual uint match_edge(uint idx) const;
a61af66fc99e Initial load
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parents:
diff changeset
610
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parents:
diff changeset
611 // Clear the given area of an object or array.
a61af66fc99e Initial load
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parents:
diff changeset
612 // The start offset must always be aligned mod BytesPerInt.
a61af66fc99e Initial load
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parents:
diff changeset
613 // The end offset must always be aligned mod BytesPerLong.
a61af66fc99e Initial load
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parents:
diff changeset
614 // Return the new memory.
a61af66fc99e Initial load
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parents:
diff changeset
615 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
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parents:
diff changeset
616 intptr_t start_offset,
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parents:
diff changeset
617 intptr_t end_offset,
a61af66fc99e Initial load
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parents:
diff changeset
618 PhaseGVN* phase);
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parents:
diff changeset
619 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
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parents:
diff changeset
620 intptr_t start_offset,
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parents:
diff changeset
621 Node* end_offset,
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parents:
diff changeset
622 PhaseGVN* phase);
a61af66fc99e Initial load
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parents:
diff changeset
623 static Node* clear_memory(Node* control, Node* mem, Node* dest,
a61af66fc99e Initial load
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parents:
diff changeset
624 Node* start_offset,
a61af66fc99e Initial load
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parents:
diff changeset
625 Node* end_offset,
a61af66fc99e Initial load
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parents:
diff changeset
626 PhaseGVN* phase);
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parents:
diff changeset
627 };
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parents:
diff changeset
628
a61af66fc99e Initial load
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parents:
diff changeset
629 //------------------------------StrComp-------------------------------------
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parents:
diff changeset
630 class StrCompNode: public Node {
a61af66fc99e Initial load
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parents:
diff changeset
631 public:
a61af66fc99e Initial load
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parents:
diff changeset
632 StrCompNode(Node *control,
a61af66fc99e Initial load
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parents:
diff changeset
633 Node* char_array_mem,
a61af66fc99e Initial load
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parents:
diff changeset
634 Node* value_mem,
a61af66fc99e Initial load
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parents:
diff changeset
635 Node* count_mem,
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parents:
diff changeset
636 Node* offset_mem,
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parents:
diff changeset
637 Node* s1, Node* s2): Node(control,
a61af66fc99e Initial load
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parents:
diff changeset
638 char_array_mem,
a61af66fc99e Initial load
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parents:
diff changeset
639 value_mem,
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parents:
diff changeset
640 count_mem,
a61af66fc99e Initial load
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parents:
diff changeset
641 offset_mem,
a61af66fc99e Initial load
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parents:
diff changeset
642 s1, s2) {};
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parents:
diff changeset
643 virtual int Opcode() const;
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parents:
diff changeset
644 virtual bool depends_only_on_test() const { return false; }
a61af66fc99e Initial load
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parents:
diff changeset
645 virtual const Type* bottom_type() const { return TypeInt::INT; }
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parents:
diff changeset
646 // a StrCompNode (conservatively) aliases with everything:
a61af66fc99e Initial load
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parents:
diff changeset
647 virtual const TypePtr* adr_type() const { return TypePtr::BOTTOM; }
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parents:
diff changeset
648 virtual uint match_edge(uint idx) const;
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649 virtual uint ideal_reg() const { return Op_RegI; }
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650 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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651 };
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652
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653 //------------------------------MemBar-----------------------------------------
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diff changeset
654 // There are different flavors of Memory Barriers to match the Java Memory
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diff changeset
655 // Model. Monitor-enter and volatile-load act as Aquires: no following ref
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diff changeset
656 // can be moved to before them. We insert a MemBar-Acquire after a FastLock or
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diff changeset
657 // volatile-load. Monitor-exit and volatile-store act as Release: no
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parents:
diff changeset
658 // preceeding ref can be moved to after them. We insert a MemBar-Release
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diff changeset
659 // before a FastUnlock or volatile-store. All volatiles need to be
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diff changeset
660 // serialized, so we follow all volatile-stores with a MemBar-Volatile to
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661 // seperate it from any following volatile-load.
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662 class MemBarNode: public MultiNode {
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663 virtual uint hash() const ; // { return NO_HASH; }
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664 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
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parents:
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665
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666 virtual uint size_of() const { return sizeof(*this); }
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parents:
diff changeset
667 // Memory type this node is serializing. Usually either rawptr or bottom.
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668 const TypePtr* _adr_type;
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diff changeset
669
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670 public:
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671 enum {
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672 Precedent = TypeFunc::Parms // optional edge to force precedence
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673 };
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parents:
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674 MemBarNode(Compile* C, int alias_idx, Node* precedent);
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675 virtual int Opcode() const = 0;
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676 virtual const class TypePtr *adr_type() const { return _adr_type; }
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677 virtual const Type *Value( PhaseTransform *phase ) const;
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678 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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679 virtual uint match_edge(uint idx) const { return 0; }
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680 virtual const Type *bottom_type() const { return TypeTuple::MEMBAR; }
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681 virtual Node *match( const ProjNode *proj, const Matcher *m );
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parents:
diff changeset
682 // Factory method. Builds a wide or narrow membar.
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diff changeset
683 // Optional 'precedent' becomes an extra edge if not null.
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diff changeset
684 static MemBarNode* make(Compile* C, int opcode,
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685 int alias_idx = Compile::AliasIdxBot,
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686 Node* precedent = NULL);
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687 };
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688
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parents:
diff changeset
689 // "Acquire" - no following ref can move before (but earlier refs can
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parents:
diff changeset
690 // follow, like an early Load stalled in cache). Requires multi-cpu
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diff changeset
691 // visibility. Inserted after a volatile load or FastLock.
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parents:
diff changeset
692 class MemBarAcquireNode: public MemBarNode {
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693 public:
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diff changeset
694 MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent)
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695 : MemBarNode(C, alias_idx, precedent) {}
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696 virtual int Opcode() const;
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697 };
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698
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699 // "Release" - no earlier ref can move after (but later refs can move
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parents:
diff changeset
700 // up, like a speculative pipelined cache-hitting Load). Requires
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parents:
diff changeset
701 // multi-cpu visibility. Inserted before a volatile store or FastUnLock.
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diff changeset
702 class MemBarReleaseNode: public MemBarNode {
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703 public:
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704 MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent)
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705 : MemBarNode(C, alias_idx, precedent) {}
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706 virtual int Opcode() const;
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707 };
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708
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parents:
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709 // Ordering between a volatile store and a following volatile load.
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parents:
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710 // Requires multi-CPU visibility?
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parents:
diff changeset
711 class MemBarVolatileNode: public MemBarNode {
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712 public:
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parents:
diff changeset
713 MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent)
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714 : MemBarNode(C, alias_idx, precedent) {}
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715 virtual int Opcode() const;
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diff changeset
716 };
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717
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parents:
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718 // Ordering within the same CPU. Used to order unsafe memory references
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parents:
diff changeset
719 // inside the compiler when we lack alias info. Not needed "outside" the
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720 // compiler because the CPU does all the ordering for us.
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721 class MemBarCPUOrderNode: public MemBarNode {
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722 public:
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parents:
diff changeset
723 MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent)
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parents:
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724 : MemBarNode(C, alias_idx, precedent) {}
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725 virtual int Opcode() const;
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726 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
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727 };
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728
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parents:
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729 // Isolation of object setup after an AllocateNode and before next safepoint.
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parents:
diff changeset
730 // (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.)
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parents:
diff changeset
731 class InitializeNode: public MemBarNode {
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parents:
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732 friend class AllocateNode;
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parents:
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733
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parents:
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734 bool _is_complete;
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735
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parents:
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736 public:
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737 enum {
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parents:
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738 Control = TypeFunc::Control,
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parents:
diff changeset
739 Memory = TypeFunc::Memory, // MergeMem for states affected by this op
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parents:
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740 RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address
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parents:
diff changeset
741 RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP)
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parents:
diff changeset
742 };
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parents:
diff changeset
743
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parents:
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744 InitializeNode(Compile* C, int adr_type, Node* rawoop);
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parents:
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745 virtual int Opcode() const;
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diff changeset
746 virtual uint size_of() const { return sizeof(*this); }
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parents:
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747 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
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parents:
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748 virtual const RegMask &in_RegMask(uint) const; // mask for RawAddress
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749
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parents:
diff changeset
750 // Manage incoming memory edges via a MergeMem on in(Memory):
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diff changeset
751 Node* memory(uint alias_idx);
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752
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parents:
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753 // The raw memory edge coming directly from the Allocation.
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parents:
diff changeset
754 // The contents of this memory are *always* all-zero-bits.
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755 Node* zero_memory() { return memory(Compile::AliasIdxRaw); }
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756
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parents:
diff changeset
757 // Return the corresponding allocation for this initialization (or null if none).
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parents:
diff changeset
758 // (Note: Both InitializeNode::allocation and AllocateNode::initialization
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parents:
diff changeset
759 // are defined in graphKit.cpp, which sets up the bidirectional relation.)
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760 AllocateNode* allocation();
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761
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parents:
diff changeset
762 // Anything other than zeroing in this init?
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763 bool is_non_zero();
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764
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parents:
diff changeset
765 // An InitializeNode must completed before macro expansion is done.
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parents:
diff changeset
766 // Completion requires that the AllocateNode must be followed by
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parents:
diff changeset
767 // initialization of the new memory to zero, then to any initializers.
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768 bool is_complete() { return _is_complete; }
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parents:
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769
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parents:
diff changeset
770 // Mark complete. (Must not yet be complete.)
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771 void set_complete(PhaseGVN* phase);
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parents:
diff changeset
772
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parents:
diff changeset
773 #ifdef ASSERT
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parents:
diff changeset
774 // ensure all non-degenerate stores are ordered and non-overlapping
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parents:
diff changeset
775 bool stores_are_sane(PhaseTransform* phase);
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parents:
diff changeset
776 #endif //ASSERT
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parents:
diff changeset
777
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parents:
diff changeset
778 // See if this store can be captured; return offset where it initializes.
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parents:
diff changeset
779 // Return 0 if the store cannot be moved (any sort of problem).
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780 intptr_t can_capture_store(StoreNode* st, PhaseTransform* phase);
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781
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parents:
diff changeset
782 // Capture another store; reformat it to write my internal raw memory.
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parents:
diff changeset
783 // Return the captured copy, else NULL if there is some sort of problem.
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parents:
diff changeset
784 Node* capture_store(StoreNode* st, intptr_t start, PhaseTransform* phase);
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parents:
diff changeset
785
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parents:
diff changeset
786 // Find captured store which corresponds to the range [start..start+size).
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parents:
diff changeset
787 // Return my own memory projection (meaning the initial zero bits)
a61af66fc99e Initial load
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parents:
diff changeset
788 // if there is no such store. Return NULL if there is a problem.
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diff changeset
789 Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase);
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parents:
diff changeset
790
a61af66fc99e Initial load
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parents:
diff changeset
791 // Called when the associated AllocateNode is expanded into CFG.
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parents:
diff changeset
792 Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr,
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parents:
diff changeset
793 intptr_t header_size, Node* size_in_bytes,
a61af66fc99e Initial load
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parents:
diff changeset
794 PhaseGVN* phase);
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diff changeset
795
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796 private:
a61af66fc99e Initial load
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parents:
diff changeset
797 void remove_extra_zeroes();
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diff changeset
798
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parents:
diff changeset
799 // Find out where a captured store should be placed (or already is placed).
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diff changeset
800 int captured_store_insertion_point(intptr_t start, int size_in_bytes,
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diff changeset
801 PhaseTransform* phase);
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parents:
diff changeset
802
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parents:
diff changeset
803 static intptr_t get_store_offset(Node* st, PhaseTransform* phase);
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diff changeset
804
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diff changeset
805 Node* make_raw_address(intptr_t offset, PhaseTransform* phase);
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diff changeset
806
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parents:
diff changeset
807 bool detect_init_independence(Node* n, bool st_is_pinned, int& count);
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parents:
diff changeset
808
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parents:
diff changeset
809 void coalesce_subword_stores(intptr_t header_size, Node* size_in_bytes,
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parents:
diff changeset
810 PhaseGVN* phase);
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parents:
diff changeset
811
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parents:
diff changeset
812 intptr_t find_next_fullword_store(uint i, PhaseGVN* phase);
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diff changeset
813 };
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diff changeset
814
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parents:
diff changeset
815 //------------------------------MergeMem---------------------------------------
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parents:
diff changeset
816 // (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.)
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parents:
diff changeset
817 class MergeMemNode: public Node {
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parents:
diff changeset
818 virtual uint hash() const ; // { return NO_HASH; }
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parents:
diff changeset
819 virtual uint cmp( const Node &n ) const ; // Always fail, except on self
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parents:
diff changeset
820 friend class MergeMemStream;
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parents:
diff changeset
821 MergeMemNode(Node* def); // clients use MergeMemNode::make
a61af66fc99e Initial load
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parents:
diff changeset
822
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diff changeset
823 public:
a61af66fc99e Initial load
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parents:
diff changeset
824 // If the input is a whole memory state, clone it with all its slices intact.
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parents:
diff changeset
825 // Otherwise, make a new memory state with just that base memory input.
a61af66fc99e Initial load
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parents:
diff changeset
826 // In either case, the result is a newly created MergeMem.
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parents:
diff changeset
827 static MergeMemNode* make(Compile* C, Node* base_memory);
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828
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parents:
diff changeset
829 virtual int Opcode() const;
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parents:
diff changeset
830 virtual Node *Identity( PhaseTransform *phase );
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diff changeset
831 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
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diff changeset
832 virtual uint ideal_reg() const { return NotAMachineReg; }
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diff changeset
833 virtual uint match_edge(uint idx) const { return 0; }
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diff changeset
834 virtual const RegMask &out_RegMask() const;
a61af66fc99e Initial load
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parents:
diff changeset
835 virtual const Type *bottom_type() const { return Type::MEMORY; }
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parents:
diff changeset
836 virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
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parents:
diff changeset
837 // sparse accessors
a61af66fc99e Initial load
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parents:
diff changeset
838 // Fetch the previously stored "set_memory_at", or else the base memory.
a61af66fc99e Initial load
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parents:
diff changeset
839 // (Caller should clone it if it is a phi-nest.)
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diff changeset
840 Node* memory_at(uint alias_idx) const;
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parents:
diff changeset
841 // set the memory, regardless of its previous value
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parents:
diff changeset
842 void set_memory_at(uint alias_idx, Node* n);
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parents:
diff changeset
843 // the "base" is the memory that provides the non-finite support
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parents:
diff changeset
844 Node* base_memory() const { return in(Compile::AliasIdxBot); }
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parents:
diff changeset
845 // warning: setting the base can implicitly set any of the other slices too
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diff changeset
846 void set_base_memory(Node* def);
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parents:
diff changeset
847 // sentinel value which denotes a copy of the base memory:
a61af66fc99e Initial load
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parents:
diff changeset
848 Node* empty_memory() const { return in(Compile::AliasIdxTop); }
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parents:
diff changeset
849 static Node* make_empty_memory(); // where the sentinel comes from
a61af66fc99e Initial load
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850 bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); }
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parents:
diff changeset
851 // hook for the iterator, to perform any necessary setup
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parents:
diff changeset
852 void iteration_setup(const MergeMemNode* other = NULL);
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parents:
diff changeset
853 // push sentinels until I am at least as long as the other (semantic no-op)
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diff changeset
854 void grow_to_match(const MergeMemNode* other);
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diff changeset
855 bool verify_sparse() const PRODUCT_RETURN0;
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parents:
diff changeset
856 #ifndef PRODUCT
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parents:
diff changeset
857 virtual void dump_spec(outputStream *st) const;
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parents:
diff changeset
858 #endif
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parents:
diff changeset
859 };
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parents:
diff changeset
860
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parents:
diff changeset
861 class MergeMemStream : public StackObj {
a61af66fc99e Initial load
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parents:
diff changeset
862 private:
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parents:
diff changeset
863 MergeMemNode* _mm;
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parents:
diff changeset
864 const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations
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parents:
diff changeset
865 Node* _mm_base; // loop-invariant base memory of _mm
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parents:
diff changeset
866 int _idx;
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parents:
diff changeset
867 int _cnt;
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parents:
diff changeset
868 Node* _mem;
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parents:
diff changeset
869 Node* _mem2;
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parents:
diff changeset
870 int _cnt2;
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parents:
diff changeset
871
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parents:
diff changeset
872 void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) {
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parents:
diff changeset
873 // subsume_node will break sparseness at times, whenever a memory slice
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parents:
diff changeset
874 // folds down to a copy of the base ("fat") memory. In such a case,
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parents:
diff changeset
875 // the raw edge will update to base, although it should be top.
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parents:
diff changeset
876 // This iterator will recognize either top or base_memory as an
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parents:
diff changeset
877 // "empty" slice. See is_empty, is_empty2, and next below.
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parents:
diff changeset
878 //
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parents:
diff changeset
879 // The sparseness property is repaired in MergeMemNode::Ideal.
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parents:
diff changeset
880 // As long as access to a MergeMem goes through this iterator
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parents:
diff changeset
881 // or the memory_at accessor, flaws in the sparseness will
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parents:
diff changeset
882 // never be observed.
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parents:
diff changeset
883 //
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parents:
diff changeset
884 // Also, iteration_setup repairs sparseness.
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parents:
diff changeset
885 assert(mm->verify_sparse(), "please, no dups of base");
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parents:
diff changeset
886 assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base");
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parents:
diff changeset
887
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parents:
diff changeset
888 _mm = mm;
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parents:
diff changeset
889 _mm_base = mm->base_memory();
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parents:
diff changeset
890 _mm2 = mm2;
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parents:
diff changeset
891 _cnt = mm->req();
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parents:
diff changeset
892 _idx = Compile::AliasIdxBot-1; // start at the base memory
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parents:
diff changeset
893 _mem = NULL;
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parents:
diff changeset
894 _mem2 = NULL;
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parents:
diff changeset
895 }
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parents:
diff changeset
896
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parents:
diff changeset
897 #ifdef ASSERT
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parents:
diff changeset
898 Node* check_memory() const {
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parents:
diff changeset
899 if (at_base_memory())
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parents:
diff changeset
900 return _mm->base_memory();
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parents:
diff changeset
901 else if ((uint)_idx < _mm->req() && !_mm->in(_idx)->is_top())
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parents:
diff changeset
902 return _mm->memory_at(_idx);
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parents:
diff changeset
903 else
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parents:
diff changeset
904 return _mm_base;
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parents:
diff changeset
905 }
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parents:
diff changeset
906 Node* check_memory2() const {
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parents:
diff changeset
907 return at_base_memory()? _mm2->base_memory(): _mm2->memory_at(_idx);
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parents:
diff changeset
908 }
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parents:
diff changeset
909 #endif
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parents:
diff changeset
910
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parents:
diff changeset
911 static bool match_memory(Node* mem, const MergeMemNode* mm, int idx) PRODUCT_RETURN0;
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parents:
diff changeset
912 void assert_synch() const {
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parents:
diff changeset
913 assert(!_mem || _idx >= _cnt || match_memory(_mem, _mm, _idx),
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parents:
diff changeset
914 "no side-effects except through the stream");
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parents:
diff changeset
915 }
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parents:
diff changeset
916
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parents:
diff changeset
917 public:
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parents:
diff changeset
918
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parents:
diff changeset
919 // expected usages:
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parents:
diff changeset
920 // for (MergeMemStream mms(mem->is_MergeMem()); next_non_empty(); ) { ... }
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parents:
diff changeset
921 // for (MergeMemStream mms(mem1, mem2); next_non_empty2(); ) { ... }
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parents:
diff changeset
922
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parents:
diff changeset
923 // iterate over one merge
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parents:
diff changeset
924 MergeMemStream(MergeMemNode* mm) {
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parents:
diff changeset
925 mm->iteration_setup();
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parents:
diff changeset
926 init(mm);
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parents:
diff changeset
927 debug_only(_cnt2 = 999);
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parents:
diff changeset
928 }
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duke
parents:
diff changeset
929 // iterate in parallel over two merges
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parents:
diff changeset
930 // only iterates through non-empty elements of mm2
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parents:
diff changeset
931 MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) {
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parents:
diff changeset
932 assert(mm2, "second argument must be a MergeMem also");
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parents:
diff changeset
933 ((MergeMemNode*)mm2)->iteration_setup(); // update hidden state
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parents:
diff changeset
934 mm->iteration_setup(mm2);
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parents:
diff changeset
935 init(mm, mm2);
a61af66fc99e Initial load
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parents:
diff changeset
936 _cnt2 = mm2->req();
a61af66fc99e Initial load
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parents:
diff changeset
937 }
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parents:
diff changeset
938 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
939 ~MergeMemStream() {
a61af66fc99e Initial load
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parents:
diff changeset
940 assert_synch();
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parents:
diff changeset
941 }
a61af66fc99e Initial load
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parents:
diff changeset
942 #endif
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parents:
diff changeset
943
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parents:
diff changeset
944 MergeMemNode* all_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
945 return _mm;
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parents:
diff changeset
946 }
a61af66fc99e Initial load
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parents:
diff changeset
947 Node* base_memory() const {
a61af66fc99e Initial load
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parents:
diff changeset
948 assert(_mm_base == _mm->base_memory(), "no update to base memory, please");
a61af66fc99e Initial load
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parents:
diff changeset
949 return _mm_base;
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parents:
diff changeset
950 }
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parents:
diff changeset
951 const MergeMemNode* all_memory2() const {
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parents:
diff changeset
952 assert(_mm2 != NULL, "");
a61af66fc99e Initial load
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parents:
diff changeset
953 return _mm2;
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parents:
diff changeset
954 }
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parents:
diff changeset
955 bool at_base_memory() const {
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parents:
diff changeset
956 return _idx == Compile::AliasIdxBot;
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parents:
diff changeset
957 }
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parents:
diff changeset
958 int alias_idx() const {
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parents:
diff changeset
959 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
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parents:
diff changeset
960 return _idx;
a61af66fc99e Initial load
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parents:
diff changeset
961 }
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duke
parents:
diff changeset
962
a61af66fc99e Initial load
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parents:
diff changeset
963 const TypePtr* adr_type() const {
a61af66fc99e Initial load
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parents:
diff changeset
964 return Compile::current()->get_adr_type(alias_idx());
a61af66fc99e Initial load
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parents:
diff changeset
965 }
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duke
parents:
diff changeset
966
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parents:
diff changeset
967 const TypePtr* adr_type(Compile* C) const {
a61af66fc99e Initial load
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parents:
diff changeset
968 return C->get_adr_type(alias_idx());
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parents:
diff changeset
969 }
a61af66fc99e Initial load
duke
parents:
diff changeset
970 bool is_empty() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
971 assert(_mem, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
972 assert(_mem->is_top() == (_mem==_mm->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
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parents:
diff changeset
973 return _mem->is_top();
a61af66fc99e Initial load
duke
parents:
diff changeset
974 }
a61af66fc99e Initial load
duke
parents:
diff changeset
975 bool is_empty2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
976 assert(_mem2, "must call next 1st");
a61af66fc99e Initial load
duke
parents:
diff changeset
977 assert(_mem2->is_top() == (_mem2==_mm2->empty_memory()), "correct sentinel");
a61af66fc99e Initial load
duke
parents:
diff changeset
978 return _mem2->is_top();
a61af66fc99e Initial load
duke
parents:
diff changeset
979 }
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duke
parents:
diff changeset
980 Node* memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
981 assert(!is_empty(), "must not be empty");
a61af66fc99e Initial load
duke
parents:
diff changeset
982 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
983 return _mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
984 }
a61af66fc99e Initial load
duke
parents:
diff changeset
985 // get the current memory, regardless of empty or non-empty status
a61af66fc99e Initial load
duke
parents:
diff changeset
986 Node* force_memory() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
987 assert(!is_empty() || !at_base_memory(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
988 // Use _mm_base to defend against updates to _mem->base_memory().
a61af66fc99e Initial load
duke
parents:
diff changeset
989 Node *mem = _mem->is_top() ? _mm_base : _mem;
a61af66fc99e Initial load
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parents:
diff changeset
990 assert(mem == check_memory(), "");
a61af66fc99e Initial load
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parents:
diff changeset
991 return mem;
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parents:
diff changeset
992 }
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parents:
diff changeset
993 Node* memory2() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
994 assert(_mem2 == check_memory2(), "");
a61af66fc99e Initial load
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parents:
diff changeset
995 return _mem2;
a61af66fc99e Initial load
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parents:
diff changeset
996 }
a61af66fc99e Initial load
duke
parents:
diff changeset
997 void set_memory(Node* mem) {
a61af66fc99e Initial load
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parents:
diff changeset
998 if (at_base_memory()) {
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duke
parents:
diff changeset
999 // Note that this does not change the invariant _mm_base.
a61af66fc99e Initial load
duke
parents:
diff changeset
1000 _mm->set_base_memory(mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
1001 } else {
a61af66fc99e Initial load
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parents:
diff changeset
1002 _mm->set_memory_at(_idx, mem);
a61af66fc99e Initial load
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parents:
diff changeset
1003 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1004 _mem = mem;
a61af66fc99e Initial load
duke
parents:
diff changeset
1005 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1006 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1007
a61af66fc99e Initial load
duke
parents:
diff changeset
1008 // Recover from a side effect to the MergeMemNode.
a61af66fc99e Initial load
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parents:
diff changeset
1009 void set_memory() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1010 _mem = _mm->in(_idx);
a61af66fc99e Initial load
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parents:
diff changeset
1011 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1012
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 bool next() { return next(false); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 bool next2() { return next(true); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1015
a61af66fc99e Initial load
duke
parents:
diff changeset
1016 bool next_non_empty() { return next_non_empty(false); }
a61af66fc99e Initial load
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parents:
diff changeset
1017 bool next_non_empty2() { return next_non_empty(true); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1018 // next_non_empty2 can yield states where is_empty() is true
a61af66fc99e Initial load
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parents:
diff changeset
1019
a61af66fc99e Initial load
duke
parents:
diff changeset
1020 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1021 // find the next item, which might be empty
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 bool next(bool have_mm2) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1023 assert((_mm2 != NULL) == have_mm2, "use other next");
a61af66fc99e Initial load
duke
parents:
diff changeset
1024 assert_synch();
a61af66fc99e Initial load
duke
parents:
diff changeset
1025 if (++_idx < _cnt) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1026 // Note: This iterator allows _mm to be non-sparse.
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 // It behaves the same whether _mem is top or base_memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
1028 _mem = _mm->in(_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1029 if (have_mm2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 _mem2 = _mm2->in((_idx < _cnt2) ? _idx : Compile::AliasIdxTop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1031 return true;
a61af66fc99e Initial load
duke
parents:
diff changeset
1032 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1033 return false;
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1035
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 // find the next non-empty item
a61af66fc99e Initial load
duke
parents:
diff changeset
1037 bool next_non_empty(bool have_mm2) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1038 while (next(have_mm2)) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1039 if (!is_empty()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1040 // make sure _mem2 is filled in sensibly
a61af66fc99e Initial load
duke
parents:
diff changeset
1041 if (have_mm2 && _mem2->is_top()) _mem2 = _mm2->base_memory();
a61af66fc99e Initial load
duke
parents:
diff changeset
1042 return true;
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 } else if (have_mm2 && !is_empty2()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1044 return true; // is_empty() == true
a61af66fc99e Initial load
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parents:
diff changeset
1045 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1046 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1047 return false;
a61af66fc99e Initial load
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parents:
diff changeset
1048 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1049 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1050
a61af66fc99e Initial load
duke
parents:
diff changeset
1051 //------------------------------Prefetch---------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1052
a61af66fc99e Initial load
duke
parents:
diff changeset
1053 // Non-faulting prefetch load. Prefetch for many reads.
a61af66fc99e Initial load
duke
parents:
diff changeset
1054 class PrefetchReadNode : public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
1055 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1056 PrefetchReadNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1057 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1058 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1059 virtual uint match_edge(uint idx) const { return idx==2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1060 virtual const Type *bottom_type() const { return Type::ABIO; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1061 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1062
a61af66fc99e Initial load
duke
parents:
diff changeset
1063 // Non-faulting prefetch load. Prefetch for many reads & many writes.
a61af66fc99e Initial load
duke
parents:
diff changeset
1064 class PrefetchWriteNode : public Node {
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1066 PrefetchWriteNode(Node *abio, Node *adr) : Node(0,abio,adr) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1067 virtual int Opcode() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1068 virtual uint ideal_reg() const { return NotAMachineReg; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1069 virtual uint match_edge(uint idx) const { return idx==2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1070 virtual const Type *bottom_type() const { return Type::ABIO; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1071 };