annotate src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp @ 6725:da91efe96a93

6964458: Reimplement class meta-data storage to use native memory Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland Contributed-by: jmasa <jon.masamitsu@oracle.com>, stefank <stefan.karlsson@oracle.com>, mgerdin <mikael.gerdin@oracle.com>, never <tom.rodriguez@oracle.com>
author coleenp
date Sat, 01 Sep 2012 13:25:18 -0400
parents e2fe93124108
children 8a02ca5e5576
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1 /*
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2 * Copyright (c) 2005, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "c1/c1_Compilation.hpp"
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27 #include "c1/c1_FrameMap.hpp"
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28 #include "c1/c1_Instruction.hpp"
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29 #include "c1/c1_LIRAssembler.hpp"
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30 #include "c1/c1_LIRGenerator.hpp"
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31 #include "c1/c1_Runtime1.hpp"
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32 #include "c1/c1_ValueStack.hpp"
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33 #include "ci/ciArray.hpp"
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34 #include "ci/ciObjArrayKlass.hpp"
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35 #include "ci/ciTypeArrayKlass.hpp"
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36 #include "runtime/sharedRuntime.hpp"
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37 #include "runtime/stubRoutines.hpp"
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38 #include "vmreg_sparc.inline.hpp"
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40 #ifdef ASSERT
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41 #define __ gen()->lir(__FILE__, __LINE__)->
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42 #else
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43 #define __ gen()->lir()->
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44 #endif
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45
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46 void LIRItem::load_byte_item() {
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47 // byte loads use same registers as other loads
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48 load_item();
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49 }
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50
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51
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52 void LIRItem::load_nonconstant() {
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53 LIR_Opr r = value()->operand();
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54 if (_gen->can_inline_as_constant(value())) {
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55 if (!r->is_constant()) {
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56 r = LIR_OprFact::value_type(value()->type());
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57 }
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58 _result = r;
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59 } else {
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60 load_item();
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61 }
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62 }
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63
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64
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65 //--------------------------------------------------------------
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66 // LIRGenerator
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67 //--------------------------------------------------------------
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68
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69 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; }
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70 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; }
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71 LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); }
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72 LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(T_INT); }
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73
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74 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
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75 LIR_Opr opr;
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76 switch (type->tag()) {
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77 case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break;
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78 case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break;
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79 case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
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80 case floatTag: opr = FrameMap::F0_opr; break;
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81 case doubleTag: opr = FrameMap::F0_double_opr; break;
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82
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83 case addressTag:
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84 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
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85 }
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86
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87 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
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88 return opr;
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89 }
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90
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91 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
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92 LIR_Opr reg = new_register(type);
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93 set_vreg_flag(reg, callee_saved);
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94 return reg;
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95 }
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96
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97
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98 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
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99 return new_register(T_INT);
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100 }
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101
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102
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103
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104
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105
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106 //--------- loading items into registers --------------------------------
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107
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108 // SPARC cannot inline all constants
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109 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
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110 if (v->type()->as_IntConstant() != NULL) {
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111 return v->type()->as_IntConstant()->value() == 0;
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112 } else if (v->type()->as_LongConstant() != NULL) {
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113 return v->type()->as_LongConstant()->value() == 0L;
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114 } else if (v->type()->as_ObjectConstant() != NULL) {
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115 return v->type()->as_ObjectConstant()->value()->is_null_object();
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116 } else {
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117 return false;
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118 }
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119 }
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120
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121
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122 // only simm13 constants can be inlined
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123 bool LIRGenerator:: can_inline_as_constant(Value i) const {
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124 if (i->type()->as_IntConstant() != NULL) {
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125 return Assembler::is_simm13(i->type()->as_IntConstant()->value());
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126 } else {
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127 return can_store_as_constant(i, as_BasicType(i->type()));
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128 }
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129 }
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130
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131
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132 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
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133 if (c->type() == T_INT) {
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134 return Assembler::is_simm13(c->as_jint());
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135 }
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136 return false;
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137 }
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138
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139
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140 LIR_Opr LIRGenerator::safepoint_poll_register() {
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141 return new_register(T_INT);
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142 }
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143
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144
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145
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146 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
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147 int shift, int disp, BasicType type) {
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148 assert(base->is_register(), "must be");
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149
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150 // accumulate fixed displacements
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151 if (index->is_constant()) {
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152 disp += index->as_constant_ptr()->as_jint() << shift;
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153 index = LIR_OprFact::illegalOpr;
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154 }
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155
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156 if (index->is_register()) {
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157 // apply the shift and accumulate the displacement
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158 if (shift > 0) {
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159 LIR_Opr tmp = new_pointer_register();
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160 __ shift_left(index, shift, tmp);
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161 index = tmp;
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162 }
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163 if (disp != 0) {
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164 LIR_Opr tmp = new_pointer_register();
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165 if (Assembler::is_simm13(disp)) {
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166 __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
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167 index = tmp;
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168 } else {
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169 __ move(LIR_OprFact::intptrConst(disp), tmp);
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170 __ add(tmp, index, tmp);
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171 index = tmp;
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172 }
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173 disp = 0;
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174 }
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175 } else if (disp != 0 && !Assembler::is_simm13(disp)) {
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176 // index is illegal so replace it with the displacement loaded into a register
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177 index = new_pointer_register();
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178 __ move(LIR_OprFact::intptrConst(disp), index);
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179 disp = 0;
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180 }
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181
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182 // at this point we either have base + index or base + displacement
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183 if (disp == 0) {
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184 return new LIR_Address(base, index, type);
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185 } else {
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186 assert(Assembler::is_simm13(disp), "must be");
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187 return new LIR_Address(base, disp, type);
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188 }
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189 }
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190
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191
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192 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
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193 BasicType type, bool needs_card_mark) {
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194 int elem_size = type2aelembytes(type);
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195 int shift = exact_log2(elem_size);
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196
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197 LIR_Opr base_opr;
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198 int offset = arrayOopDesc::base_offset_in_bytes(type);
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199
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200 if (index_opr->is_constant()) {
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201 int i = index_opr->as_constant_ptr()->as_jint();
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202 int array_offset = i * elem_size;
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203 if (Assembler::is_simm13(array_offset + offset)) {
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204 base_opr = array_opr;
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205 offset = array_offset + offset;
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206 } else {
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207 base_opr = new_pointer_register();
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208 if (Assembler::is_simm13(array_offset)) {
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209 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
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210 } else {
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211 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
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212 __ add(base_opr, array_opr, base_opr);
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213 }
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214 }
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215 } else {
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216 #ifdef _LP64
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217 if (index_opr->type() == T_INT) {
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218 LIR_Opr tmp = new_register(T_LONG);
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219 __ convert(Bytecodes::_i2l, index_opr, tmp);
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220 index_opr = tmp;
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221 }
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222 #endif
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223
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224 base_opr = new_pointer_register();
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225 assert (index_opr->is_register(), "Must be register");
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226 if (shift > 0) {
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227 __ shift_left(index_opr, shift, base_opr);
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228 __ add(base_opr, array_opr, base_opr);
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229 } else {
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230 __ add(index_opr, array_opr, base_opr);
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231 }
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232 }
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233 if (needs_card_mark) {
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234 LIR_Opr ptr = new_pointer_register();
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235 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
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236 return new LIR_Address(ptr, type);
0
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237 } else {
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238 return new LIR_Address(base_opr, offset, type);
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239 }
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240 }
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241
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242 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
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243 LIR_Opr r;
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244 if (type == T_LONG) {
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245 r = LIR_OprFact::longConst(x);
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246 } else if (type == T_INT) {
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247 r = LIR_OprFact::intConst(x);
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248 } else {
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249 ShouldNotReachHere();
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250 }
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251 if (!Assembler::is_simm13(x)) {
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252 LIR_Opr tmp = new_register(type);
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253 __ move(r, tmp);
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254 return tmp;
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255 }
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256 return r;
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257 }
0
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258
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259 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
0
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260 LIR_Opr pointer = new_pointer_register();
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261 __ move(LIR_OprFact::intptrConst(counter), pointer);
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262 LIR_Address* addr = new LIR_Address(pointer, type);
0
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263 increment_counter(addr, step);
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264 }
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265
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266 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
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267 LIR_Opr temp = new_register(addr->type());
0
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268 __ move(addr, temp);
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269 __ add(temp, load_immediate(step, addr->type()), temp);
0
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270 __ move(temp, addr);
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271 }
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272
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273 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
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274 LIR_Opr o7opr = FrameMap::O7_opr;
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275 __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
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276 __ cmp(condition, o7opr, c);
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277 }
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278
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279
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280 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
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281 LIR_Opr o7opr = FrameMap::O7_opr;
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282 __ load(new LIR_Address(base, disp, type), o7opr, info);
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283 __ cmp(condition, reg, o7opr);
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284 }
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285
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286
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287 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
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288 LIR_Opr o7opr = FrameMap::O7_opr;
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289 __ load(new LIR_Address(base, disp, type), o7opr, info);
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290 __ cmp(condition, reg, o7opr);
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291 }
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292
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293
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294 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
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295 assert(left != result, "should be different registers");
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296 if (is_power_of_2(c + 1)) {
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297 __ shift_left(left, log2_intptr(c + 1), result);
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298 __ sub(result, left, result);
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299 return true;
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300 } else if (is_power_of_2(c - 1)) {
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301 __ shift_left(left, log2_intptr(c - 1), result);
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302 __ add(result, left, result);
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303 return true;
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304 }
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305 return false;
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306 }
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307
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308
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309 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
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310 BasicType t = item->type();
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311 LIR_Opr sp_opr = FrameMap::SP_opr;
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312 if ((t == T_LONG || t == T_DOUBLE) &&
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313 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
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314 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
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315 } else {
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316 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
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317 }
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318 }
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319
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320 //----------------------------------------------------------------------
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321 // visitor functions
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322 //----------------------------------------------------------------------
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323
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324
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325 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
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326 assert(x->is_pinned(),"");
0
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327 bool needs_range_check = true;
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328 bool use_length = x->length() != NULL;
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329 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
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330 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
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parents: 3249
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331 !get_jobject_constant(x->value())->is_null_object() ||
5cceda753a4a 7091764: Tiered: enable aastore profiling
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diff changeset
332 x->should_profile());
0
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333
a61af66fc99e Initial load
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334 LIRItem array(x->array(), this);
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335 LIRItem index(x->index(), this);
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336 LIRItem value(x->value(), this);
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337 LIRItem length(this);
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338
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339 array.load_item();
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340 index.load_nonconstant();
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341
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342 if (use_length) {
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343 needs_range_check = x->compute_needs_range_check();
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344 if (needs_range_check) {
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345 length.set_instruction(x->length());
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346 length.load_item();
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347 }
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348 }
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349 if (needs_store_check) {
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350 value.load_item();
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351 } else {
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352 value.load_for_store(x->elt_type());
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353 }
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354
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355 set_no_result(x);
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356
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357 // the CodeEmitInfo must be duplicated for each different
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358 // LIR-instruction because spilling can occur anywhere between two
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359 // instructions and so the debug information must be different
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360 CodeEmitInfo* range_check_info = state_for(x);
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361 CodeEmitInfo* null_check_info = NULL;
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362 if (x->needs_null_check()) {
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363 null_check_info = new CodeEmitInfo(range_check_info);
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364 }
a61af66fc99e Initial load
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365
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366 // emit array address setup early so it schedules better
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367 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
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368
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369 if (GenerateRangeChecks && needs_range_check) {
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370 if (use_length) {
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371 __ cmp(lir_cond_belowEqual, length.result(), index.result());
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372 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
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373 } else {
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374 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
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375 // range_check also does the null check
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376 null_check_info = NULL;
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377 }
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378 }
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379
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diff changeset
380 if (GenerateArrayStoreCheck && needs_store_check) {
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381 LIR_Opr tmp1 = FrameMap::G1_opr;
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382 LIR_Opr tmp2 = FrameMap::G3_opr;
a61af66fc99e Initial load
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383 LIR_Opr tmp3 = FrameMap::G5_opr;
a61af66fc99e Initial load
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384
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385 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
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parents: 3249
diff changeset
386 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
0
a61af66fc99e Initial load
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387 }
a61af66fc99e Initial load
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parents:
diff changeset
388
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
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parents: 29
diff changeset
389 if (obj_store) {
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
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parents: 29
diff changeset
390 // Needs GC write barriers.
3249
e1162778c1c8 7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents: 2089
diff changeset
391 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
e1162778c1c8 7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents: 2089
diff changeset
392 true /* do_load */, false /* patch */, NULL);
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
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parents: 29
diff changeset
393 }
0
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394 __ move(value.result(), array_addr, null_check_info);
a61af66fc99e Initial load
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parents:
diff changeset
395 if (obj_store) {
819
c6386080541b 6849574: VM crash using NonBlockingHashMap (high_scale_lib)
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parents: 362
diff changeset
396 // Precise card mark
0
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397 post_barrier(LIR_OprFact::address(array_addr), value.result());
a61af66fc99e Initial load
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398 }
a61af66fc99e Initial load
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399 }
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400
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diff changeset
401
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402 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
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f02a8bbe6ed4 6986046: C1 valuestack cleanup
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parents: 1791
diff changeset
403 assert(x->is_pinned(),"");
0
a61af66fc99e Initial load
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parents:
diff changeset
404 LIRItem obj(x->obj(), this);
a61af66fc99e Initial load
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parents:
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405 obj.load_item();
a61af66fc99e Initial load
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diff changeset
406
a61af66fc99e Initial load
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407 set_no_result(x);
a61af66fc99e Initial load
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408
a61af66fc99e Initial load
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diff changeset
409 LIR_Opr lock = FrameMap::G1_opr;
a61af66fc99e Initial load
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diff changeset
410 LIR_Opr scratch = FrameMap::G3_opr;
a61af66fc99e Initial load
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411 LIR_Opr hdr = FrameMap::G4_opr;
a61af66fc99e Initial load
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412
a61af66fc99e Initial load
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diff changeset
413 CodeEmitInfo* info_for_exception = NULL;
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diff changeset
414 if (x->needs_null_check()) {
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f02a8bbe6ed4 6986046: C1 valuestack cleanup
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parents: 1791
diff changeset
415 info_for_exception = state_for(x);
0
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parents:
diff changeset
416 }
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parents:
diff changeset
417
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parents:
diff changeset
418 // this CodeEmitInfo must not have the xhandlers because here the
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parents:
diff changeset
419 // object is already locked (xhandlers expects object to be unlocked)
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parents:
diff changeset
420 CodeEmitInfo* info = state_for(x, x->state(), true);
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parents:
diff changeset
421 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
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parents:
diff changeset
422 }
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parents:
diff changeset
423
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parents:
diff changeset
424
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parents:
diff changeset
425 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1791
diff changeset
426 assert(x->is_pinned(),"");
0
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parents:
diff changeset
427 LIRItem obj(x->obj(), this);
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parents:
diff changeset
428 obj.dont_load_item();
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parents:
diff changeset
429
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parents:
diff changeset
430 set_no_result(x);
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parents:
diff changeset
431 LIR_Opr lock = FrameMap::G1_opr;
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parents:
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432 LIR_Opr hdr = FrameMap::G3_opr;
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parents:
diff changeset
433 LIR_Opr obj_temp = FrameMap::G4_opr;
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
434 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
0
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parents:
diff changeset
435 }
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parents:
diff changeset
436
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parents:
diff changeset
437
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parents:
diff changeset
438 // _ineg, _lneg, _fneg, _dneg
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parents:
diff changeset
439 void LIRGenerator::do_NegateOp(NegateOp* x) {
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parents:
diff changeset
440 LIRItem value(x->x(), this);
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parents:
diff changeset
441 value.load_item();
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parents:
diff changeset
442 LIR_Opr reg = rlock_result(x);
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parents:
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443 __ negate(value.result(), reg);
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parents:
diff changeset
444 }
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parents:
diff changeset
445
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parents:
diff changeset
446
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parents:
diff changeset
447
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parents:
diff changeset
448 // for _fadd, _fmul, _fsub, _fdiv, _frem
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parents:
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449 // _dadd, _dmul, _dsub, _ddiv, _drem
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parents:
diff changeset
450 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
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parents:
diff changeset
451 switch (x->op()) {
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parents:
diff changeset
452 case Bytecodes::_fadd:
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parents:
diff changeset
453 case Bytecodes::_fmul:
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parents:
diff changeset
454 case Bytecodes::_fsub:
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parents:
diff changeset
455 case Bytecodes::_fdiv:
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parents:
diff changeset
456 case Bytecodes::_dadd:
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parents:
diff changeset
457 case Bytecodes::_dmul:
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parents:
diff changeset
458 case Bytecodes::_dsub:
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parents:
diff changeset
459 case Bytecodes::_ddiv: {
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parents:
diff changeset
460 LIRItem left(x->x(), this);
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parents:
diff changeset
461 LIRItem right(x->y(), this);
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parents:
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462 left.load_item();
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parents:
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463 right.load_item();
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parents:
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464 rlock_result(x);
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parents:
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465 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
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parents:
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466 }
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467 break;
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parents:
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468
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parents:
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469 case Bytecodes::_frem:
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parents:
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470 case Bytecodes::_drem: {
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471 address entry;
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parents:
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472 switch (x->op()) {
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parents:
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473 case Bytecodes::_frem:
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parents:
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474 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
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parents:
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475 break;
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parents:
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476 case Bytecodes::_drem:
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parents:
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477 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
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parents:
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478 break;
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parents:
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479 default:
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parents:
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480 ShouldNotReachHere();
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parents:
diff changeset
481 }
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parents:
diff changeset
482 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
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parents:
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483 set_result(x, result);
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parents:
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484 }
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parents:
diff changeset
485 break;
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parents:
diff changeset
486
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parents:
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487 default: ShouldNotReachHere();
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parents:
diff changeset
488 }
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parents:
diff changeset
489 }
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parents:
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490
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parents:
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491
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parents:
diff changeset
492 // for _ladd, _lmul, _lsub, _ldiv, _lrem
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parents:
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493 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
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parents:
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494 switch (x->op()) {
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parents:
diff changeset
495 case Bytecodes::_lrem:
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parents:
diff changeset
496 case Bytecodes::_lmul:
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parents:
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497 case Bytecodes::_ldiv: {
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parents:
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498
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parents:
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499 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
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parents:
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500 LIRItem right(x->y(), this);
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parents:
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501 right.load_item();
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parents:
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502
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parents:
diff changeset
503 CodeEmitInfo* info = state_for(x);
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parents:
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504 LIR_Opr item = right.result();
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parents:
diff changeset
505 assert(item->is_register(), "must be");
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parents:
diff changeset
506 __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
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parents:
diff changeset
507 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
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parents:
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508 }
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parents:
diff changeset
509
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parents:
diff changeset
510 address entry;
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parents:
diff changeset
511 switch (x->op()) {
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parents:
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512 case Bytecodes::_lrem:
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parents:
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513 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
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parents:
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514 break; // check if dividend is 0 is done elsewhere
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parents:
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515 case Bytecodes::_ldiv:
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parents:
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516 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
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parents:
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517 break; // check if dividend is 0 is done elsewhere
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parents:
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518 case Bytecodes::_lmul:
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parents:
diff changeset
519 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
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520 break;
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parents:
diff changeset
521 default:
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parents:
diff changeset
522 ShouldNotReachHere();
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parents:
diff changeset
523 }
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parents:
diff changeset
524
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parents:
diff changeset
525 // order of arguments to runtime call is reversed.
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parents:
diff changeset
526 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
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parents:
diff changeset
527 set_result(x, result);
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parents:
diff changeset
528 break;
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parents:
diff changeset
529 }
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parents:
diff changeset
530 case Bytecodes::_ladd:
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parents:
diff changeset
531 case Bytecodes::_lsub: {
a61af66fc99e Initial load
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parents:
diff changeset
532 LIRItem left(x->x(), this);
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parents:
diff changeset
533 LIRItem right(x->y(), this);
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parents:
diff changeset
534 left.load_item();
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parents:
diff changeset
535 right.load_item();
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parents:
diff changeset
536 rlock_result(x);
a61af66fc99e Initial load
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parents:
diff changeset
537
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parents:
diff changeset
538 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
a61af66fc99e Initial load
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parents:
diff changeset
539 break;
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parents:
diff changeset
540 }
a61af66fc99e Initial load
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parents:
diff changeset
541 default: ShouldNotReachHere();
a61af66fc99e Initial load
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parents:
diff changeset
542 }
a61af66fc99e Initial load
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parents:
diff changeset
543 }
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parents:
diff changeset
544
a61af66fc99e Initial load
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parents:
diff changeset
545
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parents:
diff changeset
546 // Returns if item is an int constant that can be represented by a simm13
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parents:
diff changeset
547 static bool is_simm13(LIR_Opr item) {
a61af66fc99e Initial load
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parents:
diff changeset
548 if (item->is_constant() && item->type() == T_INT) {
a61af66fc99e Initial load
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parents:
diff changeset
549 return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
a61af66fc99e Initial load
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parents:
diff changeset
550 } else {
a61af66fc99e Initial load
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parents:
diff changeset
551 return false;
a61af66fc99e Initial load
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parents:
diff changeset
552 }
a61af66fc99e Initial load
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parents:
diff changeset
553 }
a61af66fc99e Initial load
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parents:
diff changeset
554
a61af66fc99e Initial load
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parents:
diff changeset
555
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parents:
diff changeset
556 // for: _iadd, _imul, _isub, _idiv, _irem
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parents:
diff changeset
557 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
a61af66fc99e Initial load
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parents:
diff changeset
558 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
a61af66fc99e Initial load
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parents:
diff changeset
559 LIRItem left(x->x(), this);
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parents:
diff changeset
560 LIRItem right(x->y(), this);
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parents:
diff changeset
561 // missing test if instr is commutative and if we should swap
a61af66fc99e Initial load
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parents:
diff changeset
562 right.load_nonconstant();
a61af66fc99e Initial load
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parents:
diff changeset
563 assert(right.is_constant() || right.is_register(), "wrong state of right");
a61af66fc99e Initial load
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parents:
diff changeset
564 left.load_item();
a61af66fc99e Initial load
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parents:
diff changeset
565 rlock_result(x);
a61af66fc99e Initial load
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parents:
diff changeset
566 if (is_div_rem) {
a61af66fc99e Initial load
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parents:
diff changeset
567 CodeEmitInfo* info = state_for(x);
a61af66fc99e Initial load
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parents:
diff changeset
568 LIR_Opr tmp = FrameMap::G1_opr;
a61af66fc99e Initial load
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parents:
diff changeset
569 if (x->op() == Bytecodes::_irem) {
a61af66fc99e Initial load
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parents:
diff changeset
570 __ irem(left.result(), right.result(), x->operand(), tmp, info);
a61af66fc99e Initial load
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parents:
diff changeset
571 } else if (x->op() == Bytecodes::_idiv) {
a61af66fc99e Initial load
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parents:
diff changeset
572 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
a61af66fc99e Initial load
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parents:
diff changeset
573 }
a61af66fc99e Initial load
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parents:
diff changeset
574 } else {
a61af66fc99e Initial load
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parents:
diff changeset
575 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
a61af66fc99e Initial load
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parents:
diff changeset
576 }
a61af66fc99e Initial load
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parents:
diff changeset
577 }
a61af66fc99e Initial load
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parents:
diff changeset
578
a61af66fc99e Initial load
duke
parents:
diff changeset
579
a61af66fc99e Initial load
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parents:
diff changeset
580 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
a61af66fc99e Initial load
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parents:
diff changeset
581 ValueTag tag = x->type()->tag();
a61af66fc99e Initial load
duke
parents:
diff changeset
582 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
a61af66fc99e Initial load
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parents:
diff changeset
583 switch (tag) {
a61af66fc99e Initial load
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parents:
diff changeset
584 case floatTag:
a61af66fc99e Initial load
duke
parents:
diff changeset
585 case doubleTag: do_ArithmeticOp_FPU(x); return;
a61af66fc99e Initial load
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parents:
diff changeset
586 case longTag: do_ArithmeticOp_Long(x); return;
a61af66fc99e Initial load
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parents:
diff changeset
587 case intTag: do_ArithmeticOp_Int(x); return;
a61af66fc99e Initial load
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parents:
diff changeset
588 }
a61af66fc99e Initial load
duke
parents:
diff changeset
589 ShouldNotReachHere();
a61af66fc99e Initial load
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parents:
diff changeset
590 }
a61af66fc99e Initial load
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parents:
diff changeset
591
a61af66fc99e Initial load
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parents:
diff changeset
592
a61af66fc99e Initial load
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parents:
diff changeset
593 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
a61af66fc99e Initial load
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parents:
diff changeset
594 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
a61af66fc99e Initial load
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parents:
diff changeset
595 LIRItem value(x->x(), this);
a61af66fc99e Initial load
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parents:
diff changeset
596 LIRItem count(x->y(), this);
a61af66fc99e Initial load
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parents:
diff changeset
597 // Long shift destroys count register
a61af66fc99e Initial load
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parents:
diff changeset
598 if (value.type()->is_long()) {
a61af66fc99e Initial load
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parents:
diff changeset
599 count.set_destroys_register();
a61af66fc99e Initial load
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parents:
diff changeset
600 }
a61af66fc99e Initial load
duke
parents:
diff changeset
601 value.load_item();
a61af66fc99e Initial load
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parents:
diff changeset
602 // the old backend doesn't support this
a61af66fc99e Initial load
duke
parents:
diff changeset
603 if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
604 jint c = count.get_jint_constant() & 0x1f;
a61af66fc99e Initial load
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parents:
diff changeset
605 assert(c >= 0 && c < 32, "should be small");
a61af66fc99e Initial load
duke
parents:
diff changeset
606 count.dont_load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
607 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
608 count.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
609 }
a61af66fc99e Initial load
duke
parents:
diff changeset
610 LIR_Opr reg = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
611 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
a61af66fc99e Initial load
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parents:
diff changeset
612 }
a61af66fc99e Initial load
duke
parents:
diff changeset
613
a61af66fc99e Initial load
duke
parents:
diff changeset
614
a61af66fc99e Initial load
duke
parents:
diff changeset
615 // _iand, _land, _ior, _lor, _ixor, _lxor
a61af66fc99e Initial load
duke
parents:
diff changeset
616 void LIRGenerator::do_LogicOp(LogicOp* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
617 LIRItem left(x->x(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
618 LIRItem right(x->y(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
619
a61af66fc99e Initial load
duke
parents:
diff changeset
620 left.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
621 right.load_nonconstant();
a61af66fc99e Initial load
duke
parents:
diff changeset
622 LIR_Opr reg = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
623
a61af66fc99e Initial load
duke
parents:
diff changeset
624 logic_op(x->op(), reg, left.result(), right.result());
a61af66fc99e Initial load
duke
parents:
diff changeset
625 }
a61af66fc99e Initial load
duke
parents:
diff changeset
626
a61af66fc99e Initial load
duke
parents:
diff changeset
627
a61af66fc99e Initial load
duke
parents:
diff changeset
628
a61af66fc99e Initial load
duke
parents:
diff changeset
629 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
a61af66fc99e Initial load
duke
parents:
diff changeset
630 void LIRGenerator::do_CompareOp(CompareOp* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
631 LIRItem left(x->x(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
632 LIRItem right(x->y(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
633 left.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
634 right.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
635 LIR_Opr reg = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
636 if (x->x()->type()->is_float_kind()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
637 Bytecodes::Code code = x->op();
a61af66fc99e Initial load
duke
parents:
diff changeset
638 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
a61af66fc99e Initial load
duke
parents:
diff changeset
639 } else if (x->x()->type()->tag() == longTag) {
a61af66fc99e Initial load
duke
parents:
diff changeset
640 __ lcmp2int(left.result(), right.result(), reg);
a61af66fc99e Initial load
duke
parents:
diff changeset
641 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
642 Unimplemented();
a61af66fc99e Initial load
duke
parents:
diff changeset
643 }
a61af66fc99e Initial load
duke
parents:
diff changeset
644 }
a61af66fc99e Initial load
duke
parents:
diff changeset
645
a61af66fc99e Initial load
duke
parents:
diff changeset
646
a61af66fc99e Initial load
duke
parents:
diff changeset
647 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
648 assert(x->number_of_arguments() == 4, "wrong type");
a61af66fc99e Initial load
duke
parents:
diff changeset
649 LIRItem obj (x->argument_at(0), this); // object
a61af66fc99e Initial load
duke
parents:
diff changeset
650 LIRItem offset(x->argument_at(1), this); // offset of field
a61af66fc99e Initial load
duke
parents:
diff changeset
651 LIRItem cmp (x->argument_at(2), this); // value to compare with field
a61af66fc99e Initial load
duke
parents:
diff changeset
652 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
a61af66fc99e Initial load
duke
parents:
diff changeset
653
a61af66fc99e Initial load
duke
parents:
diff changeset
654 // Use temps to avoid kills
a61af66fc99e Initial load
duke
parents:
diff changeset
655 LIR_Opr t1 = FrameMap::G1_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
656 LIR_Opr t2 = FrameMap::G3_opr;
1873
07a218de38cb 6992477: fix for 6991512 broke sparc barriers
never
parents: 1848
diff changeset
657 LIR_Opr addr = new_pointer_register();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
658
a61af66fc99e Initial load
duke
parents:
diff changeset
659 // get address of field
a61af66fc99e Initial load
duke
parents:
diff changeset
660 obj.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
661 offset.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
662 cmp.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
663 val.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
664
a61af66fc99e Initial load
duke
parents:
diff changeset
665 __ add(obj.result(), offset.result(), addr);
a61af66fc99e Initial load
duke
parents:
diff changeset
666
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 29
diff changeset
667 if (type == objectType) { // Write-barrier needed for Object fields.
3249
e1162778c1c8 7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents: 2089
diff changeset
668 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
e1162778c1c8 7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents: 2089
diff changeset
669 true /* do_load */, false /* patch */, NULL);
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 29
diff changeset
670 }
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 29
diff changeset
671
0
a61af66fc99e Initial load
duke
parents:
diff changeset
672 if (type == objectType)
a61af66fc99e Initial load
duke
parents:
diff changeset
673 __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
a61af66fc99e Initial load
duke
parents:
diff changeset
674 else if (type == intType)
a61af66fc99e Initial load
duke
parents:
diff changeset
675 __ cas_int(addr, cmp.result(), val.result(), t1, t2);
a61af66fc99e Initial load
duke
parents:
diff changeset
676 else if (type == longType)
a61af66fc99e Initial load
duke
parents:
diff changeset
677 __ cas_long(addr, cmp.result(), val.result(), t1, t2);
a61af66fc99e Initial load
duke
parents:
diff changeset
678 else {
a61af66fc99e Initial load
duke
parents:
diff changeset
679 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
680 }
a61af66fc99e Initial load
duke
parents:
diff changeset
681 // generate conditional move of boolean result
a61af66fc99e Initial load
duke
parents:
diff changeset
682 LIR_Opr result = rlock_result(x);
2089
037c727f35fb 7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents: 1972
diff changeset
683 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
037c727f35fb 7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents: 1972
diff changeset
684 result, as_BasicType(type));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
685 if (type == objectType) { // Write-barrier needed for Object fields.
819
c6386080541b 6849574: VM crash using NonBlockingHashMap (high_scale_lib)
never
parents: 362
diff changeset
686 // Precise card mark since could either be object or array
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 29
diff changeset
687 post_barrier(addr, val.result());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
688 }
a61af66fc99e Initial load
duke
parents:
diff changeset
689 }
a61af66fc99e Initial load
duke
parents:
diff changeset
690
a61af66fc99e Initial load
duke
parents:
diff changeset
691
a61af66fc99e Initial load
duke
parents:
diff changeset
692 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
693 switch (x->id()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
694 case vmIntrinsics::_dabs:
a61af66fc99e Initial load
duke
parents:
diff changeset
695 case vmIntrinsics::_dsqrt: {
a61af66fc99e Initial load
duke
parents:
diff changeset
696 assert(x->number_of_arguments() == 1, "wrong type");
a61af66fc99e Initial load
duke
parents:
diff changeset
697 LIRItem value(x->argument_at(0), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
698 value.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
699 LIR_Opr dst = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
700
a61af66fc99e Initial load
duke
parents:
diff changeset
701 switch (x->id()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
702 case vmIntrinsics::_dsqrt: {
a61af66fc99e Initial load
duke
parents:
diff changeset
703 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
a61af66fc99e Initial load
duke
parents:
diff changeset
704 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
705 }
a61af66fc99e Initial load
duke
parents:
diff changeset
706 case vmIntrinsics::_dabs: {
a61af66fc99e Initial load
duke
parents:
diff changeset
707 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
a61af66fc99e Initial load
duke
parents:
diff changeset
708 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
709 }
a61af66fc99e Initial load
duke
parents:
diff changeset
710 }
a61af66fc99e Initial load
duke
parents:
diff changeset
711 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
712 }
a61af66fc99e Initial load
duke
parents:
diff changeset
713 case vmIntrinsics::_dlog10: // fall through
a61af66fc99e Initial load
duke
parents:
diff changeset
714 case vmIntrinsics::_dlog: // fall through
a61af66fc99e Initial load
duke
parents:
diff changeset
715 case vmIntrinsics::_dsin: // fall through
a61af66fc99e Initial load
duke
parents:
diff changeset
716 case vmIntrinsics::_dtan: // fall through
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
717 case vmIntrinsics::_dcos: // fall through
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
718 case vmIntrinsics::_dexp: {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
719 assert(x->number_of_arguments() == 1, "wrong type");
a61af66fc99e Initial load
duke
parents:
diff changeset
720
a61af66fc99e Initial load
duke
parents:
diff changeset
721 address runtime_entry = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
722 switch (x->id()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
723 case vmIntrinsics::_dsin:
a61af66fc99e Initial load
duke
parents:
diff changeset
724 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
a61af66fc99e Initial load
duke
parents:
diff changeset
725 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
726 case vmIntrinsics::_dcos:
a61af66fc99e Initial load
duke
parents:
diff changeset
727 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
a61af66fc99e Initial load
duke
parents:
diff changeset
728 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
729 case vmIntrinsics::_dtan:
a61af66fc99e Initial load
duke
parents:
diff changeset
730 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
a61af66fc99e Initial load
duke
parents:
diff changeset
731 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
732 case vmIntrinsics::_dlog:
a61af66fc99e Initial load
duke
parents:
diff changeset
733 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
a61af66fc99e Initial load
duke
parents:
diff changeset
734 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
735 case vmIntrinsics::_dlog10:
a61af66fc99e Initial load
duke
parents:
diff changeset
736 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
a61af66fc99e Initial load
duke
parents:
diff changeset
737 break;
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
738 case vmIntrinsics::_dexp:
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
739 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
740 break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
741 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
742 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
743 }
a61af66fc99e Initial load
duke
parents:
diff changeset
744
a61af66fc99e Initial load
duke
parents:
diff changeset
745 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
746 set_result(x, result);
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
747 break;
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
748 }
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
749 case vmIntrinsics::_dpow: {
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
750 assert(x->number_of_arguments() == 2, "wrong type");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
751 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
752 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
753 set_result(x, result);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 3957
diff changeset
754 break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
755 }
a61af66fc99e Initial load
duke
parents:
diff changeset
756 }
a61af66fc99e Initial load
duke
parents:
diff changeset
757 }
a61af66fc99e Initial load
duke
parents:
diff changeset
758
a61af66fc99e Initial load
duke
parents:
diff changeset
759
a61af66fc99e Initial load
duke
parents:
diff changeset
760 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
761 assert(x->number_of_arguments() == 5, "wrong type");
928
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
762
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
763 // Make all state_for calls early since they can emit code
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
764 CodeEmitInfo* info = state_for(x, x->state());
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
765
0
a61af66fc99e Initial load
duke
parents:
diff changeset
766 // Note: spill caller save before setting the item
a61af66fc99e Initial load
duke
parents:
diff changeset
767 LIRItem src (x->argument_at(0), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
768 LIRItem src_pos (x->argument_at(1), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
769 LIRItem dst (x->argument_at(2), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
770 LIRItem dst_pos (x->argument_at(3), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
771 LIRItem length (x->argument_at(4), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
772 // load all values in callee_save_registers, as this makes the
a61af66fc99e Initial load
duke
parents:
diff changeset
773 // parameter passing to the fast case simpler
a61af66fc99e Initial load
duke
parents:
diff changeset
774 src.load_item_force (rlock_callee_saved(T_OBJECT));
a61af66fc99e Initial load
duke
parents:
diff changeset
775 src_pos.load_item_force (rlock_callee_saved(T_INT));
a61af66fc99e Initial load
duke
parents:
diff changeset
776 dst.load_item_force (rlock_callee_saved(T_OBJECT));
a61af66fc99e Initial load
duke
parents:
diff changeset
777 dst_pos.load_item_force (rlock_callee_saved(T_INT));
a61af66fc99e Initial load
duke
parents:
diff changeset
778 length.load_item_force (rlock_callee_saved(T_INT));
a61af66fc99e Initial load
duke
parents:
diff changeset
779
a61af66fc99e Initial load
duke
parents:
diff changeset
780 int flags;
a61af66fc99e Initial load
duke
parents:
diff changeset
781 ciArrayKlass* expected_type;
a61af66fc99e Initial load
duke
parents:
diff changeset
782 arraycopy_helper(x, &flags, &expected_type);
a61af66fc99e Initial load
duke
parents:
diff changeset
783
a61af66fc99e Initial load
duke
parents:
diff changeset
784 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
a61af66fc99e Initial load
duke
parents:
diff changeset
785 length.result(), rlock_callee_saved(T_INT),
a61af66fc99e Initial load
duke
parents:
diff changeset
786 expected_type, flags, info);
a61af66fc99e Initial load
duke
parents:
diff changeset
787 set_no_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
788 }
a61af66fc99e Initial load
duke
parents:
diff changeset
789
a61af66fc99e Initial load
duke
parents:
diff changeset
790 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
a61af66fc99e Initial load
duke
parents:
diff changeset
791 // _i2b, _i2c, _i2s
a61af66fc99e Initial load
duke
parents:
diff changeset
792 void LIRGenerator::do_Convert(Convert* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
793
a61af66fc99e Initial load
duke
parents:
diff changeset
794 switch (x->op()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
795 case Bytecodes::_f2l:
a61af66fc99e Initial load
duke
parents:
diff changeset
796 case Bytecodes::_d2l:
a61af66fc99e Initial load
duke
parents:
diff changeset
797 case Bytecodes::_d2i:
a61af66fc99e Initial load
duke
parents:
diff changeset
798 case Bytecodes::_l2f:
a61af66fc99e Initial load
duke
parents:
diff changeset
799 case Bytecodes::_l2d: {
a61af66fc99e Initial load
duke
parents:
diff changeset
800
a61af66fc99e Initial load
duke
parents:
diff changeset
801 address entry;
a61af66fc99e Initial load
duke
parents:
diff changeset
802 switch (x->op()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
803 case Bytecodes::_l2f:
a61af66fc99e Initial load
duke
parents:
diff changeset
804 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
a61af66fc99e Initial load
duke
parents:
diff changeset
805 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
806 case Bytecodes::_l2d:
a61af66fc99e Initial load
duke
parents:
diff changeset
807 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
a61af66fc99e Initial load
duke
parents:
diff changeset
808 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
809 case Bytecodes::_f2l:
a61af66fc99e Initial load
duke
parents:
diff changeset
810 entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
a61af66fc99e Initial load
duke
parents:
diff changeset
811 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
812 case Bytecodes::_d2l:
a61af66fc99e Initial load
duke
parents:
diff changeset
813 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
a61af66fc99e Initial load
duke
parents:
diff changeset
814 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
815 case Bytecodes::_d2i:
a61af66fc99e Initial load
duke
parents:
diff changeset
816 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
a61af66fc99e Initial load
duke
parents:
diff changeset
817 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
818 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
819 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
820 }
a61af66fc99e Initial load
duke
parents:
diff changeset
821 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
822 set_result(x, result);
a61af66fc99e Initial load
duke
parents:
diff changeset
823 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
824 }
a61af66fc99e Initial load
duke
parents:
diff changeset
825
a61af66fc99e Initial load
duke
parents:
diff changeset
826 case Bytecodes::_i2f:
a61af66fc99e Initial load
duke
parents:
diff changeset
827 case Bytecodes::_i2d: {
a61af66fc99e Initial load
duke
parents:
diff changeset
828 LIRItem value(x->value(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
829
a61af66fc99e Initial load
duke
parents:
diff changeset
830 LIR_Opr reg = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
831 // To convert an int to double, we need to load the 32-bit int
a61af66fc99e Initial load
duke
parents:
diff changeset
832 // from memory into a single precision floating point register
a61af66fc99e Initial load
duke
parents:
diff changeset
833 // (even numbered). Then the sparc fitod instruction takes care
a61af66fc99e Initial load
duke
parents:
diff changeset
834 // of the conversion. This is a bit ugly, but is the best way to
a61af66fc99e Initial load
duke
parents:
diff changeset
835 // get the int value in a single precision floating point register
a61af66fc99e Initial load
duke
parents:
diff changeset
836 value.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
837 LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
a61af66fc99e Initial load
duke
parents:
diff changeset
838 __ convert(x->op(), tmp, reg);
a61af66fc99e Initial load
duke
parents:
diff changeset
839 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
840 }
a61af66fc99e Initial load
duke
parents:
diff changeset
841 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
842
a61af66fc99e Initial load
duke
parents:
diff changeset
843 case Bytecodes::_i2l:
a61af66fc99e Initial load
duke
parents:
diff changeset
844 case Bytecodes::_i2b:
a61af66fc99e Initial load
duke
parents:
diff changeset
845 case Bytecodes::_i2c:
a61af66fc99e Initial load
duke
parents:
diff changeset
846 case Bytecodes::_i2s:
a61af66fc99e Initial load
duke
parents:
diff changeset
847 case Bytecodes::_l2i:
a61af66fc99e Initial load
duke
parents:
diff changeset
848 case Bytecodes::_f2d:
a61af66fc99e Initial load
duke
parents:
diff changeset
849 case Bytecodes::_d2f: { // inline code
a61af66fc99e Initial load
duke
parents:
diff changeset
850 LIRItem value(x->value(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
851
a61af66fc99e Initial load
duke
parents:
diff changeset
852 value.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
853 LIR_Opr reg = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
854 __ convert(x->op(), value.result(), reg, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
855 }
a61af66fc99e Initial load
duke
parents:
diff changeset
856 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
857
a61af66fc99e Initial load
duke
parents:
diff changeset
858 case Bytecodes::_f2i: {
a61af66fc99e Initial load
duke
parents:
diff changeset
859 LIRItem value (x->value(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
860 value.set_destroys_register();
a61af66fc99e Initial load
duke
parents:
diff changeset
861 value.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
862 LIR_Opr reg = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
863 set_vreg_flag(reg, must_start_in_memory);
a61af66fc99e Initial load
duke
parents:
diff changeset
864 __ convert(x->op(), value.result(), reg, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
865 }
a61af66fc99e Initial load
duke
parents:
diff changeset
866 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
867
a61af66fc99e Initial load
duke
parents:
diff changeset
868 default: ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
869 }
a61af66fc99e Initial load
duke
parents:
diff changeset
870 }
a61af66fc99e Initial load
duke
parents:
diff changeset
871
a61af66fc99e Initial load
duke
parents:
diff changeset
872
a61af66fc99e Initial load
duke
parents:
diff changeset
873 void LIRGenerator::do_NewInstance(NewInstance* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
874 // This instruction can be deoptimized in the slow path : use
a61af66fc99e Initial load
duke
parents:
diff changeset
875 // O0 as result register.
a61af66fc99e Initial load
duke
parents:
diff changeset
876 const LIR_Opr reg = result_register_for(x->type());
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1791
diff changeset
877 #ifndef PRODUCT
0
a61af66fc99e Initial load
duke
parents:
diff changeset
878 if (PrintNotLoaded && !x->klass()->is_loaded()) {
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1791
diff changeset
879 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
880 }
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1791
diff changeset
881 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
882 CodeEmitInfo* info = state_for(x, x->state());
a61af66fc99e Initial load
duke
parents:
diff changeset
883 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
884 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
885 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
886 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
887 LIR_Opr klass_reg = FrameMap::G5_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
888 new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
a61af66fc99e Initial load
duke
parents:
diff changeset
889 LIR_Opr result = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
890 __ move(reg, result);
a61af66fc99e Initial load
duke
parents:
diff changeset
891 }
a61af66fc99e Initial load
duke
parents:
diff changeset
892
a61af66fc99e Initial load
duke
parents:
diff changeset
893
a61af66fc99e Initial load
duke
parents:
diff changeset
894 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
928
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
895 // Evaluate state_for early since it may emit code
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
896 CodeEmitInfo* info = state_for(x, x->state());
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
897
0
a61af66fc99e Initial load
duke
parents:
diff changeset
898 LIRItem length(x->length(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
899 length.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
900
a61af66fc99e Initial load
duke
parents:
diff changeset
901 LIR_Opr reg = result_register_for(x->type());
a61af66fc99e Initial load
duke
parents:
diff changeset
902 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
903 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
904 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
905 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
906 LIR_Opr klass_reg = FrameMap::G5_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
907 LIR_Opr len = length.result();
a61af66fc99e Initial load
duke
parents:
diff changeset
908 BasicType elem_type = x->elt_type();
a61af66fc99e Initial load
duke
parents:
diff changeset
909
989
148e5441d916 6863023: need non-perm oops in code cache for JSR 292
jrose
parents: 933
diff changeset
910 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
911
a61af66fc99e Initial load
duke
parents:
diff changeset
912 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
a61af66fc99e Initial load
duke
parents:
diff changeset
913 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
a61af66fc99e Initial load
duke
parents:
diff changeset
914
a61af66fc99e Initial load
duke
parents:
diff changeset
915 LIR_Opr result = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
916 __ move(reg, result);
a61af66fc99e Initial load
duke
parents:
diff changeset
917 }
a61af66fc99e Initial load
duke
parents:
diff changeset
918
a61af66fc99e Initial load
duke
parents:
diff changeset
919
a61af66fc99e Initial load
duke
parents:
diff changeset
920 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
928
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
921 // Evaluate state_for early since it may emit code.
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
922 CodeEmitInfo* info = state_for(x, x->state());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
923 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
a61af66fc99e Initial load
duke
parents:
diff changeset
924 // and therefore provide the state before the parameters have been consumed
a61af66fc99e Initial load
duke
parents:
diff changeset
925 CodeEmitInfo* patching_info = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
926 if (!x->klass()->is_loaded() || PatchALot) {
a61af66fc99e Initial load
duke
parents:
diff changeset
927 patching_info = state_for(x, x->state_before());
a61af66fc99e Initial load
duke
parents:
diff changeset
928 }
a61af66fc99e Initial load
duke
parents:
diff changeset
929
928
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
930 LIRItem length(x->length(), this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
931 length.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
932
a61af66fc99e Initial load
duke
parents:
diff changeset
933 const LIR_Opr reg = result_register_for(x->type());
a61af66fc99e Initial load
duke
parents:
diff changeset
934 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
935 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
936 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
937 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
938 LIR_Opr klass_reg = FrameMap::G5_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
939 LIR_Opr len = length.result();
a61af66fc99e Initial load
duke
parents:
diff changeset
940
a61af66fc99e Initial load
duke
parents:
diff changeset
941 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6145
diff changeset
942 ciMetadata* obj = ciObjArrayKlass::make(x->klass());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
943 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
944 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
a61af66fc99e Initial load
duke
parents:
diff changeset
945 }
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6145
diff changeset
946 klass2reg_with_patching(klass_reg, obj, patching_info);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
947 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
a61af66fc99e Initial load
duke
parents:
diff changeset
948
a61af66fc99e Initial load
duke
parents:
diff changeset
949 LIR_Opr result = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
950 __ move(reg, result);
a61af66fc99e Initial load
duke
parents:
diff changeset
951 }
a61af66fc99e Initial load
duke
parents:
diff changeset
952
a61af66fc99e Initial load
duke
parents:
diff changeset
953
a61af66fc99e Initial load
duke
parents:
diff changeset
954 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
955 Values* dims = x->dims();
a61af66fc99e Initial load
duke
parents:
diff changeset
956 int i = dims->length();
a61af66fc99e Initial load
duke
parents:
diff changeset
957 LIRItemList* items = new LIRItemList(dims->length(), NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
958 while (i-- > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
959 LIRItem* size = new LIRItem(dims->at(i), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
960 items->at_put(i, size);
a61af66fc99e Initial load
duke
parents:
diff changeset
961 }
a61af66fc99e Initial load
duke
parents:
diff changeset
962
928
d0acbc302e14 6795465: Crash in assembler_sparc.cpp with client compiler on solaris-sparc
never
parents: 844
diff changeset
963 // Evaluate state_for early since it may emit code.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
964 CodeEmitInfo* patching_info = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
965 if (!x->klass()->is_loaded() || PatchALot) {
a61af66fc99e Initial load
duke
parents:
diff changeset
966 patching_info = state_for(x, x->state_before());
a61af66fc99e Initial load
duke
parents:
diff changeset
967
6145
e2fe93124108 7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents: 6143
diff changeset
968 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
e2fe93124108 7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents: 6143
diff changeset
969 // clone all handlers (NOTE: Usually this is handled transparently
e2fe93124108 7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents: 6143
diff changeset
970 // by the CodeEmitInfo cloning logic in CodeStub constructors but
e2fe93124108 7174928: JSR 292: unresolved invokedynamic call sites deopt and osr infinitely
twisti
parents: 6143
diff changeset
971 // is done explicitly here because a stub isn't being used).
0
a61af66fc99e Initial load
duke
parents:
diff changeset
972 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
a61af66fc99e Initial load
duke
parents:
diff changeset
973 }
933
cdb8b7c37ac1 6875329: fix for 6795465 broke exception handler cloning
never
parents: 928
diff changeset
974 CodeEmitInfo* info = state_for(x, x->state());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
975
a61af66fc99e Initial load
duke
parents:
diff changeset
976 i = dims->length();
a61af66fc99e Initial load
duke
parents:
diff changeset
977 while (i-- > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
978 LIRItem* size = items->at(i);
a61af66fc99e Initial load
duke
parents:
diff changeset
979 size->load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
980 store_stack_parameter (size->result(),
a61af66fc99e Initial load
duke
parents:
diff changeset
981 in_ByteSize(STACK_BIAS +
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
982 frame::memory_parameter_word_sp_offset * wordSize +
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
983 i * sizeof(jint)));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
984 }
a61af66fc99e Initial load
duke
parents:
diff changeset
985
a61af66fc99e Initial load
duke
parents:
diff changeset
986 // This instruction can be deoptimized in the slow path : use
a61af66fc99e Initial load
duke
parents:
diff changeset
987 // O0 as result register.
a61af66fc99e Initial load
duke
parents:
diff changeset
988 const LIR_Opr reg = result_register_for(x->type());
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6145
diff changeset
989 klass2reg_with_patching(reg, x->klass(), patching_info);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
990 LIR_Opr rank = FrameMap::O1_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
991 __ move(LIR_OprFact::intConst(x->rank()), rank);
a61af66fc99e Initial load
duke
parents:
diff changeset
992 LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
a61af66fc99e Initial load
duke
parents:
diff changeset
993 int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
a61af66fc99e Initial load
duke
parents:
diff changeset
994 __ add(FrameMap::SP_opr,
a61af66fc99e Initial load
duke
parents:
diff changeset
995 LIR_OprFact::intptrConst(offset_from_sp),
a61af66fc99e Initial load
duke
parents:
diff changeset
996 varargs);
a61af66fc99e Initial load
duke
parents:
diff changeset
997 LIR_OprList* args = new LIR_OprList(3);
a61af66fc99e Initial load
duke
parents:
diff changeset
998 args->append(reg);
a61af66fc99e Initial load
duke
parents:
diff changeset
999 args->append(rank);
a61af66fc99e Initial load
duke
parents:
diff changeset
1000 args->append(varargs);
a61af66fc99e Initial load
duke
parents:
diff changeset
1001 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
a61af66fc99e Initial load
duke
parents:
diff changeset
1002 LIR_OprFact::illegalOpr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1003 reg, args, info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1004
a61af66fc99e Initial load
duke
parents:
diff changeset
1005 LIR_Opr result = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
1006 __ move(reg, result);
a61af66fc99e Initial load
duke
parents:
diff changeset
1007 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1008
a61af66fc99e Initial load
duke
parents:
diff changeset
1009
a61af66fc99e Initial load
duke
parents:
diff changeset
1010 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1011 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1012
a61af66fc99e Initial load
duke
parents:
diff changeset
1013
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 void LIRGenerator::do_CheckCast(CheckCast* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 LIRItem obj(x->obj(), this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1016 CodeEmitInfo* patching_info = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1017 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1018 // must do this before locking the destination register as an oop register,
a61af66fc99e Initial load
duke
parents:
diff changeset
1019 // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
a61af66fc99e Initial load
duke
parents:
diff changeset
1020 patching_info = state_for(x, x->state_before());
a61af66fc99e Initial load
duke
parents:
diff changeset
1021 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 obj.load_item();
a61af66fc99e Initial load
duke
parents:
diff changeset
1023 LIR_Opr out_reg = rlock_result(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
1024 CodeStub* stub;
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1791
diff changeset
1025 CodeEmitInfo* info_for_exception = state_for(x);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1026
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 if (x->is_incompatible_class_change_check()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1028 assert(patching_info == NULL, "can't patch this");
a61af66fc99e Initial load
duke
parents:
diff changeset
1029 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1031 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
a61af66fc99e Initial load
duke
parents:
diff changeset
1032 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1033 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
1035 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
a61af66fc99e Initial load
duke
parents:
diff changeset
1037 x->direct_compare(), info_for_exception, patching_info, stub,
a61af66fc99e Initial load
duke
parents:
diff changeset
1038 x->profiled_method(), x->profiled_bci());
a61af66fc99e Initial load
duke
parents:
diff changeset
1039 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1040
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parents:
diff changeset
1041
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parents:
diff changeset
1042 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
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parents:
diff changeset
1043 LIRItem obj(x->obj(), this);
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parents:
diff changeset
1044 CodeEmitInfo* patching_info = NULL;
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parents:
diff changeset
1045 if (!x->klass()->is_loaded() || PatchALot) {
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parents:
diff changeset
1046 patching_info = state_for(x, x->state_before());
a61af66fc99e Initial load
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parents:
diff changeset
1047 }
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parents:
diff changeset
1048 // ensure the result register is not the input register because the result is initialized before the patching safepoint
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parents:
diff changeset
1049 obj.load_item();
a61af66fc99e Initial load
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parents:
diff changeset
1050 LIR_Opr out_reg = rlock_result(x);
a61af66fc99e Initial load
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parents:
diff changeset
1051 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
a61af66fc99e Initial load
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parents:
diff changeset
1052 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
a61af66fc99e Initial load
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parents:
diff changeset
1053 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1791
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1054 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1055 x->direct_compare(), patching_info,
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1056 x->profiled_method(), x->profiled_bci());
0
a61af66fc99e Initial load
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parents:
diff changeset
1057 }
a61af66fc99e Initial load
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parents:
diff changeset
1058
a61af66fc99e Initial load
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parents:
diff changeset
1059
a61af66fc99e Initial load
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parents:
diff changeset
1060 void LIRGenerator::do_If(If* x) {
a61af66fc99e Initial load
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parents:
diff changeset
1061 assert(x->number_of_sux() == 2, "inconsistency");
a61af66fc99e Initial load
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parents:
diff changeset
1062 ValueTag tag = x->x()->type()->tag();
a61af66fc99e Initial load
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parents:
diff changeset
1063 LIRItem xitem(x->x(), this);
a61af66fc99e Initial load
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parents:
diff changeset
1064 LIRItem yitem(x->y(), this);
a61af66fc99e Initial load
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parents:
diff changeset
1065 LIRItem* xin = &xitem;
a61af66fc99e Initial load
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parents:
diff changeset
1066 LIRItem* yin = &yitem;
a61af66fc99e Initial load
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parents:
diff changeset
1067 If::Condition cond = x->cond();
a61af66fc99e Initial load
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parents:
diff changeset
1068
a61af66fc99e Initial load
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parents:
diff changeset
1069 if (tag == longTag) {
a61af66fc99e Initial load
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parents:
diff changeset
1070 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
a61af66fc99e Initial load
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parents:
diff changeset
1071 // mirror for other conditions
a61af66fc99e Initial load
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parents:
diff changeset
1072 if (cond == If::gtr || cond == If::leq) {
a61af66fc99e Initial load
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parents:
diff changeset
1073 // swap inputs
a61af66fc99e Initial load
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parents:
diff changeset
1074 cond = Instruction::mirror(cond);
a61af66fc99e Initial load
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parents:
diff changeset
1075 xin = &yitem;
a61af66fc99e Initial load
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parents:
diff changeset
1076 yin = &xitem;
a61af66fc99e Initial load
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parents:
diff changeset
1077 }
a61af66fc99e Initial load
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parents:
diff changeset
1078 xin->set_destroys_register();
a61af66fc99e Initial load
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parents:
diff changeset
1079 }
a61af66fc99e Initial load
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parents:
diff changeset
1080
a61af66fc99e Initial load
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parents:
diff changeset
1081 LIR_Opr left = LIR_OprFact::illegalOpr;
a61af66fc99e Initial load
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parents:
diff changeset
1082 LIR_Opr right = LIR_OprFact::illegalOpr;
a61af66fc99e Initial load
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parents:
diff changeset
1083
a61af66fc99e Initial load
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parents:
diff changeset
1084 xin->load_item();
a61af66fc99e Initial load
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parents:
diff changeset
1085 left = xin->result();
a61af66fc99e Initial load
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parents:
diff changeset
1086
a61af66fc99e Initial load
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parents:
diff changeset
1087 if (is_simm13(yin->result())) {
a61af66fc99e Initial load
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parents:
diff changeset
1088 // inline int constants which are small enough to be immediate operands
a61af66fc99e Initial load
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parents:
diff changeset
1089 right = LIR_OprFact::value_type(yin->value()->type());
a61af66fc99e Initial load
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parents:
diff changeset
1090 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
a61af66fc99e Initial load
duke
parents:
diff changeset
1091 (cond == If::eql || cond == If::neq)) {
a61af66fc99e Initial load
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parents:
diff changeset
1092 // inline long zero
a61af66fc99e Initial load
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parents:
diff changeset
1093 right = LIR_OprFact::value_type(yin->value()->type());
a61af66fc99e Initial load
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parents:
diff changeset
1094 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
a61af66fc99e Initial load
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parents:
diff changeset
1095 right = LIR_OprFact::value_type(yin->value()->type());
a61af66fc99e Initial load
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parents:
diff changeset
1096 } else {
a61af66fc99e Initial load
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parents:
diff changeset
1097 yin->load_item();
a61af66fc99e Initial load
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parents:
diff changeset
1098 right = yin->result();
a61af66fc99e Initial load
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parents:
diff changeset
1099 }
a61af66fc99e Initial load
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parents:
diff changeset
1100 set_no_result(x);
a61af66fc99e Initial load
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parents:
diff changeset
1101
a61af66fc99e Initial load
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parents:
diff changeset
1102 // add safepoint before generating condition code so it can be recomputed
a61af66fc99e Initial load
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parents:
diff changeset
1103 if (x->is_safepoint()) {
a61af66fc99e Initial load
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parents:
diff changeset
1104 // increment backedge counter if needed
1783
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1105 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1106 __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
a61af66fc99e Initial load
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parents:
diff changeset
1107 }
a61af66fc99e Initial load
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parents:
diff changeset
1108
a61af66fc99e Initial load
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parents:
diff changeset
1109 __ cmp(lir_cond(cond), left, right);
1783
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1110 // Generate branch profiling. Profiling code doesn't kill flags.
0
a61af66fc99e Initial load
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parents:
diff changeset
1111 profile_branch(x, cond);
a61af66fc99e Initial load
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parents:
diff changeset
1112 move_to_phi(x->state());
a61af66fc99e Initial load
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parents:
diff changeset
1113 if (x->x()->type()->is_float_kind()) {
a61af66fc99e Initial load
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parents:
diff changeset
1114 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
a61af66fc99e Initial load
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parents:
diff changeset
1115 } else {
a61af66fc99e Initial load
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parents:
diff changeset
1116 __ branch(lir_cond(cond), right->type(), x->tsux());
a61af66fc99e Initial load
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parents:
diff changeset
1117 }
a61af66fc99e Initial load
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parents:
diff changeset
1118 assert(x->default_sux() == x->fsux(), "wrong destination above");
a61af66fc99e Initial load
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parents:
diff changeset
1119 __ jump(x->default_sux());
a61af66fc99e Initial load
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parents:
diff changeset
1120 }
a61af66fc99e Initial load
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parents:
diff changeset
1121
a61af66fc99e Initial load
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parents:
diff changeset
1122
a61af66fc99e Initial load
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parents:
diff changeset
1123 LIR_Opr LIRGenerator::getThreadPointer() {
a61af66fc99e Initial load
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parents:
diff changeset
1124 return FrameMap::as_pointer_opr(G2);
a61af66fc99e Initial load
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parents:
diff changeset
1125 }
a61af66fc99e Initial load
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parents:
diff changeset
1126
a61af66fc99e Initial load
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parents:
diff changeset
1127
a61af66fc99e Initial load
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parents:
diff changeset
1128 void LIRGenerator::trace_block_entry(BlockBegin* block) {
a61af66fc99e Initial load
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parents:
diff changeset
1129 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
a61af66fc99e Initial load
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parents:
diff changeset
1130 LIR_OprList* args = new LIR_OprList(1);
a61af66fc99e Initial load
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parents:
diff changeset
1131 args->append(FrameMap::O0_opr);
a61af66fc99e Initial load
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parents:
diff changeset
1132 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
a61af66fc99e Initial load
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parents:
diff changeset
1133 __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
a61af66fc99e Initial load
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parents:
diff changeset
1134 }
a61af66fc99e Initial load
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parents:
diff changeset
1135
a61af66fc99e Initial load
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parents:
diff changeset
1136
a61af66fc99e Initial load
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parents:
diff changeset
1137 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
a61af66fc99e Initial load
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parents:
diff changeset
1138 CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1139 #ifdef _LP64
a61af66fc99e Initial load
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parents:
diff changeset
1140 __ store(value, address, info);
a61af66fc99e Initial load
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parents:
diff changeset
1141 #else
a61af66fc99e Initial load
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parents:
diff changeset
1142 __ volatile_store_mem_reg(value, address, info);
a61af66fc99e Initial load
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parents:
diff changeset
1143 #endif
a61af66fc99e Initial load
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parents:
diff changeset
1144 }
a61af66fc99e Initial load
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parents:
diff changeset
1145
a61af66fc99e Initial load
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parents:
diff changeset
1146 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
a61af66fc99e Initial load
duke
parents:
diff changeset
1147 CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1148 #ifdef _LP64
a61af66fc99e Initial load
duke
parents:
diff changeset
1149 __ load(address, result, info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1150 #else
a61af66fc99e Initial load
duke
parents:
diff changeset
1151 __ volatile_load_mem_reg(address, result, info);
a61af66fc99e Initial load
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parents:
diff changeset
1152 #endif
a61af66fc99e Initial load
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parents:
diff changeset
1153 }
a61af66fc99e Initial load
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parents:
diff changeset
1154
a61af66fc99e Initial load
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parents:
diff changeset
1155
a61af66fc99e Initial load
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parents:
diff changeset
1156 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
a61af66fc99e Initial load
duke
parents:
diff changeset
1157 BasicType type, bool is_volatile) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1158 LIR_Opr base_op = src;
a61af66fc99e Initial load
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parents:
diff changeset
1159 LIR_Opr index_op = offset;
a61af66fc99e Initial load
duke
parents:
diff changeset
1160
a61af66fc99e Initial load
duke
parents:
diff changeset
1161 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
a61af66fc99e Initial load
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parents:
diff changeset
1162 #ifndef _LP64
a61af66fc99e Initial load
duke
parents:
diff changeset
1163 if (is_volatile && type == T_LONG) {
a61af66fc99e Initial load
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parents:
diff changeset
1164 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
a61af66fc99e Initial load
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parents:
diff changeset
1165 } else
a61af66fc99e Initial load
duke
parents:
diff changeset
1166 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1167 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1168 if (type == T_BOOLEAN) {
a61af66fc99e Initial load
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parents:
diff changeset
1169 type = T_BYTE;
a61af66fc99e Initial load
duke
parents:
diff changeset
1170 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1171 LIR_Address* addr;
a61af66fc99e Initial load
duke
parents:
diff changeset
1172 if (type == T_ARRAY || type == T_OBJECT) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1173 LIR_Opr tmp = new_pointer_register();
a61af66fc99e Initial load
duke
parents:
diff changeset
1174 __ add(base_op, index_op, tmp);
1572
87fc6aca31ab 6955349: C1: Make G1 barriers work with x64
iveresov
parents: 1060
diff changeset
1175 addr = new LIR_Address(tmp, type);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1176 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1177 addr = new LIR_Address(base_op, index_op, type);
a61af66fc99e Initial load
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parents:
diff changeset
1178 }
a61af66fc99e Initial load
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parents:
diff changeset
1179
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 29
diff changeset
1180 if (is_obj) {
3249
e1162778c1c8 7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents: 2089
diff changeset
1181 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
e1162778c1c8 7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents: 2089
diff changeset
1182 true /* do_load */, false /* patch */, NULL);
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 29
diff changeset
1183 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 29
diff changeset
1184 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1185 __ move(data, addr);
a61af66fc99e Initial load
duke
parents:
diff changeset
1186 if (is_obj) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1187 // This address is precise
a61af66fc99e Initial load
duke
parents:
diff changeset
1188 post_barrier(LIR_OprFact::address(addr), data);
a61af66fc99e Initial load
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parents:
diff changeset
1189 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1190 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1191 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1192
a61af66fc99e Initial load
duke
parents:
diff changeset
1193
a61af66fc99e Initial load
duke
parents:
diff changeset
1194 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
1195 BasicType type, bool is_volatile) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1196 #ifndef _LP64
a61af66fc99e Initial load
duke
parents:
diff changeset
1197 if (is_volatile && type == T_LONG) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1198 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
a61af66fc99e Initial load
duke
parents:
diff changeset
1199 } else
a61af66fc99e Initial load
duke
parents:
diff changeset
1200 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1201 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1202 LIR_Address* addr = new LIR_Address(src, offset, type);
a61af66fc99e Initial load
duke
parents:
diff changeset
1203 __ load(addr, dst);
a61af66fc99e Initial load
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parents:
diff changeset
1204 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1205 }