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annotate graal/com.oracle.graal.sparc/src/com/oracle/graal/sparc/SPARC.java @ 10854:e1fcdda22831
SPARC: can compile some stubs now but they don't work yet
author | twisti |
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date | Mon, 22 Jul 2013 22:26:49 -0700 |
parents | 73122b5edf6a |
children | ea308a63760b |
rev | line source |
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1 /* |
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2 * Copyright (c) 2009, 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.oracle.graal.sparc; |
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24 |
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25 import static com.oracle.graal.api.code.MemoryBarriers.*; |
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26 |
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27 import java.nio.*; |
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28 |
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29 import com.oracle.graal.api.code.*; |
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30 import com.oracle.graal.api.code.Register.RegisterCategory; |
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31 import com.oracle.graal.api.meta.*; |
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32 |
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33 /** |
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34 * Represents the SPARC architecture. |
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35 */ |
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36 public class SPARC extends Architecture { |
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37 |
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38 // @formatter:off |
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39 |
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40 public static final RegisterCategory CPU = new RegisterCategory("CPU"); |
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41 public static final RegisterCategory FPU = new RegisterCategory("FPU"); |
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42 |
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43 // General purpose registers |
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44 public static final Register r0 = new Register(0, 0, "g0", CPU); |
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45 public static final Register r1 = new Register(1, 1, "g1", CPU); |
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46 public static final Register r2 = new Register(2, 2, "g2", CPU); |
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47 public static final Register r3 = new Register(3, 3, "g3", CPU); |
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48 public static final Register r4 = new Register(4, 4, "g4", CPU); |
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49 public static final Register r5 = new Register(5, 5, "g5", CPU); |
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50 public static final Register r6 = new Register(6, 6, "g6", CPU); |
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51 public static final Register r7 = new Register(7, 7, "g7", CPU); |
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52 public static final Register r8 = new Register(8, 8, "o0", CPU); |
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53 public static final Register r9 = new Register(9, 9, "o1", CPU); |
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54 public static final Register r10 = new Register(10, 10, "o2", CPU); |
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55 public static final Register r11 = new Register(11, 11, "o3", CPU); |
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56 public static final Register r12 = new Register(12, 12, "o4", CPU); |
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57 public static final Register r13 = new Register(13, 13, "o5", CPU); |
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58 public static final Register r14 = new Register(14, 14, "o6", CPU); |
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59 public static final Register r15 = new Register(15, 15, "o7", CPU); |
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60 public static final Register r16 = new Register(16, 16, "l0", CPU); |
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61 public static final Register r17 = new Register(17, 17, "l1", CPU); |
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62 public static final Register r18 = new Register(18, 18, "l2", CPU); |
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63 public static final Register r19 = new Register(19, 19, "l3", CPU); |
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64 public static final Register r20 = new Register(20, 20, "l4", CPU); |
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65 public static final Register r21 = new Register(21, 21, "l5", CPU); |
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66 public static final Register r22 = new Register(22, 22, "l6", CPU); |
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67 public static final Register r23 = new Register(23, 23, "l7", CPU); |
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68 public static final Register r24 = new Register(24, 24, "i0", CPU); |
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69 public static final Register r25 = new Register(25, 25, "i1", CPU); |
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70 public static final Register r26 = new Register(26, 26, "i2", CPU); |
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71 public static final Register r27 = new Register(27, 27, "i3", CPU); |
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72 public static final Register r28 = new Register(28, 28, "i4", CPU); |
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73 public static final Register r29 = new Register(29, 29, "i5", CPU); |
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74 public static final Register r30 = new Register(30, 30, "i6", CPU); |
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75 public static final Register r31 = new Register(31, 31, "i7", CPU); |
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76 |
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77 public static final Register g0 = r0; |
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78 public static final Register g1 = r1; |
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79 public static final Register g2 = r2; |
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80 public static final Register g3 = r3; |
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81 public static final Register g4 = r4; |
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82 public static final Register g5 = r5; |
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83 public static final Register g6 = r6; |
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84 public static final Register g7 = r7; |
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85 |
10459 | 86 public static final Register o0 = r8; |
87 public static final Register o1 = r9; | |
88 public static final Register o2 = r10; | |
89 public static final Register o3 = r11; | |
90 public static final Register o4 = r12; | |
91 public static final Register o5 = r13; | |
92 public static final Register o6 = r14; | |
93 public static final Register o7 = r15; | |
94 | |
95 public static final Register l0 = r16; | |
96 public static final Register l1 = r17; | |
97 public static final Register l2 = r18; | |
98 public static final Register l3 = r19; | |
99 public static final Register l4 = r20; | |
100 public static final Register l5 = r21; | |
101 public static final Register l6 = r22; | |
102 public static final Register l7 = r23; | |
103 | |
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104 public static final Register i0 = r24; |
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105 public static final Register i1 = r25; |
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106 public static final Register i2 = r26; |
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107 public static final Register i3 = r27; |
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108 public static final Register i4 = r28; |
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109 public static final Register i5 = r29; |
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110 public static final Register i6 = r30; |
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111 public static final Register i7 = r31; |
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112 |
10459 | 113 public static final Register fp = i6; |
114 public static final Register sp = o6; | |
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115 |
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116 public static final Register[] cpuRegisters = { |
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117 r0, r1, r2, r3, r4, r5, r6, r7, |
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118 r8, r9, r10, r11, r12, r13, r14, r15, |
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119 r16, r17, r18, r19, r20, r21, r22, r23, |
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120 r24, r25, r26, r27, r28, r29, r30, r31 |
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121 }; |
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122 |
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123 // Floating point registers |
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124 public static final Register f0 = new Register(32, 0, "f0", FPU); |
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125 public static final Register f1 = new Register(33, 1, "f1", FPU); |
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126 public static final Register f2 = new Register(34, 2, "f2", FPU); |
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127 public static final Register f3 = new Register(35, 3, "f3", FPU); |
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128 public static final Register f4 = new Register(36, 4, "f4", FPU); |
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129 public static final Register f5 = new Register(37, 5, "f5", FPU); |
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130 public static final Register f6 = new Register(38, 6, "f6", FPU); |
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131 public static final Register f7 = new Register(39, 7, "f7", FPU); |
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132 |
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133 public static final Register[] allRegisters = { |
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134 // CPU |
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135 r0, r1, r2, r3, r4, r5, r6, r7, |
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136 r8, r9, r10, r11, r12, r13, r14, r15, |
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137 r16, r17, r18, r19, r20, r21, r22, r23, |
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138 r24, r25, r26, r27, r28, r29, r30, r31, |
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139 // FPU |
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140 f0, f1, f2, f3, f4, f5, f6, f7, |
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141 }; |
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142 |
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143 // @formatter:on |
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144 |
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145 public SPARC() { |
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146 // The return address doesn't have an extra slot in the frame so we pass 0 for the return |
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147 // address size. |
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148 super("SPARC", 8, ByteOrder.BIG_ENDIAN, allRegisters, LOAD_STORE | STORE_STORE, 1, r31.encoding + 1, 0); |
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149 } |
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150 |
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151 @Override |
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153 if (!(platformKind instanceof Kind)) { | |
154 return false; | |
155 } | |
156 | |
157 Kind kind = (Kind) platformKind; | |
158 if (category == CPU) { | |
159 switch (kind) { | |
160 case Boolean: | |
161 case Byte: | |
162 case Char: | |
163 case Short: | |
164 case Int: | |
165 case Long: | |
166 case Object: | |
167 return true; | |
168 } | |
169 } else if (category == FPU) { | |
170 switch (kind) { | |
171 case Float: | |
172 case Double: | |
173 return true; | |
174 } | |
175 } | |
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176 return false; |
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177 } |
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178 |
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179 @Override |
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180 public PlatformKind getLargestStorableKind(RegisterCategory category) { |
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181 if (category == CPU) { |
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182 return Kind.Long; |
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183 } else if (category == FPU) { |
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184 return Kind.Double; |
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185 } else { |
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186 return Kind.Illegal; |
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187 } |
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188 } |
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189 } |