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annotate graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotCounterOp.java @ 20085:e4bb07ed276c
AMD64HotSpotCounterOp: use incrementq macro.
author | Josef Eisl <josef.eisl@jku.at> |
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date | Mon, 30 Mar 2015 15:38:57 +0200 |
parents | 4b6965a278cf |
children | 1da7aef31a08 |
rev | line source |
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19909
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1 /* |
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2 * Copyright (c) 2015, 2015, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.oracle.graal.hotspot.amd64; |
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24 |
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25 import static com.oracle.graal.amd64.AMD64.*; |
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26 import static com.oracle.graal.api.code.ValueUtil.*; |
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27 import static com.oracle.graal.compiler.common.GraalInternalError.*; |
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28 |
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29 import com.oracle.graal.api.code.*; |
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30 import com.oracle.graal.api.meta.*; |
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31 import com.oracle.graal.asm.amd64.*; |
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32 import com.oracle.graal.hotspot.*; |
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33 import com.oracle.graal.hotspot.meta.*; |
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34 import com.oracle.graal.lir.*; |
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35 import com.oracle.graal.lir.asm.*; |
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36 |
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37 @Opcode("BenchMarkCounter") |
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38 public class AMD64HotSpotCounterOp extends HotSpotCounterOp { |
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39 public static final LIRInstructionClass<AMD64HotSpotCounterOp> TYPE = LIRInstructionClass.create(AMD64HotSpotCounterOp.class); |
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40 |
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41 @Alive({OperandFlag.STACK, OperandFlag.UNINITIALIZED}) private StackSlotValue backupSlot; |
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42 |
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43 public AMD64HotSpotCounterOp(String name, String group, Value increment, HotSpotRegistersProvider registers, HotSpotVMConfig config, StackSlotValue backupSlot) { |
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44 super(TYPE, name, group, increment, registers, config); |
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45 this.backupSlot = backupSlot; |
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46 } |
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47 |
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48 public AMD64HotSpotCounterOp(String[] names, String[] groups, Value[] increments, HotSpotRegistersProvider registers, HotSpotVMConfig config, StackSlotValue backupSlot) { |
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49 super(TYPE, names, groups, increments, registers, config); |
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50 this.backupSlot = backupSlot; |
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51 } |
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52 |
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53 @Override |
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54 public void emitCode(CompilationResultBuilder crb) { |
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55 AMD64MacroAssembler masm = (AMD64MacroAssembler) crb.asm; |
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56 TargetDescription target = crb.target; |
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57 |
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58 Register scratch; |
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59 // It can happen that the rax register is the increment register, in this case we do not |
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60 // want to spill it to the stack. |
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61 if (!contains(increments, rax)) { |
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62 scratch = rax; |
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63 } else if (!contains(increments, rbx)) { |
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64 scratch = rbx; |
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65 } else { |
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66 // In this case rax and rbx are used as increment. Either we implement a third register |
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67 // or we implement a spillover the value from rax to rbx or vice versa during |
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68 // emitIncrement(). |
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69 throw unimplemented("RAX and RBX are increment registers a the same time, spilling over the scratch register is not supported right now"); |
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70 } |
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71 |
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72 // address for counters array |
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73 AMD64Address countersArrayAddr = new AMD64Address(thread, config.graalCountersThreadOffset); |
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74 Register countersArrayReg = scratch; |
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75 |
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76 // backup scratch register |
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77 masm.movq((AMD64Address) crb.asAddress(backupSlot), scratch); |
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78 |
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79 // load counters array |
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80 masm.movptr(countersArrayReg, countersArrayAddr); |
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81 CounterProcedure emitProcedure = (counterIndex, increment, displacement) -> emitIncrement(masm, countersArrayReg, increment, displacement); |
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82 forEachCounter(emitProcedure, target); |
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83 |
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84 // restore scratch register |
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85 masm.movq(scratch, (AMD64Address) crb.asAddress(backupSlot)); |
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86 } |
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87 |
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88 /** |
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89 * Tests if the array contains the register. |
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90 */ |
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91 private static boolean contains(Value[] increments, Register register) { |
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92 for (Value increment : increments) { |
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93 if (isRegister(increment) && asRegister(increment).equals(register)) { |
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94 return true; |
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95 } |
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96 } |
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97 return false; |
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98 } |
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99 |
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100 private static void emitIncrement(AMD64MacroAssembler masm, Register countersArrayReg, Value incrementValue, int displacement) { |
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101 // address for counter value |
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102 AMD64Address counterAddr = new AMD64Address(countersArrayReg, displacement); |
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103 // increment counter (in memory) |
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104 if (isConstant(incrementValue)) { |
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105 int increment = asInt(asConstant(incrementValue)); |
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106 masm.incrementq(counterAddr, increment); |
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107 } else { |
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changeset
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108 masm.addq(counterAddr, asRegister(incrementValue)); |
19909
1fed7073f288
Add AMD64HotSpotCounterOp and SPARCHotSpotCounterOp.
Josef Eisl <josef.eisl@jku.at>
parents:
diff
changeset
|
109 } |
20021
4b6965a278cf
Fix allocation counter issue where the counters sometimes gives way too high values for allocated bytes
Stefan Anzinger <stefan.anzinger@oracle.com>
parents:
20003
diff
changeset
|
110 |
19909
1fed7073f288
Add AMD64HotSpotCounterOp and SPARCHotSpotCounterOp.
Josef Eisl <josef.eisl@jku.at>
parents:
diff
changeset
|
111 } |
1fed7073f288
Add AMD64HotSpotCounterOp and SPARCHotSpotCounterOp.
Josef Eisl <josef.eisl@jku.at>
parents:
diff
changeset
|
112 } |