annotate graal/com.oracle.graal.compiler.amd64/src/com/oracle/graal/compiler/amd64/AMD64NodeLIRBuilder.java @ 21784:f4e1d958f1c3

[AMD64] Create AMD64 specific address nodes.
author Roland Schatz <roland.schatz@oracle.com>
date Mon, 08 Jun 2015 19:19:45 +0200
parents d915361cc3a1
children
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1 /*
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2 * Copyright (c) 2009, 2015, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23
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24 package com.oracle.graal.compiler.amd64;
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25
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26 import com.oracle.jvmci.amd64.*;
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27 import com.oracle.jvmci.code.CallingConvention;
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28 import com.oracle.jvmci.meta.Kind;
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29 import com.oracle.jvmci.meta.JavaType;
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30 import com.oracle.jvmci.meta.PlatformKind;
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31 import com.oracle.jvmci.meta.JavaConstant;
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32 import com.oracle.jvmci.meta.Value;
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33 import com.oracle.jvmci.meta.AllocatableValue;
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34 import com.oracle.jvmci.meta.LIRKind;
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35
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36 import static com.oracle.graal.asm.amd64.AMD64Assembler.AMD64BinaryArithmetic.*;
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37 import static com.oracle.graal.asm.amd64.AMD64Assembler.AMD64RMOp.*;
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38 import static com.oracle.graal.asm.amd64.AMD64Assembler.OperandSize.*;
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39
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40 import com.oracle.graal.asm.*;
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41 import com.oracle.graal.asm.amd64.AMD64Assembler.*;
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42 import com.oracle.graal.compiler.common.calc.*;
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43 import com.oracle.graal.compiler.gen.*;
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44 import com.oracle.graal.compiler.match.*;
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45 import com.oracle.graal.lir.*;
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46 import com.oracle.graal.lir.amd64.*;
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47 import com.oracle.graal.lir.amd64.AMD64ControlFlow.BranchOp;
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48 import com.oracle.graal.lir.gen.*;
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49 import com.oracle.graal.nodes.*;
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50 import com.oracle.graal.nodes.calc.*;
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51 import com.oracle.graal.nodes.extended.*;
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52 import com.oracle.graal.nodes.memory.*;
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53 import com.oracle.jvmci.common.*;
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54 import com.oracle.jvmci.debug.*;
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55
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56 public abstract class AMD64NodeLIRBuilder extends NodeLIRBuilder {
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57
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58 public AMD64NodeLIRBuilder(StructuredGraph graph, LIRGeneratorTool gen) {
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59 super(graph, gen);
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60 }
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61
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62 @Override
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63 protected void emitIndirectCall(IndirectCallTargetNode callTarget, Value result, Value[] parameters, Value[] temps, LIRFrameState callState) {
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64 Value targetAddressSrc = operand(callTarget.computedAddress());
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65 AllocatableValue targetAddress = AMD64.rax.asValue(targetAddressSrc.getLIRKind());
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66 gen.emitMove(targetAddress, targetAddressSrc);
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67 append(new AMD64Call.IndirectCallOp(callTarget.targetMethod(), result, parameters, temps, targetAddress, callState));
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68 }
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69
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70 @Override
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71 protected boolean peephole(ValueNode valueNode) {
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72 if ((valueNode instanceof IntegerDivNode) || (valueNode instanceof IntegerRemNode)) {
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73 FixedBinaryNode divRem = (FixedBinaryNode) valueNode;
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74 FixedNode node = divRem.next();
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75 while (true) {
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76 if (node instanceof IfNode) {
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77 IfNode ifNode = (IfNode) node;
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78 double probability = ifNode.getTrueSuccessorProbability();
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79 if (probability == 1.0) {
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80 node = ifNode.trueSuccessor();
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81 } else if (probability == 0.0) {
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82 node = ifNode.falseSuccessor();
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83 } else {
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84 break;
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85 }
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86 } else if (!(node instanceof FixedWithNextNode)) {
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87 break;
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88 }
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89
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90 FixedWithNextNode fixedWithNextNode = (FixedWithNextNode) node;
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91 if (((fixedWithNextNode instanceof IntegerDivNode) || (fixedWithNextNode instanceof IntegerRemNode)) && fixedWithNextNode.getClass() != divRem.getClass()) {
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92 FixedBinaryNode otherDivRem = (FixedBinaryNode) fixedWithNextNode;
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93 if (otherDivRem.getX() == divRem.getX() && otherDivRem.getY() == divRem.getY() && !hasOperand(otherDivRem)) {
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94 Value[] results = ((AMD64LIRGenerator) gen).emitIntegerDivRem(operand(divRem.getX()), operand(divRem.getY()), state((DeoptimizingNode) valueNode));
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95 if (divRem instanceof IntegerDivNode) {
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96 setResult(divRem, results[0]);
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97 setResult(otherDivRem, results[1]);
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98 } else {
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99 setResult(divRem, results[1]);
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100 setResult(otherDivRem, results[0]);
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101 }
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102 return true;
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103 }
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104 }
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105 node = fixedWithNextNode.next();
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106 }
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107 }
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108 return false;
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109 }
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110
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111 protected LIRFrameState getState(Access access) {
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112 if (access instanceof DeoptimizingNode) {
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113 return state((DeoptimizingNode) access);
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114 }
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115 return null;
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116 }
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117
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118 protected Kind getMemoryKind(Access access) {
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c0b8d395368b Introduce LIRKind to accurately track oop references in backend.
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parents: 16083
diff changeset
119 return (Kind) gen.getLIRKind(access.asNode().stamp()).getPlatformKind();
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120 }
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121
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122 protected OperandSize getMemorySize(Access access) {
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123 switch (getMemoryKind(access)) {
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124 case Boolean:
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125 case Byte:
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126 return OperandSize.BYTE;
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127 case Char:
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diff changeset
128 case Short:
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129 return OperandSize.WORD;
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130 case Int:
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131 return OperandSize.DWORD;
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132 case Long:
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133 return OperandSize.QWORD;
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134 case Float:
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135 return OperandSize.SS;
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136 case Double:
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137 return OperandSize.SD;
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diff changeset
138 default:
21543
93c50cefb9e8 moved GraalInternalError to com.oracle.jvmci.common and renamed it to JVMCIError (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
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diff changeset
139 throw JVMCIError.shouldNotReachHere("unsupported memory access type " + getMemoryKind(access));
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140 }
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141 }
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142
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143 protected ValueNode uncast(ValueNode value) {
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144 if (value instanceof UnsafeCastNode) {
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145 UnsafeCastNode cast = (UnsafeCastNode) value;
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146 return cast.getOriginalNode();
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147 }
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148 return value;
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149 }
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150
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151 protected ComplexMatchResult emitCompareBranchMemory(IfNode ifNode, CompareNode compare, ValueNode value, Access access) {
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152 Condition cond = compare.condition();
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153 Kind kind = getMemoryKind(access);
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154
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155 if (value.isConstant()) {
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9619ba4daf4c Rename Constant to JavaConstant.
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156 JavaConstant constant = value.asJavaConstant();
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diff changeset
157 if (kind == Kind.Long && !NumUtil.isInt(constant.asLong())) {
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158 // Only imm32 as long
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159 return null;
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160 }
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diff changeset
161 if (kind.isNumericFloat()) {
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diff changeset
162 Debug.log("Skipping constant compares for float kinds");
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163 return null;
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164 }
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165 if (kind == Kind.Object) {
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diff changeset
166 if (!constant.isNull()) {
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167 Debug.log("Skipping constant compares for Object kinds");
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168 return null;
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169 }
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170 }
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diff changeset
171 } else {
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diff changeset
172 if (kind == Kind.Object) {
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173 // Can't compare against objects since they require encode/decode
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174 Debug.log("Skipping compares for Object kinds");
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175 return null;
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176 }
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177 }
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178
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179 // emitCompareBranchMemory expects the memory on the right, so mirror the condition if
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180 // that's not true. It might be mirrored again the actual compare is emitted but that's
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181 // ok.
16207
df6f2365b153 rename of x() to getX(), y() to getY() and object() to getValue()
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16156
diff changeset
182 Condition finalCondition = uncast(compare.getX()) == access ? cond.mirror() : cond;
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183 return new ComplexMatchResult() {
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184 public Value evaluate(NodeLIRBuilder builder) {
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185 LabelRef trueLabel = getLIRBlock(ifNode.trueSuccessor());
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186 LabelRef falseLabel = getLIRBlock(ifNode.falseSuccessor());
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187 boolean unorderedIsTrue = compare.unorderedIsTrue();
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188 double trueLabelProbability = ifNode.probability(ifNode.trueSuccessor());
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diff changeset
189 Value other;
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diff changeset
190 if (value.isConstant()) {
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diff changeset
191 other = value.asJavaConstant();
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192 } else {
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193 other = operand(value);
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194 }
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diff changeset
195
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diff changeset
196 AMD64AddressValue address = (AMD64AddressValue) operand(access.getAddress());
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
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diff changeset
197 getLIRGeneratorTool().emitCompareBranchMemory(kind, other, address, getState(access), finalCondition, unorderedIsTrue, trueLabel, falseLabel, trueLabelProbability);
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diff changeset
198 return null;
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diff changeset
199 }
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diff changeset
200 };
15370
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diff changeset
201 }
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diff changeset
202
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diff changeset
203 private ComplexMatchResult emitIntegerTestBranchMemory(IfNode x, ValueNode value, Access access) {
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parents: 15333
diff changeset
204 LabelRef trueLabel = getLIRBlock(x.trueSuccessor());
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parents: 15333
diff changeset
205 LabelRef falseLabel = getLIRBlock(x.falseSuccessor());
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parents: 15333
diff changeset
206 double trueLabelProbability = x.probability(x.trueSuccessor());
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diff changeset
207 Kind kind = getMemoryKind(access);
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89c729e9e0a4 Refactoring of AMD64 code generation.
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parents: 19582
diff changeset
208 OperandSize size = kind == Kind.Long ? QWORD : DWORD;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
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diff changeset
209 if (value.isConstant()) {
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diff changeset
210 if (kind != kind.getStackKind()) {
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diff changeset
211 return null;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
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parents: 15333
diff changeset
212 }
18187
9619ba4daf4c Rename Constant to JavaConstant.
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parents: 18149
diff changeset
213 JavaConstant constant = value.asJavaConstant();
15370
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diff changeset
214 if (kind == Kind.Long && !NumUtil.isInt(constant.asLong())) {
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parents: 15333
diff changeset
215 // Only imm32 as long
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parents: 15333
diff changeset
216 return null;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
217 }
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
218 return builder -> {
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
219 AMD64AddressValue address = (AMD64AddressValue) operand(access.getAddress());
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
220 gen.append(new AMD64BinaryConsumer.MemoryConstOp(AMD64MIOp.TEST, size, address, (int) constant.asLong(), getState(access)));
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
221 gen.append(new BranchOp(Condition.EQ, trueLabel, falseLabel, trueLabelProbability));
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
222 return null;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
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diff changeset
223 };
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
224 } else {
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
225 return builder -> {
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
226 AMD64AddressValue address = (AMD64AddressValue) operand(access.getAddress());
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
227 gen.append(new AMD64BinaryConsumer.MemoryRMOp(AMD64RMOp.TEST, size, gen.asAllocatable(operand(value)), address, getState(access)));
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
228 gen.append(new BranchOp(Condition.EQ, trueLabel, falseLabel, trueLabelProbability));
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
229 return null;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
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diff changeset
230 };
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
231 }
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
232 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
233
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
234 protected ComplexMatchResult emitConvertMemoryOp(PlatformKind kind, AMD64RMOp op, OperandSize size, Access access) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
235 return builder -> {
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
236 AMD64AddressValue address = (AMD64AddressValue) operand(access.getAddress());
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
237 LIRFrameState state = getState(access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
238 return getLIRGeneratorTool().emitConvertMemoryOp(kind, op, size, address, state);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
239 };
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
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diff changeset
240 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
241
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
242 private ComplexMatchResult emitSignExtendMemory(Access access, int fromBits, int toBits) {
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
243 assert fromBits <= toBits && toBits <= 64;
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
244 Kind kind = null;
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diff changeset
245 AMD64RMOp op;
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
246 OperandSize size;
15370
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diff changeset
247 if (fromBits == toBits) {
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
248 return null;
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
249 } else if (toBits > 32) {
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
250 kind = Kind.Long;
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
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diff changeset
251 size = QWORD;
15370
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Tom Rodriguez <tom.rodriguez@oracle.com>
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diff changeset
252 // sign extend to 64 bits
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
253 switch (fromBits) {
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
254 case 8:
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
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diff changeset
255 op = MOVSXB;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
256 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
257 case 16:
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
258 op = MOVSX;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
259 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
260 case 32:
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
261 op = MOVSXD;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
262 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
263 default:
21543
93c50cefb9e8 moved GraalInternalError to com.oracle.jvmci.common and renamed it to JVMCIError (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21418
diff changeset
264 throw JVMCIError.unimplemented("unsupported sign extension (" + fromBits + " bit -> " + toBits + " bit)");
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
265 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
266 } else {
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
267 kind = Kind.Int;
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
268 size = DWORD;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
269 // sign extend to 32 bits (smaller values are internally represented as 32 bit values)
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
270 switch (fromBits) {
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
271 case 8:
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
272 op = MOVSXB;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
273 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
274 case 16:
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
275 op = MOVSX;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
276 break;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
277 case 32:
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
278 return null;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
279 default:
21543
93c50cefb9e8 moved GraalInternalError to com.oracle.jvmci.common and renamed it to JVMCIError (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21418
diff changeset
280 throw JVMCIError.unimplemented("unsupported sign extension (" + fromBits + " bit -> " + toBits + " bit)");
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
281 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
282 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
283 if (kind != null && op != null) {
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
284 return emitConvertMemoryOp(kind, op, size, access);
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
285 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
286 return null;
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
287 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
288
16094
c0b8d395368b Introduce LIRKind to accurately track oop references in backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 16083
diff changeset
289 private Value emitReinterpretMemory(LIRKind to, Access access) {
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
290 AMD64AddressValue address = (AMD64AddressValue) operand(access.getAddress());
15610
c44cf62d1c97 Simplify code generation of reinterpret-memory.
Roland Schatz <roland.schatz@oracle.com>
parents: 15554
diff changeset
291 LIRFrameState state = getState(access);
c44cf62d1c97 Simplify code generation of reinterpret-memory.
Roland Schatz <roland.schatz@oracle.com>
parents: 15554
diff changeset
292 return getLIRGeneratorTool().emitLoad(to, address, state);
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
293 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
294
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
295 @MatchRule("(If (IntegerTest Read=access value))")
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
296 @MatchRule("(If (IntegerTest FloatingRead=access value))")
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
297 public ComplexMatchResult integerTestBranchMemory(IfNode root, Access access, ValueNode value) {
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
298 return emitIntegerTestBranchMemory(root, value, access);
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
299 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
300
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
301 @MatchRule("(If (IntegerEquals=compare value Read=access))")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
302 @MatchRule("(If (IntegerLessThan=compare value Read=access))")
16601
cd25e42d9b22 rename IntegerBelowThanNode to IntegerBelowNode
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16573
diff changeset
303 @MatchRule("(If (IntegerBelow=compare value Read=access))")
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
304 @MatchRule("(If (IntegerEquals=compare value FloatingRead=access))")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
305 @MatchRule("(If (IntegerLessThan=compare value FloatingRead=access))")
16601
cd25e42d9b22 rename IntegerBelowThanNode to IntegerBelowNode
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16573
diff changeset
306 @MatchRule("(If (IntegerBelow=compare value FloatingRead=access))")
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
307 @MatchRule("(If (FloatEquals=compare value Read=access))")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
308 @MatchRule("(If (FloatEquals=compare value FloatingRead=access))")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
309 @MatchRule("(If (FloatLessThan=compare value Read=access))")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
310 @MatchRule("(If (FloatLessThan=compare value FloatingRead=access))")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
311 public ComplexMatchResult ifCompareMemory(IfNode root, CompareNode compare, ValueNode value, Access access) {
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
312 return emitCompareBranchMemory(root, compare, value, access);
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
313 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
314
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
315 @MatchRule("(Or (LeftShift=lshift value Constant) (UnsignedRightShift=rshift value Constant))")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
316 public ComplexMatchResult rotateLeftConstant(LeftShiftNode lshift, UnsignedRightShiftNode rshift) {
18187
9619ba4daf4c Rename Constant to JavaConstant.
Roland Schatz <roland.schatz@oracle.com>
parents: 18149
diff changeset
317 if ((lshift.getShiftAmountMask() & (lshift.getY().asJavaConstant().asInt() + rshift.getY().asJavaConstant().asInt())) == 0) {
16207
df6f2365b153 rename of x() to getX(), y() to getY() and object() to getValue()
Lukas Stadler <lukas.stadler@oracle.com>
parents: 16156
diff changeset
318 return builder -> getLIRGeneratorTool().emitRol(operand(lshift.getX()), operand(lshift.getY()));
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
319 }
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
320 return null;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
321 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
322
17197
ec35bb4eccb8 Add support for other data types to integer arithmetic nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 16982
diff changeset
323 @MatchRule("(Or (LeftShift value (Sub Constant=delta shiftAmount)) (UnsignedRightShift value shiftAmount))")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
324 public ComplexMatchResult rotateRightVariable(ValueNode value, ConstantNode delta, ValueNode shiftAmount) {
18187
9619ba4daf4c Rename Constant to JavaConstant.
Roland Schatz <roland.schatz@oracle.com>
parents: 18149
diff changeset
325 if (delta.asJavaConstant().asLong() == 0 || delta.asJavaConstant().asLong() == 32) {
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
326 return builder -> getLIRGeneratorTool().emitRor(operand(value), operand(shiftAmount));
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
327 }
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
328 return null;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
329 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
330
17197
ec35bb4eccb8 Add support for other data types to integer arithmetic nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 16982
diff changeset
331 @MatchRule("(Or (LeftShift value shiftAmount) (UnsignedRightShift value (Sub Constant=delta shiftAmount)))")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
332 public ComplexMatchResult rotateLeftVariable(ValueNode value, ValueNode shiftAmount, ConstantNode delta) {
18187
9619ba4daf4c Rename Constant to JavaConstant.
Roland Schatz <roland.schatz@oracle.com>
parents: 18149
diff changeset
333 if (delta.asJavaConstant().asLong() == 0 || delta.asJavaConstant().asLong() == 32) {
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
334 return builder -> getLIRGeneratorTool().emitRol(operand(value), operand(shiftAmount));
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
335 }
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
336 return null;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
337 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
338
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
339 private ComplexMatchResult binaryRead(AMD64RMOp op, OperandSize size, ValueNode value, Access access) {
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
340 return builder -> getLIRGeneratorTool().emitBinaryMemory(op, size, getLIRGeneratorTool().asAllocatable(operand(value)), (AMD64AddressValue) operand(access.getAddress()), getState(access));
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
341 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
342
17197
ec35bb4eccb8 Add support for other data types to integer arithmetic nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 16982
diff changeset
343 @MatchRule("(Add value Read=access)")
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
344 @MatchRule("(Add value FloatingRead=access)")
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
345 public ComplexMatchResult addMemory(ValueNode value, Access access) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
346 OperandSize size = getMemorySize(access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
347 if (size.isXmmType()) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
348 return binaryRead(SSEOp.ADD, size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
349 } else {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
350 return binaryRead(ADD.getRMOpcode(size), size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
351 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
352 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
353
17197
ec35bb4eccb8 Add support for other data types to integer arithmetic nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 16982
diff changeset
354 @MatchRule("(Sub value Read=access)")
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
355 @MatchRule("(Sub value FloatingRead=access)")
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
356 public ComplexMatchResult subMemory(ValueNode value, Access access) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
357 OperandSize size = getMemorySize(access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
358 if (size.isXmmType()) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
359 return binaryRead(SSEOp.SUB, size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
360 } else {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
361 return binaryRead(SUB.getRMOpcode(size), size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
362 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
363 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
364
17197
ec35bb4eccb8 Add support for other data types to integer arithmetic nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 16982
diff changeset
365 @MatchRule("(Mul value Read=access)")
ec35bb4eccb8 Add support for other data types to integer arithmetic nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 16982
diff changeset
366 @MatchRule("(Mul value FloatingRead=access)")
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
367 public ComplexMatchResult mulMemory(ValueNode value, Access access) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
368 OperandSize size = getMemorySize(access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
369 if (size.isXmmType()) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
370 return binaryRead(SSEOp.MUL, size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
371 } else {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
372 return binaryRead(AMD64RMOp.IMUL, size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
373 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
374 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
375
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
376 @MatchRule("(And value Read=access)")
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
377 @MatchRule("(And value FloatingRead=access)")
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
378 public ComplexMatchResult andMemory(ValueNode value, Access access) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
379 OperandSize size = getMemorySize(access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
380 if (size.isXmmType()) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
381 return null;
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
382 } else {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
383 return binaryRead(AND.getRMOpcode(size), size, value, access);
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
384 }
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
385 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
386
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
387 @MatchRule("(Or value Read=access)")
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
388 @MatchRule("(Or value FloatingRead=access)")
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
389 public ComplexMatchResult orMemory(ValueNode value, Access access) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
390 OperandSize size = getMemorySize(access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
391 if (size.isXmmType()) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
392 return null;
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
393 } else {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
394 return binaryRead(OR.getRMOpcode(size), size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
395 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
396 }
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
397
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
398 @MatchRule("(Xor value Read=access)")
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
399 @MatchRule("(Xor value FloatingRead=access)")
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
400 public ComplexMatchResult xorMemory(ValueNode value, Access access) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
401 OperandSize size = getMemorySize(access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
402 if (size.isXmmType()) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
403 return null;
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
404 } else {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
405 return binaryRead(XOR.getRMOpcode(size), size, value, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
406 }
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
407 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
408
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
409 @MatchRule("(Write object Narrow=narrow)")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
410 public ComplexMatchResult writeNarrow(WriteNode root, NarrowNode narrow) {
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
411 return builder -> {
16094
c0b8d395368b Introduce LIRKind to accurately track oop references in backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 16083
diff changeset
412 LIRKind writeKind = getLIRGeneratorTool().getLIRKind(root.value().stamp());
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
413 getLIRGeneratorTool().emitStore(writeKind, operand(root.getAddress()), operand(narrow.getValue()), state(root));
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
414 return null;
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
415 };
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
416 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
417
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
418 @MatchRule("(SignExtend Read=access)")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
419 @MatchRule("(SignExtend FloatingRead=access)")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
420 public ComplexMatchResult signExtend(SignExtendNode root, Access access) {
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
421 return emitSignExtendMemory(access, root.getInputBits(), root.getResultBits());
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
422 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
423
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
424 @MatchRule("(ZeroExtend Read=access)")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
425 @MatchRule("(ZeroExtend FloatingRead=access)")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
426 public ComplexMatchResult zeroExtend(ZeroExtendNode root, Access access) {
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
427 Kind memoryKind = getMemoryKind(access);
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
428 if (memoryKind.getBitCount() != root.getInputBits() && !memoryKind.isUnsigned()) {
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
429 /*
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
430 * The memory being read from is signed and smaller than the result size so this is a
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
431 * sign extension to inputBits followed by a zero extension to resultBits which can't be
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
432 * expressed in a memory operation.
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
433 */
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
434 return null;
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
435 }
21784
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
436 return builder -> getLIRGeneratorTool().emitZeroExtendMemory(memoryKind == Kind.Short ? Kind.Char : memoryKind, root.getResultBits(), (AMD64AddressValue) operand(access.getAddress()),
f4e1d958f1c3 [AMD64] Create AMD64 specific address nodes.
Roland Schatz <roland.schatz@oracle.com>
parents: 21720
diff changeset
437 getState(access));
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
438 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
439
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
440 @MatchRule("(FloatConvert Read=access)")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
441 @MatchRule("(FloatConvert FloatingRead=access)")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
442 public ComplexMatchResult floatConvert(FloatConvertNode root, Access access) {
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
443 switch (root.getFloatConvert()) {
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
444 case D2F:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
445 return emitConvertMemoryOp(Kind.Float, SSEOp.CVTSD2SS, SD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
446 case D2I:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
447 return emitConvertMemoryOp(Kind.Int, SSEOp.CVTTSD2SI, DWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
448 case D2L:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
449 return emitConvertMemoryOp(Kind.Long, SSEOp.CVTTSD2SI, QWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
450 case F2D:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
451 return emitConvertMemoryOp(Kind.Double, SSEOp.CVTSS2SD, SS, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
452 case F2I:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
453 return emitConvertMemoryOp(Kind.Int, SSEOp.CVTTSS2SI, DWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
454 case F2L:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
455 return emitConvertMemoryOp(Kind.Long, SSEOp.CVTTSS2SI, QWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
456 case I2D:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
457 return emitConvertMemoryOp(Kind.Double, SSEOp.CVTSI2SD, DWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
458 case I2F:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
459 return emitConvertMemoryOp(Kind.Float, SSEOp.CVTSI2SS, DWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
460 case L2D:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
461 return emitConvertMemoryOp(Kind.Double, SSEOp.CVTSI2SD, QWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
462 case L2F:
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
463 return emitConvertMemoryOp(Kind.Float, SSEOp.CVTSI2SS, QWORD, access);
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
464 default:
21543
93c50cefb9e8 moved GraalInternalError to com.oracle.jvmci.common and renamed it to JVMCIError (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21418
diff changeset
465 throw JVMCIError.shouldNotReachHere();
19867
89c729e9e0a4 Refactoring of AMD64 code generation.
Roland Schatz <roland.schatz@oracle.com>
parents: 19582
diff changeset
466 }
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
467 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
468
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
469 @MatchRule("(Reinterpret Read=access)")
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
470 @MatchRule("(Reinterpret FloatingRead=access)")
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
471 public ComplexMatchResult reinterpret(ReinterpretNode root, Access access) {
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
472 return builder -> {
16094
c0b8d395368b Introduce LIRKind to accurately track oop references in backend.
Roland Schatz <roland.schatz@oracle.com>
parents: 16083
diff changeset
473 LIRKind kind = getLIRGeneratorTool().getLIRKind(root.stamp());
15453
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
474 return emitReinterpretMemory(kind, access);
100306ae985b switch MatchRule from class to method annotation and fix review feedback
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15413
diff changeset
475 };
15370
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
476
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
477 }
319deee16746 add support for matching multiple HIR nodes when lowering to LIR
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15333
diff changeset
478
14841
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
479 @Override
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
480 public void visitBreakpointNode(BreakpointNode node) {
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
481 JavaType[] sig = new JavaType[node.arguments().size()];
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
482 for (int i = 0; i < sig.length; i++) {
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
483 sig[i] = node.arguments().get(i).stamp().javaType(gen.getMetaAccess());
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
484 }
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
485
18149
c6086a18c9ce Rename LIRGenerationResult.getFrameMap() to getFrameMapBuilder().
Josef Eisl <josef.eisl@jku.at>
parents: 18123
diff changeset
486 Value[] parameters = visitInvokeArguments(gen.getResult().getFrameMapBuilder().getRegisterConfig().getCallingConvention(CallingConvention.Type.JavaCall, null, sig, gen.target(), false),
18123
3c7e73362d6a Encapsulate FrameMap.registerConfig & FrameMap.target.
Josef Eisl <josef.eisl@jku.at>
parents: 17450
diff changeset
487 node.arguments());
14841
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
488 append(new AMD64BreakpointOp(parameters));
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
489 }
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
490
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
491 @Override
15331
71cdf5518dab Use LIRGeneratorTool in NodeLIRBuilder.
Josef Eisl <josef.eisl@jku.at>
parents: 15301
diff changeset
492 public AMD64LIRGenerator getLIRGeneratorTool() {
14850
Josef Eisl <josef.eisl@jku.at>
parents: 14843
diff changeset
493 return (AMD64LIRGenerator) gen;
Josef Eisl <josef.eisl@jku.at>
parents: 14843
diff changeset
494 }
14841
47e4d2e01c6e Split LIRGenerator and fix AMD64 backend.
Josef Eisl <josef.eisl@jku.at>
parents:
diff changeset
495 }