Mercurial > hg > truffle

comparison src/cpu/x86/vm/assembler_x86.inline.hpp @ 7212:291ffc492eb6

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/
author Doug Simon <doug.simon@oracle.com>
date Fri, 14 Dec 2012 14:35:13 +0100
parents cd3d6a6b95d9
children 90fb04cda7d6
comparison
equal deleted inserted replaced
7163:2ed8d74e5984 7212:291ffc492eb6
26 #define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP 26 #define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
27 27
28 #include "asm/assembler.inline.hpp" 28 #include "asm/assembler.inline.hpp"
29 #include "asm/codeBuffer.hpp" 29 #include "asm/codeBuffer.hpp"
30 #include "code/codeCache.hpp" 30 #include "code/codeCache.hpp"
31 #include "runtime/handles.inline.hpp"
32
33 inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
34 unsigned char op = branch[0];
35 assert(op == 0xE8 /* call */ ||
36 op == 0xE9 /* jmp */ ||
37 op == 0xEB /* short jmp */ ||
38 (op & 0xF0) == 0x70 /* short jcc */ ||
39 op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */,
40 "Invalid opcode at patch point");
41
42 if (op == 0xEB || (op & 0xF0) == 0x70) {
43 // short offset operators (jmp and jcc)
44 char* disp = (char*) &branch[1];
45 int imm8 = target - (address) &disp[1];
46 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset");
47 *disp = imm8;
48 } else {
49 int* disp = (int*) &branch[(op == 0x0F)? 2: 1];
50 int imm32 = target - (address) &disp[1];
51 *disp = imm32;
52 }
53 }
54
55 #ifndef PRODUCT
56 inline void MacroAssembler::pd_print_patched_instruction(address branch) {
57 const char* s;
58 unsigned char op = branch[0];
59 if (op == 0xE8) {
60 s = "call";
61 } else if (op == 0xE9 || op == 0xEB) {
62 s = "jmp";
63 } else if ((op & 0xF0) == 0x70) {
64 s = "jcc";
65 } else if (op == 0x0F) {
66 s = "jcc";
67 } else {
68 s = "????";
69 }
70 tty->print("%s (unresolved)", s);
71 }
72 #endif // ndef PRODUCT
73 31
74 #ifndef _LP64 32 #ifndef _LP64
75 inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; } 33 inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; }
76 inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; } 34 inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; }
77 35
85 inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {} 43 inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {}
86 inline void Assembler::prefixq(Address adr, Register reg) {} 44 inline void Assembler::prefixq(Address adr, Register reg) {}
87 45
88 inline void Assembler::prefix(Address adr, XMMRegister reg) {} 46 inline void Assembler::prefix(Address adr, XMMRegister reg) {}
89 inline void Assembler::prefixq(Address adr, XMMRegister reg) {} 47 inline void Assembler::prefixq(Address adr, XMMRegister reg) {}
90 #else
91 inline void Assembler::emit_long64(jlong x) {
92 *(jlong*) _code_pos = x;
93 _code_pos += sizeof(jlong);
94 code_section()->set_end(_code_pos);
95 }
96 #endif // _LP64 48 #endif // _LP64
97 49
98 #endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP 50 #endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP