--- a/src/cpu/x86/vm/assembler_x86.inline.hpp	Fri Dec 14 10:20:54 2012 +0100
+++ b/src/cpu/x86/vm/assembler_x86.inline.hpp	Fri Dec 14 14:35:13 2012 +0100
@@ -28,48 +28,6 @@
 #include "asm/assembler.inline.hpp"
 #include "asm/codeBuffer.hpp"
 #include "code/codeCache.hpp"
-#include "runtime/handles.inline.hpp"
-
-inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
-  unsigned char op = branch[0];
-  assert(op == 0xE8 /* call */ ||
-         op == 0xE9 /* jmp */ ||
-         op == 0xEB /* short jmp */ ||
-         (op & 0xF0) == 0x70 /* short jcc */ ||
-         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */,
-         "Invalid opcode at patch point");
-
-  if (op == 0xEB || (op & 0xF0) == 0x70) {
-    // short offset operators (jmp and jcc)
-    char* disp = (char*) &branch[1];
-    int imm8 = target - (address) &disp[1];
-    guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset");
-    *disp = imm8;
-  } else {
-    int* disp = (int*) &branch[(op == 0x0F)? 2: 1];
-    int imm32 = target - (address) &disp[1];
-    *disp = imm32;
-  }
-}
-
-#ifndef PRODUCT
-inline void MacroAssembler::pd_print_patched_instruction(address branch) {
-  const char* s;
-  unsigned char op = branch[0];
-  if (op == 0xE8) {
-    s = "call";
-  } else if (op == 0xE9 || op == 0xEB) {
-    s = "jmp";
-  } else if ((op & 0xF0) == 0x70) {
-    s = "jcc";
-  } else if (op == 0x0F) {
-    s = "jcc";
-  } else {
-    s = "????";
-  }
-  tty->print("%s (unresolved)", s);
-}
-#endif // ndef PRODUCT
 
 #ifndef _LP64
 inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; }
@@ -87,12 +45,6 @@
 
 inline void Assembler::prefix(Address adr, XMMRegister reg) {}
 inline void Assembler::prefixq(Address adr, XMMRegister reg) {}
-#else
-inline void Assembler::emit_long64(jlong x) {
-  *(jlong*) _code_pos = x;
-  _code_pos += sizeof(jlong);
-  code_section()->set_end(_code_pos);
-}
 #endif // _LP64
 
 #endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP