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comparison src/cpu/x86/vm/vm_version_x86.hpp @ 20804:7848fc12602b

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Merge with jdk8u40-b25
author Gilles Duboscq <gilles.m.duboscq@oracle.com>
date Tue, 07 Apr 2015 14:58:49 +0200
parents 52b4284cb496 166d744df0de
children
comparison
equal deleted inserted replaced
20184:84105dcdb05b 20804:7848fc12602b
208 : 2, 208 : 2,
209 bmi2 : 1, 209 bmi2 : 1,
210 erms : 1, 210 erms : 1,
211 : 1, 211 : 1,
212 rtm : 1, 212 rtm : 1,
213 : 20; 213 : 7,
214 adx : 1,
215 : 12;
214 } bits; 216 } bits;
215 }; 217 };
216 218
217 union XemXcr0Eax { 219 union XemXcr0Eax {
218 uint32_t value; 220 uint32_t value;
259 CPU_AES = (1 << 19), 261 CPU_AES = (1 << 19),
260 CPU_ERMS = (1 << 20), // enhanced 'rep movsb/stosb' instructions 262 CPU_ERMS = (1 << 20), // enhanced 'rep movsb/stosb' instructions
261 CPU_CLMUL = (1 << 21), // carryless multiply for CRC 263 CPU_CLMUL = (1 << 21), // carryless multiply for CRC
262 CPU_BMI1 = (1 << 22), 264 CPU_BMI1 = (1 << 22),
263 CPU_BMI2 = (1 << 23), 265 CPU_BMI2 = (1 << 23),
264 CPU_RTM = (1 << 24) // Restricted Transactional Memory instructions 266 CPU_RTM = (1 << 24), // Restricted Transactional Memory instructions
267 CPU_ADX = (1 << 25)
265 } cpuFeatureFlags; 268 } cpuFeatureFlags;
266 269
267 enum { 270 enum {
268 // AMD 271 // AMD
269 CPU_FAMILY_AMD_11H = 0x11, 272 CPU_FAMILY_AMD_11H = 0x11,
275 CPU_MODEL_WESTMERE = 0x25, 278 CPU_MODEL_WESTMERE = 0x25,
276 CPU_MODEL_WESTMERE_EP = 0x2c, 279 CPU_MODEL_WESTMERE_EP = 0x2c,
277 CPU_MODEL_WESTMERE_EX = 0x2f, 280 CPU_MODEL_WESTMERE_EX = 0x2f,
278 CPU_MODEL_SANDYBRIDGE = 0x2a, 281 CPU_MODEL_SANDYBRIDGE = 0x2a,
279 CPU_MODEL_SANDYBRIDGE_EP = 0x2d, 282 CPU_MODEL_SANDYBRIDGE_EP = 0x2d,
280 CPU_MODEL_IVYBRIDGE_EP = 0x3a 283 CPU_MODEL_IVYBRIDGE_EP = 0x3a,
284 CPU_MODEL_HASWELL_E3 = 0x3c,
285 CPU_MODEL_HASWELL_E7 = 0x3f,
286 CPU_MODEL_BROADWELL = 0x3d
281 } cpuExtendedFamily; 287 } cpuExtendedFamily;
282 288
283 // cpuid information block. All info derived from executing cpuid with 289 // cpuid information block. All info derived from executing cpuid with
284 // various function numbers is stored here. Intel and AMD info is 290 // various function numbers is stored here. Intel and AMD info is
285 // merged in this block: accessor methods disentangle it. 291 // merged in this block: accessor methods disentangle it.
461 if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0) 467 if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0)
462 result |= CPU_SSE4A; 468 result |= CPU_SSE4A;
463 } 469 }
464 // Intel features. 470 // Intel features.
465 if(is_intel()) { 471 if(is_intel()) {
472 if(_cpuid_info.sef_cpuid7_ebx.bits.adx != 0)
473 result |= CPU_ADX;
466 if(_cpuid_info.sef_cpuid7_ebx.bits.bmi2 != 0) 474 if(_cpuid_info.sef_cpuid7_ebx.bits.bmi2 != 0)
467 result |= CPU_BMI2; 475 result |= CPU_BMI2;
468 if(_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0) 476 if(_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0)
469 result |= CPU_LZCNT; 477 result |= CPU_LZCNT;
478 // for Intel, ecx.bits.misalignsse bit (bit 8) indicates support for prefetchw
479 if (_cpuid_info.ext_cpuid1_ecx.bits.misalignsse != 0) {
480 result |= CPU_3DNOW_PREFETCH;
481 }
470 } 482 }
471 483
472 return result; 484 return result;
473 } 485 }
474 486
617 static bool supports_erms() { return (_cpuFeatures & CPU_ERMS) != 0; } 629 static bool supports_erms() { return (_cpuFeatures & CPU_ERMS) != 0; }
618 static bool supports_clmul() { return (_cpuFeatures & CPU_CLMUL) != 0; } 630 static bool supports_clmul() { return (_cpuFeatures & CPU_CLMUL) != 0; }
619 static bool supports_rtm() { return (_cpuFeatures & CPU_RTM) != 0; } 631 static bool supports_rtm() { return (_cpuFeatures & CPU_RTM) != 0; }
620 static bool supports_bmi1() { return (_cpuFeatures & CPU_BMI1) != 0; } 632 static bool supports_bmi1() { return (_cpuFeatures & CPU_BMI1) != 0; }
621 static bool supports_bmi2() { return (_cpuFeatures & CPU_BMI2) != 0; } 633 static bool supports_bmi2() { return (_cpuFeatures & CPU_BMI2) != 0; }
634 static bool supports_adx() { return (_cpuFeatures & CPU_ADX) != 0; }
622 // Intel features 635 // Intel features
623 static bool is_intel_family_core() { return is_intel() && 636 static bool is_intel_family_core() { return is_intel() &&
624 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } 637 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
625 638
626 static bool is_intel_tsc_synched_at_init() { 639 static bool is_intel_tsc_synched_at_init() {