comparison src/cpu/x86/vm/x86.ad @ 4950:9b8ce46870df

7145346: VerifyStackAtCalls is broken Summary: Replace call_epilog() encoding with macroassembler use. Moved duplicated code to x86.ad. Fixed return_addr() definition. Reviewed-by: never
author kvn
date Thu, 16 Feb 2012 17:12:49 -0800
parents 65149e74c706
children 8c92982cbbc4
comparison
equal deleted inserted replaced
4949:ad3b47344802 4950:9b8ce46870df
1 // 1 //
2 // Copyright (c) 2011, Oracle and/or its affiliates. All rights reserved. 2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 // 4 //
5 // This code is free software; you can redistribute it and/or modify it 5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as 6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation. 7 // published by the Free Software Foundation.
35 static address float_signmask() { return (address)float_signmask_pool; } 35 static address float_signmask() { return (address)float_signmask_pool; }
36 static address float_signflip() { return (address)float_signflip_pool; } 36 static address float_signflip() { return (address)float_signflip_pool; }
37 static address double_signmask() { return (address)double_signmask_pool; } 37 static address double_signmask() { return (address)double_signmask_pool; }
38 static address double_signflip() { return (address)double_signflip_pool; } 38 static address double_signflip() { return (address)double_signflip_pool; }
39 #endif 39 #endif
40
41 #ifndef PRODUCT
42 void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const {
43 st->print("nop \t# %d bytes pad for loops and calls", _count);
44 }
45 #endif
46
47 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
48 MacroAssembler _masm(&cbuf);
49 __ nop(_count);
50 }
51
52 uint MachNopNode::size(PhaseRegAlloc*) const {
53 return _count;
54 }
55
56 #ifndef PRODUCT
57 void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const {
58 st->print("# breakpoint");
59 }
60 #endif
61
62 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
63 MacroAssembler _masm(&cbuf);
64 __ int3();
65 }
66
67 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
68 return MachNode::size(ra_);
69 }
70
71 %}
72
73 encode %{
74
75 enc_class preserve_SP %{
76 debug_only(int off0 = cbuf.insts_size());
77 MacroAssembler _masm(&cbuf);
78 // RBP is preserved across all calls, even compiled calls.
79 // Use it to preserve RSP in places where the callee might change the SP.
80 __ movptr(rbp_mh_SP_save, rsp);
81 debug_only(int off1 = cbuf.insts_size());
82 assert(off1 - off0 == preserve_SP_size(), "correct size prediction");
83 %}
84
85 enc_class restore_SP %{
86 MacroAssembler _masm(&cbuf);
87 __ movptr(rsp, rbp_mh_SP_save);
88 %}
89
90 enc_class call_epilog %{
91 if (VerifyStackAtCalls) {
92 // Check that stack depth is unchanged: find majik cookie on stack
93 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
94 MacroAssembler _masm(&cbuf);
95 Label L;
96 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
97 __ jccb(Assembler::equal, L);
98 // Die if stack mismatch
99 __ int3();
100 __ bind(L);
101 }
102 %}
103
40 %} 104 %}
41 105
42 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit) 106 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
107
108 // ============================================================================
109
110 instruct ShouldNotReachHere() %{
111 match(Halt);
112 format %{ "int3\t# ShouldNotReachHere" %}
113 ins_encode %{
114 __ int3();
115 %}
116 ins_pipe(pipe_slow);
117 %}
118
119 // ============================================================================
43 120
44 instruct addF_reg(regF dst, regF src) %{ 121 instruct addF_reg(regF dst, regF src) %{
45 predicate((UseSSE>=1) && (UseAVX == 0)); 122 predicate((UseSSE>=1) && (UseAVX == 0));
46 match(Set dst (AddF dst src)); 123 match(Set dst (AddF dst src));
47 124