Mercurial > hg > truffle
comparison src/share/vm/opto/chaitin.cpp @ 12355:cefad50507d8
Merge with hs25-b53
author | Gilles Duboscq <duboscq@ssw.jku.at> |
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date | Fri, 11 Oct 2013 10:38:03 +0200 |
parents | 8c83625e3a53 |
children | 303c352ba1a8 15120a36272d |
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12058:ccb4f2af2319 | 12355:cefad50507d8 |
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38 #include "opto/machnode.hpp" | 38 #include "opto/machnode.hpp" |
39 #include "opto/memnode.hpp" | 39 #include "opto/memnode.hpp" |
40 #include "opto/opcodes.hpp" | 40 #include "opto/opcodes.hpp" |
41 #include "opto/rootnode.hpp" | 41 #include "opto/rootnode.hpp" |
42 | 42 |
43 //============================================================================= | |
44 | |
45 #ifndef PRODUCT | 43 #ifndef PRODUCT |
46 void LRG::dump( ) const { | 44 void LRG::dump() const { |
47 ttyLocker ttyl; | 45 ttyLocker ttyl; |
48 tty->print("%d ",num_regs()); | 46 tty->print("%d ",num_regs()); |
49 _mask.dump(); | 47 _mask.dump(); |
50 if( _msize_valid ) { | 48 if( _msize_valid ) { |
51 if( mask_size() == compute_mask_size() ) tty->print(", #%d ",_mask_size); | 49 if( mask_size() == compute_mask_size() ) tty->print(", #%d ",_mask_size); |
92 | 90 |
93 tty->cr(); | 91 tty->cr(); |
94 } | 92 } |
95 #endif | 93 #endif |
96 | 94 |
97 //------------------------------score------------------------------------------ | |
98 // Compute score from cost and area. Low score is best to spill. | 95 // Compute score from cost and area. Low score is best to spill. |
99 static double raw_score( double cost, double area ) { | 96 static double raw_score( double cost, double area ) { |
100 return cost - (area*RegisterCostAreaRatio) * 1.52588e-5; | 97 return cost - (area*RegisterCostAreaRatio) * 1.52588e-5; |
101 } | 98 } |
102 | 99 |
123 return score + 1e10; // Likely no progress to spill | 120 return score + 1e10; // Likely no progress to spill |
124 | 121 |
125 return score; | 122 return score; |
126 } | 123 } |
127 | 124 |
128 //------------------------------LRG_List--------------------------------------- | |
129 LRG_List::LRG_List( uint max ) : _cnt(max), _max(max), _lidxs(NEW_RESOURCE_ARRAY(uint,max)) { | |
130 memset( _lidxs, 0, sizeof(uint)*max ); | |
131 } | |
132 | |
133 void LRG_List::extend( uint nidx, uint lidx ) { | |
134 _nesting.check(); | |
135 if( nidx >= _max ) { | |
136 uint size = 16; | |
137 while( size <= nidx ) size <<=1; | |
138 _lidxs = REALLOC_RESOURCE_ARRAY( uint, _lidxs, _max, size ); | |
139 _max = size; | |
140 } | |
141 while( _cnt <= nidx ) | |
142 _lidxs[_cnt++] = 0; | |
143 _lidxs[nidx] = lidx; | |
144 } | |
145 | |
146 #define NUMBUCKS 3 | 125 #define NUMBUCKS 3 |
147 | 126 |
148 // Straight out of Tarjan's union-find algorithm | 127 // Straight out of Tarjan's union-find algorithm |
149 uint LiveRangeMap::find_compress(uint lrg) { | 128 uint LiveRangeMap::find_compress(uint lrg) { |
150 uint cur = lrg; | 129 uint cur = lrg; |
151 uint next = _uf_map[cur]; | 130 uint next = _uf_map.at(cur); |
152 while (next != cur) { // Scan chain of equivalences | 131 while (next != cur) { // Scan chain of equivalences |
153 assert( next < cur, "always union smaller"); | 132 assert( next < cur, "always union smaller"); |
154 cur = next; // until find a fixed-point | 133 cur = next; // until find a fixed-point |
155 next = _uf_map[cur]; | 134 next = _uf_map.at(cur); |
156 } | 135 } |
157 | 136 |
158 // Core of union-find algorithm: update chain of | 137 // Core of union-find algorithm: update chain of |
159 // equivalences to be equal to the root. | 138 // equivalences to be equal to the root. |
160 while (lrg != next) { | 139 while (lrg != next) { |
161 uint tmp = _uf_map[lrg]; | 140 uint tmp = _uf_map.at(lrg); |
162 _uf_map.map(lrg, next); | 141 _uf_map.at_put(lrg, next); |
163 lrg = tmp; | 142 lrg = tmp; |
164 } | 143 } |
165 return lrg; | 144 return lrg; |
166 } | 145 } |
167 | 146 |
168 // Reset the Union-Find map to identity | 147 // Reset the Union-Find map to identity |
169 void LiveRangeMap::reset_uf_map(uint max_lrg_id) { | 148 void LiveRangeMap::reset_uf_map(uint max_lrg_id) { |
170 _max_lrg_id= max_lrg_id; | 149 _max_lrg_id= max_lrg_id; |
171 // Force the Union-Find mapping to be at least this large | 150 // Force the Union-Find mapping to be at least this large |
172 _uf_map.extend(_max_lrg_id, 0); | 151 _uf_map.at_put_grow(_max_lrg_id, 0); |
173 // Initialize it to be the ID mapping. | 152 // Initialize it to be the ID mapping. |
174 for (uint i = 0; i < _max_lrg_id; ++i) { | 153 for (uint i = 0; i < _max_lrg_id; ++i) { |
175 _uf_map.map(i, i); | 154 _uf_map.at_put(i, i); |
176 } | 155 } |
177 } | 156 } |
178 | 157 |
179 // Make all Nodes map directly to their final live range; no need for | 158 // Make all Nodes map directly to their final live range; no need for |
180 // the Union-Find mapping after this call. | 159 // the Union-Find mapping after this call. |
181 void LiveRangeMap::compress_uf_map_for_nodes() { | 160 void LiveRangeMap::compress_uf_map_for_nodes() { |
182 // For all Nodes, compress mapping | 161 // For all Nodes, compress mapping |
183 uint unique = _names.Size(); | 162 uint unique = _names.length(); |
184 for (uint i = 0; i < unique; ++i) { | 163 for (uint i = 0; i < unique; ++i) { |
185 uint lrg = _names[i]; | 164 uint lrg = _names.at(i); |
186 uint compressed_lrg = find(lrg); | 165 uint compressed_lrg = find(lrg); |
187 if (lrg != compressed_lrg) { | 166 if (lrg != compressed_lrg) { |
188 _names.map(i, compressed_lrg); | 167 _names.at_put(i, compressed_lrg); |
189 } | 168 } |
190 } | 169 } |
191 } | 170 } |
192 | 171 |
193 // Like Find above, but no path compress, so bad asymptotic behavior | 172 // Like Find above, but no path compress, so bad asymptotic behavior |
200 // brand new live ranges but have not told the allocator yet. | 179 // brand new live ranges but have not told the allocator yet. |
201 if (lrg >= _max_lrg_id) { | 180 if (lrg >= _max_lrg_id) { |
202 return lrg; | 181 return lrg; |
203 } | 182 } |
204 | 183 |
205 uint next = _uf_map[lrg]; | 184 uint next = _uf_map.at(lrg); |
206 while (next != lrg) { // Scan chain of equivalences | 185 while (next != lrg) { // Scan chain of equivalences |
207 assert(next < lrg, "always union smaller"); | 186 assert(next < lrg, "always union smaller"); |
208 lrg = next; // until find a fixed-point | 187 lrg = next; // until find a fixed-point |
209 next = _uf_map[lrg]; | 188 next = _uf_map.at(lrg); |
210 } | 189 } |
211 return next; | 190 return next; |
212 } | 191 } |
213 | 192 |
214 //------------------------------Chaitin---------------------------------------- | |
215 PhaseChaitin::PhaseChaitin(uint unique, PhaseCFG &cfg, Matcher &matcher) | 193 PhaseChaitin::PhaseChaitin(uint unique, PhaseCFG &cfg, Matcher &matcher) |
216 : PhaseRegAlloc(unique, cfg, matcher, | 194 : PhaseRegAlloc(unique, cfg, matcher, |
217 #ifndef PRODUCT | 195 #ifndef PRODUCT |
218 print_chaitin_statistics | 196 print_chaitin_statistics |
219 #else | 197 #else |
220 NULL | 198 NULL |
221 #endif | 199 #endif |
222 ) | 200 ) |
223 , _lrg_map(unique) | 201 , _lrg_map(Thread::current()->resource_area(), unique) |
224 , _live(0) | 202 , _live(0) |
225 , _spilled_once(Thread::current()->resource_area()) | 203 , _spilled_once(Thread::current()->resource_area()) |
226 , _spilled_twice(Thread::current()->resource_area()) | 204 , _spilled_twice(Thread::current()->resource_area()) |
227 , _lo_degree(0), _lo_stk_degree(0), _hi_degree(0), _simplified(0) | 205 , _lo_degree(0), _lo_stk_degree(0), _hi_degree(0), _simplified(0) |
228 , _oldphi(unique) | 206 , _oldphi(unique) |
230 , _trace_spilling(TraceSpilling || C->method_has_option("TraceSpilling")) | 208 , _trace_spilling(TraceSpilling || C->method_has_option("TraceSpilling")) |
231 #endif | 209 #endif |
232 { | 210 { |
233 NOT_PRODUCT( Compile::TracePhase t3("ctorChaitin", &_t_ctorChaitin, TimeCompiler); ) | 211 NOT_PRODUCT( Compile::TracePhase t3("ctorChaitin", &_t_ctorChaitin, TimeCompiler); ) |
234 | 212 |
235 _high_frequency_lrg = MIN2(float(OPTO_LRG_HIGH_FREQ), _cfg._outer_loop_freq); | 213 _high_frequency_lrg = MIN2(float(OPTO_LRG_HIGH_FREQ), _cfg.get_outer_loop_frequency()); |
236 | 214 |
237 // Build a list of basic blocks, sorted by frequency | 215 // Build a list of basic blocks, sorted by frequency |
238 _blks = NEW_RESOURCE_ARRAY( Block *, _cfg._num_blocks ); | 216 _blks = NEW_RESOURCE_ARRAY(Block *, _cfg.number_of_blocks()); |
239 // Experiment with sorting strategies to speed compilation | 217 // Experiment with sorting strategies to speed compilation |
240 double cutoff = BLOCK_FREQUENCY(1.0); // Cutoff for high frequency bucket | 218 double cutoff = BLOCK_FREQUENCY(1.0); // Cutoff for high frequency bucket |
241 Block **buckets[NUMBUCKS]; // Array of buckets | 219 Block **buckets[NUMBUCKS]; // Array of buckets |
242 uint buckcnt[NUMBUCKS]; // Array of bucket counters | 220 uint buckcnt[NUMBUCKS]; // Array of bucket counters |
243 double buckval[NUMBUCKS]; // Array of bucket value cutoffs | 221 double buckval[NUMBUCKS]; // Array of bucket value cutoffs |
244 for (uint i = 0; i < NUMBUCKS; i++) { | 222 for (uint i = 0; i < NUMBUCKS; i++) { |
245 buckets[i] = NEW_RESOURCE_ARRAY(Block *, _cfg._num_blocks); | 223 buckets[i] = NEW_RESOURCE_ARRAY(Block *, _cfg.number_of_blocks()); |
246 buckcnt[i] = 0; | 224 buckcnt[i] = 0; |
247 // Bump by three orders of magnitude each time | 225 // Bump by three orders of magnitude each time |
248 cutoff *= 0.001; | 226 cutoff *= 0.001; |
249 buckval[i] = cutoff; | 227 buckval[i] = cutoff; |
250 for (uint j = 0; j < _cfg._num_blocks; j++) { | 228 for (uint j = 0; j < _cfg.number_of_blocks(); j++) { |
251 buckets[i][j] = NULL; | 229 buckets[i][j] = NULL; |
252 } | 230 } |
253 } | 231 } |
254 // Sort blocks into buckets | 232 // Sort blocks into buckets |
255 for (uint i = 0; i < _cfg._num_blocks; i++) { | 233 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
256 for (uint j = 0; j < NUMBUCKS; j++) { | 234 for (uint j = 0; j < NUMBUCKS; j++) { |
257 if ((j == NUMBUCKS - 1) || (_cfg._blocks[i]->_freq > buckval[j])) { | 235 if ((j == NUMBUCKS - 1) || (_cfg.get_block(i)->_freq > buckval[j])) { |
258 // Assign block to end of list for appropriate bucket | 236 // Assign block to end of list for appropriate bucket |
259 buckets[j][buckcnt[j]++] = _cfg._blocks[i]; | 237 buckets[j][buckcnt[j]++] = _cfg.get_block(i); |
260 break; // kick out of inner loop | 238 break; // kick out of inner loop |
261 } | 239 } |
262 } | 240 } |
263 } | 241 } |
264 // Dump buckets into final block array | 242 // Dump buckets into final block array |
267 for (uint j = 0; j < buckcnt[i]; j++) { | 245 for (uint j = 0; j < buckcnt[i]; j++) { |
268 _blks[blkcnt++] = buckets[i][j]; | 246 _blks[blkcnt++] = buckets[i][j]; |
269 } | 247 } |
270 } | 248 } |
271 | 249 |
272 assert(blkcnt == _cfg._num_blocks, "Block array not totally filled"); | 250 assert(blkcnt == _cfg.number_of_blocks(), "Block array not totally filled"); |
273 } | 251 } |
274 | 252 |
275 //------------------------------Union------------------------------------------ | |
276 // union 2 sets together. | 253 // union 2 sets together. |
277 void PhaseChaitin::Union( const Node *src_n, const Node *dst_n ) { | 254 void PhaseChaitin::Union( const Node *src_n, const Node *dst_n ) { |
278 uint src = _lrg_map.find(src_n); | 255 uint src = _lrg_map.find(src_n); |
279 uint dst = _lrg_map.find(dst_n); | 256 uint dst = _lrg_map.find(dst_n); |
280 assert(src, ""); | 257 assert(src, ""); |
283 assert(dst < _lrg_map.max_lrg_id(), "oob"); | 260 assert(dst < _lrg_map.max_lrg_id(), "oob"); |
284 assert(src < dst, "always union smaller"); | 261 assert(src < dst, "always union smaller"); |
285 _lrg_map.uf_map(dst, src); | 262 _lrg_map.uf_map(dst, src); |
286 } | 263 } |
287 | 264 |
288 //------------------------------new_lrg---------------------------------------- | |
289 void PhaseChaitin::new_lrg(const Node *x, uint lrg) { | 265 void PhaseChaitin::new_lrg(const Node *x, uint lrg) { |
290 // Make the Node->LRG mapping | 266 // Make the Node->LRG mapping |
291 _lrg_map.extend(x->_idx,lrg); | 267 _lrg_map.extend(x->_idx,lrg); |
292 // Make the Union-Find mapping an identity function | 268 // Make the Union-Find mapping an identity function |
293 _lrg_map.uf_extend(lrg, lrg); | 269 _lrg_map.uf_extend(lrg, lrg); |
294 } | 270 } |
295 | 271 |
296 | 272 |
297 bool PhaseChaitin::clone_projs_shared(Block *b, uint idx, Node *con, Node *copy, uint max_lrg_id) { | 273 int PhaseChaitin::clone_projs(Block* b, uint idx, Node* orig, Node* copy, uint& max_lrg_id) { |
298 Block* bcon = _cfg.get_block_for_node(con); | 274 assert(b->find_node(copy) == (idx - 1), "incorrect insert index for copy kill projections"); |
299 uint cindex = bcon->find_node(con); | 275 DEBUG_ONLY( Block* borig = _cfg.get_block_for_node(orig); ) |
300 Node *con_next = bcon->_nodes[cindex+1]; | 276 int found_projs = 0; |
301 if (con_next->in(0) != con || !con_next->is_MachProj()) { | 277 uint cnt = orig->outcnt(); |
302 return false; // No MachProj's follow | 278 for (uint i = 0; i < cnt; i++) { |
303 } | 279 Node* proj = orig->raw_out(i); |
304 | 280 if (proj->is_MachProj()) { |
305 // Copy kills after the cloned constant | 281 assert(proj->outcnt() == 0, "only kill projections are expected here"); |
306 Node *kills = con_next->clone(); | 282 assert(_cfg.get_block_for_node(proj) == borig, "incorrect block for kill projections"); |
307 kills->set_req(0, copy); | 283 found_projs++; |
308 b->_nodes.insert(idx, kills); | 284 // Copy kill projections after the cloned node |
309 _cfg.map_node_to_block(kills, b); | 285 Node* kills = proj->clone(); |
310 new_lrg(kills, max_lrg_id); | 286 kills->set_req(0, copy); |
311 return true; | 287 b->insert_node(kills, idx++); |
312 } | 288 _cfg.map_node_to_block(kills, b); |
313 | 289 new_lrg(kills, max_lrg_id++); |
314 //------------------------------compact---------------------------------------- | 290 } |
291 } | |
292 return found_projs; | |
293 } | |
294 | |
315 // Renumber the live ranges to compact them. Makes the IFG smaller. | 295 // Renumber the live ranges to compact them. Makes the IFG smaller. |
316 void PhaseChaitin::compact() { | 296 void PhaseChaitin::compact() { |
317 // Current the _uf_map contains a series of short chains which are headed | 297 // Current the _uf_map contains a series of short chains which are headed |
318 // by a self-cycle. All the chains run from big numbers to little numbers. | 298 // by a self-cycle. All the chains run from big numbers to little numbers. |
319 // The Find() call chases the chains & shortens them for the next Find call. | 299 // The Find() call chases the chains & shortens them for the next Find call. |
675 _live = NULL; | 655 _live = NULL; |
676 _ifg = NULL; | 656 _ifg = NULL; |
677 C->set_indexSet_arena(NULL); // ResourceArea is at end of scope | 657 C->set_indexSet_arena(NULL); // ResourceArea is at end of scope |
678 } | 658 } |
679 | 659 |
680 //------------------------------de_ssa----------------------------------------- | |
681 void PhaseChaitin::de_ssa() { | 660 void PhaseChaitin::de_ssa() { |
682 // Set initial Names for all Nodes. Most Nodes get the virtual register | 661 // Set initial Names for all Nodes. Most Nodes get the virtual register |
683 // number. A few get the ZERO live range number. These do not | 662 // number. A few get the ZERO live range number. These do not |
684 // get allocated, but instead rely on correct scheduling to ensure that | 663 // get allocated, but instead rely on correct scheduling to ensure that |
685 // only one instance is simultaneously live at a time. | 664 // only one instance is simultaneously live at a time. |
686 uint lr_counter = 1; | 665 uint lr_counter = 1; |
687 for( uint i = 0; i < _cfg._num_blocks; i++ ) { | 666 for( uint i = 0; i < _cfg.number_of_blocks(); i++ ) { |
688 Block *b = _cfg._blocks[i]; | 667 Block* block = _cfg.get_block(i); |
689 uint cnt = b->_nodes.size(); | 668 uint cnt = block->number_of_nodes(); |
690 | 669 |
691 // Handle all the normal Nodes in the block | 670 // Handle all the normal Nodes in the block |
692 for( uint j = 0; j < cnt; j++ ) { | 671 for( uint j = 0; j < cnt; j++ ) { |
693 Node *n = b->_nodes[j]; | 672 Node *n = block->get_node(j); |
694 // Pre-color to the zero live range, or pick virtual register | 673 // Pre-color to the zero live range, or pick virtual register |
695 const RegMask &rm = n->out_RegMask(); | 674 const RegMask &rm = n->out_RegMask(); |
696 _lrg_map.map(n->_idx, rm.is_NotEmpty() ? lr_counter++ : 0); | 675 _lrg_map.map(n->_idx, rm.is_NotEmpty() ? lr_counter++ : 0); |
697 } | 676 } |
698 } | 677 } |
678 | |
699 // Reset the Union-Find mapping to be identity | 679 // Reset the Union-Find mapping to be identity |
700 _lrg_map.reset_uf_map(lr_counter); | 680 _lrg_map.reset_uf_map(lr_counter); |
701 } | 681 } |
702 | 682 |
703 | 683 |
704 //------------------------------gather_lrg_masks------------------------------- | |
705 // Gather LiveRanGe information, including register masks. Modification of | 684 // Gather LiveRanGe information, including register masks. Modification of |
706 // cisc spillable in_RegMasks should not be done before AggressiveCoalesce. | 685 // cisc spillable in_RegMasks should not be done before AggressiveCoalesce. |
707 void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) { | 686 void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) { |
708 | 687 |
709 // Nail down the frame pointer live range | 688 // Nail down the frame pointer live range |
710 uint fp_lrg = _lrg_map.live_range_id(_cfg._root->in(1)->in(TypeFunc::FramePtr)); | 689 uint fp_lrg = _lrg_map.live_range_id(_cfg.get_root_node()->in(1)->in(TypeFunc::FramePtr)); |
711 lrgs(fp_lrg)._cost += 1e12; // Cost is infinite | 690 lrgs(fp_lrg)._cost += 1e12; // Cost is infinite |
712 | 691 |
713 // For all blocks | 692 // For all blocks |
714 for( uint i = 0; i < _cfg._num_blocks; i++ ) { | 693 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
715 Block *b = _cfg._blocks[i]; | 694 Block* block = _cfg.get_block(i); |
716 | 695 |
717 // For all instructions | 696 // For all instructions |
718 for( uint j = 1; j < b->_nodes.size(); j++ ) { | 697 for (uint j = 1; j < block->number_of_nodes(); j++) { |
719 Node *n = b->_nodes[j]; | 698 Node* n = block->get_node(j); |
720 uint input_edge_start =1; // Skip control most nodes | 699 uint input_edge_start =1; // Skip control most nodes |
721 if( n->is_Mach() ) input_edge_start = n->as_Mach()->oper_input_base(); | 700 if (n->is_Mach()) { |
701 input_edge_start = n->as_Mach()->oper_input_base(); | |
702 } | |
722 uint idx = n->is_Copy(); | 703 uint idx = n->is_Copy(); |
723 | 704 |
724 // Get virtual register number, same as LiveRanGe index | 705 // Get virtual register number, same as LiveRanGe index |
725 uint vreg = _lrg_map.live_range_id(n); | 706 uint vreg = _lrg_map.live_range_id(n); |
726 LRG &lrg = lrgs(vreg); | 707 LRG& lrg = lrgs(vreg); |
727 if( vreg ) { // No vreg means un-allocable (e.g. memory) | 708 if (vreg) { // No vreg means un-allocable (e.g. memory) |
728 | 709 |
729 // Collect has-copy bit | 710 // Collect has-copy bit |
730 if( idx ) { | 711 if (idx) { |
731 lrg._has_copy = 1; | 712 lrg._has_copy = 1; |
732 uint clidx = _lrg_map.live_range_id(n->in(idx)); | 713 uint clidx = _lrg_map.live_range_id(n->in(idx)); |
733 LRG ©_src = lrgs(clidx); | 714 LRG& copy_src = lrgs(clidx); |
734 copy_src._has_copy = 1; | 715 copy_src._has_copy = 1; |
735 } | 716 } |
736 | 717 |
737 // Check for float-vs-int live range (used in register-pressure | 718 // Check for float-vs-int live range (used in register-pressure |
738 // calculations) | 719 // calculations) |
739 const Type *n_type = n->bottom_type(); | 720 const Type *n_type = n->bottom_type(); |
740 if (n_type->is_floatingpoint()) | 721 if (n_type->is_floatingpoint()) { |
741 lrg._is_float = 1; | 722 lrg._is_float = 1; |
723 } | |
742 | 724 |
743 // Check for twice prior spilling. Once prior spilling might have | 725 // Check for twice prior spilling. Once prior spilling might have |
744 // spilled 'soft', 2nd prior spill should have spilled 'hard' and | 726 // spilled 'soft', 2nd prior spill should have spilled 'hard' and |
745 // further spilling is unlikely to make progress. | 727 // further spilling is unlikely to make progress. |
746 if( _spilled_once.test(n->_idx) ) { | 728 if (_spilled_once.test(n->_idx)) { |
747 lrg._was_spilled1 = 1; | 729 lrg._was_spilled1 = 1; |
748 if( _spilled_twice.test(n->_idx) ) | 730 if (_spilled_twice.test(n->_idx)) { |
749 lrg._was_spilled2 = 1; | 731 lrg._was_spilled2 = 1; |
732 } | |
750 } | 733 } |
751 | 734 |
752 #ifndef PRODUCT | 735 #ifndef PRODUCT |
753 if (trace_spilling() && lrg._def != NULL) { | 736 if (trace_spilling() && lrg._def != NULL) { |
754 // collect defs for MultiDef printing | 737 // collect defs for MultiDef printing |
781 assert(n_type->isa_vect() == NULL || lrg._is_vector || ireg == Op_RegD, | 764 assert(n_type->isa_vect() == NULL || lrg._is_vector || ireg == Op_RegD, |
782 "vector must be in vector registers"); | 765 "vector must be in vector registers"); |
783 | 766 |
784 // Check for bound register masks | 767 // Check for bound register masks |
785 const RegMask &lrgmask = lrg.mask(); | 768 const RegMask &lrgmask = lrg.mask(); |
786 if (lrgmask.is_bound(ireg)) | 769 if (lrgmask.is_bound(ireg)) { |
787 lrg._is_bound = 1; | 770 lrg._is_bound = 1; |
771 } | |
788 | 772 |
789 // Check for maximum frequency value | 773 // Check for maximum frequency value |
790 if (lrg._maxfreq < b->_freq) | 774 if (lrg._maxfreq < block->_freq) { |
791 lrg._maxfreq = b->_freq; | 775 lrg._maxfreq = block->_freq; |
776 } | |
792 | 777 |
793 // Check for oop-iness, or long/double | 778 // Check for oop-iness, or long/double |
794 // Check for multi-kill projection | 779 // Check for multi-kill projection |
795 switch( ireg ) { | 780 switch (ireg) { |
796 case MachProjNode::fat_proj: | 781 case MachProjNode::fat_proj: |
797 // Fat projections have size equal to number of registers killed | 782 // Fat projections have size equal to number of registers killed |
798 lrg.set_num_regs(rm.Size()); | 783 lrg.set_num_regs(rm.Size()); |
799 lrg.set_reg_pressure(lrg.num_regs()); | 784 lrg.set_reg_pressure(lrg.num_regs()); |
800 lrg._fat_proj = 1; | 785 lrg._fat_proj = 1; |
960 // Limit result register mask to acceptable registers. | 945 // Limit result register mask to acceptable registers. |
961 // Do not limit registers from uncommon uses before | 946 // Do not limit registers from uncommon uses before |
962 // AggressiveCoalesce. This effectively pre-virtual-splits | 947 // AggressiveCoalesce. This effectively pre-virtual-splits |
963 // around uncommon uses of common defs. | 948 // around uncommon uses of common defs. |
964 const RegMask &rm = n->in_RegMask(k); | 949 const RegMask &rm = n->in_RegMask(k); |
965 if (!after_aggressive && _cfg.get_block_for_node(n->in(k))->_freq > 1000 * b->_freq) { | 950 if (!after_aggressive && _cfg.get_block_for_node(n->in(k))->_freq > 1000 * block->_freq) { |
966 // Since we are BEFORE aggressive coalesce, leave the register | 951 // Since we are BEFORE aggressive coalesce, leave the register |
967 // mask untrimmed by the call. This encourages more coalescing. | 952 // mask untrimmed by the call. This encourages more coalescing. |
968 // Later, AFTER aggressive, this live range will have to spill | 953 // Later, AFTER aggressive, this live range will have to spill |
969 // but the spiller handles slow-path calls very nicely. | 954 // but the spiller handles slow-path calls very nicely. |
970 } else { | 955 } else { |
1004 lrgmask.is_misaligned_pair()) { | 989 lrgmask.is_misaligned_pair()) { |
1005 lrg.Clear(); | 990 lrg.Clear(); |
1006 } | 991 } |
1007 | 992 |
1008 // Check for maximum frequency value | 993 // Check for maximum frequency value |
1009 if( lrg._maxfreq < b->_freq ) | 994 if (lrg._maxfreq < block->_freq) { |
1010 lrg._maxfreq = b->_freq; | 995 lrg._maxfreq = block->_freq; |
996 } | |
1011 | 997 |
1012 } // End for all allocated inputs | 998 } // End for all allocated inputs |
1013 } // end for all instructions | 999 } // end for all instructions |
1014 } // end for all blocks | 1000 } // end for all blocks |
1015 | 1001 |
1027 } | 1013 } |
1028 lrg.set_degree(0); // no neighbors in IFG yet | 1014 lrg.set_degree(0); // no neighbors in IFG yet |
1029 } | 1015 } |
1030 } | 1016 } |
1031 | 1017 |
1032 //------------------------------set_was_low------------------------------------ | |
1033 // Set the was-lo-degree bit. Conservative coalescing should not change the | 1018 // Set the was-lo-degree bit. Conservative coalescing should not change the |
1034 // colorability of the graph. If any live range was of low-degree before | 1019 // colorability of the graph. If any live range was of low-degree before |
1035 // coalescing, it should Simplify. This call sets the was-lo-degree bit. | 1020 // coalescing, it should Simplify. This call sets the was-lo-degree bit. |
1036 // The bit is checked in Simplify. | 1021 // The bit is checked in Simplify. |
1037 void PhaseChaitin::set_was_low() { | 1022 void PhaseChaitin::set_was_low() { |
1064 #endif | 1049 #endif |
1065 } | 1050 } |
1066 | 1051 |
1067 #define REGISTER_CONSTRAINED 16 | 1052 #define REGISTER_CONSTRAINED 16 |
1068 | 1053 |
1069 //------------------------------cache_lrg_info--------------------------------- | |
1070 // Compute cost/area ratio, in case we spill. Build the lo-degree list. | 1054 // Compute cost/area ratio, in case we spill. Build the lo-degree list. |
1071 void PhaseChaitin::cache_lrg_info( ) { | 1055 void PhaseChaitin::cache_lrg_info( ) { |
1072 | 1056 |
1073 for (uint i = 1; i < _lrg_map.max_lrg_id(); i++) { | 1057 for (uint i = 1; i < _lrg_map.max_lrg_id(); i++) { |
1074 LRG &lrg = lrgs(i); | 1058 LRG &lrg = lrgs(i); |
1098 _hi_degree = i; | 1082 _hi_degree = i; |
1099 } | 1083 } |
1100 } | 1084 } |
1101 } | 1085 } |
1102 | 1086 |
1103 //------------------------------Pre-Simplify----------------------------------- | |
1104 // Simplify the IFG by removing LRGs of low degree that have NO copies | 1087 // Simplify the IFG by removing LRGs of low degree that have NO copies |
1105 void PhaseChaitin::Pre_Simplify( ) { | 1088 void PhaseChaitin::Pre_Simplify( ) { |
1106 | 1089 |
1107 // Warm up the lo-degree no-copy list | 1090 // Warm up the lo-degree no-copy list |
1108 int lo_no_copy = 0; | 1091 int lo_no_copy = 0; |
1149 } // End of while lo-degree no_copy worklist not empty | 1132 } // End of while lo-degree no_copy worklist not empty |
1150 | 1133 |
1151 // No more lo-degree no-copy live ranges to simplify | 1134 // No more lo-degree no-copy live ranges to simplify |
1152 } | 1135 } |
1153 | 1136 |
1154 //------------------------------Simplify--------------------------------------- | |
1155 // Simplify the IFG by removing LRGs of low degree. | 1137 // Simplify the IFG by removing LRGs of low degree. |
1156 void PhaseChaitin::Simplify( ) { | 1138 void PhaseChaitin::Simplify( ) { |
1157 | 1139 |
1158 while( 1 ) { // Repeat till simplified it all | 1140 while( 1 ) { // Repeat till simplified it all |
1159 // May want to explore simplifying lo_degree before _lo_stk_degree. | 1141 // May want to explore simplifying lo_degree before _lo_stk_degree. |
1286 | 1268 |
1287 } // End of while not simplified everything | 1269 } // End of while not simplified everything |
1288 | 1270 |
1289 } | 1271 } |
1290 | 1272 |
1291 //------------------------------is_legal_reg----------------------------------- | |
1292 // Is 'reg' register legal for 'lrg'? | 1273 // Is 'reg' register legal for 'lrg'? |
1293 static bool is_legal_reg(LRG &lrg, OptoReg::Name reg, int chunk) { | 1274 static bool is_legal_reg(LRG &lrg, OptoReg::Name reg, int chunk) { |
1294 if (reg >= chunk && reg < (chunk + RegMask::CHUNK_SIZE) && | 1275 if (reg >= chunk && reg < (chunk + RegMask::CHUNK_SIZE) && |
1295 lrg.mask().Member(OptoReg::add(reg,-chunk))) { | 1276 lrg.mask().Member(OptoReg::add(reg,-chunk))) { |
1296 // RA uses OptoReg which represent the highest element of a registers set. | 1277 // RA uses OptoReg which represent the highest element of a registers set. |
1313 return true; | 1294 return true; |
1314 } | 1295 } |
1315 return false; | 1296 return false; |
1316 } | 1297 } |
1317 | 1298 |
1318 //------------------------------bias_color------------------------------------- | |
1319 // Choose a color using the biasing heuristic | 1299 // Choose a color using the biasing heuristic |
1320 OptoReg::Name PhaseChaitin::bias_color( LRG &lrg, int chunk ) { | 1300 OptoReg::Name PhaseChaitin::bias_color( LRG &lrg, int chunk ) { |
1321 | 1301 |
1322 // Check for "at_risk" LRG's | 1302 // Check for "at_risk" LRG's |
1323 uint risk_lrg = _lrg_map.find(lrg._risk_bias); | 1303 uint risk_lrg = _lrg_map.find(lrg._risk_bias); |
1375 reg = reg2; | 1355 reg = reg2; |
1376 } | 1356 } |
1377 return OptoReg::add( reg, chunk ); | 1357 return OptoReg::add( reg, chunk ); |
1378 } | 1358 } |
1379 | 1359 |
1380 //------------------------------choose_color----------------------------------- | |
1381 // Choose a color in the current chunk | 1360 // Choose a color in the current chunk |
1382 OptoReg::Name PhaseChaitin::choose_color( LRG &lrg, int chunk ) { | 1361 OptoReg::Name PhaseChaitin::choose_color( LRG &lrg, int chunk ) { |
1383 assert( C->in_preserve_stack_slots() == 0 || chunk != 0 || lrg._is_bound || lrg.mask().is_bound1() || !lrg.mask().Member(OptoReg::Name(_matcher._old_SP-1)), "must not allocate stack0 (inside preserve area)"); | 1362 assert( C->in_preserve_stack_slots() == 0 || chunk != 0 || lrg._is_bound || lrg.mask().is_bound1() || !lrg.mask().Member(OptoReg::Name(_matcher._old_SP-1)), "must not allocate stack0 (inside preserve area)"); |
1384 assert(C->out_preserve_stack_slots() == 0 || chunk != 0 || lrg._is_bound || lrg.mask().is_bound1() || !lrg.mask().Member(OptoReg::Name(_matcher._old_SP+0)), "must not allocate stack0 (inside preserve area)"); | 1363 assert(C->out_preserve_stack_slots() == 0 || chunk != 0 || lrg._is_bound || lrg.mask().is_bound1() || !lrg.mask().Member(OptoReg::Name(_matcher._old_SP+0)), "must not allocate stack0 (inside preserve area)"); |
1385 | 1364 |
1397 assert( !chunk, "always color in 1st chunk" ); | 1376 assert( !chunk, "always color in 1st chunk" ); |
1398 // Return the highest element in the set. | 1377 // Return the highest element in the set. |
1399 return lrg.mask().find_last_elem(); | 1378 return lrg.mask().find_last_elem(); |
1400 } | 1379 } |
1401 | 1380 |
1402 //------------------------------Select----------------------------------------- | |
1403 // Select colors by re-inserting LRGs back into the IFG. LRGs are re-inserted | 1381 // Select colors by re-inserting LRGs back into the IFG. LRGs are re-inserted |
1404 // in reverse order of removal. As long as nothing of hi-degree was yanked, | 1382 // in reverse order of removal. As long as nothing of hi-degree was yanked, |
1405 // everything going back is guaranteed a color. Select that color. If some | 1383 // everything going back is guaranteed a color. Select that color. If some |
1406 // hi-degree LRG cannot get a color then we record that we must spill. | 1384 // hi-degree LRG cannot get a color then we record that we must spill. |
1407 uint PhaseChaitin::Select( ) { | 1385 uint PhaseChaitin::Select( ) { |
1572 } | 1550 } |
1573 | 1551 |
1574 return spill_reg-LRG::SPILL_REG; // Return number of spills | 1552 return spill_reg-LRG::SPILL_REG; // Return number of spills |
1575 } | 1553 } |
1576 | 1554 |
1577 | |
1578 //------------------------------copy_was_spilled------------------------------- | |
1579 // Copy 'was_spilled'-edness from the source Node to the dst Node. | 1555 // Copy 'was_spilled'-edness from the source Node to the dst Node. |
1580 void PhaseChaitin::copy_was_spilled( Node *src, Node *dst ) { | 1556 void PhaseChaitin::copy_was_spilled( Node *src, Node *dst ) { |
1581 if( _spilled_once.test(src->_idx) ) { | 1557 if( _spilled_once.test(src->_idx) ) { |
1582 _spilled_once.set(dst->_idx); | 1558 _spilled_once.set(dst->_idx); |
1583 lrgs(_lrg_map.find(dst))._was_spilled1 = 1; | 1559 lrgs(_lrg_map.find(dst))._was_spilled1 = 1; |
1586 lrgs(_lrg_map.find(dst))._was_spilled2 = 1; | 1562 lrgs(_lrg_map.find(dst))._was_spilled2 = 1; |
1587 } | 1563 } |
1588 } | 1564 } |
1589 } | 1565 } |
1590 | 1566 |
1591 //------------------------------set_was_spilled-------------------------------- | |
1592 // Set the 'spilled_once' or 'spilled_twice' flag on a node. | 1567 // Set the 'spilled_once' or 'spilled_twice' flag on a node. |
1593 void PhaseChaitin::set_was_spilled( Node *n ) { | 1568 void PhaseChaitin::set_was_spilled( Node *n ) { |
1594 if( _spilled_once.test_set(n->_idx) ) | 1569 if( _spilled_once.test_set(n->_idx) ) |
1595 _spilled_twice.set(n->_idx); | 1570 _spilled_twice.set(n->_idx); |
1596 } | 1571 } |
1597 | 1572 |
1598 //------------------------------fixup_spills----------------------------------- | |
1599 // Convert Ideal spill instructions into proper FramePtr + offset Loads and | 1573 // Convert Ideal spill instructions into proper FramePtr + offset Loads and |
1600 // Stores. Use-def chains are NOT preserved, but Node->LRG->reg maps are. | 1574 // Stores. Use-def chains are NOT preserved, but Node->LRG->reg maps are. |
1601 void PhaseChaitin::fixup_spills() { | 1575 void PhaseChaitin::fixup_spills() { |
1602 // This function does only cisc spill work. | 1576 // This function does only cisc spill work. |
1603 if( !UseCISCSpill ) return; | 1577 if( !UseCISCSpill ) return; |
1604 | 1578 |
1605 NOT_PRODUCT( Compile::TracePhase t3("fixupSpills", &_t_fixupSpills, TimeCompiler); ) | 1579 NOT_PRODUCT( Compile::TracePhase t3("fixupSpills", &_t_fixupSpills, TimeCompiler); ) |
1606 | 1580 |
1607 // Grab the Frame Pointer | 1581 // Grab the Frame Pointer |
1608 Node *fp = _cfg._broot->head()->in(1)->in(TypeFunc::FramePtr); | 1582 Node *fp = _cfg.get_root_block()->head()->in(1)->in(TypeFunc::FramePtr); |
1609 | 1583 |
1610 // For all blocks | 1584 // For all blocks |
1611 for( uint i = 0; i < _cfg._num_blocks; i++ ) { | 1585 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
1612 Block *b = _cfg._blocks[i]; | 1586 Block* block = _cfg.get_block(i); |
1613 | 1587 |
1614 // For all instructions in block | 1588 // For all instructions in block |
1615 uint last_inst = b->end_idx(); | 1589 uint last_inst = block->end_idx(); |
1616 for( uint j = 1; j <= last_inst; j++ ) { | 1590 for (uint j = 1; j <= last_inst; j++) { |
1617 Node *n = b->_nodes[j]; | 1591 Node* n = block->get_node(j); |
1618 | 1592 |
1619 // Dead instruction??? | 1593 // Dead instruction??? |
1620 assert( n->outcnt() != 0 ||// Nothing dead after post alloc | 1594 assert( n->outcnt() != 0 ||// Nothing dead after post alloc |
1621 C->top() == n || // Or the random TOP node | 1595 C->top() == n || // Or the random TOP node |
1622 n->is_Proj(), // Or a fat-proj kill node | 1596 n->is_Proj(), // Or a fat-proj kill node |
1649 cisc->set_req(inp,fp); // Base register is frame pointer | 1623 cisc->set_req(inp,fp); // Base register is frame pointer |
1650 if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) { | 1624 if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) { |
1651 assert( cisc->oper_input_base() == 2, "Only adding one edge"); | 1625 assert( cisc->oper_input_base() == 2, "Only adding one edge"); |
1652 cisc->ins_req(1,src); // Requires a memory edge | 1626 cisc->ins_req(1,src); // Requires a memory edge |
1653 } | 1627 } |
1654 b->_nodes.map(j,cisc); // Insert into basic block | 1628 block->map_node(cisc, j); // Insert into basic block |
1655 n->subsume_by(cisc, C); // Correct graph | 1629 n->subsume_by(cisc, C); // Correct graph |
1656 // | 1630 // |
1657 ++_used_cisc_instructions; | 1631 ++_used_cisc_instructions; |
1658 #ifndef PRODUCT | 1632 #ifndef PRODUCT |
1659 if( TraceCISCSpill ) { | 1633 if( TraceCISCSpill ) { |
1675 } // End of for all instructions | 1649 } // End of for all instructions |
1676 | 1650 |
1677 } // End of for all blocks | 1651 } // End of for all blocks |
1678 } | 1652 } |
1679 | 1653 |
1680 //------------------------------find_base_for_derived-------------------------- | |
1681 // Helper to stretch above; recursively discover the base Node for a | 1654 // Helper to stretch above; recursively discover the base Node for a |
1682 // given derived Node. Easy for AddP-related machine nodes, but needs | 1655 // given derived Node. Easy for AddP-related machine nodes, but needs |
1683 // to be recursive for derived Phis. | 1656 // to be recursive for derived Phis. |
1684 Node *PhaseChaitin::find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg ) { | 1657 Node *PhaseChaitin::find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg ) { |
1685 // See if already computed; if so return it | 1658 // See if already computed; if so return it |
1705 assert(base != NULL, "sanity"); | 1678 assert(base != NULL, "sanity"); |
1706 if (base->in(0) == NULL) { | 1679 if (base->in(0) == NULL) { |
1707 // Initialize it once and make it shared: | 1680 // Initialize it once and make it shared: |
1708 // set control to _root and place it into Start block | 1681 // set control to _root and place it into Start block |
1709 // (where top() node is placed). | 1682 // (where top() node is placed). |
1710 base->init_req(0, _cfg._root); | 1683 base->init_req(0, _cfg.get_root_node()); |
1711 Block *startb = _cfg.get_block_for_node(C->top()); | 1684 Block *startb = _cfg.get_block_for_node(C->top()); |
1712 startb->_nodes.insert(startb->find_node(C->top()), base ); | 1685 startb->insert_node(base, startb->find_node(C->top())); |
1713 _cfg.map_node_to_block(base, startb); | 1686 _cfg.map_node_to_block(base, startb); |
1714 assert(_lrg_map.live_range_id(base) == 0, "should not have LRG yet"); | 1687 assert(_lrg_map.live_range_id(base) == 0, "should not have LRG yet"); |
1715 } | 1688 } |
1716 if (_lrg_map.live_range_id(base) == 0) { | 1689 if (_lrg_map.live_range_id(base) == 0) { |
1717 new_lrg(base, maxlrg++); | 1690 new_lrg(base, maxlrg++); |
1718 } | 1691 } |
1719 assert(base->in(0) == _cfg._root && _cfg.get_block_for_node(base) == _cfg.get_block_for_node(C->top()), "base NULL should be shared"); | 1692 assert(base->in(0) == _cfg.get_root_node() && _cfg.get_block_for_node(base) == _cfg.get_block_for_node(C->top()), "base NULL should be shared"); |
1720 derived_base_map[derived->_idx] = base; | 1693 derived_base_map[derived->_idx] = base; |
1721 return base; | 1694 return base; |
1722 } | 1695 } |
1723 | 1696 |
1724 // Check for AddP-related opcodes | 1697 // Check for AddP-related opcodes |
1752 base->as_Phi()->set_type(t); | 1725 base->as_Phi()->set_type(t); |
1753 | 1726 |
1754 // Search the current block for an existing base-Phi | 1727 // Search the current block for an existing base-Phi |
1755 Block *b = _cfg.get_block_for_node(derived); | 1728 Block *b = _cfg.get_block_for_node(derived); |
1756 for( i = 1; i <= b->end_idx(); i++ ) {// Search for matching Phi | 1729 for( i = 1; i <= b->end_idx(); i++ ) {// Search for matching Phi |
1757 Node *phi = b->_nodes[i]; | 1730 Node *phi = b->get_node(i); |
1758 if( !phi->is_Phi() ) { // Found end of Phis with no match? | 1731 if( !phi->is_Phi() ) { // Found end of Phis with no match? |
1759 b->_nodes.insert( i, base ); // Must insert created Phi here as base | 1732 b->insert_node(base, i); // Must insert created Phi here as base |
1760 _cfg.map_node_to_block(base, b); | 1733 _cfg.map_node_to_block(base, b); |
1761 new_lrg(base,maxlrg++); | 1734 new_lrg(base,maxlrg++); |
1762 break; | 1735 break; |
1763 } | 1736 } |
1764 // See if Phi matches. | 1737 // See if Phi matches. |
1777 // Cache info for later passes | 1750 // Cache info for later passes |
1778 derived_base_map[derived->_idx] = base; | 1751 derived_base_map[derived->_idx] = base; |
1779 return base; | 1752 return base; |
1780 } | 1753 } |
1781 | 1754 |
1782 | |
1783 //------------------------------stretch_base_pointer_live_ranges--------------- | |
1784 // At each Safepoint, insert extra debug edges for each pair of derived value/ | 1755 // At each Safepoint, insert extra debug edges for each pair of derived value/ |
1785 // base pointer that is live across the Safepoint for oopmap building. The | 1756 // base pointer that is live across the Safepoint for oopmap building. The |
1786 // edge pairs get added in after sfpt->jvmtail()->oopoff(), but are in the | 1757 // edge pairs get added in after sfpt->jvmtail()->oopoff(), but are in the |
1787 // required edge set. | 1758 // required edge set. |
1788 bool PhaseChaitin::stretch_base_pointer_live_ranges(ResourceArea *a) { | 1759 bool PhaseChaitin::stretch_base_pointer_live_ranges(ResourceArea *a) { |
1790 uint maxlrg = _lrg_map.max_lrg_id(); | 1761 uint maxlrg = _lrg_map.max_lrg_id(); |
1791 Node **derived_base_map = (Node**)a->Amalloc(sizeof(Node*)*C->unique()); | 1762 Node **derived_base_map = (Node**)a->Amalloc(sizeof(Node*)*C->unique()); |
1792 memset( derived_base_map, 0, sizeof(Node*)*C->unique() ); | 1763 memset( derived_base_map, 0, sizeof(Node*)*C->unique() ); |
1793 | 1764 |
1794 // For all blocks in RPO do... | 1765 // For all blocks in RPO do... |
1795 for( uint i=0; i<_cfg._num_blocks; i++ ) { | 1766 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
1796 Block *b = _cfg._blocks[i]; | 1767 Block* block = _cfg.get_block(i); |
1797 // Note use of deep-copy constructor. I cannot hammer the original | 1768 // Note use of deep-copy constructor. I cannot hammer the original |
1798 // liveout bits, because they are needed by the following coalesce pass. | 1769 // liveout bits, because they are needed by the following coalesce pass. |
1799 IndexSet liveout(_live->live(b)); | 1770 IndexSet liveout(_live->live(block)); |
1800 | 1771 |
1801 for( uint j = b->end_idx() + 1; j > 1; j-- ) { | 1772 for (uint j = block->end_idx() + 1; j > 1; j--) { |
1802 Node *n = b->_nodes[j-1]; | 1773 Node* n = block->get_node(j - 1); |
1803 | 1774 |
1804 // Pre-split compares of loop-phis. Loop-phis form a cycle we would | 1775 // Pre-split compares of loop-phis. Loop-phis form a cycle we would |
1805 // like to see in the same register. Compare uses the loop-phi and so | 1776 // like to see in the same register. Compare uses the loop-phi and so |
1806 // extends its live range BUT cannot be part of the cycle. If this | 1777 // extends its live range BUT cannot be part of the cycle. If this |
1807 // extended live range overlaps with the update of the loop-phi value | 1778 // extended live range overlaps with the update of the loop-phi value |
1812 // phi. | 1783 // phi. |
1813 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_CmpI ) { | 1784 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_CmpI ) { |
1814 Node *phi = n->in(1); | 1785 Node *phi = n->in(1); |
1815 if( phi->is_Phi() && phi->as_Phi()->region()->is_Loop() ) { | 1786 if( phi->is_Phi() && phi->as_Phi()->region()->is_Loop() ) { |
1816 Block *phi_block = _cfg.get_block_for_node(phi); | 1787 Block *phi_block = _cfg.get_block_for_node(phi); |
1817 if (_cfg.get_block_for_node(phi_block->pred(2)) == b) { | 1788 if (_cfg.get_block_for_node(phi_block->pred(2)) == block) { |
1818 const RegMask *mask = C->matcher()->idealreg2spillmask[Op_RegI]; | 1789 const RegMask *mask = C->matcher()->idealreg2spillmask[Op_RegI]; |
1819 Node *spill = new (C) MachSpillCopyNode( phi, *mask, *mask ); | 1790 Node *spill = new (C) MachSpillCopyNode( phi, *mask, *mask ); |
1820 insert_proj( phi_block, 1, spill, maxlrg++ ); | 1791 insert_proj( phi_block, 1, spill, maxlrg++ ); |
1821 n->set_req(1,spill); | 1792 n->set_req(1,spill); |
1822 must_recompute_live = true; | 1793 must_recompute_live = true; |
1866 // reaching def's. So if I find the base's live range then | 1837 // reaching def's. So if I find the base's live range then |
1867 // I know the base's def reaches here. | 1838 // I know the base's def reaches here. |
1868 if ((_lrg_map.live_range_id(base) >= _lrg_map.max_lrg_id() || // (Brand new base (hence not live) or | 1839 if ((_lrg_map.live_range_id(base) >= _lrg_map.max_lrg_id() || // (Brand new base (hence not live) or |
1869 !liveout.member(_lrg_map.live_range_id(base))) && // not live) AND | 1840 !liveout.member(_lrg_map.live_range_id(base))) && // not live) AND |
1870 (_lrg_map.live_range_id(base) > 0) && // not a constant | 1841 (_lrg_map.live_range_id(base) > 0) && // not a constant |
1871 _cfg.get_block_for_node(base) != b) { // base not def'd in blk) | 1842 _cfg.get_block_for_node(base) != block) { // base not def'd in blk) |
1872 // Base pointer is not currently live. Since I stretched | 1843 // Base pointer is not currently live. Since I stretched |
1873 // the base pointer to here and it crosses basic-block | 1844 // the base pointer to here and it crosses basic-block |
1874 // boundaries, the global live info is now incorrect. | 1845 // boundaries, the global live info is now incorrect. |
1875 // Recompute live. | 1846 // Recompute live. |
1876 must_recompute_live = true; | 1847 must_recompute_live = true; |
1901 } | 1872 } |
1902 | 1873 |
1903 return must_recompute_live != 0; | 1874 return must_recompute_live != 0; |
1904 } | 1875 } |
1905 | 1876 |
1906 | |
1907 //------------------------------add_reference---------------------------------- | |
1908 // Extend the node to LRG mapping | 1877 // Extend the node to LRG mapping |
1909 | 1878 |
1910 void PhaseChaitin::add_reference(const Node *node, const Node *old_node) { | 1879 void PhaseChaitin::add_reference(const Node *node, const Node *old_node) { |
1911 _lrg_map.extend(node->_idx, _lrg_map.live_range_id(old_node)); | 1880 _lrg_map.extend(node->_idx, _lrg_map.live_range_id(old_node)); |
1912 } | 1881 } |
1913 | 1882 |
1914 //------------------------------dump------------------------------------------- | |
1915 #ifndef PRODUCT | 1883 #ifndef PRODUCT |
1916 void PhaseChaitin::dump(const Node *n) const { | 1884 void PhaseChaitin::dump(const Node *n) const { |
1917 uint r = (n->_idx < _lrg_map.size()) ? _lrg_map.find_const(n) : 0; | 1885 uint r = (n->_idx < _lrg_map.size()) ? _lrg_map.find_const(n) : 0; |
1918 tty->print("L%d",r); | 1886 tty->print("L%d",r); |
1919 if (r && n->Opcode() != Op_Phi) { | 1887 if (r && n->Opcode() != Op_Phi) { |
1993 | 1961 |
1994 void PhaseChaitin::dump(const Block *b) const { | 1962 void PhaseChaitin::dump(const Block *b) const { |
1995 b->dump_head(&_cfg); | 1963 b->dump_head(&_cfg); |
1996 | 1964 |
1997 // For all instructions | 1965 // For all instructions |
1998 for( uint j = 0; j < b->_nodes.size(); j++ ) | 1966 for( uint j = 0; j < b->number_of_nodes(); j++ ) |
1999 dump(b->_nodes[j]); | 1967 dump(b->get_node(j)); |
2000 // Print live-out info at end of block | 1968 // Print live-out info at end of block |
2001 if( _live ) { | 1969 if( _live ) { |
2002 tty->print("Liveout: "); | 1970 tty->print("Liveout: "); |
2003 IndexSet *live = _live->live(b); | 1971 IndexSet *live = _live->live(b); |
2004 IndexSetIterator elements(live); | 1972 IndexSetIterator elements(live); |
2015 void PhaseChaitin::dump() const { | 1983 void PhaseChaitin::dump() const { |
2016 tty->print( "--- Chaitin -- argsize: %d framesize: %d ---\n", | 1984 tty->print( "--- Chaitin -- argsize: %d framesize: %d ---\n", |
2017 _matcher._new_SP, _framesize ); | 1985 _matcher._new_SP, _framesize ); |
2018 | 1986 |
2019 // For all blocks | 1987 // For all blocks |
2020 for( uint i = 0; i < _cfg._num_blocks; i++ ) | 1988 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
2021 dump(_cfg._blocks[i]); | 1989 dump(_cfg.get_block(i)); |
1990 } | |
2022 // End of per-block dump | 1991 // End of per-block dump |
2023 tty->print("\n"); | 1992 tty->print("\n"); |
2024 | 1993 |
2025 if (!_ifg) { | 1994 if (!_ifg) { |
2026 tty->print("(No IFG.)\n"); | 1995 tty->print("(No IFG.)\n"); |
2057 for(uint i5 = _hi_degree; i5; i5 = lrgs(i5)._next ) | 2026 for(uint i5 = _hi_degree; i5; i5 = lrgs(i5)._next ) |
2058 tty->print("L%d ",i5); | 2027 tty->print("L%d ",i5); |
2059 tty->print_cr(""); | 2028 tty->print_cr(""); |
2060 } | 2029 } |
2061 | 2030 |
2062 //------------------------------dump_degree_lists------------------------------ | |
2063 void PhaseChaitin::dump_degree_lists() const { | 2031 void PhaseChaitin::dump_degree_lists() const { |
2064 // Dump lo-degree list | 2032 // Dump lo-degree list |
2065 tty->print("Lo degree: "); | 2033 tty->print("Lo degree: "); |
2066 for( uint i = _lo_degree; i; i = lrgs(i)._next ) | 2034 for( uint i = _lo_degree; i; i = lrgs(i)._next ) |
2067 tty->print("L%d ",i); | 2035 tty->print("L%d ",i); |
2078 for(uint i3 = _hi_degree; i3; i3 = lrgs(i3)._next ) | 2046 for(uint i3 = _hi_degree; i3; i3 = lrgs(i3)._next ) |
2079 tty->print("L%d ",i3); | 2047 tty->print("L%d ",i3); |
2080 tty->print_cr(""); | 2048 tty->print_cr(""); |
2081 } | 2049 } |
2082 | 2050 |
2083 //------------------------------dump_simplified-------------------------------- | |
2084 void PhaseChaitin::dump_simplified() const { | 2051 void PhaseChaitin::dump_simplified() const { |
2085 tty->print("Simplified: "); | 2052 tty->print("Simplified: "); |
2086 for( uint i = _simplified; i; i = lrgs(i)._next ) | 2053 for( uint i = _simplified; i; i = lrgs(i)._next ) |
2087 tty->print("L%d ",i); | 2054 tty->print("L%d ",i); |
2088 tty->print_cr(""); | 2055 tty->print_cr(""); |
2097 sprintf(buf,"%s + #%d",OptoReg::regname(OptoReg::c_frame_pointer), | 2064 sprintf(buf,"%s + #%d",OptoReg::regname(OptoReg::c_frame_pointer), |
2098 pc->reg2offset(reg)); | 2065 pc->reg2offset(reg)); |
2099 return buf+strlen(buf); | 2066 return buf+strlen(buf); |
2100 } | 2067 } |
2101 | 2068 |
2102 //------------------------------dump_register---------------------------------- | |
2103 // Dump a register name into a buffer. Be intelligent if we get called | 2069 // Dump a register name into a buffer. Be intelligent if we get called |
2104 // before allocation is complete. | 2070 // before allocation is complete. |
2105 char *PhaseChaitin::dump_register( const Node *n, char *buf ) const { | 2071 char *PhaseChaitin::dump_register( const Node *n, char *buf ) const { |
2106 if( !this ) { // Not got anything? | 2072 if( !this ) { // Not got anything? |
2107 sprintf(buf,"N%d",n->_idx); // Then use Node index | 2073 sprintf(buf,"N%d",n->_idx); // Then use Node index |
2131 } | 2097 } |
2132 } | 2098 } |
2133 return buf+strlen(buf); | 2099 return buf+strlen(buf); |
2134 } | 2100 } |
2135 | 2101 |
2136 //----------------------dump_for_spill_split_recycle-------------------------- | |
2137 void PhaseChaitin::dump_for_spill_split_recycle() const { | 2102 void PhaseChaitin::dump_for_spill_split_recycle() const { |
2138 if( WizardMode && (PrintCompilation || PrintOpto) ) { | 2103 if( WizardMode && (PrintCompilation || PrintOpto) ) { |
2139 // Display which live ranges need to be split and the allocator's state | 2104 // Display which live ranges need to be split and the allocator's state |
2140 tty->print_cr("Graph-Coloring Iteration %d will split the following live ranges", _trip_cnt); | 2105 tty->print_cr("Graph-Coloring Iteration %d will split the following live ranges", _trip_cnt); |
2141 for (uint bidx = 1; bidx < _lrg_map.max_lrg_id(); bidx++) { | 2106 for (uint bidx = 1; bidx < _lrg_map.max_lrg_id(); bidx++) { |
2147 tty->cr(); | 2112 tty->cr(); |
2148 dump(); | 2113 dump(); |
2149 } | 2114 } |
2150 } | 2115 } |
2151 | 2116 |
2152 //------------------------------dump_frame------------------------------------ | |
2153 void PhaseChaitin::dump_frame() const { | 2117 void PhaseChaitin::dump_frame() const { |
2154 const char *fp = OptoReg::regname(OptoReg::c_frame_pointer); | 2118 const char *fp = OptoReg::regname(OptoReg::c_frame_pointer); |
2155 const TypeTuple *domain = C->tf()->domain(); | 2119 const TypeTuple *domain = C->tf()->domain(); |
2156 const int argcnt = domain->cnt() - TypeFunc::Parms; | 2120 const int argcnt = domain->cnt() - TypeFunc::Parms; |
2157 | 2121 |
2253 tty->print_cr("#r%3.3d %s+%2d: new out preserve",reg,fp,reg2offset_unchecked(reg)); | 2217 tty->print_cr("#r%3.3d %s+%2d: new out preserve",reg,fp,reg2offset_unchecked(reg)); |
2254 } | 2218 } |
2255 tty->print_cr("#"); | 2219 tty->print_cr("#"); |
2256 } | 2220 } |
2257 | 2221 |
2258 //------------------------------dump_bb---------------------------------------- | |
2259 void PhaseChaitin::dump_bb( uint pre_order ) const { | 2222 void PhaseChaitin::dump_bb( uint pre_order ) const { |
2260 tty->print_cr("---dump of B%d---",pre_order); | 2223 tty->print_cr("---dump of B%d---",pre_order); |
2261 for( uint i = 0; i < _cfg._num_blocks; i++ ) { | 2224 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
2262 Block *b = _cfg._blocks[i]; | 2225 Block* block = _cfg.get_block(i); |
2263 if( b->_pre_order == pre_order ) | 2226 if (block->_pre_order == pre_order) { |
2264 dump(b); | 2227 dump(block); |
2265 } | 2228 } |
2266 } | 2229 } |
2267 | 2230 } |
2268 //------------------------------dump_lrg--------------------------------------- | 2231 |
2269 void PhaseChaitin::dump_lrg( uint lidx, bool defs_only ) const { | 2232 void PhaseChaitin::dump_lrg( uint lidx, bool defs_only ) const { |
2270 tty->print_cr("---dump of L%d---",lidx); | 2233 tty->print_cr("---dump of L%d---",lidx); |
2271 | 2234 |
2272 if (_ifg) { | 2235 if (_ifg) { |
2273 if (lidx >= _lrg_map.max_lrg_id()) { | 2236 if (lidx >= _lrg_map.max_lrg_id()) { |
2285 tty->print("Neighbors: %d - ", _ifg->neighbor_cnt(lidx)); | 2248 tty->print("Neighbors: %d - ", _ifg->neighbor_cnt(lidx)); |
2286 _ifg->neighbors(lidx)->dump(); | 2249 _ifg->neighbors(lidx)->dump(); |
2287 tty->cr(); | 2250 tty->cr(); |
2288 } | 2251 } |
2289 // For all blocks | 2252 // For all blocks |
2290 for( uint i = 0; i < _cfg._num_blocks; i++ ) { | 2253 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
2291 Block *b = _cfg._blocks[i]; | 2254 Block* block = _cfg.get_block(i); |
2292 int dump_once = 0; | 2255 int dump_once = 0; |
2293 | 2256 |
2294 // For all instructions | 2257 // For all instructions |
2295 for( uint j = 0; j < b->_nodes.size(); j++ ) { | 2258 for( uint j = 0; j < block->number_of_nodes(); j++ ) { |
2296 Node *n = b->_nodes[j]; | 2259 Node *n = block->get_node(j); |
2297 if (_lrg_map.find_const(n) == lidx) { | 2260 if (_lrg_map.find_const(n) == lidx) { |
2298 if (!dump_once++) { | 2261 if (!dump_once++) { |
2299 tty->cr(); | 2262 tty->cr(); |
2300 b->dump_head(&_cfg); | 2263 block->dump_head(&_cfg); |
2301 } | 2264 } |
2302 dump(n); | 2265 dump(n); |
2303 continue; | 2266 continue; |
2304 } | 2267 } |
2305 if (!defs_only) { | 2268 if (!defs_only) { |
2310 continue; // be robust in the dumper | 2273 continue; // be robust in the dumper |
2311 } | 2274 } |
2312 if (_lrg_map.find_const(m) == lidx) { | 2275 if (_lrg_map.find_const(m) == lidx) { |
2313 if (!dump_once++) { | 2276 if (!dump_once++) { |
2314 tty->cr(); | 2277 tty->cr(); |
2315 b->dump_head(&_cfg); | 2278 block->dump_head(&_cfg); |
2316 } | 2279 } |
2317 dump(n); | 2280 dump(n); |
2318 } | 2281 } |
2319 } | 2282 } |
2320 } | 2283 } |
2322 } // End of per-block dump | 2285 } // End of per-block dump |
2323 tty->cr(); | 2286 tty->cr(); |
2324 } | 2287 } |
2325 #endif // not PRODUCT | 2288 #endif // not PRODUCT |
2326 | 2289 |
2327 //------------------------------print_chaitin_statistics------------------------------- | |
2328 int PhaseChaitin::_final_loads = 0; | 2290 int PhaseChaitin::_final_loads = 0; |
2329 int PhaseChaitin::_final_stores = 0; | 2291 int PhaseChaitin::_final_stores = 0; |
2330 int PhaseChaitin::_final_memoves= 0; | 2292 int PhaseChaitin::_final_memoves= 0; |
2331 int PhaseChaitin::_final_copies = 0; | 2293 int PhaseChaitin::_final_copies = 0; |
2332 double PhaseChaitin::_final_load_cost = 0; | 2294 double PhaseChaitin::_final_load_cost = 0; |