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comparison src/cpu/x86/vm/assembler_x86.cpp @ 7476:ffa87474d7a4

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8004537: replace AbstractAssembler emit_long with emit_int32 Reviewed-by: jrose, kvn, twisti Contributed-by: Morris Meyer <morris.meyer@oracle.com>
author twisti
date Mon, 07 Jan 2013 14:08:28 -0800
parents e2e6bf86682c
children 038dd2875b94
comparison
equal deleted inserted replaced
7475:e2e6bf86682c 7476:ffa87474d7a4
180 } 180 }
181 181
182 // make this go away someday 182 // make this go away someday
183 void Assembler::emit_data(jint data, relocInfo::relocType rtype, int format) { 183 void Assembler::emit_data(jint data, relocInfo::relocType rtype, int format) {
184 if (rtype == relocInfo::none) 184 if (rtype == relocInfo::none)
185 emit_long(data); 185 emit_int32(data);
186 else emit_data(data, Relocation::spec_simple(rtype), format); 186 else emit_data(data, Relocation::spec_simple(rtype), format);
187 } 187 }
188 188
189 void Assembler::emit_data(jint data, RelocationHolder const& rspec, int format) { 189 void Assembler::emit_data(jint data, RelocationHolder const& rspec, int format) {
190 assert(imm_operand == 0, "default format must be immediate in this file"); 190 assert(imm_operand == 0, "default format must be immediate in this file");
200 if (format == call32_operand) 200 if (format == call32_operand)
201 code_section()->relocate(inst_mark(), rspec, disp32_operand); 201 code_section()->relocate(inst_mark(), rspec, disp32_operand);
202 else 202 else
203 code_section()->relocate(inst_mark(), rspec, format); 203 code_section()->relocate(inst_mark(), rspec, format);
204 } 204 }
205 emit_long(data); 205 emit_int32(data);
206 } 206 }
207 207
208 static int encode(Register r) { 208 static int encode(Register r) {
209 int enc = r->encoding(); 209 int enc = r->encoding();
210 if (enc >= 8) { 210 if (enc >= 8) {
241 emit_int8(op2 | encode(dst)); 241 emit_int8(op2 | encode(dst));
242 emit_int8(imm32 & 0xFF); 242 emit_int8(imm32 & 0xFF);
243 } else { 243 } else {
244 emit_int8(op1); 244 emit_int8(op1);
245 emit_int8(op2 | encode(dst)); 245 emit_int8(op2 | encode(dst));
246 emit_long(imm32); 246 emit_int32(imm32);
247 } 247 }
248 } 248 }
249 249
250 // Force generation of a 4 byte immediate value even if it fits into 8bit 250 // Force generation of a 4 byte immediate value even if it fits into 8bit
251 void Assembler::emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32) { 251 void Assembler::emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32) {
252 assert(isByte(op1) && isByte(op2), "wrong opcode"); 252 assert(isByte(op1) && isByte(op2), "wrong opcode");
253 assert((op1 & 0x01) == 1, "should be 32bit operation"); 253 assert((op1 & 0x01) == 1, "should be 32bit operation");
254 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); 254 assert((op1 & 0x02) == 0, "sign-extension bit should not be set");
255 emit_int8(op1); 255 emit_int8(op1);
256 emit_int8(op2 | encode(dst)); 256 emit_int8(op2 | encode(dst));
257 emit_long(imm32); 257 emit_int32(imm32);
258 } 258 }
259 259
260 // immediate-to-memory forms 260 // immediate-to-memory forms
261 void Assembler::emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32) { 261 void Assembler::emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32) {
262 assert((op1 & 0x01) == 1, "should be 32bit operation"); 262 assert((op1 & 0x01) == 1, "should be 32bit operation");
266 emit_operand(rm, adr, 1); 266 emit_operand(rm, adr, 1);
267 emit_int8(imm32 & 0xFF); 267 emit_int8(imm32 & 0xFF);
268 } else { 268 } else {
269 emit_int8(op1); 269 emit_int8(op1);
270 emit_operand(rm, adr, 4); 270 emit_operand(rm, adr, 4);
271 emit_long(imm32); 271 emit_int32(imm32);
272 } 272 }
273 } 273 }
274 274
275 275
276 void Assembler::emit_arith(int op1, int op2, Register dst, Register src) { 276 void Assembler::emit_arith(int op1, int op2, Register dst, Register src) {
974 // 7 bytes: NOP DWORD PTR [EAX+0] 32-bits offset 974 // 7 bytes: NOP DWORD PTR [EAX+0] 32-bits offset
975 emit_int8(0x0F); 975 emit_int8(0x0F);
976 emit_int8(0x1F); 976 emit_int8(0x1F);
977 emit_int8((unsigned char)0x80); 977 emit_int8((unsigned char)0x80);
978 // emit_rm(cbuf, 0x2, EAX_enc, EAX_enc); 978 // emit_rm(cbuf, 0x2, EAX_enc, EAX_enc);
979 emit_long(0); // 32-bits offset (4 bytes) 979 emit_int32(0); // 32-bits offset (4 bytes)
980 } 980 }
981 981
982 void Assembler::addr_nop_8() { 982 void Assembler::addr_nop_8() {
983 assert(UseAddressNop, "no CPU support"); 983 assert(UseAddressNop, "no CPU support");
984 // 8 bytes: NOP DWORD PTR [EAX+EAX*0+0] 32-bits offset 984 // 8 bytes: NOP DWORD PTR [EAX+EAX*0+0] 32-bits offset
985 emit_int8(0x0F); 985 emit_int8(0x0F);
986 emit_int8(0x1F); 986 emit_int8(0x1F);
987 emit_int8((unsigned char)0x84); 987 emit_int8((unsigned char)0x84);
988 // emit_rm(cbuf, 0x2, EAX_enc, 0x4); 988 // emit_rm(cbuf, 0x2, EAX_enc, 0x4);
989 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); 989 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc);
990 emit_long(0); // 32-bits offset (4 bytes) 990 emit_int32(0); // 32-bits offset (4 bytes)
991 } 991 }
992 992
993 void Assembler::addsd(XMMRegister dst, XMMRegister src) { 993 void Assembler::addsd(XMMRegister dst, XMMRegister src) {
994 NOT_LP64(assert(VM_Version::supports_sse2(), "")); 994 NOT_LP64(assert(VM_Version::supports_sse2(), ""));
995 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); 995 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2);
1074 void Assembler::andl(Address dst, int32_t imm32) { 1074 void Assembler::andl(Address dst, int32_t imm32) {
1075 InstructionMark im(this); 1075 InstructionMark im(this);
1076 prefix(dst); 1076 prefix(dst);
1077 emit_int8((unsigned char)0x81); 1077 emit_int8((unsigned char)0x81);
1078 emit_operand(rsp, dst, 4); 1078 emit_operand(rsp, dst, 4);
1079 emit_long(imm32); 1079 emit_int32(imm32);
1080 } 1080 }
1081 1081
1082 void Assembler::andl(Register dst, int32_t imm32) { 1082 void Assembler::andl(Register dst, int32_t imm32) {
1083 prefix(dst); 1083 prefix(dst);
1084 emit_arith(0x81, 0xE0, dst, imm32); 1084 emit_arith(0x81, 0xE0, dst, imm32);
1202 void Assembler::cmpl(Address dst, int32_t imm32) { 1202 void Assembler::cmpl(Address dst, int32_t imm32) {
1203 InstructionMark im(this); 1203 InstructionMark im(this);
1204 prefix(dst); 1204 prefix(dst);
1205 emit_int8((unsigned char)0x81); 1205 emit_int8((unsigned char)0x81);
1206 emit_operand(rdi, dst, 4); 1206 emit_operand(rdi, dst, 4);
1207 emit_long(imm32); 1207 emit_int32(imm32);
1208 } 1208 }
1209 1209
1210 void Assembler::cmpl(Register dst, int32_t imm32) { 1210 void Assembler::cmpl(Register dst, int32_t imm32) {
1211 prefix(dst); 1211 prefix(dst);
1212 emit_arith(0x81, 0xF8, dst, imm32); 1212 emit_arith(0x81, 0xF8, dst, imm32);
1406 emit_int8((unsigned char)(0xC0 | encode)); 1406 emit_int8((unsigned char)(0xC0 | encode));
1407 emit_int8(value & 0xFF); 1407 emit_int8(value & 0xFF);
1408 } else { 1408 } else {
1409 emit_int8(0x69); 1409 emit_int8(0x69);
1410 emit_int8((unsigned char)(0xC0 | encode)); 1410 emit_int8((unsigned char)(0xC0 | encode));
1411 emit_long(value); 1411 emit_int32(value);
1412 } 1412 }
1413 } 1413 }
1414 1414
1415 void Assembler::incl(Address dst) { 1415 void Assembler::incl(Address dst) {
1416 // Don't use it directly. Use MacroAssembler::increment() instead. 1416 // Don't use it directly. Use MacroAssembler::increment() instead.
1438 // 0000 1111 1000 tttn #32-bit disp 1438 // 0000 1111 1000 tttn #32-bit disp
1439 assert(is_simm32(offs - long_size), 1439 assert(is_simm32(offs - long_size),
1440 "must be 32bit offset (call4)"); 1440 "must be 32bit offset (call4)");
1441 emit_int8(0x0F); 1441 emit_int8(0x0F);
1442 emit_int8((unsigned char)(0x80 | cc)); 1442 emit_int8((unsigned char)(0x80 | cc));
1443 emit_long(offs - long_size); 1443 emit_int32(offs - long_size);
1444 } 1444 }
1445 } else { 1445 } else {
1446 // Note: could eliminate cond. jumps to this jump if condition 1446 // Note: could eliminate cond. jumps to this jump if condition
1447 // is the same however, seems to be rather unlikely case. 1447 // is the same however, seems to be rather unlikely case.
1448 // Note: use jccb() if label to be bound is very close to get 1448 // Note: use jccb() if label to be bound is very close to get
1449 // an 8-bit displacement 1449 // an 8-bit displacement
1450 L.add_patch_at(code(), locator()); 1450 L.add_patch_at(code(), locator());
1451 emit_int8(0x0F); 1451 emit_int8(0x0F);
1452 emit_int8((unsigned char)(0x80 | cc)); 1452 emit_int8((unsigned char)(0x80 | cc));
1453 emit_long(0); 1453 emit_int32(0);
1454 } 1454 }
1455 } 1455 }
1456 1456
1457 void Assembler::jccb(Condition cc, Label& L) { 1457 void Assembler::jccb(Condition cc, Label& L) {
1458 if (L.is_bound()) { 1458 if (L.is_bound()) {
1496 if (maybe_short && is8bit(offs - short_size)) { 1496 if (maybe_short && is8bit(offs - short_size)) {
1497 emit_int8((unsigned char)0xEB); 1497 emit_int8((unsigned char)0xEB);
1498 emit_int8((offs - short_size) & 0xFF); 1498 emit_int8((offs - short_size) & 0xFF);
1499 } else { 1499 } else {
1500 emit_int8((unsigned char)0xE9); 1500 emit_int8((unsigned char)0xE9);
1501 emit_long(offs - long_size); 1501 emit_int32(offs - long_size);
1502 } 1502 }
1503 } else { 1503 } else {
1504 // By default, forward jumps are always 32-bit displacements, since 1504 // By default, forward jumps are always 32-bit displacements, since
1505 // we can't yet know where the label will be bound. If you're sure that 1505 // we can't yet know where the label will be bound. If you're sure that
1506 // the forward jump will not run beyond 256 bytes, use jmpb to 1506 // the forward jump will not run beyond 256 bytes, use jmpb to
1507 // force an 8-bit displacement. 1507 // force an 8-bit displacement.
1508 InstructionMark im(this); 1508 InstructionMark im(this);
1509 L.add_patch_at(code(), locator()); 1509 L.add_patch_at(code(), locator());
1510 emit_int8((unsigned char)0xE9); 1510 emit_int8((unsigned char)0xE9);
1511 emit_long(0); 1511 emit_int32(0);
1512 } 1512 }
1513 } 1513 }
1514 1514
1515 void Assembler::jmp(Register entry) { 1515 void Assembler::jmp(Register entry) {
1516 int encode = prefix_and_encode(entry->encoding()); 1516 int encode = prefix_and_encode(entry->encoding());
1730 // Uses zero extension on 64bit 1730 // Uses zero extension on 64bit
1731 1731
1732 void Assembler::movl(Register dst, int32_t imm32) { 1732 void Assembler::movl(Register dst, int32_t imm32) {
1733 int encode = prefix_and_encode(dst->encoding()); 1733 int encode = prefix_and_encode(dst->encoding());
1734 emit_int8((unsigned char)(0xB8 | encode)); 1734 emit_int8((unsigned char)(0xB8 | encode));
1735 emit_long(imm32); 1735 emit_int32(imm32);
1736 } 1736 }
1737 1737
1738 void Assembler::movl(Register dst, Register src) { 1738 void Assembler::movl(Register dst, Register src) {
1739 int encode = prefix_and_encode(dst->encoding(), src->encoding()); 1739 int encode = prefix_and_encode(dst->encoding(), src->encoding());
1740 emit_int8((unsigned char)0x8B); 1740 emit_int8((unsigned char)0x8B);
1751 void Assembler::movl(Address dst, int32_t imm32) { 1751 void Assembler::movl(Address dst, int32_t imm32) {
1752 InstructionMark im(this); 1752 InstructionMark im(this);
1753 prefix(dst); 1753 prefix(dst);
1754 emit_int8((unsigned char)0xC7); 1754 emit_int8((unsigned char)0xC7);
1755 emit_operand(rax, dst, 4); 1755 emit_operand(rax, dst, 4);
1756 emit_long(imm32); 1756 emit_int32(imm32);
1757 } 1757 }
1758 1758
1759 void Assembler::movl(Address dst, Register src) { 1759 void Assembler::movl(Address dst, Register src) {
1760 InstructionMark im(this); 1760 InstructionMark im(this);
1761 prefix(dst, src); 1761 prefix(dst, src);
2497 2497
2498 void Assembler::push(int32_t imm32) { 2498 void Assembler::push(int32_t imm32) {
2499 // in 64bits we push 64bits onto the stack but only 2499 // in 64bits we push 64bits onto the stack but only
2500 // take a 32bit immediate 2500 // take a 32bit immediate
2501 emit_int8(0x68); 2501 emit_int8(0x68);
2502 emit_long(imm32); 2502 emit_int32(imm32);
2503 } 2503 }
2504 2504
2505 void Assembler::push(Register src) { 2505 void Assembler::push(Register src) {
2506 int encode = prefix_and_encode(src->encoding()); 2506 int encode = prefix_and_encode(src->encoding());
2507 2507
2789 } else { 2789 } else {
2790 encode = prefix_and_encode(encode); 2790 encode = prefix_and_encode(encode);
2791 emit_int8((unsigned char)0xF7); 2791 emit_int8((unsigned char)0xF7);
2792 emit_int8((unsigned char)(0xC0 | encode)); 2792 emit_int8((unsigned char)(0xC0 | encode));
2793 } 2793 }
2794 emit_long(imm32); 2794 emit_int32(imm32);
2795 } 2795 }
2796 2796
2797 void Assembler::testl(Register dst, Register src) { 2797 void Assembler::testl(Register dst, Register src) {
2798 (void) prefix_and_encode(dst->encoding(), src->encoding()); 2798 (void) prefix_and_encode(dst->encoding(), src->encoding());
2799 emit_arith(0x85, 0xC0, dst, src); 2799 emit_arith(0x85, 0xC0, dst, src);
4733 void Assembler::andq(Address dst, int32_t imm32) { 4733 void Assembler::andq(Address dst, int32_t imm32) {
4734 InstructionMark im(this); 4734 InstructionMark im(this);
4735 prefixq(dst); 4735 prefixq(dst);
4736 emit_int8((unsigned char)0x81); 4736 emit_int8((unsigned char)0x81);
4737 emit_operand(rsp, dst, 4); 4737 emit_operand(rsp, dst, 4);
4738 emit_long(imm32); 4738 emit_int32(imm32);
4739 } 4739 }
4740 4740
4741 void Assembler::andq(Register dst, int32_t imm32) { 4741 void Assembler::andq(Register dst, int32_t imm32) {
4742 (void) prefixq_and_encode(dst->encoding()); 4742 (void) prefixq_and_encode(dst->encoding());
4743 emit_arith(0x81, 0xE0, dst, imm32); 4743 emit_arith(0x81, 0xE0, dst, imm32);
4806 void Assembler::cmpq(Address dst, int32_t imm32) { 4806 void Assembler::cmpq(Address dst, int32_t imm32) {
4807 InstructionMark im(this); 4807 InstructionMark im(this);
4808 prefixq(dst); 4808 prefixq(dst);
4809 emit_int8((unsigned char)0x81); 4809 emit_int8((unsigned char)0x81);
4810 emit_operand(rdi, dst, 4); 4810 emit_operand(rdi, dst, 4);
4811 emit_long(imm32); 4811 emit_int32(imm32);
4812 } 4812 }
4813 4813
4814 void Assembler::cmpq(Register dst, int32_t imm32) { 4814 void Assembler::cmpq(Register dst, int32_t imm32) {
4815 (void) prefixq_and_encode(dst->encoding()); 4815 (void) prefixq_and_encode(dst->encoding());
4816 emit_arith(0x81, 0xF8, dst, imm32); 4816 emit_arith(0x81, 0xF8, dst, imm32);
4945 emit_int8((unsigned char)(0xC0 | encode)); 4945 emit_int8((unsigned char)(0xC0 | encode));
4946 emit_int8(value & 0xFF); 4946 emit_int8(value & 0xFF);
4947 } else { 4947 } else {
4948 emit_int8(0x69); 4948 emit_int8(0x69);
4949 emit_int8((unsigned char)(0xC0 | encode)); 4949 emit_int8((unsigned char)(0xC0 | encode));
4950 emit_long(value); 4950 emit_int32(value);
4951 } 4951 }
4952 } 4952 }
4953 4953
4954 void Assembler::incl(Register dst) { 4954 void Assembler::incl(Register dst) {
4955 // Don't use it directly. Use MacroAssembler::incrementl() instead. 4955 // Don't use it directly. Use MacroAssembler::incrementl() instead.
5098 // as a result we shouldn't use until tested at runtime... 5098 // as a result we shouldn't use until tested at runtime...
5099 ShouldNotReachHere(); 5099 ShouldNotReachHere();
5100 InstructionMark im(this); 5100 InstructionMark im(this);
5101 int encode = prefixq_and_encode(dst->encoding()); 5101 int encode = prefixq_and_encode(dst->encoding());
5102 emit_int8((unsigned char)(0xC7 | encode)); 5102 emit_int8((unsigned char)(0xC7 | encode));
5103 emit_long(imm32); 5103 emit_int32(imm32);
5104 } 5104 }
5105 5105
5106 void Assembler::movslq(Address dst, int32_t imm32) { 5106 void Assembler::movslq(Address dst, int32_t imm32) {
5107 assert(is_simm32(imm32), "lost bits"); 5107 assert(is_simm32(imm32), "lost bits");
5108 InstructionMark im(this); 5108 InstructionMark im(this);
5109 prefixq(dst); 5109 prefixq(dst);
5110 emit_int8((unsigned char)0xC7); 5110 emit_int8((unsigned char)0xC7);
5111 emit_operand(rax, dst, 4); 5111 emit_operand(rax, dst, 4);
5112 emit_long(imm32); 5112 emit_int32(imm32);
5113 } 5113 }
5114 5114
5115 void Assembler::movslq(Register dst, Address src) { 5115 void Assembler::movslq(Register dst, Address src) {
5116 InstructionMark im(this); 5116 InstructionMark im(this);
5117 prefixq(src, dst); 5117 prefixq(src, dst);
5185 void Assembler::orq(Address dst, int32_t imm32) { 5185 void Assembler::orq(Address dst, int32_t imm32) {
5186 InstructionMark im(this); 5186 InstructionMark im(this);
5187 prefixq(dst); 5187 prefixq(dst);
5188 emit_int8((unsigned char)0x81); 5188 emit_int8((unsigned char)0x81);
5189 emit_operand(rcx, dst, 4); 5189 emit_operand(rcx, dst, 4);
5190 emit_long(imm32); 5190 emit_int32(imm32);
5191 } 5191 }
5192 5192
5193 void Assembler::orq(Register dst, int32_t imm32) { 5193 void Assembler::orq(Register dst, int32_t imm32) {
5194 (void) prefixq_and_encode(dst->encoding()); 5194 (void) prefixq_and_encode(dst->encoding());
5195 emit_arith(0x81, 0xC8, dst, imm32); 5195 emit_arith(0x81, 0xC8, dst, imm32);
5420 } else { 5420 } else {
5421 encode = prefixq_and_encode(encode); 5421 encode = prefixq_and_encode(encode);
5422 emit_int8((unsigned char)0xF7); 5422 emit_int8((unsigned char)0xF7);
5423 emit_int8((unsigned char)(0xC0 | encode)); 5423 emit_int8((unsigned char)(0xC0 | encode));
5424 } 5424 }
5425 emit_long(imm32); 5425 emit_int32(imm32);
5426 } 5426 }
5427 5427
5428 void Assembler::testq(Register dst, Register src) { 5428 void Assembler::testq(Register dst, Register src) {
5429 (void) prefixq_and_encode(dst->encoding(), src->encoding()); 5429 (void) prefixq_and_encode(dst->encoding(), src->encoding());
5430 emit_arith(0x85, 0xC0, dst, src); 5430 emit_arith(0x85, 0xC0, dst, src);