--- a/src/cpu/x86/vm/x86_32.ad	Wed Oct 15 15:35:33 2014 +0200
+++ b/src/cpu/x86/vm/x86_32.ad	Wed Oct 15 11:59:32 2014 +0200
@@ -3889,6 +3889,17 @@
   interface(CONST_INTER);
 %}
 
+// Int Immediate non-negative
+operand immU31()
+%{
+  predicate(n->get_int() >= 0);
+  match(ConI);
+
+  op_cost(0);
+  format %{ %}
+  interface(CONST_INTER);
+%}
+
 // Constant for long shifts
 operand immI_32() %{
   predicate( n->get_int() == 32 );
@@ -6119,12 +6130,12 @@
   ins_pipe(ialu_reg_mem);
 %}
 
-// Load Integer with 32-bit mask into Long Register
-instruct loadI2L_immI(eRegL dst, memory mem, immI mask, eFlagsReg cr) %{
+// Load Integer with 31-bit mask into Long Register
+instruct loadI2L_immU31(eRegL dst, memory mem, immU31 mask, eFlagsReg cr) %{
   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
   effect(KILL cr);
 
-  format %{ "MOV    $dst.lo,$mem\t# int & 32-bit mask -> long\n\t"
+  format %{ "MOV    $dst.lo,$mem\t# int & 31-bit mask -> long\n\t"
             "XOR    $dst.hi,$dst.hi\n\t"
             "AND    $dst.lo,$mask" %}
   ins_encode %{