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diff src/cpu/x86/vm/x86_64.ad @ 124:b130b98db9cf

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6689060: Escape Analysis does not work with Compressed Oops Summary: 64-bits VM crashes with -XX:+AggresiveOpts (Escape Analysis + Compressed Oops) Reviewed-by: never, sgoldman
author kvn
date Wed, 23 Apr 2008 11:20:36 -0700
parents ba764ed4b6f2
children f3de1255b035
line wrap: on
line diff
--- a/src/cpu/x86/vm/x86_64.ad	Thu Apr 17 07:16:03 2008 -0700
+++ b/src/cpu/x86/vm/x86_64.ad	Wed Apr 23 11:20:36 2008 -0700
@@ -6080,7 +6080,8 @@
   predicate(n->in(MemNode::Address)->bottom_type()->is_narrow());
 
   ins_cost(125); // XXX
-  format %{ "movl    $dst, $mem\t# compressed class" %}
+  format %{ "movl    $dst, $mem\t# compressed class\n\t"
+            "decode_heap_oop $dst,$dst" %}
   ins_encode %{
     Address addr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp);
     Register dst = as_Register($dst$$reg);
@@ -6349,7 +6350,7 @@
 instruct loadConN0(rRegN dst, immN0 src, rFlagsReg cr) %{
   match(Set dst src);
   effect(KILL cr);
-  format %{ "xorq    $dst, $src\t# compressed ptr" %}
+  format %{ "xorq    $dst, $src\t# compressed NULL ptr" %}
   ins_encode %{
     Register dst = $dst$$Register;
     __ xorq(dst, dst);
@@ -6361,7 +6362,8 @@
   match(Set dst src);
 
   ins_cost(125);
-  format %{ "movl    $dst, $src\t# compressed ptr" %}
+  format %{ "movq    $dst, $src\t# compressed ptr\n\t"
+            "encode_heap_oop_not_null $dst,$dst" %}
   ins_encode %{
     address con = (address)$src$$constant;
     Register dst = $dst$$Register;
@@ -6996,6 +6998,7 @@
 
 // Convert oop pointer into compressed form
 instruct encodeHeapOop(rRegN dst, rRegP src, rFlagsReg cr) %{
+  predicate(n->bottom_type()->is_narrowoop()->make_oopptr()->ptr() != TypePtr::NotNull);
   match(Set dst (EncodeP src));
   effect(KILL cr);
   format %{ "encode_heap_oop $dst,$src" %}
@@ -7010,7 +7013,21 @@
   ins_pipe(ialu_reg_long);
 %}
 
+instruct encodeHeapOop_not_null(rRegN dst, rRegP src, rFlagsReg cr) %{
+  predicate(n->bottom_type()->is_narrowoop()->make_oopptr()->ptr() == TypePtr::NotNull);
+  match(Set dst (EncodeP src));
+  effect(KILL cr);
+  format %{ "encode_heap_oop_not_null $dst,$src" %}
+  ins_encode %{
+    Register s = $src$$Register;
+    Register d = $dst$$Register;
+    __ encode_heap_oop_not_null(d, s);
+  %}
+  ins_pipe(ialu_reg_long);
+%}
+
 instruct decodeHeapOop(rRegP dst, rRegN src, rFlagsReg cr) %{
+  predicate(n->bottom_type()->is_oopptr()->ptr() != TypePtr::NotNull);
   match(Set dst (DecodeN src));
   effect(KILL cr);
   format %{ "decode_heap_oop $dst,$src" %}
@@ -7025,6 +7042,18 @@
   ins_pipe(ialu_reg_long);
 %}
 
+instruct decodeHeapOop_not_null(rRegP dst, rRegN src) %{
+  predicate(n->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull);
+  match(Set dst (DecodeN src));
+  format %{ "decode_heap_oop_not_null $dst,$src" %}
+  ins_encode %{
+    Register s = $src$$Register;
+    Register d = $dst$$Register;
+    __ decode_heap_oop_not_null(d, s);
+  %}
+  ins_pipe(ialu_reg_long);
+%}
+
 
 //----------Conditional Move---------------------------------------------------
 // Jump