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diff src/cpu/x86/vm/vm_version_x86.cpp @ 1730:f55c4f82ab9d

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6978249: spill between cpu and fpu registers when those moves are fast Reviewed-by: kvn
author never
date Thu, 19 Aug 2010 14:51:47 -0700
parents 76efbe666d6c
children 3e8fbc61cee8
line wrap: on
line diff
--- a/src/cpu/x86/vm/vm_version_x86.cpp	Wed Aug 18 01:22:16 2010 -0700
+++ b/src/cpu/x86/vm/vm_version_x86.cpp	Thu Aug 19 14:51:47 2010 -0700
@@ -482,6 +482,15 @@
     }
   }
 
+#ifdef COMPILER2
+  if (UseFPUForSpilling) {
+    if (UseSSE < 2) {
+      // Only supported with SSE2+
+      FLAG_SET_DEFAULT(UseFPUForSpilling, false);
+    }
+  }
+#endif
+
   assert(0 <= ReadPrefetchInstr && ReadPrefetchInstr <= 3, "invalid value");
   assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 3, "invalid value");
 
@@ -520,6 +529,11 @@
     if( supports_sse4_2() && supports_ht() ) { // Nehalem based cpus
       AllocatePrefetchDistance = 192;
       AllocatePrefetchLines = 4;
+#ifdef COMPILER2
+      if (AggressiveOpts && FLAG_IS_DEFAULT(UseFPUForSpilling)) {
+        FLAG_SET_DEFAULT(UseFPUForSpilling, true);
+      }
+#endif
     }
   }
   assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value");