Mercurial > hg > truffle
changeset 8149:8fe43a4301dd
Merge.
| author | Thomas Wuerthinger <thomas.wuerthinger@oracle.com> |
|---|---|
| date | Thu, 07 Mar 2013 14:38:28 +0100 |
| parents | 12b4f1521a0d (current diff) 9786ac8fff61 (diff) |
| children | b66f831ac5ab |
| files | |
| diffstat | 8 files changed, 73 insertions(+), 93 deletions(-) [+] |
line wrap: on
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--- a/graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64Assembler.java Thu Mar 07 14:38:20 2013 +0100 +++ b/graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64Assembler.java Thu Mar 07 14:38:28 2013 +0100 @@ -203,16 +203,16 @@ } // immediate-to-memory forms - private void emitArithOperand(int op1, Register rm, AMD64Address adr, int imm32) { + private void emitArithOperand(int op1, int op2, AMD64Address adr, int imm32) { assert (op1 & 0x01) == 1 : "should be 32bit operation"; assert (op1 & 0x02) == 0 : "sign-extension bit should not be set"; if (isByte(imm32)) { emitByte(op1 | 0x02); // set sign bit - emitOperandHelper(rm, adr); + emitOperandHelper(op2, adr); emitByte(imm32 & 0xFF); } else { emitByte(op1); - emitOperandHelper(rm, adr); + emitOperandHelper(op2, adr); emitInt(imm32); } } @@ -224,6 +224,14 @@ } protected void emitOperandHelper(Register reg, AMD64Address addr) { + assert reg != Register.None; + emitOperandHelper(encode(reg), addr); + } + + protected void emitOperandHelper(int reg, AMD64Address addr) { + assert (reg & 0x07) == reg; + int regenc = reg << 3; + Register base = isLegal(addr.getBase()) ? asRegister(addr.getBase()) : Register.None; Register index = isLegal(addr.getIndex()) ? asRegister(addr.getIndex()) : Register.None; @@ -235,11 +243,6 @@ base = frameRegister; } - // Encode the registers as needed in the fields they are used in - - assert reg != Register.None; - int regenc = encode(reg) << 3; - if (base == AMD64.rip) { // also matches Placeholder // [00 000 101] disp32 assert index == Register.None : "cannot use RIP relative addressing with index register"; @@ -331,7 +334,7 @@ public final void addl(AMD64Address dst, int imm32) { prefix(dst); - emitArithOperand(0x81, rax, dst, imm32); + emitArithOperand(0x81, 0, dst, imm32); } public final void addl(Register dst, int imm32) { @@ -600,7 +603,7 @@ protected final void decl(AMD64Address dst) { prefix(dst); emitByte(0xFF); - emitOperandHelper(rcx, dst); + emitOperandHelper(1, dst); } public final void divsd(Register dst, AMD64Address src) { @@ -687,7 +690,7 @@ protected final void incl(AMD64Address dst) { prefix(dst); emitByte(0xFF); - emitOperandHelper(rax, dst); + emitOperandHelper(0, dst); } private void jcc(ConditionFlag cc, int jumpTarget, boolean forceDisp32) { @@ -863,7 +866,7 @@ public final void movb(AMD64Address dst, int imm8) { prefix(dst); emitByte(0xC6); - emitOperandHelper(rax, dst); + emitOperandHelper(0, dst); emitByte(imm8); } @@ -914,7 +917,7 @@ public final void movl(AMD64Address dst, int imm32) { prefix(dst); emitByte(0xC7); - emitOperandHelper(rax, dst); + emitOperandHelper(0, dst); emitInt(imm32); } @@ -1061,7 +1064,7 @@ emitByte(0x66); // switch to 16-bit mode prefix(dst); emitByte(0xC7); - emitOperandHelper(rax, dst); + emitOperandHelper(0, dst); emitShort(imm16); } @@ -1468,15 +1471,7 @@ public final void subl(AMD64Address dst, int imm32) { prefix(dst); - if (isByte(imm32)) { - emitByte(0x83); - emitOperandHelper(rbp, dst); - emitByte(imm32 & 0xFF); - } else { - emitByte(0x81); - emitOperandHelper(rbp, dst); - emitInt(imm32); - } + emitArithOperand(0x81, 5, dst, imm32); } public final void subl(Register dst, int imm32) { @@ -2010,7 +2005,7 @@ protected final void decq(AMD64Address dst) { prefixq(dst); emitByte(0xFF); - emitOperandHelper(rcx, dst); + emitOperandHelper(1, dst); } public final void divq(Register src) { @@ -2092,7 +2087,7 @@ public final void movslq(AMD64Address dst, int imm32) { prefixq(dst); emitByte(0xC7); - emitOperandHelper(rax, dst); + emitOperandHelper(0, dst); emitInt(imm32); } @@ -2333,7 +2328,7 @@ public final void fld(AMD64Address src) { emitByte(0xDD); - emitOperandHelper(rax, src); + emitOperandHelper(0, src); } public final void fldln2() { @@ -2353,7 +2348,7 @@ public final void fstp(AMD64Address src) { emitByte(0xDD); - emitOperandHelper(rbx, src); + emitOperandHelper(3, src); } public final void fsin() {
--- a/graal/com.oracle.graal.compiler.amd64/src/com/oracle/graal/compiler/amd64/AMD64LIRGenerator.java Thu Mar 07 14:38:20 2013 +0100 +++ b/graal/com.oracle.graal.compiler.amd64/src/com/oracle/graal/compiler/amd64/AMD64LIRGenerator.java Thu Mar 07 14:38:28 2013 +0100 @@ -67,7 +67,6 @@ import com.oracle.graal.lir.amd64.AMD64Move.MoveFromRegOp; import com.oracle.graal.lir.amd64.AMD64Move.MoveToRegOp; import com.oracle.graal.lir.amd64.AMD64Move.NullCheckOp; -import com.oracle.graal.lir.amd64.AMD64Move.SpillMoveOp; import com.oracle.graal.lir.amd64.AMD64Move.StackLeaOp; import com.oracle.graal.lir.amd64.AMD64Move.StoreConstantOp; import com.oracle.graal.lir.amd64.AMD64Move.StoreOp; @@ -94,7 +93,7 @@ @Override public LIRInstruction createMove(Value result, Value input) { - return new SpillMoveOp(result, input); + return AMD64LIRGenerator.createMove(result, input); } } @@ -146,13 +145,17 @@ return result; } + private static AMD64LIRInstruction createMove(Value dst, Value src) { + if (isRegister(src) || isStackSlot(dst)) { + return new MoveFromRegOp(dst, src); + } else { + return new MoveToRegOp(dst, src); + } + } + @Override public void emitMove(Value dst, Value src) { - if (isRegister(src) || isStackSlot(dst)) { - append(new MoveFromRegOp(dst, src)); - } else { - append(new MoveToRegOp(dst, src)); - } + append(createMove(dst, src)); } private AMD64Address prepareAddress(Kind kind, Value base, int displacement, Value index, int scale) {
--- a/graal/com.oracle.graal.compiler.test/src/com/oracle/graal/compiler/test/backend/AllocatorTest.java Thu Mar 07 14:38:20 2013 +0100 +++ b/graal/com.oracle.graal.compiler.test/src/com/oracle/graal/compiler/test/backend/AllocatorTest.java Thu Mar 07 14:38:28 2013 +0100 @@ -34,6 +34,7 @@ import com.oracle.graal.debug.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.LIRInstruction.ValueProcedure; +import com.oracle.graal.lir.StandardOp.MoveOp; import com.oracle.graal.nodes.*; import com.oracle.graal.nodes.cfg.*; import com.oracle.graal.phases.*; @@ -108,32 +109,30 @@ } private void collectStats(final LIRInstruction instr) { - final boolean move = instr.name().equals("MOVE"); instr.forEachOutput(new ValueProcedure() { @Override - public Value doValue(Value defValue) { - if (ValueUtil.isRegister(defValue)) { - final Register reg = ValueUtil.asRegister(defValue); + public Value doValue(Value value) { + if (ValueUtil.isRegister(value)) { + final Register reg = ValueUtil.asRegister(value); registers.add(reg); - if (move) { - instr.forEachInput(new ValueProcedure() { - - @Override - public Value doValue(Value useValue) { - if (ValueUtil.isRegister(useValue) && ValueUtil.asRegister(useValue) != reg) { - regRegMoves++; - } - return useValue; - } - }); - } - } else if (move && ValueUtil.isStackSlot(defValue)) { - spillMoves++; } - return defValue; + return value; } }); + + if (instr instanceof MoveOp) { + MoveOp move = (MoveOp) instr; + Value def = move.getResult(); + Value use = move.getInput(); + if (ValueUtil.isRegister(def)) { + if (ValueUtil.isRegister(use) && ValueUtil.asRegister(def) != ValueUtil.asRegister(use)) { + regRegMoves++; + } + } else if (ValueUtil.isStackSlot(def)) { + spillMoves++; + } + } } }
--- a/graal/com.oracle.graal.compiler/src/com/oracle/graal/compiler/gen/LIRGenerator.java Thu Mar 07 14:38:20 2013 +0100 +++ b/graal/com.oracle.graal.compiler/src/com/oracle/graal/compiler/gen/LIRGenerator.java Thu Mar 07 14:38:28 2013 +0100 @@ -562,7 +562,7 @@ for (PhiNode phi : merge.phis()) { if (phi.type() == PhiType.Value) { ValueNode curVal = phi.valueAt(pred); - resolver.move(operand(curVal), operandForPhi(phi)); + resolver.move(operandForPhi(phi), operand(curVal)); } } resolver.dispose();
--- a/graal/com.oracle.graal.compiler/src/com/oracle/graal/compiler/gen/PhiResolver.java Thu Mar 07 14:38:20 2013 +0100 +++ b/graal/com.oracle.graal.compiler/src/com/oracle/graal/compiler/gen/PhiResolver.java Thu Mar 07 14:38:28 2013 +0100 @@ -131,7 +131,7 @@ PhiResolverNode node = variableOperands.get(i); if (!node.visited) { loop = null; - move(null, node); + move(node, null); node.startNode = true; assert isIllegal(temp) : "moveTempTo() call missing"; } @@ -141,12 +141,12 @@ for (int i = otherOperands.size() - 1; i >= 0; i--) { PhiResolverNode node = otherOperands.get(i); for (int j = node.destinations.size() - 1; j >= 0; j--) { - emitMove(node.operand, node.destinations.get(j).operand); + emitMove(node.destinations.get(j).operand, node.operand); } } } - public void move(Value src, Value dest) { + public void move(Value dest, Value src) { assert isVariable(dest) : "destination must be virtual"; // tty.print("move "); src.print(); tty.print(" to "); dest.print(); tty.cr(); assert isLegal(src) : "source for phi move is illegal"; @@ -184,7 +184,7 @@ return createNode(opr, false); } - private void emitMove(Value src, Value dest) { + private void emitMove(Value dest, Value src) { assert isLegal(src); assert isLegal(dest); gen.emitMove(dest, src); @@ -197,11 +197,11 @@ // ie. cycle a := b, b := a start with node a // Call graph: move(NULL, a) -> move(a, b) -> move(b, a) // Generates moves in this order: move b to temp, move a to b, move temp to a - private void move(PhiResolverNode src, PhiResolverNode dest) { + private void move(PhiResolverNode dest, PhiResolverNode src) { if (!dest.visited) { dest.visited = true; for (int i = dest.destinations.size() - 1; i >= 0; i--) { - move(dest, dest.destinations.get(i)); + move(dest.destinations.get(i), dest); } } else if (!dest.startNode) { // cycle in graph detected @@ -216,7 +216,7 @@ moveTempTo(dest.operand); dest.assigned = true; } else if (src != null) { - emitMove(src.operand, dest.operand); + emitMove(dest.operand, src.operand); dest.assigned = true; } } @@ -224,14 +224,14 @@ private void moveTempTo(Value dest) { assert isLegal(temp); - emitMove(temp, dest); + emitMove(dest, temp); temp = ILLEGAL; } private void moveToTemp(Value src) { assert isIllegal(temp); temp = gen.newVariable(src.getKind()); - emitMove(src, temp); + emitMove(temp, src); } private PhiResolverNode sourceNode(Value opr) {
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java Thu Mar 07 14:38:20 2013 +0100 +++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java Thu Mar 07 14:38:28 2013 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2013, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -42,33 +42,6 @@ public class AMD64Move { @Opcode("MOVE") - public static class SpillMoveOp extends AMD64LIRInstruction implements MoveOp { - - @Def({REG, STACK}) protected Value result; - @Use({REG, STACK, CONST}) protected Value input; - - public SpillMoveOp(Value result, Value input) { - this.result = result; - this.input = input; - } - - @Override - public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - move(tasm, masm, getResult(), getInput()); - } - - @Override - public Value getInput() { - return input; - } - - @Override - public Value getResult() { - return result; - } - } - - @Opcode("MOVE") public static class MoveToRegOp extends AMD64LIRInstruction implements MoveOp { @Def({REG, HINT}) protected Value result;
--- a/mx/commands.py Thu Mar 07 14:38:20 2013 +0100 +++ b/mx/commands.py Thu Mar 07 14:38:28 2013 +0100 @@ -1012,6 +1012,15 @@ benchArgs.remove(args[itIdx+1]) vm = _vm; sanitycheck.getSPECjvm2008(benchArgs, skipCheck, skipValid, wt, it).bench(vm, opts=vmArgs) + +def specjbb2013(args): + """runs the composite SPECjbb2013 benchmark + + All options begining with - will be passed to the vm""" + benchArgs = [a for a in args if a[0] != '-'] + vmArgs = [a for a in args if a[0] == '-'] + vm = _vm; + sanitycheck.getSPECjbb2013(benchArgs).bench(vm, opts=vmArgs) def hsdis(args, copyToDir=None): """download the hsdis library @@ -1115,7 +1124,8 @@ 'jdkhome': [jdkhome, ''], 'dacapo': [dacapo, '[[n] benchmark] [VM options|@DaCapo options]'], 'scaladacapo': [scaladacapo, '[[n] benchmark] [VM options|@Scala DaCapo options]'], - 'specjvm2008': [specjvm2008, '[VM options|@specjvm2008 options]'], + 'specjvm2008': [specjvm2008, '[VM options|specjvm2008 options (-v, -ikv, -ict, -wt, -it)]'], + 'specjbb2013': [specjbb2013, '[VM options]'], #'example': [example, '[-v] example names...'], 'gate' : [gate, '[-options]'], 'gv' : [gv, ''],
--- a/mx/sanitycheck.py Thu Mar 07 14:38:20 2013 +0100 +++ b/mx/sanitycheck.py Thu Mar 07 14:38:28 2013 +0100 @@ -119,7 +119,7 @@ success = re.compile(r"org.spec.jbb.controller: Run finished", re.MULTILINE) matcherMax = ValuesMatcher(jops, {'group' : 'SPECjbb2013', 'name' : 'max', 'score' : '<max>'}) matcherCritical = ValuesMatcher(jops, {'group' : 'SPECjbb2013', 'name' : 'critical', 'score' : '<critical>'}) - return Test("SPECjbb2013", ['-jar', 'specjbb2013.jar', '-m', 'composite'] + benchArgs, [success], [], [matcherCritical, matcherMax], vmOpts=['-Xms7g', '-XX:+UseSerialGC', '-XX:-UseCompressedOops'], defaultCwd=specjbb2013) + return Test("SPECjbb2013", ['-jar', 'specjbb2013.jar', '-m', 'composite'] + benchArgs, [success], [], [matcherCritical, matcherMax], vmOpts=['-Xmx6g', '-Xms6g', '-Xmn3g', '-XX:+UseParallelOldGC', '-XX:-UseAdaptiveSizePolicy', '-XX:-UseBiasedLocking', '-XX:-UseCompressedOops'], defaultCwd=specjbb2013) def getSPECjvm2008(benchArgs = [], skipCheck=False, skipKitValidation=False, warmupTime=None, iterationTime=None):