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changeset 11452:a51c6eb8448a

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Refactor heap base register
author Christos Kotselidis <christos.kotselidis@oracle.com>
date Wed, 28 Aug 2013 13:27:05 +0200
parents f49ee75d2a8b
children 1092208e4986
files graal/com.oracle.graal.api.code/src/com/oracle/graal/api/code/CodeCacheProvider.java graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotBackend.java graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotLIRGenerator.java graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotRuntime.java graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotRuntime.java graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java
diffstat 6 files changed, 44 insertions(+), 24 deletions(-) [+]
line wrap: on
line diff
--- a/graal/com.oracle.graal.api.code/src/com/oracle/graal/api/code/CodeCacheProvider.java	Wed Aug 28 10:44:23 2013 +0200
+++ b/graal/com.oracle.graal.api.code/src/com/oracle/graal/api/code/CodeCacheProvider.java	Wed Aug 28 13:27:05 2013 +0200
@@ -89,4 +89,12 @@
      * Gets a description of the target architecture.
      */
     TargetDescription getTarget();
+
+    /**
+     * Returns the register the runtime uses for maintaining the heap base address. This is mainly
+     * utilized by runtimes which support compressed pointers.
+     * 
+     * @return the register that keeps the heap base address
+     */
+    Register heapBaseRegister();
 }
--- a/graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotBackend.java	Wed Aug 28 10:44:23 2013 +0200
+++ b/graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotBackend.java	Wed Aug 28 13:27:05 2013 +0200
@@ -247,7 +247,7 @@
             HotSpotRuntime hr = ((HotSpotRuntime) gen.getRuntime());
             if (hr.config.useCompressedKlassPointers) {
                 Register register = r10;
-                AMD64Move.decodeKlassPointer(asm, register, src, hr.config.narrowKlassBase, hr.config.narrowKlassShift, hr.config.logKlassAlignment);
+                AMD64Move.decodeKlassPointer(asm, register, hr.heapBaseRegister(), src, hr.config.narrowKlassBase, hr.config.narrowKlassShift, hr.config.logKlassAlignment);
                 asm.cmpq(inlineCacheKlass, register);
             } else {
                 asm.cmpq(inlineCacheKlass, src);
--- a/graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotLIRGenerator.java	Wed Aug 28 10:44:23 2013 +0200
+++ b/graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotLIRGenerator.java	Wed Aug 28 13:27:05 2013 +0200
@@ -415,11 +415,11 @@
         assert access == null || access instanceof HeapAccess;
         if (isCompressCandidate(access)) {
             if (runtime().config.useCompressedOops && kind == Kind.Object) {
-                append(new LoadCompressedPointer(kind, result, loadAddress, access != null ? state(access) : null, runtime().config.narrowOopBase, runtime().config.narrowOopShift,
-                                runtime().config.logMinObjAlignment));
+                append(new LoadCompressedPointer(kind, result, runtime().heapBaseRegister().asValue(), loadAddress, access != null ? state(access) : null, runtime().config.narrowOopBase,
+                                runtime().config.narrowOopShift, runtime().config.logMinObjAlignment));
             } else if (runtime().config.useCompressedKlassPointers && kind == Kind.Long) {
-                append(new LoadCompressedPointer(kind, result, loadAddress, access != null ? state(access) : null, runtime().config.narrowKlassBase, runtime().config.narrowKlassShift,
-                                runtime().config.logKlassAlignment));
+                append(new LoadCompressedPointer(kind, result, runtime().heapBaseRegister().asValue(), loadAddress, access != null ? state(access) : null, runtime().config.narrowKlassBase,
+                                runtime().config.narrowKlassShift, runtime().config.logKlassAlignment));
             } else {
                 append(new LoadOp(kind, result, loadAddress, access != null ? state(access) : null));
             }
--- a/graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotRuntime.java	Wed Aug 28 10:44:23 2013 +0200
+++ b/graal/com.oracle.graal.hotspot.amd64/src/com/oracle/graal/hotspot/amd64/AMD64HotSpotRuntime.java	Wed Aug 28 13:27:05 2013 +0200
@@ -96,6 +96,11 @@
     }
 
     @Override
+    public Register heapBaseRegister() {
+        return r12;
+    }
+
+    @Override
     protected RegisterConfig createRegisterConfig() {
         return new AMD64HotSpotRegisterConfig(graalRuntime.getTarget().arch, config);
     }
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotRuntime.java	Wed Aug 28 10:44:23 2013 +0200
+++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotRuntime.java	Wed Aug 28 13:27:05 2013 +0200
@@ -83,6 +83,11 @@
     }
 
     @Override
+    public Register heapBaseRegister() {
+        return r12;
+    }
+
+    @Override
     protected RegisterConfig createRegisterConfig() {
         return new SPARCHotSpotRegisterConfig(graalRuntime.getTarget().arch, config);
     }
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java	Wed Aug 28 10:44:23 2013 +0200
+++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java	Wed Aug 28 13:27:05 2013 +0200
@@ -24,7 +24,6 @@
 
 import static com.oracle.graal.api.code.ValueUtil.*;
 import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*;
-
 import static java.lang.Double.*;
 import static java.lang.Float.*;
 
@@ -123,12 +122,14 @@
         private long base;
         private int shift;
         private int alignment;
+        @Alive({REG}) protected AllocatableValue heapBaseRegister;
 
-        public LoadCompressedPointer(Kind kind, AllocatableValue result, AMD64AddressValue address, LIRFrameState state, long base, int shift, int alignment) {
+        public LoadCompressedPointer(Kind kind, AllocatableValue result, AllocatableValue heapBaseRegister, AMD64AddressValue address, LIRFrameState state, long base, int shift, int alignment) {
             super(kind, result, address, state);
             this.base = base;
             this.shift = shift;
             this.alignment = alignment;
+            this.heapBaseRegister = heapBaseRegister;
             assert kind == Kind.Object || kind == Kind.Long;
         }
 
@@ -137,9 +138,9 @@
             Register resRegister = asRegister(result);
             masm.movl(resRegister, address.toAddress());
             if (kind == Kind.Object) {
-                decodePointer(masm, resRegister, base, shift, alignment);
+                decodePointer(masm, resRegister, asRegister(heapBaseRegister), base, shift, alignment);
             } else {
-                decodeKlassPointer(masm, resRegister, base, shift, alignment);
+                decodeKlassPointer(masm, resRegister, asRegister(heapBaseRegister), base, shift, alignment);
             }
         }
     }
@@ -214,9 +215,9 @@
         public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) {
             masm.movq(asRegister(scratch), asRegister(input));
             if (kind == Kind.Object) {
-                encodePointer(masm, asRegister(scratch), base, shift, alignment);
+                encodePointer(masm, asRegister(scratch), tasm.runtime.heapBaseRegister(), base, shift, alignment);
             } else {
-                encodeKlassPointer(masm, asRegister(scratch), base, shift, alignment);
+                encodeKlassPointer(masm, asRegister(scratch), tasm.runtime.heapBaseRegister(), base, shift, alignment);
             }
             if (state != null) {
                 tasm.recordImplicitException(masm.codeBuffer.position(), state);
@@ -656,16 +657,16 @@
         final Register scratchRegister = asRegister(scratch);
         final Register cmpRegister = asRegister(cmpValue);
         final Register newRegister = asRegister(newValue);
-        encodePointer(masm, cmpRegister, base, shift, alignment);
+        encodePointer(masm, cmpRegister, tasm.runtime.heapBaseRegister(), base, shift, alignment);
         masm.movq(scratchRegister, newRegister);
-        encodePointer(masm, scratchRegister, base, shift, alignment);
+        encodePointer(masm, scratchRegister, tasm.runtime.heapBaseRegister(), base, shift, alignment);
         if (tasm.target.isMP) {
             masm.lock();
         }
         masm.cmpxchgl(scratchRegister, address.toAddress());
     }
 
-    private static void encodePointer(AMD64MacroAssembler masm, Register scratchRegister, long base, int shift, int alignment) {
+    private static void encodePointer(AMD64MacroAssembler masm, Register scratchRegister, Register heapBaseRegister, long base, int shift, int alignment) {
         // If the base is zero, the uncompressed address has to be shifted right
         // in order to be compressed.
         if (base == 0) {
@@ -679,13 +680,13 @@
             masm.testq(scratchRegister, scratchRegister);
             // If the stored reference is null, move the heap to scratch
             // register and then calculate the compressed oop value.
-            masm.cmovq(ConditionFlag.Equal, scratchRegister, AMD64.r12);
-            masm.subq(scratchRegister, AMD64.r12);
+            masm.cmovq(ConditionFlag.Equal, scratchRegister, heapBaseRegister);
+            masm.subq(scratchRegister, heapBaseRegister);
             masm.shrq(scratchRegister, alignment);
         }
     }
 
-    private static void decodePointer(AMD64MacroAssembler masm, Register resRegister, long base, int shift, int alignment) {
+    private static void decodePointer(AMD64MacroAssembler masm, Register resRegister, Register heapBaseRegister, long base, int shift, int alignment) {
         // If the base is zero, the compressed address has to be shifted left
         // in order to be uncompressed.
         if (base == 0) {
@@ -698,14 +699,14 @@
             masm.shlq(resRegister, alignment);
             masm.jccb(ConditionFlag.Equal, done);
             // Otherwise the heap base is added to the shifted address.
-            masm.addq(resRegister, AMD64.r12);
+            masm.addq(resRegister, heapBaseRegister);
             masm.bind(done);
         }
     }
 
-    private static void encodeKlassPointer(AMD64MacroAssembler masm, Register scratchRegister, long base, int shift, int alignment) {
+    private static void encodeKlassPointer(AMD64MacroAssembler masm, Register scratchRegister, Register heapBaseRegister, long base, int shift, int alignment) {
         if (base != 0) {
-            masm.subq(scratchRegister, AMD64.r12);
+            masm.subq(scratchRegister, heapBaseRegister);
         }
         if (shift != 0) {
             assert alignment == shift : "Encode algorithm is wrong";
@@ -713,20 +714,21 @@
         }
     }
 
-    private static void decodeKlassPointer(AMD64MacroAssembler masm, Register resRegister, long base, int shift, int alignment) {
+    private static void decodeKlassPointer(AMD64MacroAssembler masm, Register resRegister, Register heapBaseRegister, long base, int shift, int alignment) {
         if (shift != 0) {
             assert alignment == shift : "Decode algorithm is wrong";
             masm.shlq(resRegister, alignment);
             if (base != 0) {
-                masm.addq(resRegister, AMD64.r12);
+                masm.addq(resRegister, heapBaseRegister);
             }
         } else {
             assert base == 0 : "Sanity";
         }
     }
 
-    public static void decodeKlassPointer(AMD64MacroAssembler masm, Register register, AMD64Address address, long narrowKlassBase, int narrowKlassShift, int logKlassAlignment) {
+    public static void decodeKlassPointer(AMD64MacroAssembler masm, Register register, Register heapBaseRegister, AMD64Address address, long narrowKlassBase, int narrowKlassShift,
+                    int logKlassAlignment) {
         masm.movl(register, address);
-        decodeKlassPointer(masm, register, narrowKlassBase, narrowKlassShift, logKlassAlignment);
+        decodeKlassPointer(masm, register, heapBaseRegister, narrowKlassBase, narrowKlassShift, logKlassAlignment);
     }
 }