Mercurial > hg > truffle
changeset 10480:aa685bff0926
Merge.
| author | Thomas Wuerthinger <thomas.wuerthinger@oracle.com> |
|---|---|
| date | Sun, 23 Jun 2013 15:49:09 +0200 |
| parents | 40b8c383bc31 (current diff) 53ba9df05fa2 (diff) |
| children | 29e9a5d18c70 |
| files | graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/AbstractSPARCAssembler.java graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/ArraySPARCTest.java graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/BasicSPARCTest.java graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/ControlSPARCTest.java graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/FloatSPARCTest.java graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/IntegerSPARCTest.java graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/LogicSPARCTest.java graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/SPARCTestBase.java graal/com.oracle.graal.compiler.sparc/src/com/oracle/graal/compiler/sparc/SPARCBackend.java |
| diffstat | 29 files changed, 2426 insertions(+), 2749 deletions(-) [+] |
line wrap: on
line diff
--- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/AbstractSPARCAssembler.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2009, 2012, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.asm.sparc; - -import com.oracle.graal.api.code.AbstractAddress; -import com.oracle.graal.api.code.Register; -import com.oracle.graal.api.code.TargetDescription; -import com.oracle.graal.asm.AbstractAssembler; - -public abstract class AbstractSPARCAssembler extends AbstractAssembler { - - public static final String UNBOUND_TARGET = "L" + Integer.MAX_VALUE; - - public AbstractSPARCAssembler(TargetDescription target) { - super(target); - } - - @Override - public void align(int modulus) { - // SPARC: Implement alignment. - } - - @Override - protected void patchJumpTarget(int branch, int jumpTarget) { - // SPARC: Implement patching of jump target. - } - - @Override - public AbstractAddress makeAddress(Register base, int displacement) { - // SPARC: Implement address calculation. - return null; - } - - @Override - public AbstractAddress getPlaceholder() { - // SPARC: Implement address patching. - return null; - } -}
--- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Sun Jun 23 15:49:09 2013 +0200 @@ -22,63 +22,225 @@ */ package com.oracle.graal.asm.sparc; -import com.oracle.graal.api.code.Register; -import com.oracle.graal.api.code.RegisterConfig; -import com.oracle.graal.api.code.TargetDescription; +import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.Kind; import com.oracle.graal.asm.*; import com.oracle.graal.hotspot.HotSpotGraalRuntime; -import com.oracle.graal.sparc.SPARC; + +import static com.oracle.graal.sparc.SPARC.*; /** * This class implements an assembler that can encode most SPARC instructions. */ -public class SPARCAssembler extends AbstractSPARCAssembler { - - // @formatter:off - - public static class Fmt1 { - public Fmt1(SPARCAssembler masm, int op, int disp30) { - assert op == 1; - assert ((disp30 & 0xc0000000) == 0); - - masm.emitInt(op << 30 | disp30); +public abstract class SPARCAssembler extends AbstractAssembler { + + /** + * Constructs an assembler for the AMD64 architecture. + * + * @param registerConfig the register configuration used to bind {@link Register#Frame} and + * {@link Register#CallerFrame} to physical registers. This value can be null if this + * assembler instance will not be used to assemble instructions using these logical + * registers. + */ + public SPARCAssembler(TargetDescription target, RegisterConfig registerConfig) { + super(target); + } + + public static class Fmt00a { + + private int rd; + private int op2; + private int imm22; + + public Fmt00a(Op2s op2, int imm22, Register rd) { + this.op2 = op2.getValue(); + this.imm22 = imm22; + this.rd = rd.encoding(); + } + + public void emit(SPARCAssembler masm) { + assert rd < 0x40; + assert op2 < 0x8; + masm.emitInt(Ops.BranchOp.getValue() << 30 | rd << 25 | op2 << 22 | (imm22 & 0x003fffff)); } } - public static class Fmt2a { - public Fmt2a(SPARCAssembler masm, int op, int rd, int op2, int imm22) { - assert op == 0; - assert rd < 0x40; - assert op2 < 0x8; - - masm.emitInt(op << 30 | rd << 25 | op2 << 22 | (imm22 & 0x003fffff)); - } - } - + // @formatter:off + /** + * Instruction format for branches. + * + * | 00 |a | cond | op2 | disp22 | + * |31 30|29|28 25|24 22|21 0| + */ + // @formatter:on public static class Fmt2b { + public Fmt2b(SPARCAssembler masm, int op, int a, int cond, int op2, int disp22) { assert op == 0; assert op == 0; assert cond < 0x10; assert op2 < 0x8; - masm.emitInt(op << 30 | a << 29 | cond << 25 | op2 << 22 | (disp22 & 0x003fffff)); } } - public static class Fmt2c { - public Fmt2c(SPARCAssembler masm, int op, int a, int cond, int op2, int cc, int predict, int disp19) { - assert predict < 2; - assert op == 0; + // @formatter:off + /** + * Instruction format for conditional branches. + * + * | 00 |a | cond | op2 |cc1|cc0|p | disp19 | + * |31 30|29|28 25|24 22|21 |20 |19| 0| + */ + // @formatter:on + public static class Fmt00c { + + private static final int OP_SHIFT = 30; + private static final int A_SHIFT = 29; + private static final int COND_SHIFT = 25; + private static final int OP2_SHIFT = 22; + private static final int CC_SHIFT = 20; + private static final int P_SHIFT = 19; + private static final int DISP19_SHIFT = 0; + + // @formatter:off + private static final int OP_MASK = 0b11000000000000000000000000000000; + private static final int A_MASK = 0b00100000000000000000000000000000; + private static final int COND_MASK = 0b00011110000000000000000000000000; + private static final int OP2_MASK = 0b00000001110000000000000000000000; + private static final int CC_MASK = 0b00000000001100000000000000000000; + private static final int P_MASK = 0b00000000000010000000000000000000; + private static final int DISP19_MASK = 0b00000000000001111111111111111111; + // @formatter:on + + private int a; + private int cond; + private int op2; + private int cc; + private int p; + private int disp19; + private Label label; + + private Fmt00c(int a, int cond, int op2, int cc, int p, int disp19) { + setA(a); + setCond(cond); + setOp2(op2); + setCc(cc); + setP(p); + setDisp19(disp19); + verify(); + } + + public Fmt00c(int a, ConditionFlag cond, Op2s op2, CC cc, int p, int disp19) { + this(a, cond.getValue(), op2.getValue(), cc.getValue(), p, disp19); + } + + public Fmt00c(int a, ConditionFlag cond, Op2s op2, CC cc, int p, Label label) { + this(a, cond.getValue(), op2.getValue(), cc.getValue(), p, 0); + this.label = label; + } + + public int getA() { + return a; + } + + public void setA(int a) { + this.a = a; + } + + public int getCond() { + return cond; + } + + public void setCond(int cond) { + this.cond = cond; + } + + public int getOp2() { + return op2; + } + + public void setOp2(int op2) { + this.op2 = op2; + } + + public int getCc() { + return cc; + } + + public void setCc(int cc) { + this.cc = cc; + } + + public int getP() { + return p; + } + + public void setP(int p) { + this.p = p; + } + + /** + * Return the displacement in bytes. + */ + public int getDisp19() { + return disp19 << 2; + } + + /** + * The instructions requires displacements to be word-sized. + */ + public void setDisp19(int disp19) { + this.disp19 = disp19 >> 2; + } + + private int getInstructionBits() { + return Ops.BranchOp.getValue() << OP_SHIFT | a << A_SHIFT | cond << COND_SHIFT | op2 << OP2_SHIFT | cc << CC_SHIFT | p << P_SHIFT | (disp19 & DISP19_MASK) << DISP19_SHIFT; + } + + public static Fmt00c read(SPARCAssembler masm, int pos) { + final int inst = masm.codeBuffer.getInt(pos); + + // Make sure it's the right instruction: + final int op = (inst & OP_MASK) >> OP_SHIFT; + assert op == Ops.BranchOp.getValue(); + + // Get the instruction fields: + final int a = (inst & A_MASK) >> A_SHIFT; + final int cond = (inst & COND_MASK) >> COND_SHIFT; + final int op2 = (inst & OP2_MASK) >> OP2_SHIFT; + final int cc = (inst & CC_MASK) >> CC_SHIFT; + final int p = (inst & P_MASK) >> P_SHIFT; + final int disp19 = (inst & DISP19_MASK) >> DISP19_SHIFT; + + Fmt00c fmt = new Fmt00c(a, cond, op2, cc, p, disp19); + fmt.verify(); + return fmt; + } + + public void write(SPARCAssembler masm, int pos) { + verify(); + masm.codeBuffer.emitInt(getInstructionBits(), pos); + } + + public void emit(SPARCAssembler masm) { + if (label != null) { + final int pos = label.isBound() ? label.position() : patchUnbound(masm, label); + final int disp = pos - masm.codeBuffer.position(); + setDisp19(disp); + } + verify(); + masm.emitInt(getInstructionBits()); + } + + public void verify() { + assert p < 2; assert cond < 0x10; assert op2 < 0x8; - - masm.emitInt(op << 30 | a << 29 | cond << 25 | op2 << 22 | cc << 20 | predict | (disp19 & 0x0007ffff)); } } public static class Fmt2d { + public Fmt2d(SPARCAssembler masm, int op, int a, int rcond, int op2, int d16hi, int predict, int rs1, int d16lo) { assert predict == 0 || predict == 1; assert rcond >= 0 && rcond < 0x8; @@ -91,6 +253,7 @@ } public static class Fmt2e { + public Fmt2e(SPARCAssembler asm, int op, int c4lo, int cc2, int rs1, int d10lo, int regOrImmediate) { assert op == 0; assert (cc2 & 0xFFFFFFFE) == 0; @@ -104,32 +267,80 @@ } } + public static class Fmt01 { + + private int disp30; + + public Fmt01(int disp30) { + this.disp30 = disp30; + } + + public void emit(SPARCAssembler masm) { + assert ((disp30 & 0xc0000000) == 0); + masm.emitInt(Ops.CallOp.getValue() << 30 | disp30); + } + } + public static class Fmt3a { + public Fmt3a(SPARCAssembler masm, int op, int rd, int op3, int rs1, int rs2) { - assert op == 2 || op == 3; + assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert rs1 >= 0 && rs1 < 0x20; assert rs2 >= 0 && rs2 < 0x20; - assert rd >= 0 && rd < 0x20; - - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | rs2); + assert rd >= 0 && rd < 0x20; + + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | rs2); } } public static class Fmt3b { - public Fmt3b(SPARCAssembler masm, int op, int op3, int rs1, int regOrImmediate, int rd) { - assert op == 2 || op == 3; + + private boolean isImm; + private int op; + private int op3; + private int rs1; + private int rs2; + private int simm13; + private int rd; + + public Fmt3b(Ops op, Op3s op3, Register rs1, Register rs2, Register rd) { + this.op = op.getValue(); + this.op3 = op3.getValue(); + this.rs1 = rs1.encoding(); + this.rs2 = rs2.encoding(); + this.rd = rd.encoding(); + } + + public Fmt3b(Ops op, Op3s op3, Register rs1, int simm13, Register rd) { + isImm = true; + this.op = op.getValue(); + this.op3 = op3.getValue(); + this.rs1 = rs1.encoding(); + this.simm13 = simm13; + this.rd = rd.encoding(); + } + + public void emit(SPARCAssembler masm) { + assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert rs1 >= 0 && rs1 < 0x20; - assert rd >= 0 && rd < 0x20; - - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | (regOrImmediate & 0x1fff)); + assert rd >= 0 && rd < 0x20; + + if (isImm == false) { + assert rs2 >= 0 && rs2 < 0x20; + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | rs2); + } else { + assert isSimm13(simm13) : simm13; + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | ImmedTrue | (simm13 & 0x1fff)); + } } } public static class Fmt3c { + public Fmt3c(SPARCAssembler masm, int op, int op3, int rs1, int rs2) { - assert op == 2; + assert op == 2; assert op3 >= 0 && op3 < 0x40; assert rs1 >= 0 && rs1 < 0x20; assert rs2 >= 0 && rs2 < 0x20; @@ -139,8 +350,9 @@ } public static class Fmt3d { + public Fmt3d(SPARCAssembler masm, int op, int op3, int rs1, int simm13) { - assert op == 2; + assert op == 2; assert op3 >= 0 && op3 < 0x40; assert rs1 >= 0 && rs1 < 0x20; @@ -149,68 +361,74 @@ } public static class Fmt3e { + public Fmt3e(SPARCAssembler masm, int op, int op3, int rcond, int rs1, int rs2, int rd) { - assert op == 2 || op == 3; + assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert rcond >= 0 && rcond < 0x8; assert rs1 >= 0 && rs1 < 0x20; assert rs2 >= 0 && rs2 < 0x20; - assert rd >= 0 && rd < 0x20; - - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | rcond << 10 | rs2); + assert rd >= 0 && rd < 0x20; + + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | rcond << 10 | rs2); } } public static class Fmt3f { + public Fmt3f(SPARCAssembler masm, int op, int op3, int rcond, int rs1, int simm10, int rd) { - assert op == 2 || op == 3; + assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert rs1 >= 0 && rs1 < 0x20; - assert rd >= 0 && rd < 0x20; + assert rd >= 0 && rd < 0x20; masm.emitInt(op << 30 | rd << 25 | op3 << 19 | ImmedTrue | rs1 << 14 | rcond << 10 | (simm10 & 0x000003ff)); } } public static class Fmt3n { + public Fmt3n(SPARCAssembler masm, int op, int op3, int opf, int rs2, int rd) { - assert op == 2 || op == 3; + assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert opf >= 0 && opf < 0x200; assert rs2 >= 0 && rs2 < 0x20; - assert rd >= 0 && rd < 0x20; + assert rd >= 0 && rd < 0x20; masm.emitInt(op << 30 | rd << 25 | op3 << 19 | opf << 5 | rs2); } } public static class Fmt3p { + public Fmt3p(SPARCAssembler masm, int op, int op3, int opf, int rs1, int rs2, int rd) { - assert op == 2 || op == 3; + assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert opf >= 0 && opf < 0x200; assert rs1 >= 0 && rs1 < 0x20; assert rs2 >= 0 && rs2 < 0x20; - assert rd >= 0 && rd < 0x20; - - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | opf << 5 | rs2); + assert rd >= 0 && rd < 0x20; + + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | opf << 5 | rs2); } } public static class Fmt3q { + public Fmt3q(SPARCAssembler masm, int op, int op3, int rs1, int rd) { - assert op == 2 || op == 3; + assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert rs1 >= 0 && rs1 < 0x20; - assert rd >= 0 && rd < 0x20; + assert rd >= 0 && rd < 0x20; masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14); } } public static class Fmt3r { + public Fmt3r(SPARCAssembler masm, int op, int fcn, int op3) { - assert op == 23; + assert op == 23; assert op3 >= 0 && op3 < 0x40; assert fcn >= 0 && fcn < 0x40; @@ -219,49 +437,140 @@ } public static class Fmt4a { + public Fmt4a(SPARCAssembler masm, int op, int op3, int cc, int rs1, int regOrImmediate, int rd) { - assert op == 2; + assert op == 2; assert rs1 >= 0 && rs1 < 0x20; - assert rd >= 0 && rd < 0x10; + assert rd >= 0 && rd < 0x10; masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | ((cc << 11) & 0x000001800) | regOrImmediate); } } - public static class Fmt4c { - public Fmt4c(SPARCAssembler masm, int op, int op3, int cond, int cc, int rs2, int rd) { - assert op == 2; - assert op3 >= 0 && op3 < 0x40; - assert cc >= 0 && cc < 0x8; - assert cond >= 0 && cond < 0x10; - assert rs2 >= 0 && rs2 < 0x20; - assert rd >= 0 && rd < 0x20; - - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | ((cc << 15) & 0x00040000) | cond << 14 | ((cc << 11) & 0x3) | rs2); + public static class Fmt10c { + + private static final int OP_SHIFT = 30; + private static final int RD_SHIFT = 25; + private static final int OP3_SHIFT = 19; + private static final int CC2_SHIFT = 18; + private static final int COND_SHIFT = 14; + private static final int I_SHIFT = 13; + private static final int CC_SHIFT = 11; + private static final int RS2_SHIFT = 0; + private static final int SIMM11_SHIFT = 0; + + // @formatter:off + private static final int OP_MASK = 0b11000000000000000000000000000000; + private static final int RD_MASK = 0b00111110000000000000000000000000; + private static final int OP3_MASK = 0b00000001111110000000000000000000; + private static final int CC2_MASK = 0b00000000000001000000000000000000; + private static final int COND_MASK = 0b00000000000000111100000000000000; + private static final int I_MASK = 0b00000000000000000010000000000000; + private static final int CC_MASK = 0b00000000000000000001100000000000; + private static final int RS2_MASK = 0b00000000000000000000000000011111; + private static final int SIMM11_MASK = 0b00000000000000000000011111111111; + // @formatter:on + + private int rd; + private int op3; + private int cond; + private int i; + private int cc; + private int rs2; + private int simm11; + + private Fmt10c(int rd, int op3, int cond, int i, int cc, int rs2, int simm11) { + this.rd = rd; + this.op3 = op3; + this.cond = cond; + this.i = i; + this.cc = cc; + this.rs2 = rs2; + this.simm11 = simm11; + verify(); + } + + public Fmt10c(Op3s op3, ConditionFlag cond, CC cc, Register rs2, Register rd) { + this(rd.encoding(), op3.getValue(), cond.getValue(), 0, cc.getValue(), rs2.encoding(), 0); + } + + public Fmt10c(Op3s op3, ConditionFlag cond, CC cc, int simm11, Register rd) { + this(rd.encoding(), op3.getValue(), cond.getValue(), 1, cc.getValue(), 0, simm11); + } + + private int getInstructionBits() { + if (i == 0) { + return Ops.ArithOp.getValue() << OP_SHIFT | rd << RD_SHIFT | op3 << OP3_SHIFT | ((cc << CC2_SHIFT) & CC2_MASK) | cond << COND_SHIFT | i << I_SHIFT | ((cc << CC_SHIFT) & CC_MASK) | + rs2 << RS2_SHIFT; + } else { + return Ops.ArithOp.getValue() << OP_SHIFT | rd << RD_SHIFT | op3 << OP3_SHIFT | ((cc << CC2_SHIFT) & CC2_MASK) | cond << COND_SHIFT | i << I_SHIFT | ((cc << CC_SHIFT) & CC_MASK) | + ((simm11 << SIMM11_SHIFT) & SIMM11_MASK); + } + } + + public static Fmt10c read(SPARCAssembler masm, int pos) { + final int inst = masm.codeBuffer.getInt(pos); + + // Make sure it's the right instruction: + final int op = (inst & OP_MASK) >> OP_SHIFT; + assert op == Ops.ArithOp.getValue(); + + // Get the instruction fields: + final int rd = (inst & RD_MASK) >> RD_SHIFT; + final int op3 = (inst & OP3_MASK) >> OP3_SHIFT; + final int cond = (inst & COND_MASK) >> COND_SHIFT; + final int i = (inst & I_MASK) >> I_SHIFT; + final int cc = (inst & CC2_MASK) >> CC2_SHIFT | (inst & CC_MASK) >> CC_SHIFT; + final int rs2 = (inst & RS2_MASK) >> RS2_SHIFT; + final int simm11 = (inst & SIMM11_MASK) >> SIMM11_SHIFT; + + return new Fmt10c(rd, op3, cond, i, cc, rs2, simm11); + } + + public void write(SPARCAssembler masm, int pos) { + verify(); + masm.codeBuffer.emitInt(getInstructionBits(), pos); + } + + public void emit(SPARCAssembler masm) { + verify(); + masm.emitInt(getInstructionBits()); + } + + public void verify() { + assert ((rd << RD_SHIFT) & RD_MASK) == (rd << RD_SHIFT); + assert ((op3 << OP3_SHIFT) & OP3_MASK) == (op3 << OP3_SHIFT); + assert ((cond << COND_SHIFT) & COND_MASK) == (cond << COND_SHIFT); + assert ((i << I_SHIFT) & I_MASK) == (i << I_SHIFT); + // assert cc >= 0 && cc < 0x8; + assert ((rs2 << RS2_SHIFT) & RS2_MASK) == (rs2 << RS2_SHIFT); + // assert isSimm11(simm11); } } public static class Fmt4d { + public Fmt4d(SPARCAssembler masm, int op, int op3, int cond, int cc, int simm11, int rd) { assert op == 2; assert op3 >= 0 && op3 < 0x40; - assert cc >= 0 && cc < 0x8; + assert cc >= 0 && cc < 0x8; assert cond >= 0 && cond < 0x10; - assert rd >= 0 && rd < 0x20; + assert rd >= 0 && rd < 0x20; masm.emitInt(op << 30 | rd << 25 | op3 << 19 | ImmedTrue | ((cc << 15) & 0x00040000) | cond << 14 | ((cc << 11) & 0x3) | simm11 & 0x00004000); } } public static class Fmt5a { + public Fmt5a(SPARCAssembler masm, int op, int op3, int op5, int rs1, int rs2, int rs3, int rd) { - assert op == 2; - assert op3 >= 0 && op3 < 0x40; - assert op5 >= 0 && op5 < 0x10; - assert rs1 >= 0 && rs1 < 0x20; - assert rs2 >= 0 && rs2 < 0x20; - assert rs3 >= 0 && rs3 < 0x20; - assert rd >= 0 && rd < 0x20; + assert op == 2; + assert op3 >= 0 && op3 < 0x40; + assert op5 >= 0 && op5 < 0x10; + assert rs1 >= 0 && rs1 < 0x20; + assert rs2 >= 0 && rs2 < 0x20; + assert rs3 >= 0 && rs3 < 0x20; + assert rd >= 0 && rd < 0x20; masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | rs3 << 9 | op5 << 5 | rs2); } @@ -270,10 +579,7 @@ public static final int ImmedTrue = 0x00002000; public enum Ops { - CallOp(1), - BranchOp(0), - ArithOp(2), - LdstOp(3); + BranchOp(0b00), CallOp(0b01), ArithOp(0b10), LdstOp(0b11); private final int value; @@ -287,13 +593,7 @@ } public enum Op2s { - Bpr(3), - Fb(6), - Fbp(5), - Br(2), - Bp(1), - Cb(7), - Sethi(4); + Bpr(3), Fb(6), Fbp(5), Br(2), Bp(1), Cb(7), Sethi(4); private final int value; @@ -388,8 +688,8 @@ Ldsw(0x08, "ldsw"), Ldsb(0x09, "ldsb"), Ldsh(0x0A, "ldsh"), - Ldx(0x0b, "ldx"), - Stx(0x0e, "stx"), + Ldx(0b001011, "ldx"), + Stx(0b001110, "stx"), Ldf(0x20, "ldf"), Ldfsr(0x21, "ldfsr"), @@ -418,14 +718,7 @@ } public enum Op5s { - Fmadds(0x1), - Fmaddd(0x2), - Fmsubs(0x5), - Fmsubd(0x6), - Fnmsubs(0x9), - Fnmsubd(0xA), - Fnmadds(0xD), - Fnmaddd(0xE); + Fmadds(0x1), Fmaddd(0x2), Fmsubs(0x5), Fmsubd(0x6), Fnmsubs(0x9), Fnmsubd(0xA), Fnmadds(0xD), Fnmaddd(0xE); private final int value; @@ -439,15 +732,9 @@ } public enum Opfs { - Fmovs(0x01, "fmovs"), - Fmovd(0x02, "fmovd"), - Fmovq(0x03, "fmovq"), - Fnegs(0x05, "fnegs"), - Fnegd(0x06, "fnegd"), - Fnegq(0x07, "fnegq"), - Fabss(0x09, "fabss"), - Fabsd(0x0A, "fabsd"), - Fabsq(0x0B, "fabsq"), + Fmovs(0x01, "fmovs"), Fmovd(0x02, "fmovd"), Fmovq(0x03, "fmovq"), Fnegs(0x05, "fnegs"), Fnegd(0x06, "fnegd"), Fnegq(0x07, "fnegq"), Fabss(0x09, "fabss"), Fabsd(0x0A, "fabsd"), Fabsq( + 0x0B, + "fabsq"), // start VIS1 Edge8cc(0x0, "edge8cc"), @@ -545,13 +832,9 @@ } public enum MembarMask { - StoreStore(1 << 3, "storestore"), - LoadStore(1 << 2, "loadstore"), - StoreLoad(1 << 1, "storeload"), - LoadLoad(1 << 0, "loadload"), - Sync(1 << 6, "sync"), - MemIssue(1 << 5, "memissue"), - LookAside(1 << 4, "lookaside"); + StoreStore(1 << 3, "storestore"), LoadStore(1 << 2, "loadstore"), StoreLoad(1 << 1, "storeload"), LoadLoad(1 << 0, "loadload"), Sync(1 << 6, "sync"), MemIssue(1 << 5, "memissue"), LookAside( + 1 << 4, + "lookaside"); private final int value; private final String operator; @@ -571,13 +854,7 @@ } public enum CC { - Icc(4, "icc"), - Xcc(6, "xcc"), - Ptrcc(HotSpotGraalRuntime.wordKind() == Kind.Long ? Xcc.getValue() : Icc.getValue(), "ptrcc"), - Fcc0(0, "fcc0"), - Fcc1(1, "fcc1"), - Fcc2(2, "fcc2"), - Fcc3(3, "fcc3"); + Icc(0, "icc"), Xcc(2, "xcc"), Ptrcc(HotSpotGraalRuntime.wordKind() == Kind.Long ? Xcc.getValue() : Icc.getValue(), "ptrcc"), Fcc0(0, "fcc0"), Fcc1(1, "fcc1"), Fcc2(2, "fcc2"), Fcc3(3, "fcc3"); private final int value; private final String operator; @@ -658,13 +935,7 @@ } public enum RCondition { - Rc_z(1, "rc_z"), - Rc_lez(2, "rc_lez"), - Rc_lz(3, "rc_lz"), - Rc_nz(5, "rc_nz"), - Rc_gz(6, "rc_gz"), - Rc_gez(7, "rc_gez"), - Rc_last(Rc_gez.getValue(), "rc_last"); + Rc_z(1, "rc_z"), Rc_lez(2, "rc_lez"), Rc_lz(3, "rc_lz"), Rc_nz(5, "rc_nz"), Rc_gz(6, "rc_gz"), Rc_gez(7, "rc_gez"), Rc_last(Rc_gez.getValue(), "rc_last"); private final int value; private final String operator; @@ -689,19 +960,15 @@ } public static int getDoubleEncoding(int reg) { - assert reg < 64 && ((reg & 1) == 0); - // ignore v8 assertion for now - return (reg & 0x1e) | ((reg & 0x20) >> 5); + assert reg < 64 && ((reg & 1) == 0); + // ignore v8 assertion for now + return (reg & 0x1e) | ((reg & 0x20) >> 5); } public static int getQuadEncoding(int reg) { - assert reg < 64 && ((reg & 3) == 0); - // ignore v8 assertion for now - return (reg & 0x1c) | ((reg & 0x20) >> 5); - } - - public SPARCAssembler(TargetDescription target, @SuppressWarnings("unused") RegisterConfig registerConfig) { - super(target); + assert reg < 64 && ((reg & 3) == 0); + // ignore v8 assertion for now + return (reg & 0x1c) | ((reg & 0x20) >> 5); } public static final int sx1 = 0x00001000; @@ -726,361 +993,355 @@ return x & ((1 << 10) - 1); } - @Override - @SuppressWarnings("unused") - public void jmp(Label l) { - new Bpa(this, l); - } - public static class Add extends Fmt3b { - public Add(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Add.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Add(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Add, src1, simm13, dst); } - public Add(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Add.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Add(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Add, src1, src2, dst); } } public static class Addc extends Fmt3b { - public Addc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Addc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Addc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Addc, src1, simm13, dst); } - public Addc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Addc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Addc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Addc, src1, src2, dst); } } public static class Addcc extends Fmt3b { - public Addcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Addcc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Addcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Addcc, src1, simm13, dst); } - public Addcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Addcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Addcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Addcc, src1, src2, dst); } } public static class Addccc extends Fmt3b { - public Addccc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Addccc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Addccc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Addccc, src1, simm13, dst); } - public Addccc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Addccc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Addccc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Addccc, src1, src2, dst); } } public static class Addxc extends Fmt3p { + public Addxc(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS3 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Addxc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Addxc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Addxccc extends Fmt3p { + public Addxccc(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS3 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Addxccc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Addxccc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Alignaddr extends Fmt3p { + public Alignaddr(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.AlignAddress.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.AlignAddress.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Alignaddrl extends Fmt3p { + public Alignaddrl(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.AlignAddressLittle.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.AlignAddressLittle.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class And extends Fmt3b { - public And(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.And.getValue(), src1.encoding(), simm13, dst.encoding()); + + public And(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.And, src1, simm13, dst); } - public And(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.And.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public And(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.And, src1, src2, dst); } } public static class Andcc extends Fmt3b { - public Andcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Andcc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Andcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Andcc, src1, simm13, dst); } - public Andcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Andcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Andcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Andcc, src1, src2, dst); } } public static class Andn extends Fmt3b { - public Andn(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Andn.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Andn(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Andn, src1, simm13, dst); } - public Andn(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Andn.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Andn(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Andn, src1, src2, dst); } } public static class Andncc extends Fmt3b { - public Andncc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Andncc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Andncc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Andncc, src1, simm13, dst); } - public Andncc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Andncc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Andncc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Andncc, src1, src2, dst); } } public static class Array8 extends Fmt3p { + public Array8(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Array8.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Array8.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Array16 extends Fmt3p { + public Array16(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Array16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Array16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Array32 extends Fmt3p { + public Array32(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Array32.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Array32.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Bmask extends Fmt3p { + public Bmask(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS2 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Bmask.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Bmask.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } - public static class Bpa extends Fmt2c { - public Bpa(SPARCAssembler masm, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Always.getValue(), - Op2s.Bp.getValue(), CC.Icc.getValue(), 1, simmm19); + public static class Bpa extends Fmt00c { + + public Bpa(int simm19) { + super(0, ConditionFlag.Always, Op2s.Bp, CC.Icc, 1, simm19); } - public Bpa(SPARCAssembler masm, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Always.getValue(), - Op2s.Bp.getValue(), CC.Icc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpa(Label label) { + super(0, ConditionFlag.Always, Op2s.Bp, CC.Icc, 1, label); } } - public static class Bpcc extends Fmt2c { - public Bpcc(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.CarryClear.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpcc extends Fmt00c { + + public Bpcc(CC cc, int simm19) { + super(0, ConditionFlag.CarryClear, Op2s.Bp, cc, 1, simm19); } - public Bpcc(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.CarryClear.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpcc(CC cc, Label label) { + super(0, ConditionFlag.CarryClear, Op2s.Bp, cc, 1, label); } } - public static class Bpcs extends Fmt2c { - public Bpcs(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.CarrySet.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpcs extends Fmt00c { + + public Bpcs(CC cc, int simm19) { + super(0, ConditionFlag.CarrySet, Op2s.Bp, cc, 1, simm19); } - public Bpcs(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.CarrySet.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpcs(CC cc, Label label) { + super(0, ConditionFlag.CarrySet, Op2s.Bp, cc, 1, label); } } - public static class Bpe extends Fmt2c { - public Bpe(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Equal.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpe extends Fmt00c { + + public Bpe(CC cc, int simm19) { + super(0, ConditionFlag.Equal, Op2s.Bp, cc, 1, simm19); } - public Bpe(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Equal.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpe(CC cc, Label label) { + super(0, ConditionFlag.Equal, Op2s.Bp, cc, 1, label); } } - public static class Bpg extends Fmt2c { - public Bpg(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Greater.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpg extends Fmt00c { + + public Bpg(CC cc, int simm19) { + super(0, ConditionFlag.Greater, Op2s.Bp, cc, 1, simm19); } - public Bpg(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Greater.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpg(CC cc, Label label) { + super(0, ConditionFlag.Greater, Op2s.Bp, cc, 1, label); } } - public static class Bpge extends Fmt2c { - public Bpge(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.GreaterEqual.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpge extends Fmt00c { + + public Bpge(CC cc, int simm19) { + super(0, ConditionFlag.GreaterEqual, Op2s.Bp, cc, 1, simm19); } - public Bpge(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.GreaterEqual.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpge(CC cc, Label label) { + super(0, ConditionFlag.GreaterEqual, Op2s.Bp, cc, 1, label); } } - public static class Bpgu extends Fmt2c { - public Bpgu(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.GreaterUnsigned.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpgu extends Fmt00c { + + public Bpgu(CC cc, int simm19) { + super(0, ConditionFlag.GreaterUnsigned, Op2s.Bp, cc, 1, simm19); } - public Bpgu(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.GreaterUnsigned.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpgu(CC cc, Label label) { + super(0, ConditionFlag.GreaterUnsigned, Op2s.Bp, cc, 1, label); } } - public static class Bpl extends Fmt2c { - public Bpl(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Less.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpl extends Fmt00c { + + public Bpl(CC cc, int simm19) { + super(0, ConditionFlag.Less, Op2s.Bp, cc, 1, simm19); } - public Bpl(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Less.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpl(CC cc, Label label) { + super(0, ConditionFlag.Less, Op2s.Bp, cc, 1, label); } } - public static class Bple extends Fmt2c { - public Bple(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.LessEqual.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bple extends Fmt00c { + + public Bple(CC cc, int simm19) { + super(0, ConditionFlag.LessEqual, Op2s.Bp, cc, 1, simm19); } - public Bple(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.LessEqual.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bple(CC cc, Label label) { + super(0, ConditionFlag.LessEqual, Op2s.Bp, cc, 1, label); } } - public static class Bpleu extends Fmt2c { - public Bpleu(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.LessEqualUnsigned.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpleu extends Fmt00c { + + public Bpleu(CC cc, int simm19) { + super(0, ConditionFlag.LessEqualUnsigned, Op2s.Bp, cc, 1, simm19); } - public Bpleu(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.LessEqualUnsigned.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpleu(CC cc, Label label) { + super(0, ConditionFlag.LessEqualUnsigned, Op2s.Bp, cc, 1, label); } } - public static class Bpn extends Fmt2c { - public Bpn(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Never.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpn extends Fmt00c { + + public Bpn(CC cc, int simm19) { + super(0, ConditionFlag.Never, Op2s.Bp, cc, 1, simm19); } - public Bpn(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Never.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpn(CC cc, Label label) { + super(0, ConditionFlag.Never, Op2s.Bp, cc, 1, label); } } - public static class Bpne extends Fmt2c { - public Bpne(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.NotZero.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpne extends Fmt00c { + + public Bpne(CC cc, int simm19) { + super(0, ConditionFlag.NotZero, Op2s.Bp, cc, 1, simm19); } - public Bpne(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.NotZero.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpne(CC cc, Label label) { + super(0, ConditionFlag.NotZero, Op2s.Bp, cc, 1, label); } } - public static class Bpneg extends Fmt2c { - public Bpneg(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Negative.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpneg extends Fmt00c { + + public Bpneg(CC cc, int simm19) { + super(0, ConditionFlag.Negative, Op2s.Bp, cc, 1, simm19); } - public Bpneg(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Negative.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpneg(CC cc, Label label) { + super(0, ConditionFlag.Negative, Op2s.Bp, cc, 1, label); } } - public static class Bppos extends Fmt2c { - public Bppos(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Positive.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bppos extends Fmt00c { + + public Bppos(CC cc, int simm19) { + super(0, ConditionFlag.Positive, Op2s.Bp, cc, 1, simm19); } - public Bppos(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.Positive.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bppos(CC cc, Label label) { + super(0, ConditionFlag.Positive, Op2s.Bp, cc, 1, label); } } - public static class Bpvc extends Fmt2c { - public Bpvc(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.OverflowClear.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpvc extends Fmt00c { + + public Bpvc(CC cc, int simm19) { + super(0, ConditionFlag.OverflowClear, Op2s.Bp, cc, 1, simm19); } - public Bpvc(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.OverflowClear.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpvc(CC cc, Label label) { + super(0, ConditionFlag.OverflowClear, Op2s.Bp, cc, 1, label); } } - public static class Bpvs extends Fmt2c { - public Bpvs(SPARCAssembler masm, CC cc, int simmm19) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.OverflowSet.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, simmm19); + public static class Bpvs extends Fmt00c { + + public Bpvs(CC cc, int simm19) { + super(0, ConditionFlag.OverflowSet, Op2s.Bp, cc, 1, simm19); } - public Bpvs(SPARCAssembler masm, CC cc, Label label) { - super(masm, Ops.BranchOp.getValue(), 0, ConditionFlag.OverflowSet.getValue(), - Op2s.Bp.getValue(), cc.getValue(), 1, - label.isBound() ? label.position() : patchUnbound(masm, label)); + + public Bpvs(CC cc, Label label) { + super(0, ConditionFlag.OverflowSet, Op2s.Bp, cc, 1, label); } } public static class Bshuffle extends Fmt3p { + public Bshuffle(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS2 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Bshuffle.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Bshuffle.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class CammelliaFl extends Fmt3p { + public CammelliaFl(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* CAMELLIA only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.CammelliaFl.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.CammelliaFl.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class CammelliaFli extends Fmt3p { + public CammelliaFli(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* CAMELLIA only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.CammelliaFli.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.CammelliaFli.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @@ -1090,836 +1351,844 @@ } public static class Cmask8 extends Fmt3n { + public Cmask8(SPARCAssembler asm, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Cmask8.getValue(), - src2.encoding(), 0); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Cmask8.getValue(), src2.encoding(), 0); } } public static class Cmask16 extends Fmt3n { + public Cmask16(SPARCAssembler asm, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Cmask16.getValue(), - src2.encoding(), 0); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Cmask16.getValue(), src2.encoding(), 0); } } public static class Cmask32 extends Fmt3n { + public Cmask32(SPARCAssembler asm, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Cmask32.getValue(), - src2.encoding(), 0); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Cmask32.getValue(), src2.encoding(), 0); } } public static class Crc32c extends Fmt3p { + public Crc32c(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* CRYPTO only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Crc32c.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Crc32c.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Cwbcc extends Fmt2e { + public Cwbcc(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbcc(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbcs extends Fmt2e { + public Cwbcs(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbcs(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbe extends Fmt2e { + public Cwbe(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbe(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbg extends Fmt2e { + public Cwbg(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbg(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbge extends Fmt2e { + public Cwbge(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbge(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbgu extends Fmt2e { + public Cwbgu(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbgu(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbl extends Fmt2e { + public Cwbl(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbl(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwble extends Fmt2e { + public Cwble(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwble(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbleu extends Fmt2e { + public Cwbleu(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbleu(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbne extends Fmt2e { + public Cwbne(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbne(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbneg extends Fmt2e { + public Cwbneg(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbneg(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbpos extends Fmt2e { + public Cwbpos(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbpos(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbvc extends Fmt2e { + public Cwbvc(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbvc(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cwbvs extends Fmt2e { + public Cwbvs(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 0, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 0, src1.encoding(), simm10, src2.encoding()); } + public Cwbvs(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 0, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 0, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbcc extends Fmt2e { + public Cxbcc(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbcc(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbcs extends Fmt2e { + public Cxbcs(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbcs(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarrySet.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbe extends Fmt2e { + public Cxbe(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.CarryClear.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbe(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Equal.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbg extends Fmt2e { + public Cxbg(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbg(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Greater.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbge extends Fmt2e { + public Cxbge(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbge(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterEqual.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbgu extends Fmt2e { + public Cxbgu(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbgu(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.GreaterUnsigned.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbl extends Fmt2e { + public Cxbl(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbl(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Less.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxble extends Fmt2e { + public Cxble(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxble(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqual.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbleu extends Fmt2e { + public Cxbleu(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbleu(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.LessEqualUnsigned.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbne extends Fmt2e { + public Cxbne(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbne(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.NotEqual.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbneg extends Fmt2e { + public Cxbneg(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbneg(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Negative.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbpos extends Fmt2e { + public Cxbpos(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbpos(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.Positive.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbvc extends Fmt2e { + public Cxbvc(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbvc(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowClear.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Cxbvs extends Fmt2e { + public Cxbvs(SPARCAssembler asm, Register src1, Register src2, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 1, - src1.encoding(), simm10, src2.encoding()); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 1, src1.encoding(), simm10, src2.encoding()); } + public Cxbvs(SPARCAssembler asm, Register src1, int immed5, int simm10) { - super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 1, - src1.encoding(), simm10, immed5 | ImmedTrue); + super(asm, Ops.BranchOp.getValue(), ConditionFlag.OverflowSet.getValue(), 1, src1.encoding(), simm10, immed5 | ImmedTrue); } } public static class Edge8cc extends Fmt3p { + public Edge8cc(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8cc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8cc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge8n extends Fmt3p { + public Edge8n(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8n.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8n.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge8lcc extends Fmt3p { + public Edge8lcc(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8lcc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8lcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge8ln extends Fmt3p { + public Edge8ln(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8ln.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge8ln.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge16cc extends Fmt3p { + public Edge16cc(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16cc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16cc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge16n extends Fmt3p { + public Edge16n(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16n.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16n.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge16lcc extends Fmt3p { + public Edge16lcc(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16lcc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16lcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge16ln extends Fmt3p { + public Edge16ln(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16ln.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge16ln.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge32cc extends Fmt3p { + public Edge32cc(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32cc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32cc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge32n extends Fmt3p { + public Edge32n(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32n.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32n.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge32lcc extends Fmt3p { + public Edge32lcc(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32lcc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32lcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Edge32ln extends Fmt3p { + public Edge32ln(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32ln.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Edge32ln.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fadds extends Fmt3p { + public Fadds(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fadds.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fadds.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Faddd extends Fmt3p { + public Faddd(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Faddd.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Faddd.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Faddq extends Fmt3p { + public Faddq(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Faddq.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Faddq.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Faligndata extends Fmt3p { + public Faligndata(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Faligndatag.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Faligndatag.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fdivs extends Fmt3p { + public Fdivs(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdivs.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdivs.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fdivd extends Fmt3p { + public Fdivd(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdivd.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdivd.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmadds extends Fmt5a { + public Fmadds(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmadds.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmadds.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fmaddd extends Fmt5a { + public Fmaddd(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmaddd.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmaddd.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fmean16 extends Fmt3p { + public Fmean16(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS3 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmean16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmean16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmsubs extends Fmt5a { + public Fmsubs(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmsubs.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmsubs.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fmsubd extends Fmt5a { + public Fmsubd(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmsubd.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fmsubd.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fnadds extends Fmt3p { + public Fnadds(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS3 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnadds.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnadds.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fnaddd extends Fmt3p { + public Fnaddd(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS3 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnaddd.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnaddd.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fnmadds extends Fmt5a { + public Fnmadds(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmadds.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmadds.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fnmaddd extends Fmt5a { + public Fnmaddd(SPARCAssembler asm, Register src1, Register src2, Register src3, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmaddd.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmaddd.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fnmsubs extends Fmt5a { + public Fnmsubs(SPARCAssembler masm, Register src1, Register src2, Register src3, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmsubs.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmsubs.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fnmsubd extends Fmt5a { + public Fnmsubd(SPARCAssembler masm, Register src1, Register src2, Register src3, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmsubd.getValue(), - src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Impdep2.getValue(), Op5s.Fnmsubd.getValue(), src1.encoding(), src2.encoding(), src3.encoding(), dst.encoding()); } } public static class Fmuls extends Fmt3p { + public Fmuls(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fmuls.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fmuls.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmuld extends Fmt3p { + public Fmuld(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fmuld.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fmuld.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmul8x16 extends Fmt3p { + public Fmul8x16(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8x16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8x16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmul8x16au extends Fmt3p { + public Fmul8x16au(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8x16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8x16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmul8x16al extends Fmt3p { + public Fmul8x16al(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8x16al.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8x16al.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmul8sux16 extends Fmt3p { + public Fmul8sux16(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8sux16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8sux16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmul8ulx16 extends Fmt3p { + public Fmul8ulx16(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8ulx16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmul8ulx16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmuld8sux16 extends Fmt3p { + public Fmuld8sux16(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmuld8sux16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmuld8sux16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fmuld8ulx16 extends Fmt3p { + public Fmuld8ulx16(SPARCAssembler asm, Register src1, Register src2, Register dst) { /* VIS1 only */ - super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmuld8ulx16.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(asm, Ops.ArithOp.getValue(), Op3s.Impdep1.getValue(), Opfs.Fmuld8ulx16.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fnegs extends Fmt3n { + public Fnegs(SPARCAssembler masm, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnegs.getValue(), - src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnegs.getValue(), src2.encoding(), dst.encoding()); } } public static class Fnegd extends Fmt3n { + public Fnegd(SPARCAssembler masm, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnegd.getValue(), - src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fnegd.getValue(), src2.encoding(), dst.encoding()); } } public static class Fstoi extends Fmt3n { + public Fstoi(SPARCAssembler masm, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fstoi.getValue(), - src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fstoi.getValue(), src2.encoding(), dst.encoding()); } } public static class Fdtoi extends Fmt3n { + public Fdtoi(SPARCAssembler masm, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdtoi.getValue(), - src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fdtoi.getValue(), src2.encoding(), dst.encoding()); } } public static class Flushw extends Fmt3r { + public Flushw(SPARCAssembler masm) { super(masm, Ops.ArithOp.getValue(), 0, Op3s.Flushw.getValue()); } } public static class Fsqrtd extends Fmt3p { + public Fsqrtd(SPARCAssembler masm, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsqrtd.getValue(), - 0, src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsqrtd.getValue(), 0, src2.encoding(), dst.encoding()); } } - public static class Fsubs extends Fmt3p { + public Fsubs(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsubs.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsubs.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fsubd extends Fmt3p { + public Fsubd(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsubd.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsubd.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Fsubq extends Fmt3p { + public Fsubq(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsubq.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Fpop1.getValue(), Opfs.Fsubq.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Jmpl extends Fmt3b { - public Jmpl(SPARCAssembler asm, SPARCAddress src, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Jmpl.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + public Jmpl(Register src, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Jmpl, src, simm13, dst); } } public static class Lddf extends Fmt3b { - public Lddf(SPARCAssembler masm, SPARCAddress src, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Lddf.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + // TODO remove address + public Lddf(SPARCAddress src, Register dst) { + super(Ops.LdstOp, Op3s.Lddf, src.getBase(), src.getDisplacement(), dst); } } public static class Ldf extends Fmt3b { - public Ldf(SPARCAssembler masm, SPARCAddress src, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Ldf.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + public Ldf(SPARCAddress src, Register dst) { + super(Ops.LdstOp, Op3s.Ldf, src.getBase(), src.getDisplacement(), dst); } } public static class Ldsb extends Fmt3b { - public Ldsb(SPARCAssembler masm, SPARCAddress src, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Ldsb.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + public Ldsb(SPARCAddress src, Register dst) { + super(Ops.LdstOp, Op3s.Ldsb, src.getBase(), src.getDisplacement(), dst); } } public static class Ldsh extends Fmt3b { - public Ldsh(SPARCAssembler masm, SPARCAddress src, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Ldsh.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + public Ldsh(SPARCAddress src, Register dst) { + super(Ops.LdstOp, Op3s.Ldsh, src.getBase(), src.getDisplacement(), dst); } } public static class Ldsw extends Fmt3b { - public Ldsw(SPARCAssembler masm, SPARCAddress src, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Ldsw.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + public Ldsw(SPARCAddress src, Register dst) { + super(Ops.LdstOp, Op3s.Ldsw, src.getBase(), src.getDisplacement(), dst); } } public static class Lduw extends Fmt3b { - public Lduw(SPARCAssembler masm, SPARCAddress src, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Lduw.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + public Lduw(SPARCAddress src, Register dst) { + super(Ops.LdstOp, Op3s.Lduw, src.getBase(), src.getDisplacement(), dst); } } public static class Ldx extends Fmt3b { - public Ldx(SPARCAssembler masm, SPARCAddress src, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Ldx.getValue(), - src.getBase().encoding(), src.getDisplacement(), dst.encoding()); + + public Ldx(SPARCAddress src, Register dst) { + super(Ops.LdstOp, Op3s.Ldx, src.getBase(), src.getDisplacement(), dst); } } public static class Membar extends Fmt3b { - public Membar(SPARCAssembler masm, int barriers) { - super(masm, Ops.ArithOp.getValue(), Op3s.Membar.getValue(), - SPARC.r15.encoding(), ImmedTrue | barriers, SPARC.r0.encoding()); + + public Membar(int barriers) { + super(Ops.ArithOp, Op3s.Membar, r15, ImmedTrue | barriers, r0); } } - public static class Movcc extends Fmt4c { - public Movcc(SPARCAssembler masm, ConditionFlag cond, CC cca, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Movcc.getValue(), cond.getValue(), cca.getValue(), - src2.encoding(), dst.encoding()); + public static class Movcc extends Fmt10c { + + public Movcc(ConditionFlag cond, CC cca, Register src2, Register dst) { + super(Op3s.Movcc, cond, cca, src2, dst); } - public Movcc(SPARCAssembler masm, ConditionFlag cond, CC cca, int simm11a, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Movcc.getValue(), cond.getValue(), cca.getValue(), - simm11a, dst.encoding()); + + public Movcc(ConditionFlag cond, CC cca, int simm11, Register dst) { + super(Op3s.Movcc, cond, cca, simm11, dst); } } public static class Movr extends Fmt3f { - public Movr(SPARCAssembler masm, RCondition rc, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Movr.getValue(), rc.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + + public Movr(SPARCAssembler masm, RCondition rc, Register src1, Register src2, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Movr.getValue(), rc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } + public Movr(SPARCAssembler masm, RCondition rc, Register src1, int simm10, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Movr.getValue(), rc.getValue(), - src1.encoding(), simm10, dst.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Movr.getValue(), rc.getValue(), src1.encoding(), simm10, dst.encoding()); } } @Deprecated public static class Mulscc extends Fmt3b { + @Deprecated - public Mulscc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Mulscc.getValue(), src1.encoding(), simm13, dst.encoding()); + public Mulscc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Mulscc, src1, simm13, dst); } + @Deprecated - public Mulscc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Mulscc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + public Mulscc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Mulscc, src1, src2, dst); } } public static class Mulx extends Fmt3b { - public Mulx(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Mulx.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Mulx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Mulx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Mulx(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Mulx, src1, simm13, dst); } - } - - public static class NullCheck extends Fmt3b { - public NullCheck(SPARCAssembler masm, SPARCAddress src) { - super(masm, Ops.ArithOp.getValue(), Op3s.Ldx.getValue(), - src.getBase().encoding(), src.getDisplacement(), SPARC.r0.encoding()); + + public Mulx(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Mulx, src1, src2, dst); } } public static class Or extends Fmt3b { - public Or(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Or.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Or(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Or, src1, simm13, dst); } - public Or(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Or.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Or(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Or, src1, src2, dst); } } public static class Orcc extends Fmt3b { - public Orcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Orcc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Orcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Orcc, src1, simm13, dst); } - public Orcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Orcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Orcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Orcc, src1, src2, dst); } } public static class Orn extends Fmt3b { - public Orn(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Orn.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Orn(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Orn, src1, simm13, dst); } - public Orn(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Orn.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Orn(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Orn, src1, src2, dst); } } public static class Orncc extends Fmt3b { - public Orncc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Orncc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Orncc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Orncc, src1, simm13, dst); } - public Orncc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Orncc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Orncc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Orncc, src1, src2, dst); } } public static class Popc extends Fmt3b { - public Popc(SPARCAssembler masm, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Popc.getValue(), 0, simm13, dst.encoding()); + + public Popc(int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Popc, r0, simm13, dst); } - public Popc(SPARCAssembler masm, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Popc.getValue(), 0, src2.encoding(), dst.encoding()); + + public Popc(Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Popc, r0, src2, dst); } } @@ -1927,71 +2196,85 @@ @Deprecated public static class Rdy extends Fmt3q { + public Rdy(SPARCAssembler masm, Register dst) { super(masm, Ops.ArithOp.getValue(), Op3s.Rdreg.getValue(), 0, dst.encoding()); } } public static class Rdccr extends Fmt3q { + public Rdccr(SPARCAssembler masm, Register dst) { super(masm, Ops.ArithOp.getValue(), Op3s.Rdreg.getValue(), 2, dst.encoding()); } } public static class Rdasi extends Fmt3q { + public Rdasi(SPARCAssembler masm, Register dst) { super(masm, Ops.ArithOp.getValue(), Op3s.Rdreg.getValue(), 3, dst.encoding()); } } public static class Rdtick extends Fmt3q { + public Rdtick(SPARCAssembler masm, Register dst) { super(masm, Ops.ArithOp.getValue(), Op3s.Rdreg.getValue(), 4, dst.encoding()); } } public static class Rdpc extends Fmt3q { + public Rdpc(SPARCAssembler masm, Register dst) { super(masm, Ops.ArithOp.getValue(), Op3s.Rdreg.getValue(), 5, dst.encoding()); } } public static class Rdfprs extends Fmt3q { + public Rdfprs(SPARCAssembler masm, Register dst) { super(masm, Ops.ArithOp.getValue(), Op3s.Rdreg.getValue(), 6, dst.encoding()); } } public static class Restore extends Fmt3b { - public Restore(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Restore.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + + public Restore(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Restore, src1, src2, dst); } } public static class Restored extends Fmt3r { + public Restored(SPARCAssembler asm) { super(asm, Ops.ArithOp.getValue(), 1, Op3s.Saved.getValue()); } } public static class Return extends Fmt3d { + public Return(SPARCAssembler masm, Register src1, int simm13) { super(masm, Ops.ArithOp.getValue(), Op3s.Rett.getValue(), src1.encoding(), simm13); } + public Return(SPARCAssembler masm, Register src1, Register src2) { super(masm, Ops.ArithOp.getValue(), Op3s.Rett.getValue(), src1.encoding(), src2.encoding()); } } public static class Save extends Fmt3b { - public Save(SPARCAssembler asm, Register src1, Register src2, Register dst) { - super(asm, Ops.ArithOp.getValue(), Op3s.Save.getValue(), - src1.encoding(), src2.encoding(), dst.encoding()); + + public Save(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Save, src1, src2, dst); + } + + public Save(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Save, src1, simm13, dst); } } public static class Saved extends Fmt3r { + public Saved(SPARCAssembler asm) { super(asm, Ops.ArithOp.getValue(), 0, Op3s.Saved.getValue()); } @@ -1999,511 +2282,470 @@ @Deprecated public static class Sdiv extends Fmt3b { + @Deprecated - public Sdiv(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sdiv.getValue(), src1.encoding(), simm13, dst.encoding()); + public Sdiv(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Sdiv, src1, simm13, dst); } + @Deprecated - public Sdiv(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sdiv.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + public Sdiv(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Sdiv, src1, src2, dst); } } @Deprecated public static class Sdivcc extends Fmt3b { + @Deprecated - public Sdivcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sdivcc.getValue(), src1.encoding(), simm13, dst.encoding()); + public Sdivcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Sdivcc, src1, simm13, dst); } + @Deprecated - public Sdivcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sdivcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + public Sdivcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Sdivcc, src1, src2, dst); } } public static class Sdivx extends Fmt3b { - public Sdivx(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sdivx.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Sdivx(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Sdivx, src1, simm13, dst); } - public Sdivx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sdivx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Sdivx(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Sdivx, src1, src2, dst); } } - public static class Sethi extends Fmt2a { - public Sethi(SPARCAssembler masm, int simm22, Register dst) { - super(masm, Ops.BranchOp.getValue(), Op2s.Sethi.getValue(), simm22, dst.encoding()); + public static class Sethi extends Fmt00a { + + public Sethi(int simm22, Register dst) { + super(Op2s.Sethi, simm22, dst); } } public static class Sir extends Fmt3b { - public Sir(SPARCAssembler asm, int simm13) { - super(asm, Ops.ArithOp.getValue(), Op3s.Sir.getValue(), - SPARC.r0.encoding(), simm13, SPARC.r15.encoding()); + + public Sir(int simm13) { + super(Ops.ArithOp, Op3s.Sir, r0, simm13, r15); } } public static class Sll extends Fmt3b { - public Sll(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sll.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Sll(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Sll, src1, simm13, dst); } - public Sll(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sll.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Sll(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Sll, src1, src2, dst); } } public static class Sllx extends Fmt3b { - public Sllx(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sllx.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Sllx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sllx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); - } - } - - public static class Smul extends Fmt3b { - public Smul(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Smul.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Sllx(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Sllx, src1, simm13, dst); } - public Smul(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Smul.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); - } - } - - @Deprecated - public static class Smulcc extends Fmt3b { - public Smulcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Smulcc.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Smulcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Smulcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Sllx(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Sllx, src1, src2, dst); } } public static class Sra extends Fmt3b { - public Sra(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sra.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Sra(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Sra, src1, simm13, dst); } - public Sra(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sra.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Sra(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Sra, src1, src2, dst); } } public static class Srax extends Fmt3b { - public Srax(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Srax.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Srax(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Srax, src1, simm13, dst); } - public Srax(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Srax.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Srax(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Srax, src1, src2, dst); } } public static class Srl extends Fmt3b { - public Srl(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Srl.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Srl(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Srl, src1, simm13, dst); } - public Srl(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Srl.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Srl(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Srl, src1, src2, dst); } } public static class Srlx extends Fmt3b { - public Srlx(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Srlx.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Srlx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Srlx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Srlx(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Srlx, src1, simm13, dst); } - } - - @Deprecated - public static class Stbar extends Fmt3b { - public Stbar(SPARCAssembler masm) { - super(masm, Ops.ArithOp.getValue(), Op3s.Membar.getValue(), - SPARC.r15.encoding(), 0, SPARC.r0.encoding()); + + public Srlx(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Srlx, src1, src2, dst); } } public static class Stb extends Fmt3b { - public Stb(SPARCAssembler masm, Register dst, SPARCAddress addr) { - super(masm, Ops.ArithOp.getValue(), Op3s.Stb.getValue(), - addr.getBase().encoding(), addr.getDisplacement(), dst.encoding()); + + public Stb(Register dst, SPARCAddress addr) { + super(Ops.LdstOp, Op3s.Stb, addr.getBase(), addr.getDisplacement(), dst); } } public static class Sth extends Fmt3b { - public Sth(SPARCAssembler masm, Register dst, SPARCAddress addr) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sth.getValue(), - addr.getBase().encoding(), addr.getDisplacement(), dst.encoding()); + + public Sth(Register dst, SPARCAddress addr) { + super(Ops.LdstOp, Op3s.Sth, addr.getBase(), addr.getDisplacement(), dst); } } public static class Stw extends Fmt3b { - public Stw(SPARCAssembler masm, Register dst, SPARCAddress addr) { - super(masm, Ops.ArithOp.getValue(), Op3s.Stw.getValue(), - addr.getBase().encoding(), addr.getDisplacement(), dst.encoding()); + + public Stw(Register dst, SPARCAddress addr) { + super(Ops.LdstOp, Op3s.Stw, addr.getBase(), addr.getDisplacement(), dst); } } public static class Stx extends Fmt3b { - public Stx(SPARCAssembler masm, Register dst, SPARCAddress addr) { - super(masm, Ops.ArithOp.getValue(), Op3s.Stx.getValue(), - addr.getBase().encoding(), addr.getDisplacement(), dst.encoding()); + + public Stx(Register dst, SPARCAddress addr) { + super(Ops.LdstOp, Op3s.Stx, addr.getBase(), addr.getDisplacement(), dst); } } public static class Sub extends Fmt3b { - public Sub(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sub.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Sub(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Sub, src1, simm13, dst); } - public Sub(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Sub.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Sub(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Sub, src1, src2, dst); } } public static class Subc extends Fmt3b { - public Subc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Subc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Subc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Subc, src1, simm13, dst); } - public Subc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Subc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Subc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Subc, src1, src2, dst); } } public static class Subcc extends Fmt3b { - public Subcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Subcc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Subcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Subcc, src1, simm13, dst); } - public Subcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Subcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Subcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Subcc, src1, src2, dst); } } public static class Subccc extends Fmt3b { - public Subccc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Subccc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Subccc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Subccc, src1, simm13, dst); } - public Subccc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Subccc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Subccc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Subccc, src1, src2, dst); } } public static class Ta extends Fmt4a { + public Ta(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.Always.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.Always.getValue()); } + public Ta(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.Always.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.Always.getValue()); } } public static class Taddcc extends Fmt3b { - public Taddcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Taddcc.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Taddcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Taddcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Taddcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Taddcc, src1, simm13, dst); } - } - - @Deprecated - public static class Taddcctv extends Fmt3b { - @Deprecated - public Taddcctv(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Taddcctv.getValue(), src1.encoding(), simm13, dst.encoding()); - } - @Deprecated - public Taddcctv(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Taddcctv.getValue(), src2.encoding(), src1.encoding()); + + public Taddcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Taddcc, src1, src2, dst); } } public static class Tcc extends Fmt4a { + public Tcc(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.CarryClear.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.CarryClear.getValue()); } + public Tcc(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.CarryClear.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.CarryClear.getValue()); } } public static class Tcs extends Fmt4a { + public Tcs(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.CarrySet.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.CarrySet.getValue()); } + public Tcs(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.CarrySet.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.CarrySet.getValue()); } } public static class Te extends Fmt4a { + public Te(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.Equal.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.Equal.getValue()); } + public Te(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.Equal.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.Equal.getValue()); } } public static class Tg extends Fmt4a { + public Tg(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.Greater.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.Greater.getValue()); } + public Tg(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.Greater.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.Greater.getValue()); } } public static class Tge extends Fmt4a { + public Tge(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.GreaterEqual.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.GreaterEqual.getValue()); } + public Tge(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.GreaterEqual.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.GreaterEqual.getValue()); } } public static class Tle extends Fmt4a { + public Tle(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.LessEqual.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.LessEqual.getValue()); } + public Tle(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.LessEqual.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.LessEqual.getValue()); } } public static class Tleu extends Fmt4a { + public Tleu(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.LessEqualUnsigned.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.LessEqualUnsigned.getValue()); } + public Tleu(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.LessEqualUnsigned.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.LessEqualUnsigned.getValue()); } } public static class Tn extends Fmt4a { + public Tn(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.Never.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.Never.getValue()); } + public Tn(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.Never.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.Never.getValue()); } } public static class Tne extends Fmt4a { + public Tne(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.NotEqual.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.NotEqual.getValue()); } + public Tne(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.NotEqual.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.NotEqual.getValue()); } } public static class Tneg extends Fmt4a { + public Tneg(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.Negative.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.Negative.getValue()); } + public Tneg(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.Negative.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.Negative.getValue()); } } public static class Tpos extends Fmt4a { + public Tpos(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.Positive.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.Positive.getValue()); } + public Tpos(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.Positive.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.Positive.getValue()); } } public static class Tsubcc extends Fmt3b { - public Tsubcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcc.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Tsubcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Tsubcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Tsubcc, src1, simm13, dst); } - } - - @Deprecated - public static class Tsubcctv extends Fmt3b { - @Deprecated - public Tsubcctv(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcctv.getValue(), src1.encoding(), simm13, dst.encoding()); - } - @Deprecated - public Tsubcctv(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcctv.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Tsubcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Tsubcc, src1, src2, dst); } } public static class Tvc extends Fmt4a { + public Tvc(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.OverflowClear.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.OverflowClear.getValue()); } + public Tvc(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.OverflowClear.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.OverflowClear.getValue()); } } public static class Tvs extends Fmt4a { + public Tvs(SPARCAssembler asm, CC cc, Register src1, int trap) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), trap, ConditionFlag.OverflowSet.getValue()); - } - public Tvs(SPARCAssembler asm, CC cc, Register src1, Register src2) { - super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), - src1.encoding(), src2.encoding(), ConditionFlag.OverflowSet.getValue()); + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), trap, ConditionFlag.OverflowSet.getValue()); } - } - - @Deprecated - public static class Udiv extends Fmt3b { - @Deprecated - public Udiv(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Udiv.getValue(), src1.encoding(), simm13, dst.encoding()); - } - @Deprecated - public Udiv(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Udiv.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); - } - } - - public static class Udivcc extends Fmt3b { - public Udivcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Udivcc.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Udivcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Udivcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Tvs(SPARCAssembler asm, CC cc, Register src1, Register src2) { + super(asm, Ops.ArithOp.getValue(), Op3s.Trap.getValue(), cc.getValue(), src1.encoding(), src2.encoding(), ConditionFlag.OverflowSet.getValue()); } } public static class Udivx extends Fmt3b { - public Udivx(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Udivx.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Udivx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Udivx.getValue(), dst.encoding(), src2.encoding(), src1.encoding()); - } - } - - public static class Umul extends Fmt3b { - public Umul(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Umul.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Udivx(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Udivx, src1, simm13, dst); } - public Umul(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Umul.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); - } - } - - public static class Umulcc extends Fmt3b { - public Umulcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Umulcc.getValue(), src1.encoding(), simm13, dst.encoding()); - } - public Umulcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Umulcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Udivx(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Udivx, src1, src2, dst); } } @Deprecated public static class Wry extends Fmt3b { + @Deprecated - public Wry(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 0, src2.encoding(), simm13); + public Wry(Register src1, int simm13) { + super(Ops.ArithOp, Op3s.Wrreg, src1, simm13, r0); } + @Deprecated - public Wry(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 0, src2.encoding(), src1.encoding()); + public Wry(Register src1, Register src2) { + super(Ops.ArithOp, Op3s.Wrreg, src1, src2, r0); } } public static class Wrccr extends Fmt3b { - public Wrccr(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 2, src2.encoding(), simm13); + + public Wrccr(Register src1, int simm13) { + super(Ops.ArithOp, Op3s.Wrreg, src1, simm13, r2); } - public Wrccr(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 2, src2.encoding(), src1.encoding()); + + public Wrccr(Register src1, Register src2) { + super(Ops.ArithOp, Op3s.Wrreg, src1, src2, r2); } } public static class Wrasi extends Fmt3b { - public Wrasi(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 3, src2.encoding(), simm13); + + public Wrasi(Register src1, int simm13) { + super(Ops.ArithOp, Op3s.Wrreg, src1, simm13, r3); } - public Wrasi(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 3, src2.encoding(), src1.encoding()); + + public Wrasi(Register src1, Register src2) { + super(Ops.ArithOp, Op3s.Wrreg, src1, src2, r3); } } public static class Wrfprs extends Fmt3b { - public Wrfprs(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 6, src2.encoding(), simm13); + + public Wrfprs(Register src1, int simm13) { + super(Ops.ArithOp, Op3s.Wrreg, src1, simm13, r6); } - public Wrfprs(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 6, src2.encoding(), src1.encoding()); + + public Wrfprs(Register src1, Register src2) { + super(Ops.ArithOp, Op3s.Wrreg, src1, src2, r6); } } public static class Xor extends Fmt3b { - public Xor(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xor.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Xor(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Xor, src1, simm13, dst); } - public Xor(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xor.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Xor(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Xor, src1, src2, dst); } } public static class Xorcc extends Fmt3b { - public Xorcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xorcc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Xorcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Xorcc, src1, simm13, dst); } - public Xorcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xorcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Xorcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Xorcc, src1, src2, dst); } } public static class Xnor extends Fmt3b { - public Xnor(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xnor.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Xnor(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Xnor, src1, simm13, dst); } - public Xnor(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xnor.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Xnor(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Xnor, src1, src2, dst); } } public static class Xnorcc extends Fmt3b { - public Xnorcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xnorcc.getValue(), src1.encoding(), simm13, dst.encoding()); + + public Xnorcc(Register src1, int simm13, Register dst) { + super(Ops.ArithOp, Op3s.Xnorcc, src1, simm13, dst); } - public Xnorcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), Op3s.Xnorcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); + + public Xnorcc(Register src1, Register src2, Register dst) { + super(Ops.ArithOp, Op3s.Xnorcc, src1, src2, dst); } } }
--- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java Sun Jun 23 15:49:09 2013 +0200 @@ -22,10 +22,11 @@ */ package com.oracle.graal.asm.sparc; +import static com.oracle.graal.sparc.SPARC.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.CC.*; import com.oracle.graal.api.code.*; -import com.oracle.graal.sparc.*; +import com.oracle.graal.asm.*; public class SPARCMacroAssembler extends SPARCAssembler { @@ -33,251 +34,262 @@ super(target, registerConfig); } - @SuppressWarnings("unused") - public static class Bclr { - - public Bclr(SPARCAssembler asm, Register src, Register dst) { - new Andn(asm, dst, src, dst); - } - - public Bclr(SPARCAssembler asm, int simm13, Register dst) { - new Andn(asm, dst, simm13, dst); - } - } - - @SuppressWarnings("unused") - public static class Bset { - - public Bset(SPARCAssembler asm, Register src, Register dst) { - new Or(asm, dst, src, dst); - } - - public Bset(SPARCAssembler asm, int simm13, Register dst) { - new Or(asm, dst, simm13, dst); + @Override + public void align(int modulus) { + if (codeBuffer.position() % modulus != 0) { + final int count = modulus - (codeBuffer.position() % modulus); + for (int i = 0; i < count; i++) { + new Nop().emit(this); + } } } - @SuppressWarnings("unused") - public static class Btog { + @Override + public void jmp(Label l) { + new Bpa(l).emit(this); + new Nop().emit(this); + } + + @Override + protected final void patchJumpTarget(int branch, int branchTarget) { + final int disp = branchTarget - branch; + Fmt00c fmt = Fmt00c.read(this, branch); + fmt.setDisp19(disp); + fmt.write(this, branch); + } - public Btog(SPARCAssembler asm, Register src, Register dst) { - new Xor(asm, dst, src, dst); + @Override + public AbstractAddress makeAddress(Register base, int displacement) { + throw new InternalError("NYI"); + } + + @Override + public AbstractAddress getPlaceholder() { + throw new InternalError("NYI"); + } + + public static class Bclr extends Andn { + + public Bclr(Register src, Register dst) { + super(dst, src, dst); } - public Btog(SPARCAssembler asm, int simm13, Register dst) { - new Xor(asm, dst, simm13, dst); + public Bclr(int simm13, Register dst) { + super(dst, simm13, dst); } } - @SuppressWarnings("unused") - public static class Btst { + public static class Bset extends Or { - public Btst(SPARCAssembler asm, Register src1, Register src2) { - new Andcc(asm, src1, src2, SPARC.g0); + public Bset(Register src, Register dst) { + super(dst, src, dst); } - public Btst(SPARCAssembler asm, Register src1, int simm13) { - new Andcc(asm, src1, simm13, SPARC.g0); + public Bset(int simm13, Register dst) { + super(dst, simm13, dst); } } - @SuppressWarnings("unused") - public static class Clr { + public static class Btst extends Andcc { - public Clr(SPARCAssembler asm, Register dst) { - new Or(asm, SPARC.g0, SPARC.g0, dst); + public Btst(Register src1, Register src2) { + super(src1, src2, g0); } - public Clr(SPARCAssembler asm, SPARCAddress addr) { - new Stw(asm, SPARC.g0, addr); + public Btst(Register src1, int simm13) { + super(src1, simm13, g0); } } - @SuppressWarnings("unused") - public static class Clrb { + public static class Clr { - public Clrb(SPARCAssembler asm, SPARCAddress addr) { - new Stb(asm, SPARC.g0, addr); + public Clr(SPARCAssembler asm, Register dst) { + new Or(g0, g0, dst).emit(asm); + } + + public Clr(SPARCAssembler asm, SPARCAddress addr) { + new Stw(g0, addr).emit(asm); } } - @SuppressWarnings("unused") - public static class Clrh { + public static class Clrb extends Stb { - public Clrh(SPARCAssembler asm, SPARCAddress addr) { - new Sth(asm, SPARC.g0, addr); + public Clrb(SPARCAddress addr) { + super(g0, addr); } } - @SuppressWarnings("unused") - public static class Clrx { + public static class Clrh extends Sth { - public Clrx(SPARCAssembler asm, SPARCAddress addr) { - new Stx(asm, SPARC.g0, addr); + public Clrh(SPARCAddress addr) { + super(g0, addr); + } + } + + public static class Clrx extends Stx { + + public Clrx(SPARCAddress addr) { + super(g0, addr); } } - @SuppressWarnings("unused") - public static class Clruw { + public static class Clruw extends Srl { - public Clruw(SPARCAssembler asm, Register src1, Register dst) { + public Clruw(Register src1, Register dst) { + super(src1, g0, dst); assert src1.encoding() != dst.encoding(); - new Srl(asm, src1, SPARC.g0, dst); } - public Clruw(SPARCAssembler asm, Register dst) { - new Srl(asm, dst, SPARC.g0, dst); + public Clruw(Register dst) { + super(dst, g0, dst); } } - @SuppressWarnings("unused") - public static class Cmp { + public static class Cmp extends Subcc { - public Cmp(SPARCAssembler asm, Register a, Register b) { - new Subcc(asm, a, b, SPARC.g0); + public Cmp(Register a, Register b) { + super(a, b, g0); } - public Cmp(SPARCAssembler asm, Register a, int simm13) { - new Subcc(asm, a, simm13, SPARC.g0); + public Cmp(Register a, int simm13) { + super(a, simm13, g0); } } - @SuppressWarnings("unused") - public static class Dec { + public static class Dec extends Sub { - public Dec(SPARCAssembler asm, Register dst) { - new Sub(asm, dst, 1, dst); + public Dec(Register dst) { + super(dst, 1, dst); } - public Dec(SPARCAssembler asm, int simm13, Register dst) { - new Sub(asm, dst, simm13, dst); + public Dec(int simm13, Register dst) { + super(dst, simm13, dst); } } - @SuppressWarnings("unused") - public static class Deccc { + public static class Deccc extends Subcc { - public Deccc(SPARCAssembler asm, Register dst) { - new Subcc(asm, dst, 1, dst); + public Deccc(Register dst) { + super(dst, 1, dst); } - public Deccc(SPARCAssembler asm, int simm13, Register dst) { - new Subcc(asm, dst, simm13, dst); + public Deccc(int simm13, Register dst) { + super(dst, simm13, dst); } } @SuppressWarnings("unused") public static class Inc { - public Inc(SPARCAssembler asm, Register dst) { - new Add(asm, dst, 1, dst); + public Inc(Register dst) { + new Add(dst, 1, dst); } - public Inc(SPARCAssembler asm, int simm13, Register dst) { - new Add(asm, dst, simm13, dst); + public Inc(int simm13, Register dst) { + new Add(dst, simm13, dst); } } @SuppressWarnings("unused") public static class Inccc { - public Inccc(SPARCAssembler asm, Register dst) { - new Addcc(asm, dst, 1, dst); + public Inccc(Register dst) { + new Addcc(dst, 1, dst); } - public Inccc(SPARCAssembler asm, int simm13, Register dst) { - new Addcc(asm, dst, simm13, dst); + public Inccc(int simm13, Register dst) { + new Addcc(dst, simm13, dst); } } - @SuppressWarnings("unused") - public static class Jmp { + public static class Jmp extends Jmpl { - public Jmp(SPARCAssembler asm, SPARCAddress address) { - new Jmpl(asm, address, SPARC.g0); + public Jmp(SPARCAddress address) { + super(address.getBase(), address.getDisplacement(), g0); } } - @SuppressWarnings("unused") - public static class Neg { + public static class Neg extends Sub { - public Neg(SPARCAssembler asm, Register src2, Register dst) { + public Neg(Register src2, Register dst) { + super(g0, src2, dst); assert src2.encoding() != dst.encoding(); - new Sub(asm, SPARC.g0, src2, dst); } - public Neg(SPARCAssembler asm, Register dst) { - new Sub(asm, SPARC.g0, dst, dst); + public Neg(Register dst) { + super(g0, dst, dst); } } - @SuppressWarnings("unused") - public static class Mov { + public static class Mov extends Or { - public Mov(SPARCAssembler asm, Register src1, Register dst) { + public Mov(Register src1, Register dst) { + super(g0, src1, dst); assert src1.encoding() != dst.encoding(); - new Or(asm, SPARC.g0, src1, dst); } - public Mov(SPARCAssembler asm, int simm13, Register dst) { - new Or(asm, SPARC.g0, simm13, dst); + public Mov(int simm13, Register dst) { + super(g0, simm13, dst); + } + } + + public static class Nop extends Sethi { + + public Nop() { + super(0, r0); } } - @SuppressWarnings("unused") - public static class Not { + public static class Not extends Xnor { - public Not(SPARCAssembler asm, Register src1, Register dst) { + public Not(Register src1, Register dst) { + super(src1, g0, dst); assert src1.encoding() != dst.encoding(); - new Xnor(asm, src1, SPARC.g0, dst); } - public Not(SPARCAssembler asm, Register dst) { - new Xnor(asm, dst, SPARC.g0, dst); + public Not(Register dst) { + super(dst, g0, dst); } } - @SuppressWarnings("unused") - public static class RestoreWindow { + public static class RestoreWindow extends Restore { - public RestoreWindow(SPARCAssembler asm) { - new Restore(asm, SPARC.g0, SPARC.g0, SPARC.g0); + public RestoreWindow() { + super(g0, g0, g0); } } - @SuppressWarnings("unused") - public static class Ret { + public static class Ret extends Jmpl { - public Ret(SPARCAssembler asm) { - new Jmpl(asm, new SPARCAddress(SPARC.i0, 8), SPARC.g0); - + public Ret() { + super(i7, 8, g0); } } - @SuppressWarnings("unused") - public static class SaveWindow { + public static class SaveWindow extends Save { - public SaveWindow(SPARCAssembler asm) { - new Save(asm, SPARC.g0, SPARC.g0, SPARC.g0); + public SaveWindow() { + super(g0, g0, g0); } } @SuppressWarnings("unused") public static class Setuw { - public Setuw(SPARCAssembler asm, int value, Register dst) { - if (value >= 0 && ((value & 0x3FFF) == 0)) { - new Sethi(asm, hi22(value), dst); + public Setuw(SPARCAssembler masm, int value, Register dst) { + if (value == 0) { + new Clr(masm, dst); } else if (-4095 <= value && value <= 4096) { - new Or(asm, SPARC.g0, value, dst); + new Or(g0, value, dst).emit(masm); + } else if (value >= 0 && ((value & 0x3FFF) == 0)) { + new Sethi(hi22(value), dst).emit(masm); } else { - new Sethi(asm, hi22(value), dst); - new Or(asm, dst, lo10(value), dst); + new Sethi(hi22(value), dst).emit(masm); + new Or(dst, lo10(value), dst).emit(masm); } } } - @SuppressWarnings("unused") public static class Setx { public Setx(SPARCAssembler asm, long value, Register tmp, Register dst) { @@ -285,50 +297,49 @@ int lo = (int) (value & ~0); if (isSimm13(lo) && value == lo) { - new Or(asm, SPARC.g0, lo, dst); + new Or(g0, lo, dst).emit(asm); } else if (hi == 0) { - new Sethi(asm, lo, dst); // hardware version zero-extends to upper 32 + new Sethi(lo, dst).emit(asm); // hardware version zero-extends to upper 32 if (lo10(lo) != 0) { - new Or(asm, dst, lo10(lo), dst); + new Or(dst, lo10(lo), dst).emit(asm); } } else if (hi == -1) { - new Sethi(asm, ~lo, dst); // hardware version zero-extends to upper 32 - new Xor(asm, dst, lo10(lo) ^ ~lo10(~0), dst); + new Sethi(~lo, dst).emit(asm); // hardware version zero-extends to upper 32 + new Xor(dst, lo10(lo) ^ ~lo10(~0), dst).emit(asm); } else if (lo == 0) { if (isSimm13(hi)) { - new Or(asm, SPARC.g0, hi, dst); + new Or(g0, hi, dst).emit(asm); } else { - new Sethi(asm, hi, dst); // hardware version zero-extends to upper 32 + new Sethi(hi, dst).emit(asm); // hardware version zero-extends to upper 32 if (lo10(hi) != 0) { - new Or(asm, dst, lo10(hi), dst); + new Or(dst, lo10(hi), dst).emit(asm); } } - new Sllx(asm, dst, 32, dst); + new Sllx(dst, 32, dst).emit(asm); } else { - new Sethi(asm, hi, tmp); - new Sethi(asm, lo, dst); // macro assembler version sign-extends + new Sethi(hi, tmp).emit(asm); + new Sethi(lo, dst).emit(asm); // macro assembler version sign-extends if (lo10(hi) != 0) { - new Or(asm, tmp, lo10(hi), tmp); + new Or(tmp, lo10(hi), tmp).emit(asm); } if (lo10(lo) != 0) { - new Or(asm, dst, lo10(lo), dst); + new Or(dst, lo10(lo), dst).emit(asm); } - new Sllx(asm, tmp, 32, tmp); - new Or(asm, dst, tmp, dst); + new Sllx(tmp, 32, tmp).emit(asm); + new Or(dst, tmp, dst).emit(asm); } } } - @SuppressWarnings("unused") - public static class Signx { + public static class Signx extends Sra { - public Signx(SPARCAssembler asm, Register src1, Register dst) { + public Signx(Register src1, Register dst) { + super(src1, g0, dst); assert src1.encoding() != dst.encoding(); - new Sra(asm, src1, SPARC.g0, dst); } - public Signx(SPARCAssembler asm, Register dst) { - new Sra(asm, dst, SPARC.g0, dst); + public Signx(Register dst) { + super(dst, g0, dst); } } @@ -337,7 +348,7 @@ public Trap(SPARCAssembler asm, int trap) { assert trap >= 0 && trap <= 0x7f; - new Ta(asm, Icc, SPARC.g0, trap); + new Ta(asm, Icc, g0, trap); } } }
--- a/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/ArraySPARCTest.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc.test; - -import java.lang.reflect.*; - -import org.junit.*; - -public class ArraySPARCTest extends SPARCTestBase { - - @Test - public void testArray() { - compile("testArray1I"); - compile("testArray1J"); - compile("testArray1B"); - compile("testArray1S"); - compile("testArray1C"); - compile("testArray1F"); - compile("testArray1D"); - compile("testArray1L"); - compile("testStoreArray1I"); - compile("testStoreArray1J"); - compile("testStoreArray1B"); - compile("testStoreArray1S"); - compile("testStoreArray1F"); - compile("testStoreArray1D"); - } - - public static int testArray1I(int[] array, int i) { - return array[i]; - } - - public static long testArray1J(long[] array, int i) { - return array[i]; - } - - public static byte testArray1B(byte[] array, int i) { - return array[i]; - } - - public static short testArray1S(short[] array, int i) { - return array[i]; - } - - public static char testArray1C(char[] array, int i) { - return array[i]; - } - - public static float testArray1F(float[] array, int i) { - return array[i]; - } - - public static double testArray1D(double[] array, int i) { - return array[i]; - } - - public static Object testArray1L(Object[] array, int i) { - return array[i]; - } - - public static void testStoreArray1I(int[] array, int i, int val) { - array[i] = val; - } - - public static void testStoreArray1B(byte[] array, int i, byte val) { - array[i] = val; - } - - public static void testStoreArray1S(short[] array, int i, short val) { - array[i] = val; - } - - public static void testStoreArray1J(long[] array, int i, long val) { - array[i] = val; - } - - public static void testStoreArray1F(float[] array, int i, float val) { - array[i] = val; - } - - public static void testStoreArray1D(double[] array, int i, double val) { - array[i] = val; - } - - public static void main(String[] args) { - ArraySPARCTest test = new ArraySPARCTest(); - for (Method m : ArraySPARCTest.class.getMethods()) { - String name = m.getName(); - if (m.getAnnotation(Test.class) == null && name.startsWith("test")) { - // CheckStyle: stop system..print check - System.out.println(name + ": \n" + new String(test.compile(name).getTargetCode())); - // CheckStyle: resume system..print check - } - } - } -}
--- a/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/BasicSPARCTest.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,52 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc.test; - -import java.lang.reflect.Method; - -import org.junit.Test; - -public class BasicSPARCTest extends SPARCTestBase { - - @Test - public void testAdd() { - compile("testAddConst1I"); - } - - public int testAddConst1I(int a) { - return a + 1; - } - - public static void main(String[] args) { - BasicSPARCTest test = new BasicSPARCTest(); - Method[] methods = BasicSPARCTest.class.getMethods(); - for (Method m : methods) { - String name = m.getName(); - if (m.getAnnotation(Test.class) == null && name.startsWith("test")) { - // CheckStyle: stop system..print check - System.out.println(name + ": \n" + new String(test.compile(name).getTargetCode())); - // CheckStyle: resume system..print check - } - } - } -}
--- a/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/ControlSPARCTest.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,107 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc.test; - -import org.junit.Test; - -import java.lang.reflect.Method; - -public class ControlSPARCTest extends SPARCTestBase { - - @Test - public void testControl() { - compile("testSwitch1I"); - // compile("testStatic"); - compile("testCall"); - compile("testLookupSwitch1I"); - } - - public static int testSwitch1I(int a) { - switch (a) { - case 1: - return 2; - case 2: - return 3; - default: - return 4; - } - } - - public static int testLookupSwitch1I(int a) { - switch (a) { - case 0: - return 1; - case 1: - return 2; - case 2: - return 3; - case 3: - return 1; - case 4: - return 2; - case 5: - return 3; - case 6: - return 1; - case 7: - return 2; - case 8: - return 3; - case 9: - return 1; - case 10: - return 2; - case 11: - return 3; - default: - return -1; - } - } - - @SuppressWarnings("unused") private static Object foo = null; - - public static boolean testStatic(Object o) { - foo = o; - return true; - } - - private static int method(int a, int b) { - return a + b; - } - - public static int testCall(@SuppressWarnings("unused") Object o, int a, int b) { - return method(a, b); - } - - public static void main(String[] args) { - ControlSPARCTest test = new ControlSPARCTest(); - for (Method m : ControlSPARCTest.class.getMethods()) { - String name = m.getName(); - if (m.getAnnotation(Test.class) == null && name.startsWith("test")) { - // CheckStyle: stop system..print check - System.out.println(name + ": \n" + new String(test.compile(name).getTargetCode())); - // CheckStyle: resume system..print check - } - } - } -}
--- a/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/FloatSPARCTest.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,241 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc.test; - -import java.lang.reflect.Method; - -import org.junit.Test; - -public class FloatSPARCTest extends SPARCTestBase { - - @Test - public void testAdd() { - compile("testAdd2F"); - compile("testAdd2D"); - // compile("testAddFConst"); - // compile("testAddConstF"); - // compile("testAddDConst"); - // compile("testAddConstD"); - } - - public static float testAdd2F(float a, float b) { - return a + b; - } - - public static double testAdd2D(double a, double b) { - return a + b; - } - - public static float testAddFConst(float a) { - return a + 32.0F; - } - - public static float testAddConstF(float a) { - return 32.0F + a; - } - - public static double testAddDConst(double a) { - return a + 32.0; - } - - public static double testAddConstD(double a) { - return 32.0 + a; - } - - @Test - public void testSub() { - compile("testSub2F"); - compile("testSub2D"); - // compile("testSubFConst"); - // compile("testSubConstF"); - // compile("testSubDConst"); - // compile("testSubConstD"); - } - - public static float testSub2F(float a, float b) { - return a - b; - } - - public static double testSub2D(double a, double b) { - return a - b; - } - - public static float testSubFConst(float a) { - return a - 32.0F; - } - - public static float testSubConstF(float a) { - return 32.0F - a; - } - - public static double testSubDConst(double a) { - return a - 32.0; - } - - public static double testSubConstD(double a) { - return 32.0 - a; - } - - @Test - public void testMul() { - compile("testMul2F"); - compile("testMul2D"); - // compile("testMulFConst"); - // compile("testMulConstF"); - // compile("testMulDConst"); - // compile("testMulConstD"); - } - - public static float testMul2F(float a, float b) { - return a * b; - } - - public static double testMul2D(double a, double b) { - return a * b; - } - - public static float testMulFConst(float a) { - return a * 32.0F; - } - - public static float testMulConstF(float a) { - return 32.0F * a; - } - - public static double testMulDConst(double a) { - return a * 32.0; - } - - public static double testMulConstD(double a) { - return 32.0 * a; - } - - @Test - public void testDiv() { - compile("testDiv2F"); - compile("testDiv2D"); - // compile("testDivFConst"); - // compile("testDivConstF"); - // compile("testDivDConst"); - // compile("testDivConstD"); - } - - public static float testDiv2F(float a, float b) { - return a / b; - } - - public static double testDiv2D(double a, double b) { - return a / b; - } - - public static float testDivFConst(float a) { - return a / 32.0F; - } - - public static float testDivConstF(float a) { - return 32.0F / a; - } - - public static double testDivDConst(double a) { - return a / 32.0; - } - - public static double testDivConstD(double a) { - return 32.0 / a; - } - - @Test - public void testNeg() { - compile("testNeg2F"); - compile("testNeg2D"); - } - - public static float testNeg2F(float a) { - return -a; - } - - public static double testNeg2D(double a) { - return -a; - } - - @Test - public void testRem() { - // need linkage to PTX remainder() - // compile("testRem2F"); - // compile("testRem2D"); - } - - public static float testRem2F(float a, float b) { - return a % b; - } - - public static double testRem2D(double a, double b) { - return a % b; - } - - @Test - public void testFloatConversion() { - // compile("testF2I"); - // compile("testF2L"); - // compile("testF2D"); - // compile("testD2I"); - // compile("testD2L"); - // compile("testD2F"); - } - - public static int testF2I(float a) { - return (int) a; - } - - public static long testF2L(float a) { - return (long) a; - } - - public static double testF2D(float a) { - return a; - } - - public static int testD2I(double a) { - return (int) a; - } - - public static long testD2L(double a) { - return (long) a; - } - - public static float testD2F(double a) { - return (float) a; - } - - public static void main(String[] args) { - FloatSPARCTest test = new FloatSPARCTest(); - for (Method m : FloatSPARCTest.class.getMethods()) { - String name = m.getName(); - if (m.getAnnotation(Test.class) == null && name.startsWith("test") && name.startsWith("testRem") == false) { - // CheckStyle: stop system..print check - System.out.println(name + ": \n" + new String(test.compile(name).getTargetCode())); - // CheckStyle: resume system..print check - } - } - } -}
--- a/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/IntegerSPARCTest.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,182 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc.test; - -import org.junit.Ignore; -import org.junit.Test; - -import java.lang.reflect.Method; - -public class IntegerSPARCTest extends SPARCTestBase { - - @Test - public void testAdd() { - compile("testAdd2I"); - compile("testAdd2L"); - compile("testAdd2B"); - compile("testAddIConst"); - compile("testAddConstI"); - } - - public static int testAdd2I(int a, int b) { - return a + b; - } - - public static long testAdd2L(long a, long b) { - return a + b; - } - - public static int testAdd2B(byte a, byte b) { - return a + b; - } - - public static int testAddIConst(int a) { - return a + 32; - } - - public static int testAddConstI(int a) { - return 32 + a; - } - - @Test - public void testSub() { - compile("testSub2I"); - compile("testSub2L"); - compile("testSubIConst"); - compile("testSubConstI"); - } - - public static int testSub2I(int a, int b) { - return a - b; - } - - public static long testSub2L(long a, long b) { - return a - b; - } - - public static int testSubIConst(int a) { - return a - 32; - } - - public static int testSubConstI(int a) { - return 32 - a; - } - - @Test - public void testMul() { - compile("testMul2I"); - compile("testMul2L"); - compile("testMulIConst"); - compile("testMulConstI"); - } - - public static int testMul2I(int a, int b) { - return a * b; - } - - public static long testMul2L(long a, long b) { - return a * b; - } - - public static int testMulIConst(int a) { - return a * 32; - } - - public static int testMulConstI(int a) { - return 32 * a; - } - - @Test - public void testDiv() { - compile("testDiv2I"); - compile("testDiv2L"); - compile("testDivIConst"); - } - - public static int testDiv2I(int a, int b) { - return a / b; - } - - public static long testDiv2L(long a, long b) { - return a / b; - } - - public static int testDivIConst(int a) { - return a / 32; - } - - @Ignore - public void testRem() { - compile("testRem2I"); - compile("testRem2L"); - } - - public static int testRem2I(int a, int b) { - return a % b; - } - - public static long testRem2L(long a, long b) { - return a % b; - } - - @Test - public void testIntConversion() { - compile("testI2L"); - compile("testI2C"); - compile("testI2B"); - compile("testI2F"); - compile("testI2D"); - } - - public static long testI2L(int a) { - return a; - } - - public static char testI2C(int a) { - return (char) a; - } - - public static byte testI2B(int a) { - return (byte) a; - } - - public static float testI2F(int a) { - return a; - } - - public static double testI2D(int a) { - return a; - } - - public static void main(String[] args) { - IntegerSPARCTest test = new IntegerSPARCTest(); - for (Method m : IntegerSPARCTest.class.getMethods()) { - String name = m.getName(); - if (m.getAnnotation(Test.class) == null && name.startsWith("test")) { - // CheckStyle: stop system..print check - System.out.println(name + ": \n" + new String(test.compile(name).getTargetCode())); - // CheckStyle: resume system..print check - } - } - } -}
--- a/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/LogicSPARCTest.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,136 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc.test; - -import java.lang.reflect.Method; - -import org.junit.Test; - -public class LogicSPARCTest extends SPARCTestBase { - - @Test - public void testAnd() { - compile("testAnd2I"); - compile("testAnd2L"); - } - - public static int testAnd2I(int a, int b) { - return a & b; - } - - public static long testAnd2L(long a, long b) { - return a & b; - } - - @Test - public void testOr() { - compile("testOr2I"); - compile("testOr2L"); - } - - public static int testOr2I(int a, int b) { - return a | b; - } - - public static long testOr2L(long a, long b) { - return a | b; - } - - @Test - public void testXor() { - compile("testXor2I"); - compile("testXor2L"); - } - - public static int testXor2I(int a, int b) { - return a ^ b; - } - - public static long testXor2L(long a, long b) { - return a ^ b; - } - - @Test - public void testNot() { - compile("testNot1I"); - compile("testNot1L"); - } - - public static int testNot1I(int a) { - return ~a; - } - - public static long testNot1L(long a) { - return ~a; - } - - @Test - public void testShiftLeft() { - compile("testShiftLeft2I"); - compile("testShiftLeft2L"); - } - - public static int testShiftLeft2I(int a, int b) { - return a << b; - } - - public static long testShiftLeft2L(long a, int b) { - return a << b; - } - - @Test - public void testShiftRight() { - compile("testShiftRight2I"); - compile("testShiftRight2L"); - compile("testUnsignedShiftRight2I"); - compile("testUnsignedShiftRight2L"); - } - - public static int testShiftRight2I(int a, int b) { - return a >> b; - } - - public static long testShiftRight2L(long a, int b) { - return a >> b; - } - - public static int testUnsignedShiftRight2I(int a, int b) { - return a >>> b; - } - - public static long testUnsignedShiftRight2L(long a, long b) { - return a >>> b; - } - - public static void main(String[] args) { - LogicSPARCTest test = new LogicSPARCTest(); - for (Method m : LogicSPARCTest.class.getMethods()) { - String name = m.getName(); - if (m.getAnnotation(Test.class) == null && name.startsWith("test")) { - // CheckStyle: stop system..print check - System.out.println(name + ": \n" + new String(test.compile(name).getTargetCode())); - // CheckStyle: resume system..print check - } - } - } -}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/SPARCAllocatorTest.java Sun Jun 23 15:49:09 2013 +0200 @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ +package com.oracle.graal.compiler.sparc.test; + +import org.junit.*; + +import com.oracle.graal.compiler.test.backend.*; + +public class SPARCAllocatorTest extends AllocatorTest { + + @Test + public void test1() { + test("test1snippet", 3, 1, 0); + } + + public static long test1snippet(long x) { + return x + 5; + } + + @Test + public void test2() { + test("test2snippet", 3, 0, 0); + } + + public static long test2snippet(long x) { + return x * 5; + } + + @Ignore + @Test + public void test3() { + test("test3snippet", 4, 1, 0); + } + + public static long test3snippet(long x) { + return x / 3 + x % 3; + } + +}
--- a/graal/com.oracle.graal.compiler.sparc.test/src/com/oracle/graal/compiler/sparc/test/SPARCTestBase.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,67 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc.test; - -import static com.oracle.graal.api.code.CodeUtil.*; -import static com.oracle.graal.hotspot.HotSpotGraalRuntime.*; - -import com.oracle.graal.api.code.*; -import com.oracle.graal.api.code.CallingConvention.*; -import com.oracle.graal.api.runtime.Graal; -import com.oracle.graal.compiler.GraalCompiler; -import com.oracle.graal.compiler.sparc.SPARCBackend; -import com.oracle.graal.compiler.test.GraalCompilerTest; -import com.oracle.graal.debug.Debug; -import com.oracle.graal.java.GraphBuilderConfiguration; -import com.oracle.graal.java.GraphBuilderPhase; -import com.oracle.graal.nodes.StructuredGraph; -import com.oracle.graal.nodes.spi.GraalCodeCacheProvider; -import com.oracle.graal.phases.OptimisticOptimizations; -import com.oracle.graal.phases.PhasePlan; -import com.oracle.graal.phases.PhasePlan.PhasePosition; -import com.oracle.graal.sparc.SPARC; - -public abstract class SPARCTestBase extends GraalCompilerTest { - - private StructuredGraph sg; - - protected CompilationResult compile(String test) { - StructuredGraph graph = parse(test); - sg = graph; - Debug.dump(graph, "Graph"); - TargetDescription target = new TargetDescription(new SPARC(), true, 1, 0, true); - SPARCBackend sparcBackend = new SPARCBackend(Graal.getRequiredCapability(GraalCodeCacheProvider.class), target); - PhasePlan phasePlan = new PhasePlan(); - GraphBuilderPhase graphBuilderPhase = new GraphBuilderPhase(runtime, GraphBuilderConfiguration.getDefault(), OptimisticOptimizations.NONE); - phasePlan.addPhase(PhasePosition.AFTER_PARSING, graphBuilderPhase); - CallingConvention cc = getCallingConvention(runtime, Type.JavaCallee, graph.method(), false); - CompilationResult result = GraalCompiler.compileGraph(graph, cc, graph.method(), runtime, graalRuntime().getReplacements(), sparcBackend, target, null, phasePlan, - OptimisticOptimizations.NONE, new SpeculationLog(), suites); - return result; - } - - protected StructuredGraph getStructuredGraph() { - return sg; - } - -}
--- a/graal/com.oracle.graal.compiler.sparc/src/com/oracle/graal/compiler/sparc/SPARCBackend.java Sun Jun 23 15:49:01 2013 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package com.oracle.graal.compiler.sparc; - -import com.oracle.graal.api.code.CallingConvention; -import com.oracle.graal.api.code.CodeCacheProvider; -import com.oracle.graal.api.code.CompilationResult; -import com.oracle.graal.api.code.TargetDescription; -import com.oracle.graal.api.meta.ResolvedJavaMethod; -import com.oracle.graal.asm.AbstractAssembler; -import com.oracle.graal.asm.sparc.SPARCAssembler; -import com.oracle.graal.compiler.gen.LIRGenerator; -import com.oracle.graal.compiler.target.Backend; -import com.oracle.graal.lir.FrameMap; -import com.oracle.graal.lir.LIR; -import com.oracle.graal.lir.asm.FrameContext; -import com.oracle.graal.lir.asm.TargetMethodAssembler; -import com.oracle.graal.nodes.StructuredGraph; - -public class SPARCBackend extends Backend { - - public SPARCBackend(CodeCacheProvider runtime, TargetDescription target) { - super(runtime, target); - } - - @Override - public LIRGenerator newLIRGenerator(StructuredGraph graph, FrameMap frameMap, CallingConvention cc, LIR lir) { - return new SPARCLIRGenerator(graph, runtime(), target, frameMap, cc, lir); - } - - @Override - protected AbstractAssembler createAssembler(FrameMap frameMap) { - return new SPARCAssembler(target, frameMap.registerConfig); - } - - class HotSpotFrameContext implements FrameContext { - - @Override - public void enter(TargetMethodAssembler tasm) { - } - - @Override - public void leave(TargetMethodAssembler tasm) { - } - } - @Override - public TargetMethodAssembler newAssembler(LIRGenerator lirGen, CompilationResult compilationResult) { - FrameMap frameMap = lirGen.frameMap; - AbstractAssembler masm = createAssembler(frameMap); - HotSpotFrameContext frameContext = new HotSpotFrameContext(); - TargetMethodAssembler tasm = new TargetMethodAssembler(target, runtime(), frameMap, masm, frameContext, compilationResult); - tasm.setFrameSize(frameMap.frameSize()); - return tasm; - } - - @Override - public void emitCode(TargetMethodAssembler tasm, LIRGenerator lirGen, ResolvedJavaMethod installedCodeOwner) { - - // Emit code for the LIR - lirGen.lir.emitCode(tasm); - - } - - -}
--- a/graal/com.oracle.graal.compiler.sparc/src/com/oracle/graal/compiler/sparc/SPARCLIRGenerator.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.compiler.sparc/src/com/oracle/graal/compiler/sparc/SPARCLIRGenerator.java Sun Jun 23 15:49:09 2013 +0200 @@ -37,7 +37,7 @@ import com.oracle.graal.api.code.StackSlot; import com.oracle.graal.api.code.TargetDescription; import com.oracle.graal.api.meta.*; -import com.oracle.graal.asm.NumUtil; +import com.oracle.graal.asm.sparc.*; import com.oracle.graal.compiler.gen.LIRGenerator; import com.oracle.graal.compiler.target.LIRGenLowerable; import com.oracle.graal.graph.GraalInternalError; @@ -151,26 +151,38 @@ @Override public void emitCompareBranch(Value left, Value right, Condition cond, boolean unorderedIsTrue, LabelRef label) { + Variable x; + Value y; + Condition condition; + if (LIRValueUtil.isVariable(right)) { + x = load(right); + y = loadNonConst(left); + condition = cond.mirror(); + } else { + x = load(left); + y = loadNonConst(right); + condition = cond; + } switch (left.getKind().getStackKind()) { case Int: - append(new CompareOp(ICMP, left, right)); - append(new BranchOp(cond, label)); + append(new CompareOp(ICMP, x, y)); + append(new BranchOp(condition, label)); break; case Long: - append(new CompareOp(LCMP, left, right)); - append(new BranchOp(cond, label)); + append(new CompareOp(LCMP, x, y)); + append(new BranchOp(condition, label)); break; case Float: - append(new CompareOp(FCMP, left, right)); - append(new BranchOp(cond, label)); + append(new CompareOp(FCMP, x, y)); + append(new BranchOp(condition, label)); break; case Double: - append(new CompareOp(DCMP, left, right)); - append(new BranchOp(cond, label)); + append(new CompareOp(DCMP, x, y)); + append(new BranchOp(condition, label)); break; case Object: - append(new CompareOp(ACMP, left, right)); - append(new BranchOp(cond, label)); + append(new CompareOp(ACMP, x, y)); + append(new BranchOp(condition, label)); break; default: throw GraalInternalError.shouldNotReachHere("" + left.getKind()); @@ -388,8 +400,11 @@ @Override public boolean canInlineConstant(Constant c) { switch (c.getKind()) { + case Int: + return SPARCAssembler.isSimm13(c.asInt()) && !runtime.needsDataPatch(c); case Long: - return NumUtil.isInt(c.asLong()) && !runtime.needsDataPatch(c); + // return NumUtil.isInt(c.asLong()) && !runtime.needsDataPatch(c); + throw new InternalError("NYI"); case Object: return c.isNull(); default:
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotBackend.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotBackend.java Sun Jun 23 15:49:09 2013 +0200 @@ -22,37 +22,69 @@ */ package com.oracle.graal.hotspot.sparc; +import sun.misc.*; + import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; -import com.oracle.graal.asm.AbstractAssembler; -import com.oracle.graal.asm.sparc.SPARCAssembler; +import com.oracle.graal.asm.*; +import com.oracle.graal.asm.sparc.*; +import com.oracle.graal.asm.sparc.SPARCAssembler.*; import com.oracle.graal.compiler.gen.LIRGenerator; -import com.oracle.graal.compiler.sparc.SPARCLIRGenerator; import com.oracle.graal.hotspot.*; +import com.oracle.graal.hotspot.bridge.*; import com.oracle.graal.hotspot.meta.*; import com.oracle.graal.hotspot.stubs.Stub; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.nodes.*; + +import static com.oracle.graal.sparc.SPARC.*; +import static com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; +import static com.oracle.graal.api.code.CallingConvention.Type.*; +import static com.oracle.graal.api.code.ValueUtil.*; import static com.oracle.graal.phases.GraalOptions.*; +import static java.lang.reflect.Modifier.*; /** * HotSpot SPARC specific backend. */ public class SPARCHotSpotBackend extends HotSpotBackend { + private static final Unsafe unsafe = Unsafe.getUnsafe(); + public SPARCHotSpotBackend(HotSpotRuntime runtime, TargetDescription target) { super(runtime, target); } @Override public LIRGenerator newLIRGenerator(StructuredGraph graph, FrameMap frameMap, CallingConvention cc, LIR lir) { - return new SPARCLIRGenerator(graph, this.runtime(), this.target, frameMap, cc, lir); + return new SPARCHotSpotLIRGenerator(graph, runtime(), target, frameMap, cc, lir); } - @Override - protected AbstractAssembler createAssembler(FrameMap frameMap) { - return new SPARCAssembler(target, frameMap.registerConfig); + /** + * Emits code to do stack overflow checking. + * + * @param afterFrameInit specifies if the stack pointer has already been adjusted to allocate + * the current frame + */ + protected static void emitStackOverflowCheck(TargetMethodAssembler tasm, boolean afterFrameInit) { + if (StackShadowPages.getValue() > 0) { + // SPARCMacroAssembler masm = (SPARCMacroAssembler) tasm.asm; + final int frameSize = tasm.frameMap.frameSize(); + if (frameSize > 0) { + int lastFramePage = frameSize / unsafe.pageSize(); + // emit multiple stack bangs for methods with frames larger than a page + for (int i = 0; i <= lastFramePage; i++) { + // int disp = (i + StackShadowPages.getValue()) * unsafe.pageSize(); + // if (afterFrameInit) { + // disp -= frameSize; + // } + tasm.blockComment("[stack overflow check]"); + // FIXME currently doesn't work; maybe frame size is wrong + // new Ldx(new SPARCAddress(sp, -disp), g0).emit(masm); + } + } + } } class HotSpotFrameContext implements FrameContext { @@ -65,23 +97,44 @@ @Override public void enter(TargetMethodAssembler tasm) { + final int frameSize = tasm.frameMap.frameSize(); + + SPARCMacroAssembler masm = (SPARCMacroAssembler) tasm.asm; + if (!isStub) { + emitStackOverflowCheck(tasm, false); + } + new Save(sp, frameSize, sp).emit(masm); + + if (ZapStackOnMethodEntry.getValue()) { + final int slotSize = 8; + for (int i = 0; i < frameSize / slotSize; ++i) { + // 0xC1C1C1C1 + new Stx(g0, new SPARCAddress(sp, i * slotSize)).emit(masm); + } + } } @Override public void leave(TargetMethodAssembler tasm) { + SPARCMacroAssembler masm = (SPARCMacroAssembler) tasm.asm; + new RestoreWindow().emit(masm); } } @Override + protected AbstractAssembler createAssembler(FrameMap frameMap) { + return new SPARCMacroAssembler(target, frameMap.registerConfig); + } + + @Override public TargetMethodAssembler newAssembler(LIRGenerator lirGen, CompilationResult compilationResult) { SPARCHotSpotLIRGenerator gen = (SPARCHotSpotLIRGenerator) lirGen; FrameMap frameMap = gen.frameMap; - LIR lir = gen.lir; - boolean omitFrame = CanOmitFrame.getValue() && !frameMap.frameNeedsAllocating() && !lir.hasArgInCallerFrame(); Stub stub = gen.getStub(); AbstractAssembler masm = createAssembler(frameMap); - HotSpotFrameContext frameContext = omitFrame ? null : new HotSpotFrameContext(stub != null); + // On SPARC we always use stack frames. + HotSpotFrameContext frameContext = new HotSpotFrameContext(stub != null); TargetMethodAssembler tasm = new TargetMethodAssembler(target, runtime(), frameMap, masm, frameContext, compilationResult); tasm.setFrameSize(frameMap.frameSize()); StackSlot deoptimizationRescueSlot = gen.deoptimizationRescueSlot; @@ -93,7 +146,52 @@ } @Override - public void emitCode(TargetMethodAssembler tasm, LIRGenerator lirGen, ResolvedJavaMethod codeCacheOwner) { - // SPARC: Emit code + public void emitCode(TargetMethodAssembler tasm, LIRGenerator lirGen, ResolvedJavaMethod installedCodeOwner) { + SPARCMacroAssembler masm = (SPARCMacroAssembler) tasm.asm; + FrameMap frameMap = tasm.frameMap; + RegisterConfig regConfig = frameMap.registerConfig; + HotSpotVMConfig config = runtime().config; + Label unverifiedStub = installedCodeOwner == null || isStatic(installedCodeOwner.getModifiers()) ? null : new Label(); + + // Emit the prefix + + if (unverifiedStub != null) { + tasm.recordMark(Marks.MARK_UNVERIFIED_ENTRY); + CallingConvention cc = regConfig.getCallingConvention(JavaCallee, null, new JavaType[]{runtime().lookupJavaType(Object.class)}, target, false); + Register inlineCacheKlass = g5; // see MacroAssembler::ic_call + Register receiver = asRegister(cc.getArgument(0)); + SPARCAddress src = new SPARCAddress(receiver, config.hubOffset); + + new Ldx(src, g0).emit(masm); + new Cmp(inlineCacheKlass, g0).emit(masm); + new Bpne(CC.Xcc, unverifiedStub).emit(masm); + new Nop().emit(masm); // delay slot + } + + masm.align(config.codeEntryAlignment); + tasm.recordMark(Marks.MARK_OSR_ENTRY); + tasm.recordMark(Marks.MARK_VERIFIED_ENTRY); + + // Emit code for the LIR + lirGen.lir.emitCode(tasm); + + HotSpotFrameContext frameContext = (HotSpotFrameContext) tasm.frameContext; + if (frameContext != null && !frameContext.isStub) { + tasm.recordMark(Marks.MARK_EXCEPTION_HANDLER_ENTRY); +// SPARCCall.directCall(tasm, asm, runtime().lookupForeignCall(EXCEPTION_HANDLER), null, false, +// null); + tasm.recordMark(Marks.MARK_DEOPT_HANDLER_ENTRY); +// SPARCCall.directCall(tasm, asm, runtime().lookupForeignCall(DEOPT_HANDLER), null, false, null); + } else { + // No need to emit the stubs for entries back into the method since + // it has no calls that can cause such "return" entries + assert !frameMap.accessesCallerFrame() : lirGen.getGraph(); + } + + if (unverifiedStub != null) { + masm.bind(unverifiedStub); +// SPARCCall.directJmp(tasm, asm, runtime().lookupForeignCall(IC_MISS_HANDLER)); + throw new InternalError("g0 must be scratch register"); + } } }
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotRegisterConfig.java Sun Jun 23 15:49:09 2013 +0200 @@ -0,0 +1,240 @@ +/* + * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ +package com.oracle.graal.hotspot.sparc; + +import static com.oracle.graal.sparc.SPARC.*; +import static com.oracle.graal.phases.GraalOptions.*; + +import java.util.*; + +import com.oracle.graal.sparc.*; +import com.oracle.graal.api.code.*; +import com.oracle.graal.api.code.CallingConvention.Type; +import com.oracle.graal.api.meta.*; +import com.oracle.graal.graph.*; +import com.oracle.graal.hotspot.*; + +public class SPARCHotSpotRegisterConfig implements RegisterConfig { + + private final Architecture architecture; + + private final Register[] allocatable; + + private final HashMap<PlatformKind, Register[]> categorized = new HashMap<>(); + + private final RegisterAttributes[] attributesMap; + + @Override + public Register[] getAllocatableRegisters() { + return allocatable.clone(); + } + + public Register[] getAllocatableRegisters(PlatformKind kind) { + if (categorized.containsKey(kind)) { + return categorized.get(kind); + } + + ArrayList<Register> list = new ArrayList<>(); + for (Register reg : getAllocatableRegisters()) { + if (architecture.canStoreValue(reg.getRegisterCategory(), kind)) { + list.add(reg); + } + } + + Register[] ret = list.toArray(new Register[0]); + categorized.put(kind, ret); + return ret; + } + + @Override + public RegisterAttributes[] getAttributesMap() { + return attributesMap.clone(); + } + + private final Register[] javaGeneralParameterRegisters; + private final Register[] nativeGeneralParameterRegisters; + private final Register[] fpuParameterRegisters = {f0, f1, f2, f3, f4, f5, f6, f7}; + + private final CalleeSaveLayout csl; + + private static Register findRegister(String name, Register[] all) { + for (Register reg : all) { + if (reg.name.equals(name)) { + return reg; + } + } + throw new IllegalArgumentException("register " + name + " is not allocatable"); + } + + private static Register[] initAllocatable(boolean reserveForHeapBase) { + Register[] registers = null; + // @formatter:off + if (reserveForHeapBase) { + registers = new Register[] { + // TODO this is not complete + l0, l1, l2, l3, l4, l5, l6, l7, + i0, i1, i2, i3, i4, i5, /*i6,*/ i7, + f0, f1, f2, f3, f4, f5, f6, f7 + }; + } else { + registers = new Register[] { + // TODO this is not complete + l0, l1, l2, l3, l4, l5, l6, l7, + i0, i1, i2, i3, i4, i5, /*i6,*/ i7, + f0, f1, f2, f3, f4, f5, f6, f7 + }; + } + // @formatter:on + + if (RegisterPressure.getValue() != null) { + String[] names = RegisterPressure.getValue().split(","); + Register[] regs = new Register[names.length]; + for (int i = 0; i < names.length; i++) { + regs[i] = findRegister(names[i], registers); + } + return regs; + } + + return registers; + } + + public SPARCHotSpotRegisterConfig(Architecture architecture, HotSpotVMConfig config) { + this.architecture = architecture; + + javaGeneralParameterRegisters = new Register[]{i0, i1, i2, i3, i4, i5}; + nativeGeneralParameterRegisters = new Register[]{i0, i1, i2, i3, i4, i5}; + + csl = null; + allocatable = initAllocatable(config.useCompressedOops); + attributesMap = RegisterAttributes.createMap(this, SPARC.allRegisters); + } + + @Override + public Register[] getCallerSaveRegisters() { + return getAllocatableRegisters(); + } + + @Override + public Register getRegisterForRole(int index) { + throw new UnsupportedOperationException(); + } + + @Override + public CallingConvention getCallingConvention(Type type, JavaType returnType, JavaType[] parameterTypes, TargetDescription target, boolean stackOnly) { + if (type == Type.NativeCall) { + return callingConvention(nativeGeneralParameterRegisters, returnType, parameterTypes, type, target, stackOnly); + } + // On x64, parameter locations are the same whether viewed + // from the caller or callee perspective + return callingConvention(javaGeneralParameterRegisters, returnType, parameterTypes, type, target, stackOnly); + } + + public Register[] getCallingConventionRegisters(Type type, Kind kind) { + if (architecture.canStoreValue(FPU, kind)) { + return fpuParameterRegisters; + } + assert architecture.canStoreValue(CPU, kind); + return type == Type.NativeCall ? nativeGeneralParameterRegisters : javaGeneralParameterRegisters; + } + + private CallingConvention callingConvention(Register[] generalParameterRegisters, JavaType returnType, JavaType[] parameterTypes, Type type, TargetDescription target, boolean stackOnly) { + AllocatableValue[] locations = new AllocatableValue[parameterTypes.length]; + + int currentGeneral = 0; + int currentFloating = 0; + int currentStackOffset = 0; + + for (int i = 0; i < parameterTypes.length; i++) { + final Kind kind = parameterTypes[i].getKind(); + + switch (kind) { + case Byte: + case Boolean: + case Short: + case Char: + case Int: + case Long: + case Object: + if (!stackOnly && currentGeneral < generalParameterRegisters.length) { + Register register = generalParameterRegisters[currentGeneral++]; + locations[i] = register.asValue(kind); + } + break; + case Float: + case Double: + if (!stackOnly && currentFloating < fpuParameterRegisters.length) { + Register register = fpuParameterRegisters[currentFloating++]; + locations[i] = register.asValue(kind); + } + break; + default: + throw GraalInternalError.shouldNotReachHere(); + } + + if (locations[i] == null) { + locations[i] = StackSlot.get(kind.getStackKind(), currentStackOffset, !type.out); + currentStackOffset += Math.max(target.arch.getSizeInBytes(kind), target.wordSize); + } + } + + Kind returnKind = returnType == null ? Kind.Void : returnType.getKind(); + AllocatableValue returnLocation = returnKind == Kind.Void ? Value.ILLEGAL : getReturnRegister(returnKind).asValue(returnKind); + return new CallingConvention(currentStackOffset, returnLocation, locations); + } + + @Override + public Register getReturnRegister(Kind kind) { + switch (kind) { + case Boolean: + case Byte: + case Char: + case Short: + case Int: + case Long: + case Object: + return i0; + case Float: + case Double: + return f0; + case Void: + case Illegal: + return null; + default: + throw new UnsupportedOperationException("no return register for type " + kind); + } + } + + @Override + public Register getFrameRegister() { + return sp; + } + + public CalleeSaveLayout getCalleeSaveLayout() { + return csl; + } + + @Override + public String toString() { + return String.format("Allocatable: " + Arrays.toString(getAllocatableRegisters()) + "%n" + "CallerSave: " + Arrays.toString(getCallerSaveRegisters()) + "%n"); + } +}
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotRuntime.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotRuntime.java Sun Jun 23 15:49:09 2013 +0200 @@ -22,32 +22,70 @@ */ package com.oracle.graal.hotspot.sparc; +import static com.oracle.graal.sparc.SPARC.*; +import static com.oracle.graal.api.meta.LocationIdentity.*; +import static com.oracle.graal.api.meta.Value.*; +import static com.oracle.graal.hotspot.HotSpotBackend.*; +import static com.oracle.graal.hotspot.HotSpotForeignCallLinkage.*; +import static com.oracle.graal.hotspot.HotSpotForeignCallLinkage.RegisterEffect.*; +import static com.oracle.graal.hotspot.HotSpotForeignCallLinkage.Transition.*; + import com.oracle.graal.api.code.*; +import com.oracle.graal.api.meta.*; +import com.oracle.graal.graph.*; import com.oracle.graal.hotspot.*; import com.oracle.graal.hotspot.meta.*; +import com.oracle.graal.nodes.spi.*; + +//import com.oracle.graal.replacements.sparc.*; public class SPARCHotSpotRuntime extends HotSpotRuntime { public SPARCHotSpotRuntime(HotSpotVMConfig config, HotSpotGraalRuntime graalRuntime) { super(config, graalRuntime); - // SPARC: Register stubs. + } + +// private AMD64ConvertSnippets.Templates convertSnippets; + + @Override + public void registerReplacements(Replacements replacements) { + Kind word = graalRuntime.getTarget().wordKind; + + // The calling convention for the exception handler stub is (only?) defined in + // TemplateInterpreterGenerator::generate_throw_exception() + // in templateInterpreter_sparc.cpp around line 1925 + RegisterValue exception = o0.asValue(Kind.Object); // XXX should this be i0? + RegisterValue exceptionPc = o1.asValue(word); // XXX should this be i1? + CallingConvention exceptionCc = new CallingConvention(0, ILLEGAL, exception, exceptionPc); + register(new HotSpotForeignCallLinkage(EXCEPTION_HANDLER, 0L, PRESERVES_REGISTERS, LEAF, exceptionCc, NOT_REEXECUTABLE, ANY_LOCATION)); + register(new HotSpotForeignCallLinkage(EXCEPTION_HANDLER_IN_CALLER, JUMP_ADDRESS, PRESERVES_REGISTERS, LEAF, exceptionCc, NOT_REEXECUTABLE, ANY_LOCATION)); + +// convertSnippets = new AMD64ConvertSnippets.Templates(this, replacements, +// graalRuntime.getTarget()); + super.registerReplacements(replacements); + } + + @Override + public void lower(Node n, LoweringTool tool) { +// if (n instanceof ConvertNode) { +// convertSnippets.lower((ConvertNode) n, tool); +// } else { + super.lower(n, tool); +// } } @Override public Register threadRegister() { - // SPARC: Define thread register. - return null; + throw new InternalError("NYI: SPARC: Define thread register."); } @Override public Register stackPointerRegister() { - // SPARC: Define stack pointer register. - return null; + throw new InternalError("NYI: SPARC: Define stack pointer register."); } @Override protected RegisterConfig createRegisterConfig() { - // SPARC: Create register configuration. - return null; + return new SPARCHotSpotRegisterConfig(graalRuntime.getTarget().arch, config); } }
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java Sun Jun 23 15:49:09 2013 +0200 @@ -23,35 +23,8 @@ package com.oracle.graal.lir.sparc; import static com.oracle.graal.api.code.ValueUtil.*; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Add; -import static com.oracle.graal.asm.sparc.SPARCAssembler.And; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fadds; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Faddd; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fdivs; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fdivd; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fdtoi; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fmuls; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fmuld; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fnegs; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fnegd; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fstoi; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fsubs; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Fsubd; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Mulx; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Or; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Sdivx; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Sll; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Sllx; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Srl; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Srlx; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Sra; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Sub; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Xor; -import static com.oracle.graal.asm.sparc.SPARCAssembler.isSimm13; -import static com.oracle.graal.lir.LIRInstruction.OperandFlag.CONST; -import static com.oracle.graal.lir.LIRInstruction.OperandFlag.HINT; -import static com.oracle.graal.lir.LIRInstruction.OperandFlag.REG; -import static com.oracle.graal.lir.LIRInstruction.OperandFlag.STACK; +import static com.oracle.graal.asm.sparc.SPARCAssembler.*; +import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.SPARCAssembler; @@ -59,7 +32,6 @@ import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.TargetMethodAssembler; -//@formatter:off public enum SPARCArithmetic { // @formatter:off IADD, ISUB, IMUL, IDIV, IDIVREM, IREM, IUDIV, IUREM, IAND, IOR, IXOR, ISHL, ISHR, IUSHR, @@ -72,11 +44,13 @@ I2F, I2D, F2I, D2I, L2F, L2D, F2L, D2L, MOV_I2F, MOV_L2D, MOV_F2I, MOV_D2L; + // @formatter:on /** * Binary operation with single source/destination operand and one constant. */ public static class BinaryRegConst extends SPARCLIRInstruction { + @Opcode private final SPARCArithmetic opcode; @Def({REG, HINT}) protected AllocatableValue result; @Use({REG, STACK}) protected AllocatableValue x; @@ -107,12 +81,9 @@ */ public static class Unary2Op extends SPARCLIRInstruction { - @Opcode - private final SPARCArithmetic opcode; - @Def({ REG }) - protected AllocatableValue result; - @Use({ REG, STACK }) - protected AllocatableValue x; + @Opcode private final SPARCArithmetic opcode; + @Def({REG}) protected AllocatableValue result; + @Use({REG, STACK}) protected AllocatableValue x; public Unary2Op(SPARCArithmetic opcode, AllocatableValue result, AllocatableValue x) { this.opcode = opcode; @@ -132,12 +103,9 @@ */ public static class Unary1Op extends SPARCLIRInstruction { - @Opcode - private final SPARCArithmetic opcode; - @Def({ REG, HINT }) - protected AllocatableValue result; - @Use({ REG, STACK }) - protected AllocatableValue x; + @Opcode private final SPARCArithmetic opcode; + @Def({REG, HINT}) protected AllocatableValue result; + @Use({REG, STACK}) protected AllocatableValue x; public Unary1Op(SPARCArithmetic opcode, AllocatableValue result, AllocatableValue x) { this.opcode = opcode; @@ -153,12 +121,9 @@ public static class Op1Stack extends SPARCLIRInstruction { - @Opcode - private final SPARCArithmetic opcode; - @Def({ REG, HINT }) - protected Value result; - @Use({ REG, STACK, CONST }) - protected Value x; + @Opcode private final SPARCArithmetic opcode; + @Def({REG, HINT}) protected Value result; + @Use({REG, STACK, CONST}) protected Value x; public Op1Stack(SPARCArithmetic opcode, Value result, Value x) { this.opcode = opcode; @@ -174,14 +139,10 @@ public static class Op2Stack extends SPARCLIRInstruction { - @Opcode - private final SPARCArithmetic opcode; - @Def({ REG, HINT }) - protected Value result; - @Use({ REG, STACK, CONST }) - protected Value x; - @Alive({ REG, STACK, CONST }) - protected Value y; + @Opcode private final SPARCArithmetic opcode; + @Def({REG, HINT}) protected Value result; + @Use({REG, STACK, CONST}) protected Value x; + @Alive({REG, STACK, CONST}) protected Value y; public Op2Stack(SPARCArithmetic opcode, Value result, Value x, Value y) { this.opcode = opcode; @@ -204,14 +165,10 @@ public static class Op2Reg extends SPARCLIRInstruction { - @Opcode - private final SPARCArithmetic opcode; - @Def({ REG, HINT }) - protected Value result; - @Use({ REG, STACK, CONST }) - protected Value x; - @Alive({ REG, CONST }) - protected Value y; + @Opcode private final SPARCArithmetic opcode; + @Def({REG, HINT}) protected Value result; + @Use({REG, STACK, CONST}) protected Value x; + @Alive({REG, CONST}) protected Value y; public Op2Reg(SPARCArithmetic opcode, Value result, Value x, Value y) { this.opcode = opcode; @@ -234,14 +191,10 @@ public static class ShiftOp extends SPARCLIRInstruction { - @Opcode - private final SPARCArithmetic opcode; - @Def({ REG, HINT }) - protected Value result; - @Use({ REG, STACK, CONST }) - protected Value x; - @Alive({ REG, CONST }) - protected Value y; + @Opcode private final SPARCArithmetic opcode; + @Def({REG, HINT}) protected Value result; + @Use({REG, STACK, CONST}) protected Value x; + @Alive({REG, CONST}) protected Value y; public ShiftOp(SPARCArithmetic opcode, Value result, Value x, Value y) { this.opcode = opcode; @@ -263,213 +216,201 @@ } } - @SuppressWarnings("unused") protected static void emit(SPARCAssembler masm, SPARCArithmetic opcode, Value result) { switch (opcode) { - case L2I: - new And(masm, asIntReg(result), -1, asIntReg(result)); - break; - case I2C: - new Sll(masm, asIntReg(result), 16, asIntReg(result)); - new Srl(masm, asIntReg(result), 16, asIntReg(result)); - break; - default: - throw GraalInternalError.shouldNotReachHere("missing: " + opcode); + case L2I: + new And(asIntReg(result), -1, asIntReg(result)).emit(masm); + break; + case I2C: + new Sll(asIntReg(result), 16, asIntReg(result)).emit(masm); + new Srl(asIntReg(result), 16, asIntReg(result)).emit(masm); + break; + default: + throw GraalInternalError.shouldNotReachHere("missing: " + opcode); } } @SuppressWarnings("unused") - public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm, - SPARCArithmetic opcode, Value dst, Value src1, Value src2, LIRFrameState info) { + public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm, SPARCArithmetic opcode, Value dst, Value src1, Value src2, LIRFrameState info) { int exceptionOffset = -1; if (isConstant(src1)) { switch (opcode) { - case ISUB: - assert isSimm13(tasm.asIntConst(src1)); - new Add(masm, asIntReg(src2), -(tasm.asIntConst(src1)), asIntReg(dst)); - break; - case IAND: - throw new InternalError("NYI"); - case IDIV: - assert isSimm13(tasm.asIntConst(src1)); - throw new InternalError("NYI"); - // new Sdivx(masm, asIntReg(src1), asIntReg(src2), - // asIntReg(dst)); - case FSUB: - throw new InternalError("NYI"); - case FDIV: - throw new InternalError("NYI"); - case DSUB: - throw new InternalError("NYI"); - case DDIV: - throw new InternalError("NYI"); - default: - throw GraalInternalError.shouldNotReachHere(); + case ISUB: + assert isSimm13(tasm.asIntConst(src1)); + new Add(asIntReg(src2), -(tasm.asIntConst(src1)), asIntReg(dst)).emit(masm); + break; + case IAND: + throw new InternalError("NYI"); + case IDIV: + assert isSimm13(tasm.asIntConst(src1)); + throw new InternalError("NYI"); + // new Sdivx(masm, asIntReg(src1), asIntReg(src2), + // asIntReg(dst)); + case FSUB: + throw new InternalError("NYI"); + case FDIV: + throw new InternalError("NYI"); + case DSUB: + throw new InternalError("NYI"); + case DDIV: + throw new InternalError("NYI"); + default: + throw GraalInternalError.shouldNotReachHere(); } } else if (isConstant(src2)) { switch (opcode) { - case IADD: - assert isSimm13(tasm.asIntConst(src2)); - new Add(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case ISUB: - assert isSimm13(tasm.asIntConst(src2)); - new Sub(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case IMUL: - assert isSimm13(tasm.asIntConst(src2)); - new Mulx(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case IAND: - assert isSimm13(tasm.asIntConst(src2)); - new And(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case ISHL: - assert isSimm13(tasm.asIntConst(src2)); - new Sll(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case ISHR: - assert isSimm13(tasm.asIntConst(src2)); - new Srl(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case IUSHR: - assert isSimm13(tasm.asIntConst(src2)); - new Sra(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case IXOR: - assert isSimm13(tasm.asIntConst(src2)); - new Xor(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); - break; - case LXOR: - assert isSimm13(tasm.asIntConst(src2)); - new Add(masm, asLongReg(src1), tasm.asIntConst(src2), asLongReg(dst)); - break; - case LUSHR: - throw new InternalError("NYI"); - case FADD: - throw new InternalError("NYI"); - case FMUL: - throw new InternalError("NYI"); - case FDIV: - throw new InternalError("NYI"); - case DADD: - throw new InternalError("NYI"); - case DMUL: - throw new InternalError("NYI"); - case DDIV: - throw new InternalError("NYI"); - default: - throw GraalInternalError.shouldNotReachHere(); + case IADD: + assert isSimm13(tasm.asIntConst(src2)); + new Add(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case ISUB: + assert isSimm13(tasm.asIntConst(src2)); + new Sub(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case IMUL: + assert isSimm13(tasm.asIntConst(src2)); + new Mulx(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case IAND: + assert isSimm13(tasm.asIntConst(src2)); + new And(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case ISHL: + assert isSimm13(tasm.asIntConst(src2)); + new Sll(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case ISHR: + assert isSimm13(tasm.asIntConst(src2)); + new Srl(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case IUSHR: + assert isSimm13(tasm.asIntConst(src2)); + new Sra(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case IXOR: + assert isSimm13(tasm.asIntConst(src2)); + new Xor(asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)).emit(masm); + break; + case LXOR: + assert isSimm13(tasm.asIntConst(src2)); + new Add(asLongReg(src1), tasm.asIntConst(src2), asLongReg(dst)).emit(masm); + break; + case LUSHR: + throw new InternalError("NYI"); + case FADD: + throw new InternalError("NYI"); + case FMUL: + throw new InternalError("NYI"); + case FDIV: + throw new InternalError("NYI"); + case DADD: + throw new InternalError("NYI"); + case DMUL: + throw new InternalError("NYI"); + case DDIV: + throw new InternalError("NYI"); + default: + throw GraalInternalError.shouldNotReachHere(); } } else { switch (opcode) { - case IADD: - new Add(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case ISUB: - new Sub(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case IMUL: - new Mulx(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case IDIV: - new Sdivx(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case IAND: - new And(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case IOR: - new Or(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case IXOR: - new Xor(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case ISHL: - new Sll(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case ISHR: - new Srl(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case IUSHR: - new Sra(masm, asIntReg(src1), asIntReg(src2), asIntReg(dst)); - break; - case IREM: - throw new InternalError("NYI"); - case LADD: - new Add(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LSUB: - new Sub(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LMUL: - new Mulx(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LDIV: - new Sdivx(masm, asLongReg(src1), asLongReg(src2), - asLongReg(dst)); - break; - case LAND: - new And(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LOR: - new Or(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LXOR: - new Xor(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LSHL: - new Sll(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LSHR: - new Srl(masm, asLongReg(src1), asLongReg(src2), asLongReg(dst)); - break; - case LUSHR: - new Sra(masm, asLongReg(src1), asIntReg(src2), asLongReg(dst)); - break; - case LDIVREM: - case LUDIV: - case LUREM: - case LREM: - throw new InternalError("NYI"); - case FADD: - new Fadds(masm, asFloatReg(src1), asFloatReg(src2), - asFloatReg(dst)); - break; - case FSUB: - new Fsubs(masm, asFloatReg(src1), asFloatReg(src2), - asFloatReg(dst)); - break; - case FMUL: - new Fmuls(masm, asFloatReg(src1), asFloatReg(src2), - asFloatReg(dst)); - break; - case FDIV: - new Fdivs(masm, asFloatReg(src1), asFloatReg(src2), - asFloatReg(dst)); - break; - case FREM: - throw new InternalError("NYI"); - case DADD: - new Faddd(masm, asDoubleReg(src1), asDoubleReg(src2), - asDoubleReg(dst)); - break; - case DSUB: - new Fsubd(masm, asDoubleReg(src1), asDoubleReg(src2), - asDoubleReg(dst)); - break; - case DMUL: - new Fmuld(masm, asDoubleReg(src1), asDoubleReg(src2), - asDoubleReg(dst)); - break; - case DDIV: - new Fdivd(masm, asDoubleReg(src1), asDoubleReg(src2), - asDoubleReg(dst)); - break; - case DREM: - throw new InternalError("NYI"); - default: - throw GraalInternalError.shouldNotReachHere("missing: " - + opcode); + case IADD: + new Add(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case ISUB: + new Sub(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case IMUL: + new Mulx(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case IDIV: + new Sdivx(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case IAND: + new And(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case IOR: + new Or(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case IXOR: + new Xor(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case ISHL: + new Sll(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case ISHR: + new Srl(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case IUSHR: + new Sra(asIntReg(src1), asIntReg(src2), asIntReg(dst)).emit(masm); + break; + case IREM: + throw new InternalError("NYI"); + case LADD: + new Add(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LSUB: + new Sub(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LMUL: + new Mulx(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LDIV: + new Sdivx(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LAND: + new And(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LOR: + new Or(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LXOR: + new Xor(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LSHL: + new Sllx(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LSHR: + new Srlx(asLongReg(src1), asLongReg(src2), asLongReg(dst)).emit(masm); + break; + case LUSHR: + new Srax(asLongReg(src1), asIntReg(src2), asLongReg(dst)).emit(masm); + break; + case LDIVREM: + case LUDIV: + case LUREM: + case LREM: + throw new InternalError("NYI"); + case FADD: + new Fadds(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst)); + break; + case FSUB: + new Fsubs(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst)); + break; + case FMUL: + new Fmuls(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst)); + break; + case FDIV: + new Fdivs(masm, asFloatReg(src1), asFloatReg(src2), asFloatReg(dst)); + break; + case FREM: + throw new InternalError("NYI"); + case DADD: + new Faddd(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst)); + break; + case DSUB: + new Fsubd(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst)); + break; + case DMUL: + new Fmuld(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst)); + break; + case DDIV: + new Fdivd(masm, asDoubleReg(src1), asDoubleReg(src2), asDoubleReg(dst)); + break; + case DREM: + throw new InternalError("NYI"); + default: + throw GraalInternalError.shouldNotReachHere("missing: " + opcode); } } @@ -480,51 +421,47 @@ } @SuppressWarnings("unused") - public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm, - SPARCArithmetic opcode, Value dst, Value src, LIRFrameState info) { + public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm, SPARCArithmetic opcode, Value dst, Value src, LIRFrameState info) { int exceptionOffset = -1; if (isRegister(src)) { switch (opcode) { - case I2L: - new Sra(masm, asIntReg(src), 0, asLongReg(dst)); - break; - case I2B: - new Sll(masm, asIntReg(src), 24, asIntReg(src)); - new Srl(masm, asIntReg(dst), 24, asIntReg(src)); - break; - case I2F: - new Fstoi(masm, asIntReg(src), asFloatReg(dst)); - break; - case I2D: - new Fdtoi(masm, asIntReg(src), asDoubleReg(dst)); - break; - case FNEG: - new Fnegs(masm, asFloatReg(src), asFloatReg(dst)); - break; - case DNEG: - new Fnegd(masm, asDoubleReg(src), asDoubleReg(dst)); - break; - case LSHL: - new Sllx(masm, asLongReg(dst), asIntReg(src), asLongReg(dst)); - break; - case LSHR: - new Srlx(masm, asLongReg(dst), asIntReg(src), asLongReg(dst)); - break; - default: - throw GraalInternalError.shouldNotReachHere("missing: " - + opcode); + case I2L: + new Sra(asIntReg(src), 0, asLongReg(dst)).emit(masm); + break; + case I2B: + new Sll(asIntReg(src), 24, asIntReg(src)).emit(masm); + new Srl(asIntReg(dst), 24, asIntReg(src)).emit(masm); + break; + case I2F: + new Fstoi(masm, asIntReg(src), asFloatReg(dst)); + break; + case I2D: + new Fdtoi(masm, asIntReg(src), asDoubleReg(dst)); + break; + case FNEG: + new Fnegs(masm, asFloatReg(src), asFloatReg(dst)); + break; + case DNEG: + new Fnegd(masm, asDoubleReg(src), asDoubleReg(dst)); + break; + case LSHL: + new Sllx(asLongReg(dst), asIntReg(src), asLongReg(dst)).emit(masm); + break; + case LSHR: + new Srlx(asLongReg(dst), asIntReg(src), asLongReg(dst)).emit(masm); + break; + default: + throw GraalInternalError.shouldNotReachHere("missing: " + opcode); } } else if (isConstant(src)) { switch (opcode) { - default: - throw GraalInternalError.shouldNotReachHere("missing: " - + opcode); + default: + throw GraalInternalError.shouldNotReachHere("missing: " + opcode); } } else { switch (opcode) { - default: - throw GraalInternalError.shouldNotReachHere("missing: " - + opcode); + default: + throw GraalInternalError.shouldNotReachHere("missing: " + opcode); } } @@ -542,64 +479,60 @@ Kind ysk; switch (opcode) { - case IADD: - case ISUB: - case IMUL: - case IDIV: - case IREM: - case IAND: - case IOR: - case IXOR: - case ISHL: - case ISHR: - case IUSHR: - rk = result.getKind(); - xsk = x.getKind().getStackKind(); - ysk = y.getKind().getStackKind(); - - assert rk == Kind.Int && xsk == Kind.Int && ysk == Kind.Int; - break; - case LADD: - case LSUB: - case LMUL: - case LDIV: - case LREM: - case LAND: - case LOR: - case LXOR: - case LSHL: - case LSHR: - case LUSHR: - rk = result.getKind(); - xk = x.getKind(); - yk = y.getKind(); - - assert rk == Kind.Long && xk == Kind.Long && yk == Kind.Long; - break; - case FADD: - case FSUB: - case FMUL: - case FDIV: - case FREM: - rk = result.getKind(); - xk = x.getKind(); - yk = y.getKind(); - - assert rk == Kind.Float && xk == Kind.Float && yk == Kind.Float; - break; - case DADD: - case DSUB: - case DMUL: - case DDIV: - case DREM: - rk = result.getKind(); - xk = x.getKind(); - yk = y.getKind(); - - assert rk == Kind.Double && xk == Kind.Double && yk == Kind.Double; - break; - default: - throw new InternalError("NYI: " + opcode); + case IADD: + case ISUB: + case IMUL: + case IDIV: + case IREM: + case IAND: + case IOR: + case IXOR: + case ISHL: + case ISHR: + case IUSHR: + rk = result.getKind(); + xsk = x.getKind().getStackKind(); + ysk = y.getKind().getStackKind(); + assert rk == Kind.Int && xsk == Kind.Int && ysk == Kind.Int; + break; + case LADD: + case LSUB: + case LMUL: + case LDIV: + case LREM: + case LAND: + case LOR: + case LXOR: + case LSHL: + case LSHR: + case LUSHR: + rk = result.getKind(); + xk = x.getKind(); + yk = y.getKind(); + assert rk == Kind.Long && xk == Kind.Long && yk == Kind.Long; + break; + case FADD: + case FSUB: + case FMUL: + case FDIV: + case FREM: + rk = result.getKind(); + xk = x.getKind(); + yk = y.getKind(); + assert rk == Kind.Float && xk == Kind.Float && yk == Kind.Float; + break; + case DADD: + case DSUB: + case DMUL: + case DDIV: + case DREM: + rk = result.getKind(); + xk = x.getKind(); + yk = y.getKind(); + assert rk == Kind.Double && xk == Kind.Double && yk == Kind.Double; + break; + default: + throw new InternalError("NYI: " + opcode); } } }
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCBitManipulationOp.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCBitManipulationOp.java Sun Jun 23 15:49:09 2013 +0200 @@ -22,16 +22,9 @@ */ package com.oracle.graal.lir.sparc; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Andn; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Ldsw; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Or; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Popc; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Srl; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Srlx; -import static com.oracle.graal.asm.sparc.SPARCAssembler.Sub; -import static com.oracle.graal.asm.sparc.SPARCAssembler.isSimm13; -import static com.oracle.graal.asm.sparc.SPARCMacroAssembler.Mov; +import static com.oracle.graal.asm.sparc.SPARCAssembler.*; +import static com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; +import static com.oracle.graal.sparc.SPARC.*; import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; @@ -58,7 +51,6 @@ } @Override - @SuppressWarnings("unused") public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { Register dst = ValueUtil.asIntReg(result); Register tmp = null; // ?? @@ -67,25 +59,25 @@ switch (opcode) { case IPOPCNT: // clear upper word for 64 bit POPC - new Srl(masm, src, SPARC.g0, dst); - new Popc(masm, src, dst); + new Srl(src, SPARC.g0, dst).emit(masm); + new Popc(src, dst).emit(masm); break; case LPOPCNT: - new Popc(masm, src, dst); + new Popc(src, dst).emit(masm); break; case BSF: // countTrailingZerosI - bsfl // countTrailingZerosL - masm.bsfq(dst, src); Kind tkind = input.getKind(); if (tkind == Kind.Int) { - new Sub(masm, src, 1, dst); - new Andn(masm, dst, src, dst); - new Srl(masm, dst, SPARC.g0, dst); - new Popc(masm, dst, dst); + new Sub(src, 1, dst).emit(masm); + new Andn(dst, src, dst).emit(masm); + new Srl(dst, SPARC.g0, dst).emit(masm); + new Popc(dst, dst).emit(masm); } else if (tkind == Kind.Long) { - new Sub(masm, src, 1, dst); - new Andn(masm, dst, src, dst); - new Popc(masm, dst, dst); + new Sub(src, 1, dst).emit(masm); + new Andn(dst, src, dst).emit(masm); + new Popc(dst, dst).emit(masm); } else { throw GraalInternalError.shouldNotReachHere("missing: " + tkind); } @@ -95,41 +87,41 @@ // masm.bsrl(dst, src); Kind ikind = input.getKind(); assert ikind == Kind.Int; - new Srl(masm, src, 1, tmp); - new Srl(masm, src, 0, dst); - new Or(masm, src, tmp, dst); - new Srl(masm, dst, 2, tmp); - new Or(masm, dst, tmp, dst); - new Srl(masm, dst, 4, tmp); - new Or(masm, dst, tmp, dst); - new Srl(masm, dst, 8, tmp); - new Or(masm, dst, tmp, dst); - new Srl(masm, dst, 16, tmp); - new Or(masm, dst, tmp, dst); - new Popc(masm, dst, dst); - new Mov(masm, ikind.getBitCount(), tmp); - new Sub(masm, tmp, dst, dst); + new Srl(src, 1, tmp).emit(masm); + new Srl(src, 0, dst).emit(masm); + new Or(src, tmp, dst).emit(masm); + new Srl(dst, 2, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srl(dst, 4, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srl(dst, 8, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srl(dst, 16, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Popc(dst, dst).emit(masm); + new Mov(ikind.getBitCount(), tmp).emit(masm); + new Sub(tmp, dst, dst).emit(masm); break; case LBSR: // countLeadingZerosL_bsr masm.bsrq(dst, src); // masm.bsrq(dst, src); Kind lkind = input.getKind(); assert lkind == Kind.Int; - new Srlx(masm, src, 1, tmp); - new Or(masm, src, tmp, dst); - new Srlx(masm, dst, 2, tmp); - new Or(masm, dst, tmp, dst); - new Srlx(masm, dst, 4, tmp); - new Or(masm, dst, tmp, dst); - new Srlx(masm, dst, 8, tmp); - new Or(masm, dst, tmp, dst); - new Srlx(masm, dst, 16, tmp); - new Or(masm, dst, tmp, dst); - new Srlx(masm, dst, 32, tmp); - new Or(masm, dst, tmp, dst); - new Popc(masm, dst, dst); - new Mov(masm, lkind.getBitCount(), tmp); - new Sub(masm, tmp, dst, dst); + new Srlx(src, 1, tmp).emit(masm); + new Or(src, tmp, dst).emit(masm); + new Srlx(dst, 2, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srlx(dst, 4, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srlx(dst, 8, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srlx(dst, 16, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srlx(dst, 32, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Popc(dst, dst).emit(masm); + new Mov(lkind.getBitCount(), tmp).emit(masm); + new Sub(tmp, dst, dst).emit(masm); break; default: throw GraalInternalError.shouldNotReachHere("missing: " + opcode); @@ -138,10 +130,10 @@ } else if (ValueUtil.isConstant(input) && isSimm13(tasm.asIntConst(input))) { switch (opcode) { case IPOPCNT: - new Popc(masm, tasm.asIntConst(input), dst); + new Popc(tasm.asIntConst(input), dst).emit(masm); break; case LPOPCNT: - new Popc(masm, tasm.asIntConst(input), dst); + new Popc(tasm.asIntConst(input), dst).emit(masm); break; default: throw GraalInternalError.shouldNotReachHere("missing: " + opcode); @@ -150,32 +142,32 @@ SPARCAddress src = (SPARCAddress) tasm.asAddress(input); switch (opcode) { case IPOPCNT: - new Ldsw(masm, src, tmp); + new Ldsw(src, tmp).emit(masm); // clear upper word for 64 bit POPC - new Srl(masm, tmp, SPARC.g0, dst); - new Popc(masm, tmp, dst); + new Srl(tmp, g0, dst).emit(masm); + new Popc(tmp, dst).emit(masm); break; case LPOPCNT: - new Ldx(masm, src, tmp); - new Popc(masm, tmp, dst); + new Ldx(src, tmp).emit(masm); + new Popc(tmp, dst).emit(masm); break; case BSF: assert input.getKind() == Kind.Int; - new Ldsw(masm, src, tmp); - new Srl(masm, tmp, 1, tmp); - new Srl(masm, tmp, 0, dst); - new Or(masm, tmp, tmp, dst); - new Srl(masm, dst, 2, tmp); - new Or(masm, dst, tmp, dst); - new Srl(masm, dst, 4, tmp); - new Or(masm, dst, tmp, dst); - new Srl(masm, dst, 8, tmp); - new Or(masm, dst, tmp, dst); - new Srl(masm, dst, 16, tmp); - new Or(masm, dst, tmp, dst); - new Popc(masm, dst, dst); - new Mov(masm, Kind.Int.getBitCount(), tmp); - new Sub(masm, tmp, dst, dst); + new Ldsw(src, tmp).emit(masm); + new Srl(tmp, 1, tmp).emit(masm); + new Srl(tmp, 0, dst).emit(masm); + new Or(tmp, tmp, dst).emit(masm); + new Srl(dst, 2, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srl(dst, 4, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srl(dst, 8, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Srl(dst, 16, tmp).emit(masm); + new Or(dst, tmp, dst).emit(masm); + new Popc(dst, dst).emit(masm); + new Mov(Kind.Int.getBitCount(), tmp).emit(masm); + new Sub(tmp, dst, dst).emit(masm); break; case IBSR: // masm.bsrl(dst, src);
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCCompare.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCCompare.java Sun Jun 23 15:49:09 2013 +0200 @@ -23,25 +23,24 @@ package com.oracle.graal.lir.sparc; import static com.oracle.graal.api.code.ValueUtil.*; -import static com.oracle.graal.asm.sparc.SPARCAssembler.isSimm13; +import static com.oracle.graal.asm.sparc.SPARCAssembler.*; import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; import com.oracle.graal.api.meta.*; -import com.oracle.graal.asm.sparc.SPARCAssembler; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cmp; +import com.oracle.graal.asm.sparc.*; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; import com.oracle.graal.graph.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; -//@formatter:off public enum SPARCCompare { ICMP, LCMP, ACMP, FCMP, DCMP; public static class CompareOp extends SPARCLIRInstruction { @Opcode private final SPARCCompare opcode; - @Use({REG, STACK, CONST}) protected Value x; - @Use({REG, STACK, CONST}) protected Value y; + @Use({REG}) protected Value x; + @Use({REG, CONST}) protected Value y; public CompareOp(SPARCCompare opcode, Value x, Value y) { this.opcode = opcode; @@ -57,79 +56,58 @@ @Override protected void verify() { super.verify(); - assert (name().startsWith("I") && x.getKind() == Kind.Int && y.getKind().getStackKind() == Kind.Int) - || (name().startsWith("L") && x.getKind() == Kind.Long && y.getKind() == Kind.Long) - || (name().startsWith("A") && x.getKind() == Kind.Object && y.getKind() == Kind.Object) - || (name().startsWith("F") && x.getKind() == Kind.Float && y.getKind() == Kind.Float) - || (name().startsWith("D") && x.getKind() == Kind.Double && y.getKind() == Kind.Double); + assert (name().startsWith("I") && x.getKind() == Kind.Int && y.getKind().getStackKind() == Kind.Int) || (name().startsWith("L") && x.getKind() == Kind.Long && y.getKind() == Kind.Long) || + (name().startsWith("A") && x.getKind() == Kind.Object && y.getKind() == Kind.Object) || + (name().startsWith("F") && x.getKind() == Kind.Float && y.getKind() == Kind.Float) || (name().startsWith("D") && x.getKind() == Kind.Double && y.getKind() == Kind.Double); } } - @SuppressWarnings("unused") public static void emit(TargetMethodAssembler tasm, SPARCAssembler masm, SPARCCompare opcode, Value x, Value y) { if (isRegister(y)) { switch (opcode) { case ICMP: - new Cmp(masm, asIntReg(x), asIntReg(y)); + new Cmp(asIntReg(x), asIntReg(y)).emit(masm); break; case LCMP: - new Cmp(masm, asLongReg(x), asLongReg(y)); + new Cmp(asLongReg(x), asLongReg(y)).emit(masm); break; case ACMP: // masm.cmpptr(asObjectReg(x), asObjectReg(y)); - break; + // break; case FCMP: // masm.ucomiss(asFloatReg(x), asFloatReg(y)); - break; + // break; case DCMP: // masm.ucomisd(asDoubleReg(x), asDoubleReg(y)); - break; + // break; default: throw GraalInternalError.shouldNotReachHere(); } - } else if (isConstant(y)) { + } else { + assert isConstant(y); switch (opcode) { case ICMP: assert isSimm13(tasm.asIntConst(y)); - new Cmp(masm, asIntReg(x), tasm.asIntConst(y)); + new Cmp(asIntReg(x), tasm.asIntConst(y)).emit(masm); break; case LCMP: assert isSimm13(tasm.asIntConst(y)); - new Cmp(masm, asLongReg(x), tasm.asIntConst(y)); + new Cmp(asLongReg(x), tasm.asIntConst(y)).emit(masm); break; case ACMP: if (((Constant) y).isNull()) { // masm.cmpq(asObjectReg(x), 0); - break; + // break; + throw GraalInternalError.shouldNotReachHere(); } else { throw GraalInternalError.shouldNotReachHere("Only null object constants are allowed in comparisons"); } case FCMP: // masm.ucomiss(asFloatReg(x), (AMD64Address) tasm.asFloatConstRef(y)); - break; + // break; case DCMP: // masm.ucomisd(asDoubleReg(x), (AMD64Address) tasm.asDoubleConstRef(y)); - break; - default: - throw GraalInternalError.shouldNotReachHere(); - } - } else { - switch (opcode) { - case ICMP: - // masm.cmpl(asIntReg(x), (AMD64Address) tasm.asIntAddr(y)); - break; - case LCMP: - // masm.cmpq(asLongReg(x), (AMD64Address) tasm.asLongAddr(y)); - break; - case ACMP: - // masm.cmpptr(asObjectReg(x), (AMD64Address) tasm.asObjectAddr(y)); - break; - case FCMP: - // masm.ucomiss(asFloatReg(x), (AMD64Address) tasm.asFloatAddr(y)); - break; - case DCMP: - // masm.ucomisd(asDoubleReg(x), (AMD64Address) tasm.asDoubleAddr(y)); - break; + // break; default: throw GraalInternalError.shouldNotReachHere(); }
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCControlFlow.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCControlFlow.java Sun Jun 23 15:49:09 2013 +0200 @@ -30,16 +30,14 @@ import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Bpe; -import com.oracle.graal.asm.sparc.SPARCAssembler.CC; -import com.oracle.graal.asm.sparc.SPARCAssembler.ConditionFlag; -import com.oracle.graal.asm.sparc.SPARCAssembler.Subcc; +import com.oracle.graal.asm.sparc.SPARCAssembler.*; import com.oracle.graal.graph.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.StandardOp.FallThroughOp; import com.oracle.graal.lir.asm.*; import com.oracle.graal.nodes.calc.*; -import com.oracle.graal.sparc.*; + +import static com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; public class SPARCControlFlow { @@ -54,13 +52,16 @@ } @Override - @SuppressWarnings("unused") public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { - // masm.at(); - Label l = destination.label(); - // l.addPatchAt(tasm.asm.codeBuffer.position()); - String target = l.isBound() ? "L" + l.toString() : AbstractSPARCAssembler.UNBOUND_TARGET; - // masm.bra(target); + switch (condition) { + case GT: + // FIXME xcc is wrong! It depends on the compare. + new Bpg(CC.Xcc, destination.label()).emit(masm); + break; + default: + throw GraalInternalError.shouldNotReachHere(); + } + new Nop().emit(masm); // delay slot } @Override @@ -136,32 +137,19 @@ } } - @SuppressWarnings("unused") private static void cmove(TargetMethodAssembler tasm, SPARCAssembler masm, Value result, ConditionFlag cond, Value other) { - if (isRegister(other)) { - assert !asRegister(other).equals(asRegister(result)) : "other already overwritten by previous move"; - switch (other.getKind()) { - case Int: - // masm.cmovl(cond, asRegister(result), asRegister(other)); - break; - case Long: - // masm.cmovq(cond, asRegister(result), asRegister(other)); - break; - default: - throw GraalInternalError.shouldNotReachHere(); - } - } else { - SPARCAddress addr = (SPARCAddress) tasm.asAddress(other); - switch (other.getKind()) { - case Int: - // masm.cmovl(cond, asRegister(result), addr); - break; - case Long: - // masm.cmovq(cond, asRegister(result), addr); - break; - default: - throw GraalInternalError.shouldNotReachHere(); - } + if (!isRegister(other)) { + SPARCMove.move(tasm, masm, result, other); + throw new InternalError("result should be scratch"); + } + assert !asRegister(other).equals(asRegister(result)) : "other already overwritten by previous move"; + switch (other.getKind()) { + case Int: + new Movcc(cond, CC.Icc, asRegister(other), asRegister(result)).emit(masm); + throw new InternalError("check instruction"); + case Long: + default: + throw GraalInternalError.shouldNotReachHere(); } } @@ -226,10 +214,9 @@ @Override public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { - if (tasm.frameContext != null) { - tasm.frameContext.leave(tasm); - } - // masm.return(); + new Ret().emit(masm); + // On SPARC we always leave the frame. + tasm.frameContext.leave(tasm); } } @@ -261,10 +248,10 @@ } long lc = keyConstants[i].asLong(); assert NumUtil.isInt(lc); - new Subcc(masm, intKey, (int) lc, SPARC.r0); // CMP + new Cmp(intKey, (int) lc).emit(masm); Label l = keyTargets[i].label(); l.addPatchAt(tasm.asm.codeBuffer.position()); - new Bpe(masm, CC.Icc, l); + new Bpe(CC.Icc, l).emit(masm); } } else if (key.getKind() == Kind.Long) { Register longKey = asLongReg(key); @@ -274,15 +261,15 @@ // masm.at(); Label l = keyTargets[i].label(); l.addPatchAt(tasm.asm.codeBuffer.position()); - new Bpe(masm, CC.Xcc, l); + new Bpe(CC.Xcc, l).emit(masm); } } else if (key.getKind() == Kind.Object) { Register intKey = asObjectReg(key); Register temp = asObjectReg(scratch); for (int i = 0; i < keyConstants.length; i++) { SPARCMove.move(tasm, masm, temp.asValue(Kind.Object), keyConstants[i]); - new Subcc(masm, intKey, temp, SPARC.r0); // CMP - new Bpe(masm, CC.Icc, keyTargets[i].label()); + new Cmp(intKey, temp).emit(masm); + new Bpe(CC.Ptrcc, keyTargets[i].label()).emit(masm); } } else { throw new GraalInternalError("sequential switch only supported for int, long and object"); @@ -325,7 +312,6 @@ public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { assert isSorted(lowKeys) && isSorted(highKeys); - @SuppressWarnings("unused") Label actualDefaultTarget = defaultTarget == null ? new Label() : defaultTarget.label(); int prevHighKey = 0; boolean skipLowCheck = false; @@ -348,11 +334,12 @@ prevHighKey = highKey; } if (defaultTarget != null) { - // masm.jmp(defaultTarget.label()); + new Bpa(defaultTarget.label()).emit(masm); } else { - // masm.bind(actualDefaultTarget); + masm.bind(actualDefaultTarget); // masm.hlt(); } + throw new InternalError("NYI"); } @Override @@ -405,14 +392,13 @@ } } - @SuppressWarnings("unused") private static void tableswitch(TargetMethodAssembler tasm, SPARCAssembler masm, int lowKey, LabelRef defaultTarget, LabelRef[] targets, Register value, Register scratch) { Buffer buf = masm.codeBuffer; // Compare index against jump table bounds int highKey = lowKey + targets.length - 1; if (lowKey != 0) { // subtract the low value from the switch value - // masm.sub_s32(value, value, lowKey); + new Sub(value, lowKey, value).emit(masm); // masm.setp_gt_s32(value, highKey - lowKey); } else { // masm.setp_gt_s32(value, highKey); @@ -420,10 +406,16 @@ // Jump to default target if index is not within the jump table if (defaultTarget != null) { - // masm.at(); - // masm.bra(defaultTarget.label().toString()); + new Bpgu(CC.Icc, defaultTarget.label()).emit(masm); + new Nop().emit(masm); // delay slot } + // Load jump table entry into scratch and jump to it +// masm.movslq(value, new AMD64Address(scratch, value, Scale.Times4, 0)); +// masm.addq(scratch, value); + new Jmp(new SPARCAddress(scratch, 0)).emit(masm); + new Nop().emit(masm); // delay slot + // address of jump table int tablePos = buf.position(); @@ -431,5 +423,6 @@ tasm.compilationResult.addAnnotation(jt); // SPARC: unimp: tableswitch extract + throw new InternalError("NYI"); } }
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCMove.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCMove.java Sun Jun 23 15:49:09 2013 +0200 @@ -28,27 +28,14 @@ import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lddf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldf; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldsb; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldsh; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldsw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Lduw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; -import com.oracle.graal.asm.sparc.SPARCAssembler.Membar; -import com.oracle.graal.asm.sparc.SPARCAssembler.NullCheck; -import com.oracle.graal.asm.sparc.SPARCAssembler.Or; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stb; -import com.oracle.graal.asm.sparc.SPARCAssembler.Sth; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Setuw; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Setx; +import com.oracle.graal.asm.sparc.SPARCAssembler.*; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; import com.oracle.graal.graph.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.StandardOp.MoveOp; import com.oracle.graal.lir.asm.*; -import com.oracle.graal.sparc.*; + +import static com.oracle.graal.sparc.SPARC.*; public class SPARCMove { @@ -67,33 +54,32 @@ } @Override - @SuppressWarnings("unused") public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { SPARCAddress addr = address.toAddress(); switch (kind) { case Byte: - new Ldsb(masm, addr, asRegister(result)); + new Ldsb(addr, asRegister(result)).emit(masm); break; case Short: - new Ldsh(masm, addr, asRegister(result)); + new Ldsh(addr, asRegister(result)).emit(masm); break; case Char: - new Lduw(masm, addr, asRegister(result)); + new Lduw(addr, asRegister(result)).emit(masm); break; case Int: - new Ldsw(masm, addr, asRegister(result)); + new Ldsw(addr, asRegister(result)).emit(masm); break; case Long: - new Ldx(masm, addr, asRegister(result)); + new Ldx(addr, asRegister(result)).emit(masm); break; case Float: - new Ldf(masm, addr, asRegister(result)); + new Ldf(addr, asRegister(result)).emit(masm); break; case Double: - new Lddf(masm, addr, asRegister(result)); + new Lddf(addr, asRegister(result)).emit(masm); break; case Object: - new Ldx(masm, addr, asRegister(result)); + new Ldx(addr, asRegister(result)).emit(masm); break; default: throw GraalInternalError.shouldNotReachHere(); @@ -101,7 +87,6 @@ } } - @SuppressWarnings("unused") public static class MembarOp extends SPARCLIRInstruction { private final int barriers; @@ -112,7 +97,7 @@ @Override public void emitCode(TargetMethodAssembler tasm, SPARCAssembler asm) { - new Membar(asm, barriers); + new Membar(barriers).emit(asm); } } @@ -184,11 +169,10 @@ @SuppressWarnings("unused") public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { tasm.recordImplicitException(masm.codeBuffer.position(), state); - new NullCheck(masm, new SPARCAddress(asRegister(input), 0)); + new Ldx(new SPARCAddress(asRegister(input), 0), r0); } } - @SuppressWarnings("unused") public static class StackLoadAddressOp extends SPARCLIRInstruction { @Def({REG}) protected AllocatableValue result; @@ -201,7 +185,7 @@ @Override public void emitCode(TargetMethodAssembler tasm, SPARCAssembler asm) { - new Ldx(asm, (SPARCAddress) tasm.asAddress(slot), asLongReg(result)); + new Ldx((SPARCAddress) tasm.asAddress(slot), asLongReg(result)).emit(asm); } } @@ -220,32 +204,27 @@ } @Override - @SuppressWarnings("unused") public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { assert isRegister(input); SPARCAddress addr = address.toAddress(); switch (kind) { case Byte: - new Stb(masm, asRegister(input), addr); + new Stb(asRegister(input), addr).emit(masm); break; case Short: - new Sth(masm, asRegister(input), addr); + new Sth(asRegister(input), addr).emit(masm); break; case Int: - new Stw(masm, asRegister(input), addr); + new Stw(asRegister(input), addr).emit(masm); break; case Long: - new Stx(masm, asRegister(input), addr); + new Stx(asRegister(input), addr).emit(masm); + break; + case Object: + new Stx(asRegister(input), addr).emit(masm); break; case Float: - new Stx(masm, asRegister(input), addr); - break; case Double: - new Stx(masm, asRegister(input), addr); - break; - case Object: - new Stx(masm, asRegister(input), addr); - break; default: throw GraalInternalError.shouldNotReachHere("missing: " + address.getKind()); } @@ -270,27 +249,20 @@ } } - @SuppressWarnings("unused") private static void reg2reg(SPARCAssembler masm, Value result, Value input) { if (asRegister(input).equals(asRegister(result))) { return; } switch (input.getKind()) { case Int: - new Or(masm, SPARC.r0, asRegister(input), asRegister(result)); + new Mov(asRegister(input), asRegister(result)).emit(masm); break; case Long: - new Or(masm, SPARC.r0, asRegister(input), asRegister(result)); + new Mov(asRegister(input), asRegister(result)).emit(masm); break; case Float: - new Or(masm, SPARC.r0, asRegister(input), asRegister(result)); - break; case Double: - new Or(masm, SPARC.r0, asRegister(input), asRegister(result)); - break; case Object: - new Or(masm, SPARC.r0, asRegister(input), asRegister(result)); - break; default: throw GraalInternalError.shouldNotReachHere("missing: " + input.getKind()); }
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCTestOp.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCTestOp.java Sun Jun 23 15:49:09 2013 +0200 @@ -27,9 +27,8 @@ import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldsw; -import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cmp; +import com.oracle.graal.asm.sparc.SPARCAssembler.*; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; import com.oracle.graal.graph.*; import com.oracle.graal.lir.asm.*; @@ -44,15 +43,14 @@ } @Override - @SuppressWarnings("unused") - public void emitCode(TargetMethodAssembler tasm, SPARCAssembler asm) { + public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { if (isRegister(y)) { switch (x.getKind()) { case Int: - new Cmp(asm, asIntReg(x), asIntReg(y)); + new Cmp(asIntReg(x), asIntReg(y)).emit(masm); break; case Long: - new Cmp(asm, asLongReg(x), asLongReg(y)); + new Cmp(asLongReg(x), asLongReg(y)).emit(masm); break; default: throw GraalInternalError.shouldNotReachHere(); @@ -60,10 +58,10 @@ } else if (isConstant(y)) { switch (x.getKind()) { case Int: - new Cmp(asm, asIntReg(x), tasm.asIntConst(y)); + new Cmp(asIntReg(x), tasm.asIntConst(y)).emit(masm); break; case Long: - new Cmp(asm, asLongReg(x), tasm.asIntConst(y)); + new Cmp(asLongReg(x), tasm.asIntConst(y)).emit(masm); break; default: throw GraalInternalError.shouldNotReachHere(); @@ -71,12 +69,12 @@ } else { switch (x.getKind()) { case Int: - new Ldsw(asm, (SPARCAddress) tasm.asIntAddr(y), asIntReg(y)); - new Cmp(asm, asIntReg(x), asIntReg(y)); + new Ldsw((SPARCAddress) tasm.asIntAddr(y), asIntReg(y)).emit(masm); + new Cmp(asIntReg(x), asIntReg(y)).emit(masm); break; case Long: - new Ldx(asm, (SPARCAddress) tasm.asLongAddr(y), asLongReg(y)); - new Cmp(asm, asLongReg(x), asLongReg(y)); + new Ldx((SPARCAddress) tasm.asLongAddr(y), asLongReg(y)).emit(masm); + new Cmp(asLongReg(x), asLongReg(y)).emit(masm); break; default: throw GraalInternalError.shouldNotReachHere();
--- a/graal/com.oracle.graal.sparc/src/com/oracle/graal/sparc/SPARC.java Sun Jun 23 15:49:01 2013 +0200 +++ b/graal/com.oracle.graal.sparc/src/com/oracle/graal/sparc/SPARC.java Sun Jun 23 15:49:09 2013 +0200 @@ -83,6 +83,24 @@ public static final Register g6 = r6; public static final Register g7 = r7; + public static final Register o0 = r8; + public static final Register o1 = r9; + public static final Register o2 = r10; + public static final Register o3 = r11; + public static final Register o4 = r12; + public static final Register o5 = r13; + public static final Register o6 = r14; + public static final Register o7 = r15; + + public static final Register l0 = r16; + public static final Register l1 = r17; + public static final Register l2 = r18; + public static final Register l3 = r19; + public static final Register l4 = r20; + public static final Register l5 = r21; + public static final Register l6 = r22; + public static final Register l7 = r23; + public static final Register i0 = r24; public static final Register i1 = r25; public static final Register i2 = r26; @@ -92,14 +110,8 @@ public static final Register i6 = r30; public static final Register i7 = r31; - public static final Register o0 = r8; - public static final Register o1 = r9; - public static final Register o2 = r10; - public static final Register o3 = r11; - public static final Register o4 = r12; - public static final Register o5 = r13; - public static final Register o6 = r14; - public static final Register o7 = r15; + public static final Register fp = i6; + public static final Register sp = o6; public static final Register[] gprRegisters = { r0, r1, r2, r3, r4, r5, r6, r7, @@ -129,19 +141,47 @@ }; public SPARC() { - super("SPARC", 8, ByteOrder.LITTLE_ENDIAN, allRegisters, LOAD_STORE | STORE_STORE, 1, 0, 8); - // SPARC: Fix architecture parameters. + super("SPARC", + 8, + ByteOrder.BIG_ENDIAN, + allRegisters, + LOAD_STORE | STORE_STORE, + 1, + r31.encoding + 1, + 8); } @Override - public boolean canStoreValue(RegisterCategory category, PlatformKind kind) { - // TODO Auto-generated method stub + public boolean canStoreValue(RegisterCategory category, PlatformKind platformKind) { + if (!(platformKind instanceof Kind)) { + return false; + } + + Kind kind = (Kind) platformKind; + if (category == CPU) { + switch (kind) { + case Boolean: + case Byte: + case Char: + case Short: + case Int: + case Long: + case Object: + return true; + } + } else if (category == FPU) { + switch (kind) { + case Float: + case Double: + return true; + } + } + return false; } @Override public PlatformKind getLargestStorableKind(RegisterCategory category) { - // TODO Auto-generated method stub - return null; + throw new InternalError("NYI"); } }
--- a/make/Makefile Sun Jun 23 15:49:01 2013 +0200 +++ b/make/Makefile Sun Jun 23 15:49:09 2013 +0200 @@ -164,6 +164,7 @@ # Output directories C1_DIR =$(OUTPUTDIR)/$(VM_PLATFORM)_compiler1 C2_DIR =$(OUTPUTDIR)/$(VM_PLATFORM)_compiler2 +GRAAL_DIR =$(OUTPUTDIR)/$(VM_PLATFORM)_graal MINIMAL1_DIR=$(OUTPUTDIR)/$(VM_PLATFORM)_minimal1 ZERO_DIR =$(OUTPUTDIR)/$(VM_PLATFORM)_zero SHARK_DIR =$(OUTPUTDIR)/$(VM_PLATFORM)_shark @@ -309,11 +310,12 @@ DOCS_DIR=$(OUTPUTDIR)/$(VM_PLATFORM)_docs C1_BUILD_DIR =$(C1_DIR)/$(BUILD_FLAVOR) C2_BUILD_DIR =$(C2_DIR)/$(BUILD_FLAVOR) +GRAAL_BUILD_DIR =$(GRAAL_DIR)/$(BUILD_FLAVOR) MINIMAL1_BUILD_DIR=$(MINIMAL1_DIR)/$(BUILD_FLAVOR) ZERO_BUILD_DIR =$(ZERO_DIR)/$(BUILD_FLAVOR) SHARK_BUILD_DIR =$(SHARK_DIR)/$(BUILD_FLAVOR) -# Server (C2) +# Server (C2) and Graal ifeq ($(JVM_VARIANT_SERVER), true) # Common $(EXPORT_SERVER_DIR)/%.diz: $(C2_BUILD_DIR)/%.diz @@ -356,6 +358,49 @@ $(install-file) $(EXPORT_SERVER_DIR)/64/%.diz: $(C2_BUILD_DIR)/%.diz $(install-file) + +# Graal +# Common +$(EXPORT_SERVER_DIR)/%.diz: $(GRAAL_BUILD_DIR)/%.diz + $(install-file) +$(EXPORT_LIB_DIR)/%.jar: $(GRAAL_BUILD_DIR)/../generated/%.jar + $(install-file) +$(EXPORT_INCLUDE_DIR)/%: $(GRAAL_BUILD_DIR)/../generated/jvmtifiles/% + $(install-file) +# Windows +$(EXPORT_SERVER_DIR)/%.dll: $(GRAAL_BUILD_DIR)/%.dll + $(install-file) +$(EXPORT_SERVER_DIR)/%.pdb: $(GRAAL_BUILD_DIR)/%.pdb + $(install-file) +$(EXPORT_SERVER_DIR)/%.map: $(GRAAL_BUILD_DIR)/%.map + $(install-file) +$(EXPORT_LIB_DIR)/%.lib: $(GRAAL_BUILD_DIR)/%.lib + $(install-file) +$(EXPORT_JRE_BIN_DIR)/%.diz: $(GRAAL_BUILD_DIR)/%.diz + $(install-file) +$(EXPORT_JRE_BIN_DIR)/%.dll: $(GRAAL_BUILD_DIR)/%.dll + $(install-file) +$(EXPORT_JRE_BIN_DIR)/%.pdb: $(GRAAL_BUILD_DIR)/%.pdb + $(install-file) +$(EXPORT_JRE_BIN_DIR)/%.map: $(GRAAL_BUILD_DIR)/%.map + $(install-file) +# Unix +$(EXPORT_JRE_LIB_ARCH_DIR)/%.$(LIBRARY_SUFFIX): $(GRAAL_BUILD_DIR)/%.$(LIBRARY_SUFFIX) + $(install-file) +$(EXPORT_SERVER_DIR)/%.$(LIBRARY_SUFFIX): $(GRAAL_BUILD_DIR)/%.$(LIBRARY_SUFFIX) + $(install-file) +$(EXPORT_SERVER_DIR)/64/%.$(LIBRARY_SUFFIX): $(GRAAL_BUILD_DIR)/%.$(LIBRARY_SUFFIX) + $(install-file) +$(EXPORT_JRE_LIB_ARCH_DIR)/%.debuginfo: $(GRAAL_BUILD_DIR)/%.debuginfo + $(install-file) +$(EXPORT_SERVER_DIR)/%.debuginfo: $(GRAAL_BUILD_DIR)/%.debuginfo + $(install-file) +$(EXPORT_SERVER_DIR)/64/%.debuginfo: $(GRAAL_BUILD_DIR)/%.debuginfo + $(install-file) +$(EXPORT_JRE_LIB_ARCH_DIR)/%.diz: $(GRAAL_BUILD_DIR)/%.diz + $(install-file) +$(EXPORT_SERVER_DIR)/64/%.diz: $(GRAAL_BUILD_DIR)/%.diz + $(install-file) endif # Client (C1) @@ -492,6 +537,9 @@ $(install-file) endif +$(EXPORT_JRE_LIB_DIR)/%.jar: $(SHARED_DIR)/%.jar + $(install-file) + $(EXPORT_INCLUDE_DIR)/%: $(HS_SRC_DIR)/share/vm/code/% $(install-file) @@ -533,10 +581,10 @@ $(RM) -r $(SHARED_DIR) $(RM) -r $(C1_DIR) $(RM) -r $(C2_DIR) + $(RM) -r $(GRAAL_DIR) $(RM) -r $(ZERO_DIR) $(RM) -r $(SHARK_DIR) $(RM) -r $(MINIMAL1_DIR) - $(RM) -r $(GRAAL_DIR) clean_export: $(RM) -r $(EXPORT_PATH) clean_jdk:
--- a/mx/projects Sun Jun 23 15:49:01 2013 +0200 +++ b/mx/projects Sun Jun 23 15:49:09 2013 +0200 @@ -365,7 +365,7 @@ # graal.compiler.sparc.test project@com.oracle.graal.compiler.sparc.test@subDir=graal project@com.oracle.graal.compiler.sparc.test@sourceDirs=src -project@com.oracle.graal.compiler.sparc.test@dependencies=com.oracle.graal.compiler.sparc,com.oracle.graal.compiler.test +project@com.oracle.graal.compiler.sparc.test@dependencies=com.oracle.graal.compiler.test project@com.oracle.graal.compiler.sparc.test@checkstyle=com.oracle.graal.graph project@com.oracle.graal.compiler.sparc.test@javaCompliance=1.7 project@com.oracle.graal.compiler.sparc.test@workingSets=Graal,SPARC,Test
--- a/src/cpu/sparc/vm/interp_masm_sparc.cpp Sun Jun 23 15:49:01 2013 +0200 +++ b/src/cpu/sparc/vm/interp_masm_sparc.cpp Sun Jun 23 15:49:09 2013 +0200 @@ -1646,26 +1646,75 @@ bind(skip_receiver_profile); // The method data pointer needs to be updated to reflect the new target. +#ifdef GRAAL + if (MethodProfileWidth == 0) { + update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size())); + } +#else update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size())); - bind (profile_continue); +#endif + bind(profile_continue); } } -void InterpreterMacroAssembler::record_klass_in_profile_helper( - Register receiver, Register scratch, - int start_row, Label& done, bool is_virtual_call) { +#ifdef GRAAL +void InterpreterMacroAssembler::profile_called_method(Register method, Register scratch) { + assert_different_registers(method, scratch); + if (ProfileInterpreter && MethodProfileWidth > 0) { + Label profile_continue; + + // If no method data exists, go to profile_continue. + test_method_data_pointer(profile_continue); + + Label done; + record_item_in_profile_helper(method, scratch, 0, done, MethodProfileWidth, + &VirtualCallData::method_offset, &VirtualCallData::method_count_offset, in_bytes(VirtualCallData::nonprofiled_receiver_count_offset())); + bind(done); + + update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size())); + bind(profile_continue); + } +} +#endif + +void InterpreterMacroAssembler::record_klass_in_profile_helper(Register receiver, Register scratch, + Label& done, bool is_virtual_call) { if (TypeProfileWidth == 0) { if (is_virtual_call) { increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch); } - return; +#ifdef GRAAL + else { + increment_mdp_data_at(in_bytes(ReceiverTypeData::nonprofiled_receiver_count_offset()), scratch); + } +#endif + } else { + bool use_non_profiled_counter = !is_virtual_call || IS_GRAAL_DEFINED; + int non_profiled_offset = -1; + if (use_non_profiled_counter) { + non_profiled_offset = in_bytes(CounterData::count_offset()); + #ifdef GRAAL + if (!is_virtual_call) { + non_profiled_offset = in_bytes(ReceiverTypeData::nonprofiled_receiver_count_offset()); + } + #endif + assert(non_profiled_offset >= 0, "must be"); + } + + record_item_in_profile_helper(receiver, scratch, 0, done, TypeProfileWidth, + &VirtualCallData::receiver_offset, &VirtualCallData::receiver_count_offset, non_profiled_offset); } - - int last_row = VirtualCallData::row_limit() - 1; +} + +void InterpreterMacroAssembler::record_item_in_profile_helper(Register item, + Register scratch, int start_row, Label& done, int total_rows, + OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, + int non_profiled_offset) { + int last_row = total_rows - 1; assert(start_row <= last_row, "must be work left to do"); - // Test this row for both the receiver and for null. + // Test this row for both the item and for null. // Take any of three different outcomes: - // 1. found receiver => increment count and goto done + // 1. found item => increment count and goto done // 2. found null => keep looking for case 1, maybe allocate this cell // 3. found something else => keep looking for cases 1 and 2 // Case 3 is handled by a recursive call. @@ -1673,28 +1722,28 @@ Label next_test; bool test_for_null_also = (row == start_row); - // See if the receiver is receiver[n]. - int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row)); - test_mdp_data_at(recvr_offset, receiver, next_test, scratch); + // See if the item is item[n]. + int item_offset = in_bytes(item_offset_fn(row)); + test_mdp_data_at(item_offset, item, next_test, scratch); // delayed()->tst(scratch); - // The receiver is receiver[n]. Increment count[n]. - int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row)); + // The receiver is item[n]. Increment count[n]. + int count_offset = in_bytes(item_count_offset_fn(row)); increment_mdp_data_at(count_offset, scratch); ba_short(done); bind(next_test); if (test_for_null_also) { Label found_null; - // Failed the equality check on receiver[n]... Test for null. + // Failed the equality check on item[n]... Test for null. if (start_row == last_row) { // The only thing left to do is handle the null case. - if (is_virtual_call) { + if (non_profiled_offset >= 0) { brx(Assembler::zero, false, Assembler::pn, found_null); delayed()->nop(); - // Receiver did not match any saved receiver and there is no empty row for it. + // Item did not match any saved item and there is no empty row for it. // Increment total counter to indicate polymorphic case. - increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch); + increment_mdp_data_at(non_profiled_offset, scratch); ba_short(done); bind(found_null); } else { @@ -1708,21 +1757,22 @@ delayed()->nop(); // Put all the "Case 3" tests here. - record_klass_in_profile_helper(receiver, scratch, start_row + 1, done, is_virtual_call); - - // Found a null. Keep searching for a matching receiver, + record_item_in_profile_helper(item, scratch, start_row + 1, done, total_rows, + item_offset_fn, item_count_offset_fn, non_profiled_offset); + + // Found a null. Keep searching for a matching item, // but remember that this is an empty (unused) slot. bind(found_null); } } - // In the fall-through case, we found no matching receiver, but we - // observed the receiver[start_row] is NULL. - - // Fill in the receiver field and increment the count. - int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row)); - set_mdp_data_at(recvr_offset, receiver); - int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row)); + // In the fall-through case, we found no matching item, but we + // observed the item[start_row] is NULL. + + // Fill in the item field and increment the count. + int item_offset = in_bytes(item_offset_fn(start_row)); + set_mdp_data_at(item_offset, item); + int count_offset = in_bytes(item_count_offset_fn(start_row)); mov(DataLayout::counter_increment, scratch); set_mdp_data_at(count_offset, scratch); if (start_row > 0) { @@ -1735,7 +1785,7 @@ assert(ProfileInterpreter, "must be profiling"); Label done; - record_klass_in_profile_helper(receiver, scratch, 0, done, is_virtual_call); + record_klass_in_profile_helper(receiver, scratch, done, is_virtual_call); bind (done); } @@ -1791,7 +1841,7 @@ // The method data pointer needs to be updated. int mdp_delta = in_bytes(BitData::bit_data_size()); if (TypeProfileCasts) { - mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size()); + mdp_delta = in_bytes(ReceiverTypeData::receiver_type_data_size()); } update_mdp_by_constant(mdp_delta); @@ -1809,7 +1859,7 @@ int mdp_delta = in_bytes(BitData::bit_data_size()); if (TypeProfileCasts) { - mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size()); + mdp_delta = in_bytes(ReceiverTypeData::receiver_type_data_size()); // Record the object type. record_klass_in_profile(klass, scratch, false); @@ -1831,7 +1881,7 @@ int count_offset = in_bytes(CounterData::count_offset()); // Back up the address, since we have already bumped the mdp. - count_offset -= in_bytes(VirtualCallData::virtual_call_data_size()); + count_offset -= in_bytes(ReceiverTypeData::receiver_type_data_size()); // *Decrement* the counter. We expect to see zero or small negatives. increment_mdp_data_at(count_offset, scratch, true);
--- a/src/cpu/sparc/vm/interp_masm_sparc.hpp Sun Jun 23 15:49:01 2013 +0200 +++ b/src/cpu/sparc/vm/interp_masm_sparc.hpp Sun Jun 23 15:49:09 2013 +0200 @@ -30,6 +30,8 @@ // This file specializes the assember with interpreter-specific macros +typedef ByteSize (*OffsetFunction)(uint); + REGISTER_DECLARATION( Register, Otos_i , O0); // tos for ints, etc REGISTER_DECLARATION( Register, Otos_l , O0); // for longs REGISTER_DECLARATION( Register, Otos_l1, O0); // for 1st part of longs @@ -300,7 +302,11 @@ void record_klass_in_profile(Register receiver, Register scratch, bool is_virtual_call); void record_klass_in_profile_helper(Register receiver, Register scratch, - int start_row, Label& done, bool is_virtual_call); + Label& done, bool is_virtual_call); + void record_item_in_profile_helper(Register item, + Register scratch, int start_row, Label& done, int total_rows, + OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, + int non_profiled_offset); void update_mdp_by_offset(int offset_of_disp, Register scratch); void update_mdp_by_offset(Register reg, int offset_of_disp, @@ -313,6 +319,7 @@ void profile_call(Register scratch); void profile_final_call(Register scratch); void profile_virtual_call(Register receiver, Register scratch, bool receiver_can_be_null = false); + void profile_called_method(Register method, Register scratch); void profile_ret(TosState state, Register return_bci, Register scratch); void profile_null_seen(Register scratch); void profile_typecheck(Register klass, Register scratch);
--- a/src/cpu/sparc/vm/templateTable_sparc.cpp Sun Jun 23 15:49:01 2013 +0200 +++ b/src/cpu/sparc/vm/templateTable_sparc.cpp Sun Jun 23 15:49:09 2013 +0200 @@ -2983,6 +2983,9 @@ // get target Method* & entry point __ lookup_virtual_method(Rrecv, Rindex, G5_method); +#ifdef GRAAL + __ profile_called_method(G5_method, Rtemp); +#endif __ call_from_interpreter(Rcall, Gargs, Rret); } @@ -3232,6 +3235,10 @@ Register Rcall = Rinterface; assert_different_registers(Rcall, G5_method, Gargs, Rret); +#ifdef GRAAL + __ profile_called_method(G5_method, Rscratch); +#endif + __ call_from_interpreter(Rcall, Gargs, Rret); } @@ -3524,7 +3531,8 @@ Register RspecifiedKlass = O4; // Check for casting a NULL - __ br_null_short(Otos_i, Assembler::pn, is_null); + __ br_null(Otos_i, false, Assembler::pn, is_null); + __ delayed()->nop(); // Get value klass in RobjKlass __ load_klass(Otos_i, RobjKlass); // get value klass @@ -3580,7 +3588,8 @@ Register RspecifiedKlass = O4; // Check for casting a NULL - __ br_null_short(Otos_i, Assembler::pt, is_null); + __ br_null(Otos_i, false, Assembler::pt, is_null); + __ delayed()->nop(); // Get value klass in RobjKlass __ load_klass(Otos_i, RobjKlass); // get value klass
--- a/src/cpu/x86/vm/interp_masm_x86_64.cpp Sun Jun 23 15:49:01 2013 +0200 +++ b/src/cpu/x86/vm/interp_masm_x86_64.cpp Sun Jun 23 15:49:09 2013 +0200 @@ -1154,13 +1154,12 @@ Label done; record_item_in_profile_helper(method, mdp, reg2, 0, done, MethodProfileWidth, &VirtualCallData::method_offset, &VirtualCallData::method_count_offset, in_bytes(VirtualCallData::nonprofiled_receiver_count_offset())); - bind (done); + bind(done); update_mdp_by_constant(mdp, in_bytes(VirtualCallData::virtual_call_data_size())); bind(profile_continue); } } - #endif // This routine creates a state machine for updating the multi-row