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changeset 7791:fe1187115167

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remove incorrect use of spillSlotSize
author Roland Schatz <roland.schatz@oracle.com>
date Fri, 15 Feb 2013 15:04:58 +0100
parents 2c6d04c5e60f
children 8b48c8ebdff4
files graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64MacroAssembler.java
diffstat 1 files changed, 6 insertions(+), 6 deletions(-) [+]
line wrap: on
line diff
--- a/graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64MacroAssembler.java	Fri Feb 15 00:43:40 2013 +0100
+++ b/graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64MacroAssembler.java	Fri Feb 15 15:04:58 2013 +0100
@@ -317,7 +317,7 @@
     }
 
     public void flog(Register dest, Register value, boolean base10) {
-        assert value.spillSlotSize == dest.spillSlotSize;
+        assert dest.isFpu() && value.isFpu();
 
         Address tmp = new Address(Kind.Double, AMD64.RSP);
         if (base10) {
@@ -325,13 +325,13 @@
         } else {
             fldln2();
         }
-        subq(AMD64.rsp, value.spillSlotSize);
+        subq(AMD64.rsp, 8);
         movsd(tmp, value);
         fld(tmp);
         fyl2x();
         fstp(tmp);
         movsd(dest, tmp);
-        addq(AMD64.rsp, dest.spillSlotSize);
+        addq(AMD64.rsp, 8);
     }
 
     public void fsin(Register dest, Register value) {
@@ -347,10 +347,10 @@
     }
 
     private void ftrig(Register dest, Register value, char op) {
-        assert value.spillSlotSize == dest.spillSlotSize;
+        assert dest.isFpu() && value.isFpu();
 
         Address tmp = new Address(Kind.Double, AMD64.RSP);
-        subq(AMD64.rsp, value.spillSlotSize);
+        subq(AMD64.rsp, 8);
         movsd(tmp, value);
         fld(tmp);
         if (op == 's') {
@@ -365,7 +365,7 @@
         }
         fstp(tmp);
         movsd(dest, tmp);
-        addq(AMD64.rsp, dest.spillSlotSize);
+        addq(AMD64.rsp, 8);
     }
 
     /**