annotate src/share/vm/opto/machnode.hpp @ 14434:318d0622a6d7

8028580: PPC64 (part 114/120): Support for Call nodes with constants. Summary: extends MachCall nodes so that they can issue constants to the constant table Reviewed-by: kvn
author goetz
date Wed, 20 Nov 2013 11:08:09 -0800
parents 1410ad6b05f1
children 15120a36272d
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1 /*
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
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26 #define SHARE_VM_OPTO_MACHNODE_HPP
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27
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28 #include "opto/callnode.hpp"
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29 #include "opto/matcher.hpp"
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30 #include "opto/multnode.hpp"
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31 #include "opto/node.hpp"
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32 #include "opto/regmask.hpp"
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33
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34 class BufferBlob;
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35 class CodeBuffer;
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36 class JVMState;
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37 class MachCallDynamicJavaNode;
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38 class MachCallJavaNode;
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39 class MachCallLeafNode;
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40 class MachCallNode;
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41 class MachCallRuntimeNode;
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42 class MachCallStaticJavaNode;
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43 class MachEpilogNode;
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44 class MachIfNode;
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45 class MachNullCheckNode;
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46 class MachOper;
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47 class MachProjNode;
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48 class MachPrologNode;
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49 class MachReturnNode;
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50 class MachSafePointNode;
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51 class MachSpillCopyNode;
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52 class Matcher;
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53 class PhaseRegAlloc;
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54 class RegMask;
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55 class State;
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56
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57 //---------------------------MachOper------------------------------------------
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58 class MachOper : public ResourceObj {
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59 public:
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60 // Allocate right next to the MachNodes in the same arena
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61 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); }
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62
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63 // Opcode
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64 virtual uint opcode() const = 0;
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65
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66 // Number of input edges.
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67 // Generally at least 1
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68 virtual uint num_edges() const { return 1; }
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69 // Array of Register masks
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70 virtual const RegMask *in_RegMask(int index) const;
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71
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72 // Methods to output the encoding of the operand
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73
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74 // Negate conditional branches. Error for non-branch Nodes
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75 virtual void negate();
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76
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77 // Return the value requested
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78 // result register lookup, corresponding to int_format
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79 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
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80 // input register lookup, corresponding to ext_format
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81 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
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82
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83 // helpers for MacroAssembler generation from ADLC
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84 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
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85 return ::as_Register(reg(ra_, node));
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86 }
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87 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
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88 return ::as_Register(reg(ra_, node, idx));
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89 }
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90 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
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91 return ::as_FloatRegister(reg(ra_, node));
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92 }
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93 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
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94 return ::as_FloatRegister(reg(ra_, node, idx));
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95 }
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96
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97 #if defined(IA32) || defined(AMD64)
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98 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
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99 return ::as_XMMRegister(reg(ra_, node));
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100 }
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101 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
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102 return ::as_XMMRegister(reg(ra_, node, idx));
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103 }
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104 #endif
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105
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106 virtual intptr_t constant() const;
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107 virtual relocInfo::relocType constant_reloc() const;
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108 virtual jdouble constantD() const;
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109 virtual jfloat constantF() const;
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110 virtual jlong constantL() const;
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111 virtual TypeOopPtr *oop() const;
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112 virtual int ccode() const;
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113 // A zero, default, indicates this value is not needed.
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114 // May need to lookup the base register, as done in int_ and ext_format
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115 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
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116 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
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117 virtual int scale() const;
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118 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
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119 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
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120 // Check for PC-Relative displacement
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121 virtual relocInfo::relocType disp_reloc() const;
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122 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
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123 virtual int base_position() const; // base edge position, or -1
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124 virtual int index_position() const; // index edge position, or -1
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125
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126 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
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127 // Only returns non-null value for i486.ad's indOffset32X
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128 virtual const TypePtr *disp_as_type() const { return NULL; }
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129
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130 // Return the label
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131 virtual Label *label() const;
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132
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133 // Return the method's address
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134 virtual intptr_t method() const;
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135
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136 // Hash and compare over operands are currently identical
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137 virtual uint hash() const;
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138 virtual uint cmp( const MachOper &oper ) const;
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139
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140 // Virtual clone, since I do not know how big the MachOper is.
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141 virtual MachOper *clone(Compile* C) const = 0;
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142
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143 // Return ideal Type from simple operands. Fail for complex operands.
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144 virtual const Type *type() const;
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145
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146 // Set an integer offset if we have one, or error otherwise
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147 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
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148
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149 #ifndef PRODUCT
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150 // Return name of operand
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151 virtual const char *Name() const { return "???";}
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152
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153 // Methods to output the text version of the operand
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154 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
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155 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
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156
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157 virtual void dump_spec(outputStream *st) const; // Print per-operand info
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158
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159 // Check whether o is a valid oper.
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160 static bool notAnOper(const MachOper *o) {
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161 if (o == NULL) return true;
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162 if (((intptr_t)o & 1) != 0) return true;
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163 if (*(address*)o == badAddress) return true; // kill by Node::destruct
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164 return false;
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165 }
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166 #endif // !PRODUCT
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167 };
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168
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169 //------------------------------MachNode---------------------------------------
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170 // Base type for all machine specific nodes. All node classes generated by the
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171 // ADLC inherit from this class.
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172 class MachNode : public Node {
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173 public:
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174 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
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175 init_class_id(Class_Mach);
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176 }
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177 // Required boilerplate
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178 virtual uint size_of() const { return sizeof(MachNode); }
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179 virtual int Opcode() const; // Always equal to MachNode
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180 virtual uint rule() const = 0; // Machine-specific opcode
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181 // Number of inputs which come before the first operand.
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182 // Generally at least 1, to skip the Control input
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183 virtual uint oper_input_base() const { return 1; }
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184 // Position of constant base node in node's inputs. -1 if
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185 // no constant base node input.
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186 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
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187
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188 // Copy inputs and operands to new node of instruction.
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189 // Called from cisc_version() and short_branch_version().
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190 // !!!! The method's body is defined in ad_<arch>.cpp file.
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191 void fill_new_machnode(MachNode *n, Compile* C) const;
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192
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193 // Return an equivalent instruction using memory for cisc_operand position
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194 virtual MachNode *cisc_version(int offset, Compile* C);
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195 // Modify this instruction's register mask to use stack version for cisc_operand
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196 virtual void use_cisc_RegMask();
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197
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198 // Support for short branches
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199 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
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200
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201 // Avoid back to back some instructions on some CPUs.
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202 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
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203
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204 // instruction implemented with a call
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205 bool has_call() const { return (flags() & Flag_has_call) != 0; }
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206
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207 // First index in _in[] corresponding to operand, or -1 if there is none
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208 int operand_index(uint operand) const;
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209
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210 // Register class input is expected in
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211 virtual const RegMask &in_RegMask(uint) const;
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212
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213 // cisc-spillable instructions redefine for use by in_RegMask
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214 virtual const RegMask *cisc_RegMask() const { return NULL; }
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215
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216 // If this instruction is a 2-address instruction, then return the
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217 // index of the input which must match the output. Not nessecary
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218 // for instructions which bind the input and output register to the
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219 // same singleton regiser (e.g., Intel IDIV which binds AX to be
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220 // both an input and an output). It is nessecary when the input and
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221 // output have choices - but they must use the same choice.
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222 virtual uint two_adr( ) const { return 0; }
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223
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224 // Array of complex operand pointers. Each corresponds to zero or
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225 // more leafs. Must be set by MachNode constructor to point to an
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226 // internal array of MachOpers. The MachOper array is sized by
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227 // specific MachNodes described in the ADL.
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228 uint _num_opnds;
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229 MachOper **_opnds;
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230 uint num_opnds() const { return _num_opnds; }
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231
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232 // Emit bytes into cbuf
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233 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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234 // Expand node after register allocation.
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235 // Node is replaced by several nodes in the postalloc expand phase.
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236 // Corresponding methods are generated for nodes if they specify
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237 // postalloc_expand. See block.cpp for more documentation.
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238 virtual bool requires_postalloc_expand() const { return false; }
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239 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
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240 // Size of instruction in bytes
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241 virtual uint size(PhaseRegAlloc *ra_) const;
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242 // Helper function that computes size by emitting code
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243 virtual uint emit_size(PhaseRegAlloc *ra_) const;
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244
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245 // Return the alignment required (in units of relocInfo::addr_unit())
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246 // for this instruction (must be a power of 2)
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247 virtual int alignment_required() const { return 1; }
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248
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249 // Return the padding (in bytes) to be emitted before this
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250 // instruction to properly align it.
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251 virtual int compute_padding(int current_offset) const { return 0; }
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252
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253 // Return number of relocatable values contained in this instruction
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254 virtual int reloc() const { return 0; }
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255
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256 // Return number of words used for double constants in this instruction
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257 virtual int ins_num_consts() const { return 0; }
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258
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259 // Hash and compare over operands. Used to do GVN on machine Nodes.
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260 virtual uint hash() const;
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261 virtual uint cmp( const Node &n ) const;
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262
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263 // Expand method for MachNode, replaces nodes representing pseudo
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264 // instructions with a set of nodes which represent real machine
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265 // instructions and compute the same value.
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266 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
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267
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268 // Bottom_type call; value comes from operand0
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269 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
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270 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); }
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271
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272 // If this is a memory op, return the base pointer and fixed offset.
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273 // If there are no such, return NULL. If there are multiple addresses
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274 // or the address is indeterminate (rare cases) then return (Node*)-1,
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275 // which serves as node bottom.
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276 // If the offset is not statically determined, set it to Type::OffsetBot.
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277 // This method is free to ignore stack slots if that helps.
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278 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
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279 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
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280 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
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281
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282 // Helper for get_base_and_disp: find the base and index input nodes.
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283 // Returns the MachOper as determined by memory_operand(), for use, if
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284 // needed by the caller. If (MachOper *)-1 is returned, base and index
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285 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
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286 // index are set to NULL.
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287 const MachOper* memory_inputs(Node* &base, Node* &index) const;
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288
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289 // Helper for memory_inputs: Which operand carries the necessary info?
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290 // By default, returns NULL, which means there is no such operand.
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291 // If it returns (MachOper*)-1, this means there are multiple memories.
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292 virtual const MachOper* memory_operand() const { return NULL; }
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293
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294 // Call "get_base_and_disp" to decide which category of memory is used here.
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295 virtual const class TypePtr *adr_type() const;
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296
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297 // Apply peephole rule(s) to this instruction
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298 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
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299
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300 // Top-level ideal Opcode matched
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301 virtual int ideal_Opcode() const { return Op_Node; }
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302
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303 // Adds the label for the case
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304 virtual void add_case_label( int switch_val, Label* blockLabel);
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305
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306 // Set the absolute address for methods
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307 virtual void method_set( intptr_t addr );
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308
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309 // Should we clone rather than spill this instruction?
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310 bool rematerialize() const;
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311
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312 // Get the pipeline info
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313 static const Pipeline *pipeline_class();
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314 virtual const Pipeline *pipeline() const;
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315
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316 #ifndef PRODUCT
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317 virtual const char *Name() const = 0; // Machine-specific name
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318 virtual void dump_spec(outputStream *st) const; // Print per-node info
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319 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
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320 #endif
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321 };
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322
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323 //------------------------------MachIdealNode----------------------------
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324 // Machine specific versions of nodes that must be defined by user.
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325 // These are not converted by matcher from ideal nodes to machine nodes
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326 // but are inserted into the code by the compiler.
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327 class MachIdealNode : public MachNode {
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328 public:
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329 MachIdealNode( ) {}
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330
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331 // Define the following defaults for non-matched machine nodes
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332 virtual uint oper_input_base() const { return 0; }
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333 virtual uint rule() const { return 9999999; }
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334 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
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335 };
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336
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337 //------------------------------MachTypeNode----------------------------
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338 // Machine Nodes that need to retain a known Type.
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339 class MachTypeNode : public MachNode {
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340 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
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341 public:
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342 MachTypeNode( ) {}
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343 const Type *_bottom_type;
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344
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345 virtual const class Type *bottom_type() const { return _bottom_type; }
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346 #ifndef PRODUCT
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347 virtual void dump_spec(outputStream *st) const;
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348 #endif
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349 };
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350
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351 //------------------------------MachBreakpointNode----------------------------
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352 // Machine breakpoint or interrupt Node
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353 class MachBreakpointNode : public MachIdealNode {
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354 public:
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355 MachBreakpointNode( ) {}
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356 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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357 virtual uint size(PhaseRegAlloc *ra_) const;
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358
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359 #ifndef PRODUCT
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360 virtual const char *Name() const { return "Breakpoint"; }
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361 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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362 #endif
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363 };
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364
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365 //------------------------------MachConstantBaseNode--------------------------
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366 // Machine node that represents the base address of the constant table.
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367 class MachConstantBaseNode : public MachIdealNode {
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368 public:
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369 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
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370
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371 public:
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372 MachConstantBaseNode() : MachIdealNode() {
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373 init_class_id(Class_MachConstantBase);
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374 }
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375 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
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376 virtual uint ideal_reg() const { return Op_RegP; }
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377 virtual uint oper_input_base() const { return 1; }
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378
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379 virtual bool requires_postalloc_expand() const;
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380 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
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381
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382 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
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383 virtual uint size(PhaseRegAlloc* ra_) const;
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384 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
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385
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386 static const RegMask& static_out_RegMask() { return _out_RegMask; }
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387 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
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388
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389 #ifndef PRODUCT
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390 virtual const char* Name() const { return "MachConstantBaseNode"; }
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391 virtual void format(PhaseRegAlloc*, outputStream* st) const;
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392 #endif
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393 };
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394
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395 //------------------------------MachConstantNode-------------------------------
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396 // Machine node that holds a constant which is stored in the constant table.
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397 class MachConstantNode : public MachTypeNode {
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398 protected:
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399 Compile::Constant _constant; // This node's constant.
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400
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401 public:
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402 MachConstantNode() : MachTypeNode() {
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403 init_class_id(Class_MachConstant);
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404 }
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405
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406 virtual void eval_constant(Compile* C) {
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407 #ifdef ASSERT
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408 tty->print("missing MachConstantNode eval_constant function: ");
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409 dump();
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410 #endif
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411 ShouldNotCallThis();
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412 }
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413
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414 virtual const RegMask &in_RegMask(uint idx) const {
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415 if (idx == mach_constant_base_node_input())
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416 return MachConstantBaseNode::static_out_RegMask();
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417 return MachNode::in_RegMask(idx);
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418 }
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419
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420 // Input edge of MachConstantBaseNode.
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421 virtual uint mach_constant_base_node_input() const { return req() - 1; }
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422
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423 int constant_offset();
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424 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
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425 // Unchecked version to avoid assertions in debug output.
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426 int constant_offset_unchecked() const;
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427 };
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428
0
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429 //------------------------------MachUEPNode-----------------------------------
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430 // Machine Unvalidated Entry Point Node
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431 class MachUEPNode : public MachIdealNode {
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432 public:
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433 MachUEPNode( ) {}
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434 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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435 virtual uint size(PhaseRegAlloc *ra_) const;
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436
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437 #ifndef PRODUCT
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438 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
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439 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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440 #endif
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441 };
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442
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443 //------------------------------MachPrologNode--------------------------------
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444 // Machine function Prolog Node
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445 class MachPrologNode : public MachIdealNode {
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446 public:
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447 MachPrologNode( ) {}
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448 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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449 virtual uint size(PhaseRegAlloc *ra_) const;
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450 virtual int reloc() const;
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451
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452 #ifndef PRODUCT
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453 virtual const char *Name() const { return "Prolog"; }
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454 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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455 #endif
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456 };
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457
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458 //------------------------------MachEpilogNode--------------------------------
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459 // Machine function Epilog Node
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460 class MachEpilogNode : public MachIdealNode {
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461 public:
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462 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
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463 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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464 virtual uint size(PhaseRegAlloc *ra_) const;
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465 virtual int reloc() const;
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466 virtual const Pipeline *pipeline() const;
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467
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468 private:
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469 bool _do_polling;
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470
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471 public:
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472 bool do_polling() const { return _do_polling; }
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473
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474 // Offset of safepoint from the beginning of the node
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475 int safepoint_offset() const;
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476
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477 #ifndef PRODUCT
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478 virtual const char *Name() const { return "Epilog"; }
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479 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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480 #endif
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481 };
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482
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483 //------------------------------MachNopNode-----------------------------------
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484 // Machine function Nop Node
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485 class MachNopNode : public MachIdealNode {
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486 private:
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487 int _count;
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488 public:
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489 MachNopNode( ) : _count(1) {}
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490 MachNopNode( int count ) : _count(count) {}
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491 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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492 virtual uint size(PhaseRegAlloc *ra_) const;
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493
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494 virtual const class Type *bottom_type() const { return Type::CONTROL; }
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495
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496 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
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497 virtual const Pipeline *pipeline() const;
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498 #ifndef PRODUCT
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499 virtual const char *Name() const { return "Nop"; }
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500 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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501 virtual void dump_spec(outputStream *st) const { } // No per-operand info
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502 #endif
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503 };
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504
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505 //------------------------------MachSpillCopyNode------------------------------
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506 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
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507 // location (stack or register).
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508 class MachSpillCopyNode : public MachIdealNode {
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509 const RegMask *_in; // RegMask for input
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510 const RegMask *_out; // RegMask for output
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511 const Type *_type;
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512 public:
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513 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
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514 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
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515 init_class_id(Class_MachSpillCopy);
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516 init_flags(Flag_is_Copy);
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517 add_req(NULL);
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518 add_req(n);
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519 }
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520 virtual uint size_of() const { return sizeof(*this); }
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521 void set_out_RegMask(const RegMask &out) { _out = &out; }
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522 void set_in_RegMask(const RegMask &in) { _in = &in; }
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523 virtual const RegMask &out_RegMask() const { return *_out; }
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524 virtual const RegMask &in_RegMask(uint) const { return *_in; }
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525 virtual const class Type *bottom_type() const { return _type; }
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526 virtual uint ideal_reg() const { return _type->ideal_reg(); }
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527 virtual uint oper_input_base() const { return 1; }
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528 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
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529
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530 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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531 virtual uint size(PhaseRegAlloc *ra_) const;
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532
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533 #ifndef PRODUCT
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534 virtual const char *Name() const { return "MachSpillCopy"; }
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535 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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536 #endif
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537 };
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538
3853
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539 //------------------------------MachBranchNode--------------------------------
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540 // Abstract machine branch Node
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541 class MachBranchNode : public MachIdealNode {
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542 public:
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543 MachBranchNode() : MachIdealNode() {
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544 init_class_id(Class_MachBranch);
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545 }
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546 virtual void label_set(Label* label, uint block_num) = 0;
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547 virtual void save_label(Label** label, uint* block_num) = 0;
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548
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diff changeset
549 // Support for short branches
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550 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
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551
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552 virtual bool pinned() const { return true; };
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553 };
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554
0
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555 //------------------------------MachNullChkNode--------------------------------
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556 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
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557 // also some kind of memory op. Turns the indicated MachNode into a
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558 // conditional branch with good latency on the ptr-not-null path and awful
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559 // latency on the pointer-is-null path.
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560
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561 class MachNullCheckNode : public MachBranchNode {
0
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562 public:
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563 const uint _vidx; // Index of memop being tested
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564 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
0
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565 init_class_id(Class_MachNullCheck);
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566 add_req(ctrl);
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567 add_req(memop);
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568 }
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diff changeset
569 virtual uint size_of() const { return sizeof(*this); }
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570
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571 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
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diff changeset
572 virtual void label_set(Label* label, uint block_num);
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573 virtual void save_label(Label** label, uint* block_num);
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574 virtual void negate() { }
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575 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
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576 virtual uint ideal_reg() const { return NotAMachineReg; }
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577 virtual const RegMask &in_RegMask(uint) const;
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578 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
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579 #ifndef PRODUCT
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580 virtual const char *Name() const { return "NullCheck"; }
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581 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
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582 #endif
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583 };
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584
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585 //------------------------------MachProjNode----------------------------------
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586 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
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587 // just MachNodes made by the Ideal world that replicate simple projections
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588 // but with machine-dependent input & output register masks. Generally
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589 // produced as part of calling conventions. Normally I make MachNodes as part
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590 // of the Matcher process, but the Matcher is ill suited to issues involving
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591 // frame handling, so frame handling is all done in the Ideal world with
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592 // occasional callbacks to the machine model for important info.
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diff changeset
593 class MachProjNode : public ProjNode {
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594 public:
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diff changeset
595 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
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diff changeset
596 init_class_id(Class_MachProj);
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diff changeset
597 }
0
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598 RegMask _rout;
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599 const uint _ideal_reg;
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diff changeset
600 enum projType {
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diff changeset
601 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
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diff changeset
602 fat_proj = 999 // Projs killing many regs, defined by _rout
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603 };
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604 virtual int Opcode() const;
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605 virtual const Type *bottom_type() const;
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606 virtual const TypePtr *adr_type() const;
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607 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
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608 virtual const RegMask &out_RegMask() const { return _rout; }
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609 virtual uint ideal_reg() const { return _ideal_reg; }
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diff changeset
610 // Need size_of() for virtual ProjNode::clone()
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611 virtual uint size_of() const { return sizeof(MachProjNode); }
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612 #ifndef PRODUCT
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613 virtual void dump_spec(outputStream *st) const;
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614 #endif
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615 };
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616
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617 //------------------------------MachIfNode-------------------------------------
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618 // Machine-specific versions of IfNodes
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619 class MachIfNode : public MachBranchNode {
0
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620 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
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621 public:
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622 float _prob; // Probability branch goes either way
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diff changeset
623 float _fcnt; // Frequency counter
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624 MachIfNode() : MachBranchNode() {
0
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625 init_class_id(Class_MachIf);
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626 }
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diff changeset
627 // Negate conditional branches.
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628 virtual void negate() = 0;
0
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629 #ifndef PRODUCT
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630 virtual void dump_spec(outputStream *st) const;
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631 #endif
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diff changeset
632 };
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633
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634 //------------------------------MachGotoNode-----------------------------------
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parents: 3839
diff changeset
635 // Machine-specific versions of GotoNodes
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diff changeset
636 class MachGotoNode : public MachBranchNode {
3842
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diff changeset
637 public:
3853
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diff changeset
638 MachGotoNode() : MachBranchNode() {
3842
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diff changeset
639 init_class_id(Class_MachGoto);
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diff changeset
640 }
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diff changeset
641 };
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642
0
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643 //------------------------------MachFastLockNode-------------------------------------
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diff changeset
644 // Machine-specific versions of FastLockNodes
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645 class MachFastLockNode : public MachNode {
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diff changeset
646 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
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647 public:
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648 BiasedLockingCounters* _counters;
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649
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650 MachFastLockNode() : MachNode() {}
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diff changeset
651 };
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652
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653 //------------------------------MachReturnNode--------------------------------
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654 // Machine-specific versions of subroutine returns
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655 class MachReturnNode : public MachNode {
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656 virtual uint size_of() const; // Size is bigger
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657 public:
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diff changeset
658 RegMask *_in_rms; // Input register masks, set during allocation
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diff changeset
659 ReallocMark _nesting; // assertion check for reallocations
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diff changeset
660 const TypePtr* _adr_type; // memory effects of call or return
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diff changeset
661 MachReturnNode() : MachNode() {
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diff changeset
662 init_class_id(Class_MachReturn);
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diff changeset
663 _adr_type = TypePtr::BOTTOM; // the default: all of memory
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diff changeset
664 }
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diff changeset
665
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diff changeset
666 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
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667
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diff changeset
668 virtual const RegMask &in_RegMask(uint) const;
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diff changeset
669 virtual bool pinned() const { return true; };
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670 virtual const TypePtr *adr_type() const;
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diff changeset
671 };
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diff changeset
672
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parents:
diff changeset
673 //------------------------------MachSafePointNode-----------------------------
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diff changeset
674 // Machine-specific versions of safepoints
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diff changeset
675 class MachSafePointNode : public MachReturnNode {
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diff changeset
676 public:
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diff changeset
677 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
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parents:
diff changeset
678 JVMState* _jvms; // Pointer to list of JVM State Objects
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diff changeset
679 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
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diff changeset
680 OopMap* oop_map() const { return _oop_map; }
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parents:
diff changeset
681 void set_oop_map(OopMap* om) { _oop_map = om; }
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parents:
diff changeset
682
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parents:
diff changeset
683 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
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diff changeset
684 init_class_id(Class_MachSafePoint);
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parents:
diff changeset
685 }
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parents:
diff changeset
686
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parents:
diff changeset
687 virtual JVMState* jvms() const { return _jvms; }
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parents:
diff changeset
688 void set_jvms(JVMState* s) {
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parents:
diff changeset
689 _jvms = s;
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parents:
diff changeset
690 }
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parents:
diff changeset
691 virtual const Type *bottom_type() const;
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parents:
diff changeset
692
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parents:
diff changeset
693 virtual const RegMask &in_RegMask(uint) const;
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parents:
diff changeset
694
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parents:
diff changeset
695 // Functionality from old debug nodes
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parents:
diff changeset
696 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
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parents:
diff changeset
697 Node *frameptr () const { return in(TypeFunc::FramePtr); }
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parents:
diff changeset
698
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parents:
diff changeset
699 Node *local(const JVMState* jvms, uint idx) const {
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parents:
diff changeset
700 assert(verify_jvms(jvms), "jvms must match");
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diff changeset
701 return in(_jvmadj + jvms->locoff() + idx);
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parents:
diff changeset
702 }
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parents:
diff changeset
703 Node *stack(const JVMState* jvms, uint idx) const {
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parents:
diff changeset
704 assert(verify_jvms(jvms), "jvms must match");
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diff changeset
705 return in(_jvmadj + jvms->stkoff() + idx);
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parents:
diff changeset
706 }
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parents:
diff changeset
707 Node *monitor_obj(const JVMState* jvms, uint idx) const {
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parents:
diff changeset
708 assert(verify_jvms(jvms), "jvms must match");
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parents:
diff changeset
709 return in(_jvmadj + jvms->monitor_obj_offset(idx));
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parents:
diff changeset
710 }
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parents:
diff changeset
711 Node *monitor_box(const JVMState* jvms, uint idx) const {
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parents:
diff changeset
712 assert(verify_jvms(jvms), "jvms must match");
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diff changeset
713 return in(_jvmadj + jvms->monitor_box_offset(idx));
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parents:
diff changeset
714 }
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parents:
diff changeset
715 void set_local(const JVMState* jvms, uint idx, Node *c) {
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parents:
diff changeset
716 assert(verify_jvms(jvms), "jvms must match");
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diff changeset
717 set_req(_jvmadj + jvms->locoff() + idx, c);
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parents:
diff changeset
718 }
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diff changeset
719 void set_stack(const JVMState* jvms, uint idx, Node *c) {
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parents:
diff changeset
720 assert(verify_jvms(jvms), "jvms must match");
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parents:
diff changeset
721 set_req(_jvmadj + jvms->stkoff() + idx, c);
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diff changeset
722 }
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diff changeset
723 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
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parents:
diff changeset
724 assert(verify_jvms(jvms), "jvms must match");
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parents:
diff changeset
725 set_req(_jvmadj + jvms->monoff() + idx, c);
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diff changeset
726 }
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diff changeset
727 };
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diff changeset
728
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parents:
diff changeset
729 //------------------------------MachCallNode----------------------------------
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parents:
diff changeset
730 // Machine-specific versions of subroutine calls
a61af66fc99e Initial load
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parents:
diff changeset
731 class MachCallNode : public MachSafePointNode {
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parents:
diff changeset
732 protected:
a61af66fc99e Initial load
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parents:
diff changeset
733 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
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parents:
diff changeset
734 virtual uint cmp( const Node &n ) const;
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parents:
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735 virtual uint size_of() const = 0; // Size is bigger
a61af66fc99e Initial load
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736 public:
a61af66fc99e Initial load
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diff changeset
737 const TypeFunc *_tf; // Function type
a61af66fc99e Initial load
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parents:
diff changeset
738 address _entry_point; // Address of the method being called
a61af66fc99e Initial load
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diff changeset
739 float _cnt; // Estimate of number of times called
a61af66fc99e Initial load
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parents:
diff changeset
740 uint _argsize; // Size of argument block on stack
a61af66fc99e Initial load
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parents:
diff changeset
741
a61af66fc99e Initial load
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parents:
diff changeset
742 const TypeFunc* tf() const { return _tf; }
a61af66fc99e Initial load
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parents:
diff changeset
743 const address entry_point() const { return _entry_point; }
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parents:
diff changeset
744 const float cnt() const { return _cnt; }
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diff changeset
745 uint argsize() const { return _argsize; }
a61af66fc99e Initial load
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parents:
diff changeset
746
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parents:
diff changeset
747 void set_tf(const TypeFunc* tf) { _tf = tf; }
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parents:
diff changeset
748 void set_entry_point(address p) { _entry_point = p; }
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parents:
diff changeset
749 void set_cnt(float c) { _cnt = c; }
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diff changeset
750 void set_argsize(int s) { _argsize = s; }
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diff changeset
751
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parents:
diff changeset
752 MachCallNode() : MachSafePointNode() {
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parents:
diff changeset
753 init_class_id(Class_MachCall);
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parents:
diff changeset
754 }
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parents:
diff changeset
755
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parents:
diff changeset
756 virtual const Type *bottom_type() const;
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diff changeset
757 virtual bool pinned() const { return false; }
a61af66fc99e Initial load
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parents:
diff changeset
758 virtual const Type *Value( PhaseTransform *phase ) const;
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diff changeset
759 virtual const RegMask &in_RegMask(uint) const;
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diff changeset
760 virtual int ret_addr_offset() { return 0; }
a61af66fc99e Initial load
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diff changeset
761
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diff changeset
762 bool returns_long() const { return tf()->return_type() == T_LONG; }
a61af66fc99e Initial load
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parents:
diff changeset
763 bool return_value_is_used() const;
a61af66fc99e Initial load
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parents:
diff changeset
764 #ifndef PRODUCT
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parents:
diff changeset
765 virtual void dump_spec(outputStream *st) const;
a61af66fc99e Initial load
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parents:
diff changeset
766 #endif
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diff changeset
767 };
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diff changeset
768
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parents:
diff changeset
769 //------------------------------MachCallJavaNode------------------------------
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parents:
diff changeset
770 // "Base" class for machine-specific versions of subroutine calls
a61af66fc99e Initial load
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parents:
diff changeset
771 class MachCallJavaNode : public MachCallNode {
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parents:
diff changeset
772 protected:
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parents:
diff changeset
773 virtual uint cmp( const Node &n ) const;
a61af66fc99e Initial load
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parents:
diff changeset
774 virtual uint size_of() const; // Size is bigger
a61af66fc99e Initial load
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parents:
diff changeset
775 public:
a61af66fc99e Initial load
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parents:
diff changeset
776 ciMethod* _method; // Method being direct called
a61af66fc99e Initial load
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parents:
diff changeset
777 int _bci; // Byte Code index of call byte code
a61af66fc99e Initial load
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parents:
diff changeset
778 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
1137
97125851f396 6829187: compiler optimizations required for JSR 292
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parents: 0
diff changeset
779 bool _method_handle_invoke; // Tells if the call has to preserve SP
0
a61af66fc99e Initial load
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parents:
diff changeset
780 MachCallJavaNode() : MachCallNode() {
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parents:
diff changeset
781 init_class_id(Class_MachCallJava);
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parents:
diff changeset
782 }
1137
97125851f396 6829187: compiler optimizations required for JSR 292
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parents: 0
diff changeset
783
97125851f396 6829187: compiler optimizations required for JSR 292
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parents: 0
diff changeset
784 virtual const RegMask &in_RegMask(uint) const;
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 0
diff changeset
785
0
a61af66fc99e Initial load
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parents:
diff changeset
786 #ifndef PRODUCT
a61af66fc99e Initial load
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parents:
diff changeset
787 virtual void dump_spec(outputStream *st) const;
a61af66fc99e Initial load
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parents:
diff changeset
788 #endif
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parents:
diff changeset
789 };
a61af66fc99e Initial load
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parents:
diff changeset
790
a61af66fc99e Initial load
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parents:
diff changeset
791 //------------------------------MachCallStaticJavaNode------------------------
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parents:
diff changeset
792 // Machine-specific versions of monomorphic subroutine calls
a61af66fc99e Initial load
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parents:
diff changeset
793 class MachCallStaticJavaNode : public MachCallJavaNode {
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parents:
diff changeset
794 virtual uint cmp( const Node &n ) const;
a61af66fc99e Initial load
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parents:
diff changeset
795 virtual uint size_of() const; // Size is bigger
a61af66fc99e Initial load
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parents:
diff changeset
796 public:
a61af66fc99e Initial load
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parents:
diff changeset
797 const char *_name; // Runtime wrapper name
a61af66fc99e Initial load
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parents:
diff changeset
798 MachCallStaticJavaNode() : MachCallJavaNode() {
a61af66fc99e Initial load
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parents:
diff changeset
799 init_class_id(Class_MachCallStaticJava);
a61af66fc99e Initial load
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parents:
diff changeset
800 }
a61af66fc99e Initial load
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parents:
diff changeset
801
a61af66fc99e Initial load
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parents:
diff changeset
802 // If this is an uncommon trap, return the request code, else zero.
a61af66fc99e Initial load
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parents:
diff changeset
803 int uncommon_trap_request() const;
a61af66fc99e Initial load
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parents:
diff changeset
804
a61af66fc99e Initial load
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parents:
diff changeset
805 virtual int ret_addr_offset();
a61af66fc99e Initial load
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parents:
diff changeset
806 #ifndef PRODUCT
a61af66fc99e Initial load
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parents:
diff changeset
807 virtual void dump_spec(outputStream *st) const;
a61af66fc99e Initial load
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parents:
diff changeset
808 void dump_trap_args(outputStream *st) const;
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parents:
diff changeset
809 #endif
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parents:
diff changeset
810 };
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parents:
diff changeset
811
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parents:
diff changeset
812 //------------------------------MachCallDynamicJavaNode------------------------
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parents:
diff changeset
813 // Machine-specific versions of possibly megamorphic subroutine calls
a61af66fc99e Initial load
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parents:
diff changeset
814 class MachCallDynamicJavaNode : public MachCallJavaNode {
a61af66fc99e Initial load
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815 public:
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816 int _vtable_index;
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817 MachCallDynamicJavaNode() : MachCallJavaNode() {
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818 init_class_id(Class_MachCallDynamicJava);
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819 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
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820 }
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821 virtual int ret_addr_offset();
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822 #ifndef PRODUCT
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823 virtual void dump_spec(outputStream *st) const;
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824 #endif
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825 };
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826
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827 //------------------------------MachCallRuntimeNode----------------------------
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828 // Machine-specific versions of subroutine calls
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829 class MachCallRuntimeNode : public MachCallNode {
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830 virtual uint cmp( const Node &n ) const;
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831 virtual uint size_of() const; // Size is bigger
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832 public:
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833 const char *_name; // Printable name, if _method is NULL
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834 MachCallRuntimeNode() : MachCallNode() {
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835 init_class_id(Class_MachCallRuntime);
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836 }
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837 virtual int ret_addr_offset();
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838 #ifndef PRODUCT
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839 virtual void dump_spec(outputStream *st) const;
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840 #endif
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841 };
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842
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843 class MachCallLeafNode: public MachCallRuntimeNode {
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844 public:
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845 MachCallLeafNode() : MachCallRuntimeNode() {
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846 init_class_id(Class_MachCallLeaf);
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847 }
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848 };
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849
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850 //------------------------------MachHaltNode-----------------------------------
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851 // Machine-specific versions of halt nodes
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852 class MachHaltNode : public MachReturnNode {
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853 public:
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854 virtual JVMState* jvms() const;
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855 };
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856
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857
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858 //------------------------------MachTempNode-----------------------------------
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859 // Node used by the adlc to construct inputs to represent temporary registers
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860 class MachTempNode : public MachNode {
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861 private:
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862 MachOper *_opnd_array[1];
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863
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864 public:
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865 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
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866 virtual uint rule() const { return 9999999; }
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867 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
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868
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869 MachTempNode(MachOper* oper) {
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870 init_class_id(Class_MachTemp);
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871 _num_opnds = 1;
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872 _opnds = _opnd_array;
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873 add_req(NULL);
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874 _opnds[0] = oper;
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875 }
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876 virtual uint size_of() const { return sizeof(MachTempNode); }
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877
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878 #ifndef PRODUCT
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879 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
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880 virtual const char *Name() const { return "MachTemp";}
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881 #endif
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882 };
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883
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884
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885
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886 //------------------------------labelOper--------------------------------------
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887 // Machine-independent version of label operand
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888 class labelOper : public MachOper {
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889 private:
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890 virtual uint num_edges() const { return 0; }
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891 public:
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892 // Supported for fixed size branches
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893 Label* _label; // Label for branch(es)
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894
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895 uint _block_num;
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896
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897 labelOper() : _block_num(0), _label(0) {}
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898
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899 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
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900
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901 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
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902
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903 virtual MachOper *clone(Compile* C) const;
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904
3839
3d42f82cd811 7063628: Use cbcond on T4
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diff changeset
905 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
0
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906
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907 virtual uint opcode() const;
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908
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909 virtual uint hash() const;
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910 virtual uint cmp( const MachOper &oper ) const;
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911 #ifndef PRODUCT
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912 virtual const char *Name() const { return "Label";}
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913
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914 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
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915 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
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916 #endif
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917 };
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918
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919
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920 //------------------------------methodOper--------------------------------------
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921 // Machine-independent version of method operand
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922 class methodOper : public MachOper {
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923 private:
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924 virtual uint num_edges() const { return 0; }
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925 public:
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926 intptr_t _method; // Address of method
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927 methodOper() : _method(0) {}
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928 methodOper(intptr_t method) : _method(method) {}
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929
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930 virtual MachOper *clone(Compile* C) const;
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931
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932 virtual intptr_t method() const { return _method; }
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933
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934 virtual uint opcode() const;
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935
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936 virtual uint hash() const;
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937 virtual uint cmp( const MachOper &oper ) const;
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938 #ifndef PRODUCT
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939 virtual const char *Name() const { return "Method";}
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940
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941 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
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942 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
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943 #endif
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944 };
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f95d63e2154a 6989984: Use standard include model for Hospot
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diff changeset
945
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946 #endif // SHARE_VM_OPTO_MACHNODE_HPP