Mercurial > hg > graal-compiler
annotate src/share/vm/opto/chaitin.hpp @ 14388:c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
Summary: Created sub-functions, added data structures, improved naming and removed unnecessary code
Reviewed-by: kvn, roland, rbackman
| author | adlertz |
|---|---|
| date | Fri, 24 Jan 2014 13:06:52 +0100 |
| parents | de6a9e811145 |
| children | 99fc8c086679 |
| rev | line source |
|---|---|
| 0 | 1 /* |
|
14223
de6a9e811145
8029233: Update copyright year to match last edit in jdk8 hotspot repository for 2013
mikael
parents:
12877
diff
changeset
|
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
923
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
923
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
|
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
923
diff
changeset
|
21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP |
| 26 #define SHARE_VM_OPTO_CHAITIN_HPP | |
| 27 | |
| 28 #include "code/vmreg.hpp" | |
| 29 #include "libadt/port.hpp" | |
| 30 #include "memory/resourceArea.hpp" | |
| 31 #include "opto/connode.hpp" | |
| 32 #include "opto/live.hpp" | |
| 33 #include "opto/matcher.hpp" | |
| 34 #include "opto/phase.hpp" | |
| 35 #include "opto/regalloc.hpp" | |
| 36 #include "opto/regmask.hpp" | |
| 37 | |
| 0 | 38 class LoopTree; |
| 39 class MachCallNode; | |
| 40 class MachSafePointNode; | |
| 41 class Matcher; | |
| 42 class PhaseCFG; | |
| 43 class PhaseLive; | |
| 44 class PhaseRegAlloc; | |
| 45 class PhaseChaitin; | |
| 46 | |
| 47 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001) | |
| 48 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25) | |
| 49 | |
| 50 //------------------------------LRG-------------------------------------------- | |
| 51 // Live-RanGe structure. | |
| 52 class LRG : public ResourceObj { | |
| 3939 | 53 friend class VMStructs; |
| 0 | 54 public: |
|
12877
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
55 static const uint AllStack_size = 0xFFFFF; // This mask size is used to tell that the mask of this LRG supports stack positions |
| 0 | 56 enum { SPILL_REG=29999 }; // Register number of a spilled LRG |
| 57 | |
| 58 double _cost; // 2 for loads/1 for stores times block freq | |
| 59 double _area; // Sum of all simultaneously live values | |
| 60 double score() const; // Compute score from cost and area | |
| 61 double _maxfreq; // Maximum frequency of any def or use | |
| 62 | |
| 63 Node *_def; // Check for multi-def live ranges | |
| 64 #ifndef PRODUCT | |
| 65 GrowableArray<Node*>* _defs; | |
| 66 #endif | |
| 67 | |
| 68 uint _risk_bias; // Index of LRG which we want to avoid color | |
| 69 uint _copy_bias; // Index of LRG which we want to share color | |
| 70 | |
| 71 uint _next; // Index of next LRG in linked list | |
| 72 uint _prev; // Index of prev LRG in linked list | |
| 73 private: | |
| 74 uint _reg; // Chosen register; undefined if mask is plural | |
| 75 public: | |
| 76 // Return chosen register for this LRG. Error if the LRG is not bound to | |
| 77 // a single register. | |
| 78 OptoReg::Name reg() const { return OptoReg::Name(_reg); } | |
| 79 void set_reg( OptoReg::Name r ) { _reg = r; } | |
| 80 | |
| 81 private: | |
| 82 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs | |
| 83 public: | |
|
12877
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
84 int degree() const { assert( _degree_valid , "" ); return _eff_degree; } |
| 0 | 85 // Degree starts not valid and any change to the IFG neighbor |
| 86 // set makes it not valid. | |
|
12877
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
87 void set_degree( uint degree ) { |
|
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
88 _eff_degree = degree; |
|
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
89 debug_only(_degree_valid = 1;) |
|
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
90 assert(!_mask.is_AllStack() || (_mask.is_AllStack() && lo_degree()), "_eff_degree can't be bigger than AllStack_size - _num_regs if the mask supports stack registers"); |
|
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
91 } |
| 0 | 92 // Made a change that hammered degree |
| 93 void invalid_degree() { debug_only(_degree_valid=0;) } | |
| 94 // Incrementally modify degree. If it was correct, it should remain correct | |
|
12877
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
95 void inc_degree( uint mod ) { |
|
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
96 _eff_degree += mod; |
|
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
97 assert(!_mask.is_AllStack() || (_mask.is_AllStack() && lo_degree()), "_eff_degree can't be bigger than AllStack_size - _num_regs if the mask supports stack registers"); |
|
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
98 } |
| 0 | 99 // Compute the degree between 2 live ranges |
| 100 int compute_degree( LRG &l ) const; | |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
101 bool mask_is_nonempty_and_up() const { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
102 return mask().is_UP() && mask_size(); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
103 } |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
104 bool is_float_or_vector() const { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
105 return _is_float || _is_vector; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
106 } |
| 0 | 107 |
| 108 private: | |
| 109 RegMask _mask; // Allowed registers for this LRG | |
| 110 uint _mask_size; // cache of _mask.Size(); | |
| 111 public: | |
|
12877
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
112 int compute_mask_size() const { return _mask.is_AllStack() ? AllStack_size : _mask.Size(); } |
| 0 | 113 void set_mask_size( int size ) { |
|
12877
d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
adlertz
parents:
12254
diff
changeset
|
114 assert((size == (int)AllStack_size) || (size == (int)_mask.Size()), ""); |
| 0 | 115 _mask_size = size; |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
116 #ifdef ASSERT |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
117 _msize_valid=1; |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
118 if (_is_vector) { |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
119 assert(!_fat_proj, "sanity"); |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
120 _mask.verify_sets(_num_regs); |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
121 } else if (_num_regs == 2 && !_fat_proj) { |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
122 _mask.verify_pairs(); |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
123 } |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
124 #endif |
| 0 | 125 } |
| 126 void compute_set_mask_size() { set_mask_size(compute_mask_size()); } | |
| 127 int mask_size() const { assert( _msize_valid, "mask size not valid" ); | |
| 128 return _mask_size; } | |
| 129 // Get the last mask size computed, even if it does not match the | |
| 130 // count of bits in the current mask. | |
| 131 int get_invalid_mask_size() const { return _mask_size; } | |
| 132 const RegMask &mask() const { return _mask; } | |
| 133 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)} | |
| 134 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)} | |
| 135 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)} | |
| 136 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; } | |
| 137 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; } | |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
138 |
| 0 | 139 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) } |
| 140 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) } | |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
141 void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) } |
|
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
142 void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) } |
| 0 | 143 |
| 144 // Number of registers this live range uses when it colors | |
| 145 private: | |
| 146 uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else | |
| 147 // except _num_regs is kill count for fat_proj | |
| 148 public: | |
| 149 int num_regs() const { return _num_regs; } | |
| 150 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; } | |
| 151 | |
| 152 private: | |
| 153 // Number of physical registers this live range uses when it colors | |
| 154 // Architecture and register-set dependent | |
| 155 uint8 _reg_pressure; | |
| 156 public: | |
| 157 void set_reg_pressure(int i) { _reg_pressure = i; } | |
| 158 int reg_pressure() const { return _reg_pressure; } | |
| 159 | |
| 160 // How much 'wiggle room' does this live range have? | |
| 161 // How many color choices can it make (scaled by _num_regs)? | |
| 162 int degrees_of_freedom() const { return mask_size() - _num_regs; } | |
| 163 // Bound LRGs have ZERO degrees of freedom. We also count | |
| 164 // must_spill as bound. | |
| 165 bool is_bound () const { return _is_bound; } | |
| 166 // Negative degrees-of-freedom; even with no neighbors this | |
| 167 // live range must spill. | |
| 168 bool not_free() const { return degrees_of_freedom() < 0; } | |
| 169 // Is this live range of "low-degree"? Trivially colorable? | |
| 170 bool lo_degree () const { return degree() <= degrees_of_freedom(); } | |
| 171 // Is this live range just barely "low-degree"? Trivially colorable? | |
| 172 bool just_lo_degree () const { return degree() == degrees_of_freedom(); } | |
| 173 | |
| 174 uint _is_oop:1, // Live-range holds an oop | |
| 175 _is_float:1, // True if in float registers | |
|
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
176 _is_vector:1, // True if in vector registers |
| 0 | 177 _was_spilled1:1, // True if prior spilling on def |
| 178 _was_spilled2:1, // True if twice prior spilling on def | |
| 179 _is_bound:1, // live range starts life with no | |
| 180 // degrees of freedom. | |
| 181 _direct_conflict:1, // True if def and use registers in conflict | |
| 182 _must_spill:1, // live range has lost all degrees of freedom | |
| 183 // If _fat_proj is set, live range does NOT require aligned, adjacent | |
| 184 // registers and has NO interferences. | |
| 185 // If _fat_proj is clear, live range requires num_regs() to be a power of | |
| 186 // 2, and it requires registers to form an aligned, adjacent set. | |
| 187 _fat_proj:1, // | |
| 188 _was_lo:1, // Was lo-degree prior to coalesce | |
| 189 _msize_valid:1, // _mask_size cache valid | |
| 190 _degree_valid:1, // _degree cache valid | |
| 191 _has_copy:1, // Adjacent to some copy instruction | |
| 192 _at_risk:1; // Simplify says this guy is at risk to spill | |
| 193 | |
| 194 | |
| 195 // Alive if non-zero, dead if zero | |
| 196 bool alive() const { return _def != NULL; } | |
|
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
197 bool is_multidef() const { return _def == NodeSentinel; } |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
198 bool is_singledef() const { return _def != NodeSentinel; } |
| 0 | 199 |
| 200 #ifndef PRODUCT | |
| 201 void dump( ) const; | |
| 202 #endif | |
| 203 }; | |
| 204 | |
| 205 //------------------------------IFG-------------------------------------------- | |
| 206 // InterFerence Graph | |
| 207 // An undirected graph implementation. Created with a fixed number of | |
| 208 // vertices. Edges can be added & tested. Vertices can be removed, then | |
| 209 // added back later with all edges intact. Can add edges between one vertex | |
| 210 // and a list of other vertices. Can union vertices (and their edges) | |
| 211 // together. The IFG needs to be really really fast, and also fairly | |
| 212 // abstract! It needs abstraction so I can fiddle with the implementation to | |
| 213 // get even more speed. | |
| 214 class PhaseIFG : public Phase { | |
| 3939 | 215 friend class VMStructs; |
| 0 | 216 // Current implementation: a triangular adjacency list. |
| 217 | |
| 218 // Array of adjacency-lists, indexed by live-range number | |
| 219 IndexSet *_adjs; | |
| 220 | |
| 221 // Assertion bit for proper use of Squaring | |
| 222 bool _is_square; | |
| 223 | |
| 224 // Live range structure goes here | |
| 225 LRG *_lrgs; // Array of LRG structures | |
| 226 | |
| 227 public: | |
| 228 // Largest live-range number | |
| 229 uint _maxlrg; | |
| 230 | |
| 231 Arena *_arena; | |
| 232 | |
| 233 // Keep track of inserted and deleted Nodes | |
| 234 VectorSet *_yanked; | |
| 235 | |
| 236 PhaseIFG( Arena *arena ); | |
| 237 void init( uint maxlrg ); | |
| 238 | |
| 239 // Add edge between a and b. Returns true if actually addded. | |
| 240 int add_edge( uint a, uint b ); | |
| 241 | |
| 242 // Add edge between a and everything in the vector | |
| 243 void add_vector( uint a, IndexSet *vec ); | |
| 244 | |
| 245 // Test for edge existance | |
| 246 int test_edge( uint a, uint b ) const; | |
| 247 | |
| 248 // Square-up matrix for faster Union | |
| 249 void SquareUp(); | |
| 250 | |
| 251 // Return number of LRG neighbors | |
| 252 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); } | |
| 253 // Union edges of b into a on Squared-up matrix | |
| 254 void Union( uint a, uint b ); | |
| 255 // Test for edge in Squared-up matrix | |
| 256 int test_edge_sq( uint a, uint b ) const; | |
| 257 // Yank a Node and all connected edges from the IFG. Be prepared to | |
| 258 // re-insert the yanked Node in reverse order of yanking. Return a | |
| 259 // list of neighbors (edges) yanked. | |
| 260 IndexSet *remove_node( uint a ); | |
| 261 // Reinsert a yanked Node | |
| 262 void re_insert( uint a ); | |
| 263 // Return set of neighbors | |
| 264 IndexSet *neighbors( uint a ) const { return &_adjs[a]; } | |
| 265 | |
| 266 #ifndef PRODUCT | |
| 267 // Dump the IFG | |
| 268 void dump() const; | |
| 269 void stats() const; | |
| 270 void verify( const PhaseChaitin * ) const; | |
| 271 #endif | |
| 272 | |
| 273 //--------------- Live Range Accessors | |
| 274 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; } | |
| 275 | |
| 276 // Compute and set effective degree. Might be folded into SquareUp(). | |
| 277 void Compute_Effective_Degree(); | |
| 278 | |
| 279 // Compute effective degree as the sum of neighbors' _sizes. | |
| 280 int effective_degree( uint lidx ) const; | |
| 281 }; | |
| 282 | |
| 10111 | 283 // The LiveRangeMap class is responsible for storing node to live range id mapping. |
| 284 // Each node is mapped to a live range id (a virtual register). Nodes that are | |
| 285 // not considered for register allocation are given live range id 0. | |
| 286 class LiveRangeMap VALUE_OBJ_CLASS_SPEC { | |
| 287 | |
| 288 private: | |
| 289 | |
| 290 uint _max_lrg_id; | |
| 291 | |
| 292 // Union-find map. Declared as a short for speed. | |
| 293 // Indexed by live-range number, it returns the compacted live-range number | |
| 294 LRG_List _uf_map; | |
| 295 | |
| 296 // Map from Nodes to live ranges | |
| 297 LRG_List _names; | |
| 298 | |
| 299 // Straight out of Tarjan's union-find algorithm | |
| 300 uint find_compress(const Node *node) { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
301 uint lrg_id = find_compress(_names.at(node->_idx)); |
|
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
302 _names.at_put(node->_idx, lrg_id); |
| 10111 | 303 return lrg_id; |
| 304 } | |
| 305 | |
| 306 uint find_compress(uint lrg); | |
| 307 | |
| 308 public: | |
| 309 | |
| 310 const LRG_List& names() { | |
| 311 return _names; | |
| 312 } | |
| 313 | |
| 314 uint max_lrg_id() const { | |
| 315 return _max_lrg_id; | |
| 316 } | |
| 317 | |
| 318 void set_max_lrg_id(uint max_lrg_id) { | |
| 319 _max_lrg_id = max_lrg_id; | |
| 320 } | |
| 321 | |
| 322 uint size() const { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
323 return _names.length(); |
| 10111 | 324 } |
| 325 | |
| 326 uint live_range_id(uint idx) const { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
327 return _names.at(idx); |
| 10111 | 328 } |
| 329 | |
| 330 uint live_range_id(const Node *node) const { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
331 return _names.at(node->_idx); |
| 10111 | 332 } |
| 333 | |
| 334 uint uf_live_range_id(uint lrg_id) const { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
335 return _uf_map.at(lrg_id); |
| 10111 | 336 } |
| 0 | 337 |
| 10111 | 338 void map(uint idx, uint lrg_id) { |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
339 _names.at_put(idx, lrg_id); |
| 10111 | 340 } |
| 341 | |
| 342 void uf_map(uint dst_lrg_id, uint src_lrg_id) { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
343 _uf_map.at_put(dst_lrg_id, src_lrg_id); |
| 10111 | 344 } |
| 345 | |
| 346 void extend(uint idx, uint lrg_id) { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
347 _names.at_put_grow(idx, lrg_id); |
| 10111 | 348 } |
| 349 | |
| 350 void uf_extend(uint dst_lrg_id, uint src_lrg_id) { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
351 _uf_map.at_put_grow(dst_lrg_id, src_lrg_id); |
| 10111 | 352 } |
| 353 | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
354 LiveRangeMap(Arena* arena, uint unique) |
|
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
355 : _names(arena, unique, unique, 0) |
|
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
356 , _uf_map(arena, unique, unique, 0) |
| 10111 | 357 , _max_lrg_id(0) {} |
| 358 | |
| 359 uint find_id( const Node *n ) { | |
| 360 uint retval = live_range_id(n); | |
| 361 assert(retval == find(n),"Invalid node to lidx mapping"); | |
| 362 return retval; | |
| 363 } | |
| 364 | |
| 365 // Reset the Union-Find map to identity | |
| 366 void reset_uf_map(uint max_lrg_id); | |
| 367 | |
| 368 // Make all Nodes map directly to their final live range; no need for | |
| 369 // the Union-Find mapping after this call. | |
| 370 void compress_uf_map_for_nodes(); | |
| 371 | |
| 372 uint find(uint lidx) { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
373 uint uf_lidx = _uf_map.at(lidx); |
| 10111 | 374 return (uf_lidx == lidx) ? uf_lidx : find_compress(lidx); |
| 375 } | |
| 376 | |
| 377 // Convert a Node into a Live Range Index - a lidx | |
| 378 uint find(const Node *node) { | |
| 379 uint lidx = live_range_id(node); | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
380 uint uf_lidx = _uf_map.at(lidx); |
| 10111 | 381 return (uf_lidx == lidx) ? uf_lidx : find_compress(node); |
| 382 } | |
| 383 | |
| 384 // Like Find above, but no path compress, so bad asymptotic behavior | |
| 385 uint find_const(uint lrg) const; | |
| 386 | |
| 387 // Like Find above, but no path compress, so bad asymptotic behavior | |
| 388 uint find_const(const Node *node) const { | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
389 if(node->_idx >= (uint)_names.length()) { |
| 10111 | 390 return 0; // not mapped, usual for debug dump |
| 391 } | |
|
12254
8c83625e3a53
8024646: Remove LRG_List container, replace it with GrowableArray
adlertz
parents:
12075
diff
changeset
|
392 return find_const(_names.at(node->_idx)); |
| 10111 | 393 } |
| 394 }; | |
| 0 | 395 |
| 396 //------------------------------Chaitin---------------------------------------- | |
| 397 // Briggs-Chaitin style allocation, mostly. | |
| 398 class PhaseChaitin : public PhaseRegAlloc { | |
| 3939 | 399 friend class VMStructs; |
| 0 | 400 |
| 401 int _trip_cnt; | |
| 402 int _alternate; | |
| 403 | |
| 404 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); } | |
| 405 PhaseLive *_live; // Liveness, used in the interference graph | |
| 406 PhaseIFG *_ifg; // Interference graph (for original chunk) | |
| 407 Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill | |
| 408 VectorSet _spilled_once; // Nodes that have been spilled | |
| 409 VectorSet _spilled_twice; // Nodes that have been spilled twice | |
| 410 | |
| 411 // Combine the Live Range Indices for these 2 Nodes into a single live | |
| 412 // range. Future requests for any Node in either live range will | |
| 413 // return the live range index for the combined live range. | |
| 414 void Union( const Node *src, const Node *dst ); | |
| 415 | |
| 416 void new_lrg( const Node *x, uint lrg ); | |
| 417 | |
| 418 // Compact live ranges, removing unused ones. Return new maxlrg. | |
| 419 void compact(); | |
| 420 | |
| 421 uint _lo_degree; // Head of lo-degree LRGs list | |
| 422 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list | |
| 423 uint _hi_degree; // Head of hi-degree LRGs list | |
| 424 uint _simplified; // Linked list head of simplified LRGs | |
| 425 | |
| 426 // Helper functions for Split() | |
| 427 uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx ); | |
| 428 uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx ); | |
| 10111 | 429 |
| 430 //------------------------------clone_projs------------------------------------ | |
| 431 // After cloning some rematerialized instruction, clone any MachProj's that | |
| 432 // follow it. Example: Intel zero is XOR, kills flags. Sparc FP constants | |
| 433 // use G3 as an address temp. | |
|
12075
4b2838704fd5
8021898: Broken JIT compiler optimization for loop unswitching
kvn
parents:
10111
diff
changeset
|
434 int clone_projs(Block* b, uint idx, Node* orig, Node* copy, uint& max_lrg_id); |
| 10111 | 435 |
|
12075
4b2838704fd5
8021898: Broken JIT compiler optimization for loop unswitching
kvn
parents:
10111
diff
changeset
|
436 int clone_projs(Block* b, uint idx, Node* orig, Node* copy, LiveRangeMap& lrg_map) { |
|
4b2838704fd5
8021898: Broken JIT compiler optimization for loop unswitching
kvn
parents:
10111
diff
changeset
|
437 uint max_lrg_id = lrg_map.max_lrg_id(); |
|
4b2838704fd5
8021898: Broken JIT compiler optimization for loop unswitching
kvn
parents:
10111
diff
changeset
|
438 int found_projs = clone_projs(b, idx, orig, copy, max_lrg_id); |
|
4b2838704fd5
8021898: Broken JIT compiler optimization for loop unswitching
kvn
parents:
10111
diff
changeset
|
439 if (found_projs > 0) { |
|
4b2838704fd5
8021898: Broken JIT compiler optimization for loop unswitching
kvn
parents:
10111
diff
changeset
|
440 // max_lrg_id is updated during call above |
|
4b2838704fd5
8021898: Broken JIT compiler optimization for loop unswitching
kvn
parents:
10111
diff
changeset
|
441 lrg_map.set_max_lrg_id(max_lrg_id); |
| 10111 | 442 } |
| 443 return found_projs; | |
| 444 } | |
| 445 | |
|
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
446 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits, |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
447 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru); |
| 0 | 448 // True if lidx is used before any real register is def'd in the block |
| 449 bool prompt_use( Block *b, uint lidx ); | |
| 450 Node *get_spillcopy_wide( Node *def, Node *use, uint uidx ); | |
| 605 | 451 // Insert the spill at chosen location. Skip over any intervening Proj's or |
| 0 | 452 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block |
| 453 // instead. Update high-pressure indices. Create a new live range. | |
| 454 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg ); | |
| 455 | |
| 456 bool is_high_pressure( Block *b, LRG *lrg, uint insidx ); | |
| 457 | |
| 458 uint _oldphi; // Node index which separates pre-allocation nodes | |
| 459 | |
| 460 Block **_blks; // Array of blocks sorted by frequency for coalescing | |
| 461 | |
| 673 | 462 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info |
| 463 | |
| 0 | 464 #ifndef PRODUCT |
| 465 bool _trace_spilling; | |
| 466 #endif | |
| 467 | |
| 468 public: | |
| 469 PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher ); | |
| 470 ~PhaseChaitin() {} | |
| 471 | |
| 10111 | 472 LiveRangeMap _lrg_map; |
| 0 | 473 |
| 474 // Do all the real work of allocate | |
| 475 void Register_Allocate(); | |
| 476 | |
| 673 | 477 float high_frequency_lrg() const { return _high_frequency_lrg; } |
| 478 | |
| 0 | 479 #ifndef PRODUCT |
| 480 bool trace_spilling() const { return _trace_spilling; } | |
| 481 #endif | |
| 482 | |
| 483 private: | |
| 484 // De-SSA the world. Assign registers to Nodes. Use the same register for | |
| 485 // all inputs to a PhiNode, effectively coalescing live ranges. Insert | |
| 486 // copies as needed. | |
| 487 void de_ssa(); | |
| 488 | |
| 489 // Add edge between reg and everything in the vector. | |
| 490 // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask | |
| 491 // information to trim the set of interferences. Return the | |
| 492 // count of edges added. | |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
493 void interfere_with_live(uint lid, IndexSet* liveout); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
494 #ifdef ASSERT |
| 0 | 495 // Count register pressure for asserts |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
496 uint count_int_pressure(IndexSet* liveout); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
497 uint count_float_pressure(IndexSet* liveout); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
498 #endif |
| 0 | 499 |
| 500 // Build the interference graph using virtual registers only. | |
| 501 // Used for aggressive coalescing. | |
| 502 void build_ifg_virtual( ); | |
| 503 | |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
504 class Pressure { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
505 public: |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
506 // keeps track of the register pressure at the current |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
507 // instruction (used when stepping backwards in the block) |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
508 uint _current_pressure; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
509 |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
510 // keeps track of the instruction index of the first low to high register pressure |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
511 // transition (starting from the top) in the block |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
512 // if high_pressure_index == 0 then the whole block is high pressure |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
513 // if high_pressure_index = b.end_idx() + 1 then the whole block is low pressure |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
514 uint _high_pressure_index; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
515 |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
516 // stores the highest pressure we find |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
517 uint _final_pressure; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
518 |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
519 // number of live ranges that constitute high register pressure |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
520 const uint _high_pressure_limit; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
521 |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
522 // lower the register pressure and look for a low to high pressure |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
523 // transition |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
524 void lower(LRG& lrg, uint& location) { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
525 _current_pressure -= lrg.reg_pressure(); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
526 if (_current_pressure == _high_pressure_limit) { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
527 _high_pressure_index = location; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
528 if (_current_pressure > _final_pressure) { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
529 _final_pressure = _current_pressure + 1; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
530 } |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
531 } |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
532 } |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
533 |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
534 // raise the pressure and store the pressure if it's the biggest |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
535 // pressure so far |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
536 void raise(LRG &lrg) { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
537 _current_pressure += lrg.reg_pressure(); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
538 if (_current_pressure > _final_pressure) { |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
539 _final_pressure = _current_pressure; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
540 } |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
541 } |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
542 |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
543 Pressure(uint high_pressure_index, uint high_pressure_limit) |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
544 : _current_pressure(0) |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
545 , _high_pressure_index(high_pressure_index) |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
546 , _high_pressure_limit(high_pressure_limit) |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
547 , _final_pressure(0) {} |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
548 }; |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
549 |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
550 void lower_pressure(Block* b, uint location, LRG& lrg, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
551 void raise_pressure(Block* b, LRG& lrg, Pressure& int_pressure, Pressure& float_pressure); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
552 void check_for_high_pressure_transition_at_fatproj(uint& block_reg_pressure, uint location, LRG& lrg, Pressure& pressure, const int op_regtype); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
553 void add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
554 void compute_initial_block_pressure(Block* b, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure, double cost); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
555 bool remove_node_if_not_used(Block* b, uint location, Node* n, uint lid, IndexSet* liveout); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
556 void assign_high_score_to_immediate_copies(Block* b, Node* n, LRG& lrg, uint next_inst, uint last_inst); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
557 void remove_interference_from_copy(Block* b, uint location, uint lid_copy, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
558 void remove_bound_register_from_interfering_live_ranges(LRG& lrg, IndexSet* liveout, uint& must_spill); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
559 void check_for_high_pressure_block(Pressure& pressure); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
560 void adjust_high_pressure_index(Block* b, uint& hrp_index, Pressure& pressure); |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
561 |
| 0 | 562 // Build the interference graph using physical registers when available. |
| 563 // That is, if 2 live ranges are simultaneously alive but in their | |
| 564 // acceptable register sets do not overlap, then they do not interfere. | |
| 565 uint build_ifg_physical( ResourceArea *a ); | |
| 566 | |
| 567 // Gather LiveRanGe information, including register masks and base pointer/ | |
| 568 // derived pointer relationships. | |
| 569 void gather_lrg_masks( bool mod_cisc_masks ); | |
| 570 | |
| 571 // Force the bases of derived pointers to be alive at GC points. | |
| 572 bool stretch_base_pointer_live_ranges( ResourceArea *a ); | |
| 573 // Helper to stretch above; recursively discover the base Node for | |
| 574 // a given derived Node. Easy for AddP-related machine nodes, but | |
| 575 // needs to be recursive for derived Phis. | |
| 576 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg ); | |
| 577 | |
| 578 // Set the was-lo-degree bit. Conservative coalescing should not change the | |
| 579 // colorability of the graph. If any live range was of low-degree before | |
| 580 // coalescing, it should Simplify. This call sets the was-lo-degree bit. | |
| 581 void set_was_low(); | |
| 582 | |
| 583 // Split live-ranges that must spill due to register conflicts (as opposed | |
| 584 // to capacity spills). Typically these are things def'd in a register | |
| 585 // and used on the stack or vice-versa. | |
| 586 void pre_spill(); | |
| 587 | |
| 588 // Init LRG caching of degree, numregs. Init lo_degree list. | |
| 589 void cache_lrg_info( ); | |
| 590 | |
| 591 // Simplify the IFG by removing LRGs of low degree with no copies | |
| 592 void Pre_Simplify(); | |
| 593 | |
| 594 // Simplify the IFG by removing LRGs of low degree | |
| 595 void Simplify(); | |
| 596 | |
| 597 // Select colors by re-inserting edges into the IFG. | |
| 605 | 598 // Return TRUE if any spills occurred. |
| 0 | 599 uint Select( ); |
| 600 // Helper function for select which allows biased coloring | |
| 601 OptoReg::Name choose_color( LRG &lrg, int chunk ); | |
| 602 // Helper function which implements biasing heuristic | |
| 603 OptoReg::Name bias_color( LRG &lrg, int chunk ); | |
| 604 | |
| 605 // Split uncolorable live ranges | |
| 606 // Return new number of live ranges | |
| 6632 | 607 uint Split(uint maxlrg, ResourceArea* split_arena); |
| 0 | 608 |
| 609 // Copy 'was_spilled'-edness from one Node to another. | |
| 610 void copy_was_spilled( Node *src, Node *dst ); | |
| 611 // Set the 'spilled_once' or 'spilled_twice' flag on a node. | |
| 612 void set_was_spilled( Node *n ); | |
| 613 | |
| 614 // Convert ideal spill-nodes into machine loads & stores | |
| 615 // Set C->failing when fixup spills could not complete, node limit exceeded. | |
| 616 void fixup_spills(); | |
| 617 | |
| 618 // Post-Allocation peephole copy removal | |
| 619 void post_allocate_copy_removal(); | |
| 620 Node *skip_copies( Node *c ); | |
| 923 | 621 // Replace the old node with the current live version of that value |
| 622 // and yank the old value if it's dead. | |
| 623 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg, | |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
624 Block *current_block, Node_List& value, Node_List& regnd ) { |
| 923 | 625 Node* v = regnd[nreg]; |
| 626 assert(v->outcnt() != 0, "no dead values"); | |
| 627 old->replace_by(v); | |
| 628 return yank_if_dead(old, current_block, &value, ®nd); | |
| 629 } | |
| 630 | |
|
4776
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3939
diff
changeset
|
631 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { |
|
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3939
diff
changeset
|
632 return yank_if_dead_recurse(old, old, current_block, value, regnd); |
|
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3939
diff
changeset
|
633 } |
|
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3939
diff
changeset
|
634 int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block, |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
635 Node_List *value, Node_List *regnd); |
|
3934
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2016
diff
changeset
|
636 int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ); |
| 0 | 637 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ); |
| 638 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ); | |
| 639 bool may_be_copy_of_callee( Node *def ) const; | |
| 640 | |
| 641 // If nreg already contains the same constant as val then eliminate it | |
|
70
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
642 bool eliminate_copy_of_constant(Node* val, Node* n, |
|
14388
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
643 Block *current_block, Node_List& value, Node_List ®nd, |
|
c84312468f5c
8031498: Cleanup and re-factorize PhaseChaitin::build_ifg_physical
adlertz
parents:
14223
diff
changeset
|
644 OptoReg::Name nreg, OptoReg::Name nreg2); |
| 0 | 645 // Extend the node to LRG mapping |
| 646 void add_reference( const Node *node, const Node *old_node); | |
| 647 | |
| 648 private: | |
| 649 | |
| 650 static int _final_loads, _final_stores, _final_copies, _final_memoves; | |
| 651 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost; | |
| 652 static int _conserv_coalesce, _conserv_coalesce_pair; | |
| 653 static int _conserv_coalesce_trie, _conserv_coalesce_quad; | |
| 654 static int _post_alloc; | |
| 655 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce; | |
| 656 static int _used_cisc_instructions, _unused_cisc_instructions; | |
| 657 static int _allocator_attempts, _allocator_successes; | |
| 658 | |
| 659 #ifndef PRODUCT | |
| 660 static uint _high_pressure, _low_pressure; | |
| 661 | |
| 662 void dump() const; | |
| 663 void dump( const Node *n ) const; | |
| 664 void dump( const Block * b ) const; | |
| 665 void dump_degree_lists() const; | |
| 666 void dump_simplified() const; | |
|
2016
361783318e7e
7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents:
1972
diff
changeset
|
667 void dump_lrg( uint lidx, bool defs_only) const; |
|
361783318e7e
7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents:
1972
diff
changeset
|
668 void dump_lrg( uint lidx) const { |
|
361783318e7e
7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents:
1972
diff
changeset
|
669 // dump defs and uses by default |
|
361783318e7e
7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents:
1972
diff
changeset
|
670 dump_lrg(lidx, false); |
|
361783318e7e
7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents:
1972
diff
changeset
|
671 } |
| 0 | 672 void dump_bb( uint pre_order ) const; |
| 673 | |
| 674 // Verify that base pointers and derived pointers are still sane | |
| 675 void verify_base_ptrs( ResourceArea *a ) const; | |
| 676 | |
|
566
91263420e1c6
6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents:
295
diff
changeset
|
677 void verify( ResourceArea *a, bool verify_ifg = false ) const; |
|
91263420e1c6
6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents:
295
diff
changeset
|
678 |
| 0 | 679 void dump_for_spill_split_recycle() const; |
| 680 | |
| 681 public: | |
| 682 void dump_frame() const; | |
| 683 char *dump_register( const Node *n, char *buf ) const; | |
| 684 private: | |
| 685 static void print_chaitin_statistics(); | |
| 686 #endif | |
| 687 friend class PhaseCoalesce; | |
| 688 friend class PhaseAggressiveCoalesce; | |
| 689 friend class PhaseConservativeCoalesce; | |
| 690 }; | |
| 1972 | 691 |
| 692 #endif // SHARE_VM_OPTO_CHAITIN_HPP |