Mercurial > hg > graal-compiler
annotate src/share/vm/c1/c1_LIR.hpp @ 1972:f95d63e2154a
6989984: Use standard include model for Hospot
Summary: Replaced MakeDeps and the includeDB files with more standardized solutions.
Reviewed-by: coleenp, kvn, kamg
| author | stefank |
|---|---|
| date | Tue, 23 Nov 2010 13:22:55 -0800 |
| parents | 87b64980e2f1 |
| children | ac637b7220d1 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_C1_C1_LIR_HPP |
| 26 #define SHARE_VM_C1_C1_LIR_HPP | |
| 27 | |
| 28 #include "c1/c1_ValueType.hpp" | |
| 29 | |
| 0 | 30 class BlockBegin; |
| 31 class BlockList; | |
| 32 class LIR_Assembler; | |
| 33 class CodeEmitInfo; | |
| 34 class CodeStub; | |
| 35 class CodeStubList; | |
| 36 class ArrayCopyStub; | |
| 37 class LIR_Op; | |
| 38 class ciType; | |
| 39 class ValueType; | |
| 40 class LIR_OpVisitState; | |
| 41 class FpuStackSim; | |
| 42 | |
| 43 //--------------------------------------------------------------------- | |
| 44 // LIR Operands | |
| 45 // LIR_OprDesc | |
| 46 // LIR_OprPtr | |
| 47 // LIR_Const | |
| 48 // LIR_Address | |
| 49 //--------------------------------------------------------------------- | |
| 50 class LIR_OprDesc; | |
| 51 class LIR_OprPtr; | |
| 52 class LIR_Const; | |
| 53 class LIR_Address; | |
| 54 class LIR_OprVisitor; | |
| 55 | |
| 56 | |
| 57 typedef LIR_OprDesc* LIR_Opr; | |
| 58 typedef int RegNr; | |
| 59 | |
| 60 define_array(LIR_OprArray, LIR_Opr) | |
| 61 define_stack(LIR_OprList, LIR_OprArray) | |
| 62 | |
| 63 define_array(LIR_OprRefArray, LIR_Opr*) | |
| 64 define_stack(LIR_OprRefList, LIR_OprRefArray) | |
| 65 | |
| 66 define_array(CodeEmitInfoArray, CodeEmitInfo*) | |
| 67 define_stack(CodeEmitInfoList, CodeEmitInfoArray) | |
| 68 | |
| 69 define_array(LIR_OpArray, LIR_Op*) | |
| 70 define_stack(LIR_OpList, LIR_OpArray) | |
| 71 | |
| 72 // define LIR_OprPtr early so LIR_OprDesc can refer to it | |
| 73 class LIR_OprPtr: public CompilationResourceObj { | |
| 74 public: | |
| 75 bool is_oop_pointer() const { return (type() == T_OBJECT); } | |
| 76 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } | |
| 77 | |
| 78 virtual LIR_Const* as_constant() { return NULL; } | |
| 79 virtual LIR_Address* as_address() { return NULL; } | |
| 80 virtual BasicType type() const = 0; | |
| 81 virtual void print_value_on(outputStream* out) const = 0; | |
| 82 }; | |
| 83 | |
| 84 | |
| 85 | |
| 86 // LIR constants | |
| 87 class LIR_Const: public LIR_OprPtr { | |
| 88 private: | |
| 89 JavaValue _value; | |
| 90 | |
| 91 void type_check(BasicType t) const { assert(type() == t, "type check"); } | |
| 92 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } | |
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93 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } |
| 0 | 94 |
| 95 public: | |
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96 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } |
| 0 | 97 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } |
| 98 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } | |
| 99 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } | |
| 100 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } | |
| 101 LIR_Const(void* p) { | |
| 102 #ifdef _LP64 | |
| 103 assert(sizeof(jlong) >= sizeof(p), "too small");; | |
| 104 _value.set_type(T_LONG); _value.set_jlong((jlong)p); | |
| 105 #else | |
| 106 assert(sizeof(jint) >= sizeof(p), "too small");; | |
| 107 _value.set_type(T_INT); _value.set_jint((jint)p); | |
| 108 #endif | |
| 109 } | |
| 110 | |
| 111 virtual BasicType type() const { return _value.get_type(); } | |
| 112 virtual LIR_Const* as_constant() { return this; } | |
| 113 | |
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114 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 115 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } |
| 116 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } | |
| 117 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } | |
| 118 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } | |
| 119 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } | |
| 120 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } | |
| 121 | |
| 122 #ifdef _LP64 | |
| 123 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } | |
| 124 #else | |
| 125 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } | |
| 126 #endif | |
| 127 | |
| 128 | |
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129 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 130 jint as_jint_lo_bits() const { |
| 131 if (type() == T_DOUBLE) { | |
| 132 return low(jlong_cast(_value.get_jdouble())); | |
| 133 } else { | |
| 134 return as_jint_lo(); | |
| 135 } | |
| 136 } | |
| 137 jint as_jint_hi_bits() const { | |
| 138 if (type() == T_DOUBLE) { | |
| 139 return high(jlong_cast(_value.get_jdouble())); | |
| 140 } else { | |
| 141 return as_jint_hi(); | |
| 142 } | |
| 143 } | |
| 304 | 144 jlong as_jlong_bits() const { |
| 145 if (type() == T_DOUBLE) { | |
| 146 return jlong_cast(_value.get_jdouble()); | |
| 147 } else { | |
| 148 return as_jlong(); | |
| 149 } | |
| 150 } | |
| 0 | 151 |
| 152 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 153 | |
| 154 | |
| 155 bool is_zero_float() { | |
| 156 jfloat f = as_jfloat(); | |
| 157 jfloat ok = 0.0f; | |
| 158 return jint_cast(f) == jint_cast(ok); | |
| 159 } | |
| 160 | |
| 161 bool is_one_float() { | |
| 162 jfloat f = as_jfloat(); | |
| 163 return !g_isnan(f) && g_isfinite(f) && f == 1.0; | |
| 164 } | |
| 165 | |
| 166 bool is_zero_double() { | |
| 167 jdouble d = as_jdouble(); | |
| 168 jdouble ok = 0.0; | |
| 169 return jlong_cast(d) == jlong_cast(ok); | |
| 170 } | |
| 171 | |
| 172 bool is_one_double() { | |
| 173 jdouble d = as_jdouble(); | |
| 174 return !g_isnan(d) && g_isfinite(d) && d == 1.0; | |
| 175 } | |
| 176 }; | |
| 177 | |
| 178 | |
| 179 //---------------------LIR Operand descriptor------------------------------------ | |
| 180 // | |
| 181 // The class LIR_OprDesc represents a LIR instruction operand; | |
| 182 // it can be a register (ALU/FPU), stack location or a constant; | |
| 183 // Constants and addresses are represented as resource area allocated | |
| 184 // structures (see above). | |
| 185 // Registers and stack locations are inlined into the this pointer | |
| 186 // (see value function). | |
| 187 | |
| 188 class LIR_OprDesc: public CompilationResourceObj { | |
| 189 public: | |
| 190 // value structure: | |
| 191 // data opr-type opr-kind | |
| 192 // +--------------+-------+-------+ | |
| 193 // [max...........|7 6 5 4|3 2 1 0] | |
| 194 // ^ | |
| 195 // is_pointer bit | |
| 196 // | |
| 197 // lowest bit cleared, means it is a structure pointer | |
| 198 // we need 4 bits to represent types | |
| 199 | |
| 200 private: | |
| 201 friend class LIR_OprFact; | |
| 202 | |
| 203 // Conversion | |
| 204 intptr_t value() const { return (intptr_t) this; } | |
| 205 | |
| 206 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { | |
| 207 return (value() & mask) == masked_value; | |
| 208 } | |
| 209 | |
| 210 enum OprKind { | |
| 211 pointer_value = 0 | |
| 212 , stack_value = 1 | |
| 213 , cpu_register = 3 | |
| 214 , fpu_register = 5 | |
| 215 , illegal_value = 7 | |
| 216 }; | |
| 217 | |
| 218 enum OprBits { | |
| 219 pointer_bits = 1 | |
| 220 , kind_bits = 3 | |
| 221 , type_bits = 4 | |
| 222 , size_bits = 2 | |
| 223 , destroys_bits = 1 | |
| 224 , virtual_bits = 1 | |
| 225 , is_xmm_bits = 1 | |
| 226 , last_use_bits = 1 | |
| 227 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation | |
| 228 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + | |
| 229 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits | |
| 230 , data_bits = BitsPerInt - non_data_bits | |
| 231 , reg_bits = data_bits / 2 // for two registers in one value encoding | |
| 232 }; | |
| 233 | |
| 234 enum OprShift { | |
| 235 kind_shift = 0 | |
| 236 , type_shift = kind_shift + kind_bits | |
| 237 , size_shift = type_shift + type_bits | |
| 238 , destroys_shift = size_shift + size_bits | |
| 239 , last_use_shift = destroys_shift + destroys_bits | |
| 240 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits | |
| 241 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits | |
| 242 , is_xmm_shift = virtual_shift + virtual_bits | |
| 243 , data_shift = is_xmm_shift + is_xmm_bits | |
| 244 , reg1_shift = data_shift | |
| 245 , reg2_shift = data_shift + reg_bits | |
| 246 | |
| 247 }; | |
| 248 | |
| 249 enum OprSize { | |
| 250 single_size = 0 << size_shift | |
| 251 , double_size = 1 << size_shift | |
| 252 }; | |
| 253 | |
| 254 enum OprMask { | |
| 255 kind_mask = right_n_bits(kind_bits) | |
| 256 , type_mask = right_n_bits(type_bits) << type_shift | |
| 257 , size_mask = right_n_bits(size_bits) << size_shift | |
| 258 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift | |
| 259 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift | |
| 260 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift | |
| 261 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift | |
| 262 , pointer_mask = right_n_bits(pointer_bits) | |
| 263 , lower_reg_mask = right_n_bits(reg_bits) | |
| 264 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) | |
| 265 }; | |
| 266 | |
| 267 uintptr_t data() const { return value() >> data_shift; } | |
| 268 int lo_reg_half() const { return data() & lower_reg_mask; } | |
| 269 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } | |
| 270 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } | |
| 271 OprSize size_field() const { return (OprSize)(value() & size_mask); } | |
| 272 | |
| 273 static char type_char(BasicType t); | |
| 274 | |
| 275 public: | |
| 276 enum { | |
| 277 vreg_base = ConcreteRegisterImpl::number_of_registers, | |
| 278 vreg_max = (1 << data_bits) - 1 | |
| 279 }; | |
| 280 | |
| 281 static inline LIR_Opr illegalOpr(); | |
| 282 | |
| 283 enum OprType { | |
| 284 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) | |
| 285 , int_type = 1 << type_shift | |
| 286 , long_type = 2 << type_shift | |
| 287 , object_type = 3 << type_shift | |
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288 , address_type = 4 << type_shift |
| 0 | 289 , float_type = 5 << type_shift |
| 290 , double_type = 6 << type_shift | |
| 291 }; | |
| 292 friend OprType as_OprType(BasicType t); | |
| 293 friend BasicType as_BasicType(OprType t); | |
| 294 | |
| 295 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } | |
| 296 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } | |
| 297 | |
| 298 static OprSize size_for(BasicType t) { | |
| 299 switch (t) { | |
| 300 case T_LONG: | |
| 301 case T_DOUBLE: | |
| 302 return double_size; | |
| 303 break; | |
| 304 | |
| 305 case T_FLOAT: | |
| 306 case T_BOOLEAN: | |
| 307 case T_CHAR: | |
| 308 case T_BYTE: | |
| 309 case T_SHORT: | |
| 310 case T_INT: | |
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311 case T_ADDRESS: |
| 0 | 312 case T_OBJECT: |
| 313 case T_ARRAY: | |
| 314 return single_size; | |
| 315 break; | |
| 316 | |
| 317 default: | |
| 318 ShouldNotReachHere(); | |
| 304 | 319 return single_size; |
| 0 | 320 } |
| 321 } | |
| 322 | |
| 323 | |
| 324 void validate_type() const PRODUCT_RETURN; | |
| 325 | |
| 326 BasicType type() const { | |
| 327 if (is_pointer()) { | |
| 328 return pointer()->type(); | |
| 329 } | |
| 330 return as_BasicType(type_field()); | |
| 331 } | |
| 332 | |
| 333 | |
| 334 ValueType* value_type() const { return as_ValueType(type()); } | |
| 335 | |
| 336 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } | |
| 337 | |
| 338 bool is_equal(LIR_Opr opr) const { return this == opr; } | |
| 339 // checks whether types are same | |
| 340 bool is_same_type(LIR_Opr opr) const { | |
| 341 assert(type_field() != unknown_type && | |
| 342 opr->type_field() != unknown_type, "shouldn't see unknown_type"); | |
| 343 return type_field() == opr->type_field(); | |
| 344 } | |
| 345 bool is_same_register(LIR_Opr opr) { | |
| 346 return (is_register() && opr->is_register() && | |
| 347 kind_field() == opr->kind_field() && | |
| 348 (value() & no_type_mask) == (opr->value() & no_type_mask)); | |
| 349 } | |
| 350 | |
| 351 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } | |
| 352 bool is_illegal() const { return kind_field() == illegal_value; } | |
| 353 bool is_valid() const { return kind_field() != illegal_value; } | |
| 354 | |
| 355 bool is_register() const { return is_cpu_register() || is_fpu_register(); } | |
| 356 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } | |
| 357 | |
| 358 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } | |
| 359 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } | |
| 360 | |
| 361 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } | |
| 362 bool is_oop() const; | |
| 363 | |
| 364 // semantic for fpu- and xmm-registers: | |
| 365 // * is_float and is_double return true for xmm_registers | |
| 366 // (so is_single_fpu and is_single_xmm are true) | |
| 367 // * So you must always check for is_???_xmm prior to is_???_fpu to | |
| 368 // distinguish between fpu- and xmm-registers | |
| 369 | |
| 370 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } | |
| 371 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } | |
| 372 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } | |
| 373 | |
| 374 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } | |
| 375 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } | |
| 376 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } | |
| 377 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } | |
| 378 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } | |
| 379 | |
| 380 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } | |
| 381 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } | |
| 382 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } | |
| 383 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } | |
| 384 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } | |
| 385 | |
| 386 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } | |
| 387 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } | |
| 388 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } | |
| 389 | |
| 390 // fast accessor functions for special bits that do not work for pointers | |
| 391 // (in this functions, the check for is_pointer() is omitted) | |
| 392 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } | |
| 393 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } | |
| 394 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } | |
| 395 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } | |
| 396 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } | |
| 397 | |
| 398 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } | |
| 399 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } | |
| 400 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } | |
| 401 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } | |
| 402 | |
| 403 | |
| 404 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 405 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 406 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 407 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 408 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 409 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 410 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 411 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 412 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 413 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 414 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 415 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } | |
| 416 | |
| 417 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } | |
| 418 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } | |
| 419 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } | |
| 420 | |
| 421 Register as_register() const; | |
| 422 Register as_register_lo() const; | |
| 423 Register as_register_hi() const; | |
| 424 | |
| 425 Register as_pointer_register() { | |
| 426 #ifdef _LP64 | |
| 427 if (is_double_cpu()) { | |
| 428 assert(as_register_lo() == as_register_hi(), "should be a single register"); | |
| 429 return as_register_lo(); | |
| 430 } | |
| 431 #endif | |
| 432 return as_register(); | |
| 433 } | |
| 434 | |
| 304 | 435 #ifdef X86 |
| 0 | 436 XMMRegister as_xmm_float_reg() const; |
| 437 XMMRegister as_xmm_double_reg() const; | |
| 438 // for compatibility with RInfo | |
| 439 int fpu () const { return lo_reg_half(); } | |
| 304 | 440 #endif // X86 |
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441 #if defined(SPARC) || defined(ARM) || defined(PPC) |
| 0 | 442 FloatRegister as_float_reg () const; |
| 443 FloatRegister as_double_reg () const; | |
| 444 #endif | |
| 445 | |
| 446 jint as_jint() const { return as_constant_ptr()->as_jint(); } | |
| 447 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } | |
| 448 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } | |
| 449 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } | |
| 450 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } | |
| 451 | |
| 452 void print() const PRODUCT_RETURN; | |
| 453 void print(outputStream* out) const PRODUCT_RETURN; | |
| 454 }; | |
| 455 | |
| 456 | |
| 457 inline LIR_OprDesc::OprType as_OprType(BasicType type) { | |
| 458 switch (type) { | |
| 459 case T_INT: return LIR_OprDesc::int_type; | |
| 460 case T_LONG: return LIR_OprDesc::long_type; | |
| 461 case T_FLOAT: return LIR_OprDesc::float_type; | |
| 462 case T_DOUBLE: return LIR_OprDesc::double_type; | |
| 463 case T_OBJECT: | |
| 464 case T_ARRAY: return LIR_OprDesc::object_type; | |
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465 case T_ADDRESS: return LIR_OprDesc::address_type; |
| 0 | 466 case T_ILLEGAL: // fall through |
| 467 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; | |
| 468 } | |
| 469 } | |
| 470 | |
| 471 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { | |
| 472 switch (t) { | |
| 473 case LIR_OprDesc::int_type: return T_INT; | |
| 474 case LIR_OprDesc::long_type: return T_LONG; | |
| 475 case LIR_OprDesc::float_type: return T_FLOAT; | |
| 476 case LIR_OprDesc::double_type: return T_DOUBLE; | |
| 477 case LIR_OprDesc::object_type: return T_OBJECT; | |
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478 case LIR_OprDesc::address_type: return T_ADDRESS; |
| 0 | 479 case LIR_OprDesc::unknown_type: // fall through |
| 480 default: ShouldNotReachHere(); return T_ILLEGAL; | |
| 481 } | |
| 482 } | |
| 483 | |
| 484 | |
| 485 // LIR_Address | |
| 486 class LIR_Address: public LIR_OprPtr { | |
| 487 friend class LIR_OpVisitState; | |
| 488 | |
| 489 public: | |
| 490 // NOTE: currently these must be the log2 of the scale factor (and | |
| 491 // must also be equivalent to the ScaleFactor enum in | |
| 492 // assembler_i486.hpp) | |
| 493 enum Scale { | |
| 494 times_1 = 0, | |
| 495 times_2 = 1, | |
| 496 times_4 = 2, | |
| 497 times_8 = 3 | |
| 498 }; | |
| 499 | |
| 500 private: | |
| 501 LIR_Opr _base; | |
| 502 LIR_Opr _index; | |
| 503 Scale _scale; | |
| 504 intx _disp; | |
| 505 BasicType _type; | |
| 506 | |
| 507 public: | |
| 508 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): | |
| 509 _base(base) | |
| 510 , _index(index) | |
| 511 , _scale(times_1) | |
| 512 , _type(type) | |
| 513 , _disp(0) { verify(); } | |
| 514 | |
| 1572 | 515 LIR_Address(LIR_Opr base, intx disp, BasicType type): |
| 0 | 516 _base(base) |
| 517 , _index(LIR_OprDesc::illegalOpr()) | |
| 518 , _scale(times_1) | |
| 519 , _type(type) | |
| 520 , _disp(disp) { verify(); } | |
| 521 | |
| 1572 | 522 LIR_Address(LIR_Opr base, BasicType type): |
| 523 _base(base) | |
| 524 , _index(LIR_OprDesc::illegalOpr()) | |
| 525 , _scale(times_1) | |
| 526 , _type(type) | |
| 527 , _disp(0) { verify(); } | |
| 528 | |
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529 #if defined(X86) || defined(ARM) |
| 1572 | 530 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): |
| 0 | 531 _base(base) |
| 532 , _index(index) | |
| 533 , _scale(scale) | |
| 534 , _type(type) | |
| 535 , _disp(disp) { verify(); } | |
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536 #endif // X86 || ARM |
| 0 | 537 |
| 538 LIR_Opr base() const { return _base; } | |
| 539 LIR_Opr index() const { return _index; } | |
| 540 Scale scale() const { return _scale; } | |
| 541 intx disp() const { return _disp; } | |
| 542 | |
| 543 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } | |
| 544 | |
| 545 virtual LIR_Address* as_address() { return this; } | |
| 546 virtual BasicType type() const { return _type; } | |
| 547 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 548 | |
| 549 void verify() const PRODUCT_RETURN; | |
| 550 | |
| 551 static Scale scale(BasicType type); | |
| 552 }; | |
| 553 | |
| 554 | |
| 555 // operand factory | |
| 556 class LIR_OprFact: public AllStatic { | |
| 557 public: | |
| 558 | |
| 559 static LIR_Opr illegalOpr; | |
| 560 | |
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561 static LIR_Opr single_cpu(int reg) { |
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562 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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563 LIR_OprDesc::int_type | |
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564 LIR_OprDesc::cpu_register | |
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565 LIR_OprDesc::single_size); |
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566 } |
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567 static LIR_Opr single_cpu_oop(int reg) { |
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568 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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569 LIR_OprDesc::object_type | |
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570 LIR_OprDesc::cpu_register | |
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571 LIR_OprDesc::single_size); |
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572 } |
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573 static LIR_Opr single_cpu_address(int reg) { |
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574 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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575 LIR_OprDesc::address_type | |
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576 LIR_OprDesc::cpu_register | |
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577 LIR_OprDesc::single_size); |
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578 } |
| 304 | 579 static LIR_Opr double_cpu(int reg1, int reg2) { |
| 580 LP64_ONLY(assert(reg1 == reg2, "must be identical")); | |
| 581 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | | |
| 582 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 583 LIR_OprDesc::long_type | | |
| 584 LIR_OprDesc::cpu_register | | |
| 585 LIR_OprDesc::double_size); | |
| 586 } | |
| 0 | 587 |
| 304 | 588 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
| 589 LIR_OprDesc::float_type | | |
| 590 LIR_OprDesc::fpu_register | | |
| 591 LIR_OprDesc::single_size); } | |
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592 #if defined(ARM) |
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593 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } |
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594 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } |
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595 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } |
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596 #endif |
| 0 | 597 #ifdef SPARC |
| 304 | 598 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | |
| 599 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 600 LIR_OprDesc::double_type | | |
| 601 LIR_OprDesc::fpu_register | | |
| 602 LIR_OprDesc::double_size); } | |
| 0 | 603 #endif |
| 304 | 604 #ifdef X86 |
| 605 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 606 (reg << LIR_OprDesc::reg2_shift) | | |
| 607 LIR_OprDesc::double_type | | |
| 608 LIR_OprDesc::fpu_register | | |
| 609 LIR_OprDesc::double_size); } | |
| 610 | |
| 611 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 612 LIR_OprDesc::float_type | | |
| 613 LIR_OprDesc::fpu_register | | |
| 614 LIR_OprDesc::single_size | | |
| 615 LIR_OprDesc::is_xmm_mask); } | |
| 616 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 617 (reg << LIR_OprDesc::reg2_shift) | | |
| 618 LIR_OprDesc::double_type | | |
| 619 LIR_OprDesc::fpu_register | | |
| 620 LIR_OprDesc::double_size | | |
| 621 LIR_OprDesc::is_xmm_mask); } | |
| 622 #endif // X86 | |
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623 #ifdef PPC |
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624 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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625 (reg << LIR_OprDesc::reg2_shift) | |
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626 LIR_OprDesc::double_type | |
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627 LIR_OprDesc::fpu_register | |
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628 LIR_OprDesc::double_size); } |
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629 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | |
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630 LIR_OprDesc::float_type | |
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631 LIR_OprDesc::cpu_register | |
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632 LIR_OprDesc::single_size); } |
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633 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | |
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634 (reg1 << LIR_OprDesc::reg2_shift) | |
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635 LIR_OprDesc::double_type | |
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636 LIR_OprDesc::cpu_register | |
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637 LIR_OprDesc::double_size); } |
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638 #endif // PPC |
| 0 | 639 |
| 640 static LIR_Opr virtual_register(int index, BasicType type) { | |
| 641 LIR_Opr res; | |
| 642 switch (type) { | |
| 643 case T_OBJECT: // fall through | |
| 304 | 644 case T_ARRAY: |
| 645 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 646 LIR_OprDesc::object_type | | |
| 647 LIR_OprDesc::cpu_register | | |
| 648 LIR_OprDesc::single_size | | |
| 649 LIR_OprDesc::virtual_mask); | |
| 650 break; | |
| 651 | |
| 652 case T_INT: | |
| 653 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 654 LIR_OprDesc::int_type | | |
| 655 LIR_OprDesc::cpu_register | | |
| 656 LIR_OprDesc::single_size | | |
| 657 LIR_OprDesc::virtual_mask); | |
| 658 break; | |
| 659 | |
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660 case T_ADDRESS: |
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661 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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662 LIR_OprDesc::address_type | |
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663 LIR_OprDesc::cpu_register | |
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664 LIR_OprDesc::single_size | |
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665 LIR_OprDesc::virtual_mask); |
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666 break; |
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667 |
| 304 | 668 case T_LONG: |
| 669 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 670 LIR_OprDesc::long_type | | |
| 671 LIR_OprDesc::cpu_register | | |
| 672 LIR_OprDesc::double_size | | |
| 673 LIR_OprDesc::virtual_mask); | |
| 674 break; | |
| 675 | |
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676 #ifdef __SOFTFP__ |
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677 case T_FLOAT: |
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678 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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679 LIR_OprDesc::float_type | |
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680 LIR_OprDesc::cpu_register | |
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681 LIR_OprDesc::single_size | |
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682 LIR_OprDesc::virtual_mask); |
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683 break; |
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684 case T_DOUBLE: |
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685 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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686 LIR_OprDesc::double_type | |
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687 LIR_OprDesc::cpu_register | |
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688 LIR_OprDesc::double_size | |
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689 LIR_OprDesc::virtual_mask); |
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690 break; |
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691 #else // __SOFTFP__ |
| 304 | 692 case T_FLOAT: |
| 693 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 694 LIR_OprDesc::float_type | | |
| 695 LIR_OprDesc::fpu_register | | |
| 696 LIR_OprDesc::single_size | | |
| 697 LIR_OprDesc::virtual_mask); | |
| 698 break; | |
| 699 | |
| 700 case | |
| 701 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 702 LIR_OprDesc::double_type | | |
| 703 LIR_OprDesc::fpu_register | | |
| 704 LIR_OprDesc::double_size | | |
| 705 LIR_OprDesc::virtual_mask); | |
| 706 break; | |
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707 #endif // __SOFTFP__ |
| 0 | 708 default: ShouldNotReachHere(); res = illegalOpr; |
| 709 } | |
| 710 | |
| 711 #ifdef ASSERT | |
| 712 res->validate_type(); | |
| 713 assert(res->vreg_number() == index, "conversion check"); | |
| 714 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); | |
| 715 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 716 | |
| 717 // old-style calculation; check if old and new method are equal | |
| 718 LIR_OprDesc::OprType t = as_OprType(type); | |
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719 #ifdef __SOFTFP__ |
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720 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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721 t | |
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722 LIR_OprDesc::cpu_register | |
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723 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
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724 #else // __SOFTFP__ |
| 304 | 725 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | |
| 726 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | | |
| 0 | 727 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
| 728 assert(res == old_res, "old and new method not equal"); | |
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729 #endif // __SOFTFP__ |
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730 #endif // ASSERT |
| 0 | 731 |
| 732 return res; | |
| 733 } | |
| 734 | |
| 735 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as | |
| 736 // the index is platform independent; a double stack useing indeces 2 and 3 has always | |
| 737 // index 2. | |
| 738 static LIR_Opr stack(int index, BasicType type) { | |
| 739 LIR_Opr res; | |
| 740 switch (type) { | |
| 741 case T_OBJECT: // fall through | |
| 304 | 742 case T_ARRAY: |
| 743 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 744 LIR_OprDesc::object_type | | |
| 745 LIR_OprDesc::stack_value | | |
| 746 LIR_OprDesc::single_size); | |
| 747 break; | |
| 748 | |
| 749 case T_INT: | |
| 750 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 751 LIR_OprDesc::int_type | | |
| 752 LIR_OprDesc::stack_value | | |
| 753 LIR_OprDesc::single_size); | |
| 754 break; | |
| 755 | |
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756 case T_ADDRESS: |
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757 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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758 LIR_OprDesc::address_type | |
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759 LIR_OprDesc::stack_value | |
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760 LIR_OprDesc::single_size); |
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761 break; |
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762 |
| 304 | 763 case T_LONG: |
| 764 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 765 LIR_OprDesc::long_type | | |
| 766 LIR_OprDesc::stack_value | | |
| 767 LIR_OprDesc::double_size); | |
| 768 break; | |
| 769 | |
| 770 case T_FLOAT: | |
| 771 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 772 LIR_OprDesc::float_type | | |
| 773 LIR_OprDesc::stack_value | | |
| 774 LIR_OprDesc::single_size); | |
| 775 break; | |
| 776 case T_DOUBLE: | |
| 777 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 778 LIR_OprDesc::double_type | | |
| 779 LIR_OprDesc::stack_value | | |
| 780 LIR_OprDesc::double_size); | |
| 781 break; | |
| 0 | 782 |
| 783 default: ShouldNotReachHere(); res = illegalOpr; | |
| 784 } | |
| 785 | |
| 786 #ifdef ASSERT | |
| 787 assert(index >= 0, "index must be positive"); | |
| 788 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 789 | |
| 304 | 790 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
| 791 LIR_OprDesc::stack_value | | |
| 792 as_OprType(type) | | |
| 793 LIR_OprDesc::size_for(type)); | |
| 0 | 794 assert(res == old_res, "old and new method not equal"); |
| 795 #endif | |
| 796 | |
| 797 return res; | |
| 798 } | |
| 799 | |
| 800 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } | |
| 801 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } | |
| 802 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } | |
| 803 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } | |
| 804 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } | |
| 805 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } | |
| 806 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } | |
| 807 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } | |
| 808 static LIR_Opr illegal() { return (LIR_Opr)-1; } | |
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809 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } |
| 0 | 810 |
| 811 static LIR_Opr value_type(ValueType* type); | |
| 812 static LIR_Opr dummy_value_type(ValueType* type); | |
| 813 }; | |
| 814 | |
| 815 | |
| 816 //------------------------------------------------------------------------------- | |
| 817 // LIR Instructions | |
| 818 //------------------------------------------------------------------------------- | |
| 819 // | |
| 820 // Note: | |
| 821 // - every instruction has a result operand | |
| 822 // - every instruction has an CodeEmitInfo operand (can be revisited later) | |
| 823 // - every instruction has a LIR_OpCode operand | |
| 824 // - LIR_OpN, means an instruction that has N input operands | |
| 825 // | |
| 826 // class hierarchy: | |
| 827 // | |
| 828 class LIR_Op; | |
| 829 class LIR_Op0; | |
| 830 class LIR_OpLabel; | |
| 831 class LIR_Op1; | |
| 832 class LIR_OpBranch; | |
| 833 class LIR_OpConvert; | |
| 834 class LIR_OpAllocObj; | |
| 835 class LIR_OpRoundFP; | |
| 836 class LIR_Op2; | |
| 837 class LIR_OpDelay; | |
| 838 class LIR_Op3; | |
| 839 class LIR_OpAllocArray; | |
| 840 class LIR_OpCall; | |
| 841 class LIR_OpJavaCall; | |
| 842 class LIR_OpRTCall; | |
| 843 class LIR_OpArrayCopy; | |
| 844 class LIR_OpLock; | |
| 845 class LIR_OpTypeCheck; | |
| 846 class LIR_OpCompareAndSwap; | |
| 847 class LIR_OpProfileCall; | |
| 848 | |
| 849 | |
| 850 // LIR operation codes | |
| 851 enum LIR_Code { | |
| 852 lir_none | |
| 853 , begin_op0 | |
| 854 , lir_word_align | |
| 855 , lir_label | |
| 856 , lir_nop | |
| 857 , lir_backwardbranch_target | |
| 858 , lir_std_entry | |
| 859 , lir_osr_entry | |
| 860 , lir_build_frame | |
| 861 , lir_fpop_raw | |
| 862 , lir_24bit_FPU | |
| 863 , lir_reset_FPU | |
| 864 , lir_breakpoint | |
| 865 , lir_rtcall | |
| 866 , lir_membar | |
| 867 , lir_membar_acquire | |
| 868 , lir_membar_release | |
| 869 , lir_get_thread | |
| 870 , end_op0 | |
| 871 , begin_op1 | |
| 872 , lir_fxch | |
| 873 , lir_fld | |
| 874 , lir_ffree | |
| 875 , lir_push | |
| 876 , lir_pop | |
| 877 , lir_null_check | |
| 878 , lir_return | |
| 879 , lir_leal | |
| 880 , lir_neg | |
| 881 , lir_branch | |
| 882 , lir_cond_float_branch | |
| 883 , lir_move | |
| 884 , lir_prefetchr | |
| 885 , lir_prefetchw | |
| 886 , lir_convert | |
| 887 , lir_alloc_object | |
| 888 , lir_monaddr | |
| 889 , lir_roundfp | |
| 890 , lir_safepoint | |
| 1783 | 891 , lir_pack64 |
| 892 , lir_unpack64 | |
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893 , lir_unwind |
| 0 | 894 , end_op1 |
| 895 , begin_op2 | |
| 896 , lir_cmp | |
| 897 , lir_cmp_l2i | |
| 898 , lir_ucmp_fd2i | |
| 899 , lir_cmp_fd2i | |
| 900 , lir_cmove | |
| 901 , lir_add | |
| 902 , lir_sub | |
| 903 , lir_mul | |
| 904 , lir_mul_strictfp | |
| 905 , lir_div | |
| 906 , lir_div_strictfp | |
| 907 , lir_rem | |
| 908 , lir_sqrt | |
| 909 , lir_abs | |
| 910 , lir_sin | |
| 911 , lir_cos | |
| 912 , lir_tan | |
| 913 , lir_log | |
| 914 , lir_log10 | |
| 915 , lir_logic_and | |
| 916 , lir_logic_or | |
| 917 , lir_logic_xor | |
| 918 , lir_shl | |
| 919 , lir_shr | |
| 920 , lir_ushr | |
| 921 , lir_alloc_array | |
| 922 , lir_throw | |
| 923 , lir_compare_to | |
| 924 , end_op2 | |
| 925 , begin_op3 | |
| 926 , lir_idiv | |
| 927 , lir_irem | |
| 928 , end_op3 | |
| 929 , begin_opJavaCall | |
| 930 , lir_static_call | |
| 931 , lir_optvirtual_call | |
| 932 , lir_icvirtual_call | |
| 933 , lir_virtual_call | |
| 1295 | 934 , lir_dynamic_call |
| 0 | 935 , end_opJavaCall |
| 936 , begin_opArrayCopy | |
| 937 , lir_arraycopy | |
| 938 , end_opArrayCopy | |
| 939 , begin_opLock | |
| 940 , lir_lock | |
| 941 , lir_unlock | |
| 942 , end_opLock | |
| 943 , begin_delay_slot | |
| 944 , lir_delay_slot | |
| 945 , end_delay_slot | |
| 946 , begin_opTypeCheck | |
| 947 , lir_instanceof | |
| 948 , lir_checkcast | |
| 949 , lir_store_check | |
| 950 , end_opTypeCheck | |
| 951 , begin_opCompareAndSwap | |
| 952 , lir_cas_long | |
| 953 , lir_cas_obj | |
| 954 , lir_cas_int | |
| 955 , end_opCompareAndSwap | |
| 956 , begin_opMDOProfile | |
| 957 , lir_profile_call | |
| 958 , end_opMDOProfile | |
| 959 }; | |
| 960 | |
| 961 | |
| 962 enum LIR_Condition { | |
| 963 lir_cond_equal | |
| 964 , lir_cond_notEqual | |
| 965 , lir_cond_less | |
| 966 , lir_cond_lessEqual | |
| 967 , lir_cond_greaterEqual | |
| 968 , lir_cond_greater | |
| 969 , lir_cond_belowEqual | |
| 970 , lir_cond_aboveEqual | |
| 971 , lir_cond_always | |
| 972 , lir_cond_unknown = -1 | |
| 973 }; | |
| 974 | |
| 975 | |
| 976 enum LIR_PatchCode { | |
| 977 lir_patch_none, | |
| 978 lir_patch_low, | |
| 979 lir_patch_high, | |
| 980 lir_patch_normal | |
| 981 }; | |
| 982 | |
| 983 | |
| 984 enum LIR_MoveKind { | |
| 985 lir_move_normal, | |
| 986 lir_move_volatile, | |
| 987 lir_move_unaligned, | |
| 988 lir_move_max_flag | |
| 989 }; | |
| 990 | |
| 991 | |
| 992 // -------------------------------------------------- | |
| 993 // LIR_Op | |
| 994 // -------------------------------------------------- | |
| 995 class LIR_Op: public CompilationResourceObj { | |
| 996 friend class LIR_OpVisitState; | |
| 997 | |
| 998 #ifdef ASSERT | |
| 999 private: | |
| 1000 const char * _file; | |
| 1001 int _line; | |
| 1002 #endif | |
| 1003 | |
| 1004 protected: | |
| 1005 LIR_Opr _result; | |
| 1006 unsigned short _code; | |
| 1007 unsigned short _flags; | |
| 1008 CodeEmitInfo* _info; | |
| 1009 int _id; // value id for register allocation | |
| 1010 int _fpu_pop_count; | |
| 1011 Instruction* _source; // for debugging | |
| 1012 | |
| 1013 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; | |
| 1014 | |
| 1015 protected: | |
| 1016 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } | |
| 1017 | |
| 1018 public: | |
| 1019 LIR_Op() | |
| 1020 : _result(LIR_OprFact::illegalOpr) | |
| 1021 , _code(lir_none) | |
| 1022 , _flags(0) | |
| 1023 , _info(NULL) | |
| 1024 #ifdef ASSERT | |
| 1025 , _file(NULL) | |
| 1026 , _line(0) | |
| 1027 #endif | |
| 1028 , _fpu_pop_count(0) | |
| 1029 , _source(NULL) | |
| 1030 , _id(-1) {} | |
| 1031 | |
| 1032 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) | |
| 1033 : _result(result) | |
| 1034 , _code(code) | |
| 1035 , _flags(0) | |
| 1036 , _info(info) | |
| 1037 #ifdef ASSERT | |
| 1038 , _file(NULL) | |
| 1039 , _line(0) | |
| 1040 #endif | |
| 1041 , _fpu_pop_count(0) | |
| 1042 , _source(NULL) | |
| 1043 , _id(-1) {} | |
| 1044 | |
| 1045 CodeEmitInfo* info() const { return _info; } | |
| 1046 LIR_Code code() const { return (LIR_Code)_code; } | |
| 1047 LIR_Opr result_opr() const { return _result; } | |
| 1048 void set_result_opr(LIR_Opr opr) { _result = opr; } | |
| 1049 | |
| 1050 #ifdef ASSERT | |
| 1051 void set_file_and_line(const char * file, int line) { | |
| 1052 _file = file; | |
| 1053 _line = line; | |
| 1054 } | |
| 1055 #endif | |
| 1056 | |
| 1057 virtual const char * name() const PRODUCT_RETURN0; | |
| 1058 | |
| 1059 int id() const { return _id; } | |
| 1060 void set_id(int id) { _id = id; } | |
| 1061 | |
| 1062 // FPU stack simulation helpers -- only used on Intel | |
| 1063 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } | |
| 1064 int fpu_pop_count() const { return _fpu_pop_count; } | |
| 1065 bool pop_fpu_stack() { return _fpu_pop_count > 0; } | |
| 1066 | |
| 1067 Instruction* source() const { return _source; } | |
| 1068 void set_source(Instruction* ins) { _source = ins; } | |
| 1069 | |
| 1070 virtual void emit_code(LIR_Assembler* masm) = 0; | |
| 1071 virtual void print_instr(outputStream* out) const = 0; | |
| 1072 virtual void print_on(outputStream* st) const PRODUCT_RETURN; | |
| 1073 | |
| 1074 virtual LIR_OpCall* as_OpCall() { return NULL; } | |
| 1075 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } | |
| 1076 virtual LIR_OpLabel* as_OpLabel() { return NULL; } | |
| 1077 virtual LIR_OpDelay* as_OpDelay() { return NULL; } | |
| 1078 virtual LIR_OpLock* as_OpLock() { return NULL; } | |
| 1079 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } | |
| 1080 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } | |
| 1081 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } | |
| 1082 virtual LIR_OpBranch* as_OpBranch() { return NULL; } | |
| 1083 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } | |
| 1084 virtual LIR_OpConvert* as_OpConvert() { return NULL; } | |
| 1085 virtual LIR_Op0* as_Op0() { return NULL; } | |
| 1086 virtual LIR_Op1* as_Op1() { return NULL; } | |
| 1087 virtual LIR_Op2* as_Op2() { return NULL; } | |
| 1088 virtual LIR_Op3* as_Op3() { return NULL; } | |
| 1089 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } | |
| 1090 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } | |
| 1091 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } | |
| 1092 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } | |
| 1093 | |
| 1094 virtual void verify() const {} | |
| 1095 }; | |
| 1096 | |
| 1097 // for calls | |
| 1098 class LIR_OpCall: public LIR_Op { | |
| 1099 friend class LIR_OpVisitState; | |
| 1100 | |
| 1101 protected: | |
| 1102 address _addr; | |
| 1103 LIR_OprList* _arguments; | |
| 1104 protected: | |
| 1105 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, | |
| 1106 LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1107 : LIR_Op(code, result, info) | |
| 1108 , _arguments(arguments) | |
| 1109 , _addr(addr) {} | |
| 1110 | |
| 1111 public: | |
| 1112 address addr() const { return _addr; } | |
| 1113 const LIR_OprList* arguments() const { return _arguments; } | |
| 1114 virtual LIR_OpCall* as_OpCall() { return this; } | |
| 1115 }; | |
| 1116 | |
| 1117 | |
| 1118 // -------------------------------------------------- | |
| 1119 // LIR_OpJavaCall | |
| 1120 // -------------------------------------------------- | |
| 1121 class LIR_OpJavaCall: public LIR_OpCall { | |
| 1122 friend class LIR_OpVisitState; | |
| 1123 | |
| 1124 private: | |
| 1564 | 1125 ciMethod* _method; |
| 1126 LIR_Opr _receiver; | |
| 1127 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. | |
| 0 | 1128 |
| 1129 public: | |
| 1130 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1131 LIR_Opr receiver, LIR_Opr result, | |
| 1132 address addr, LIR_OprList* arguments, | |
| 1133 CodeEmitInfo* info) | |
| 1134 : LIR_OpCall(code, addr, result, arguments, info) | |
| 1135 , _receiver(receiver) | |
| 1564 | 1136 , _method(method) |
| 1137 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1138 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1139 |
| 1140 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1141 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, | |
| 1142 LIR_OprList* arguments, CodeEmitInfo* info) | |
| 1143 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) | |
| 1144 , _receiver(receiver) | |
| 1564 | 1145 , _method(method) |
| 1146 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1147 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1148 |
| 1149 LIR_Opr receiver() const { return _receiver; } | |
| 1150 ciMethod* method() const { return _method; } | |
| 1151 | |
| 1295 | 1152 // JSR 292 support. |
| 1153 bool is_invokedynamic() const { return code() == lir_dynamic_call; } | |
| 1154 bool is_method_handle_invoke() const { | |
| 1155 return | |
| 1156 is_invokedynamic() // An invokedynamic is always a MethodHandle call site. | |
| 1157 || | |
| 1158 (method()->holder()->name() == ciSymbol::java_dyn_MethodHandle() && | |
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1159 methodOopDesc::is_method_handle_invoke_name(method()->name()->sid())); |
| 1295 | 1160 } |
| 1161 | |
| 0 | 1162 intptr_t vtable_offset() const { |
| 1163 assert(_code == lir_virtual_call, "only have vtable for real vcall"); | |
| 1164 return (intptr_t) addr(); | |
| 1165 } | |
| 1166 | |
| 1167 virtual void emit_code(LIR_Assembler* masm); | |
| 1168 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } | |
| 1169 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1170 }; | |
| 1171 | |
| 1172 // -------------------------------------------------- | |
| 1173 // LIR_OpLabel | |
| 1174 // -------------------------------------------------- | |
| 1175 // Location where a branch can continue | |
| 1176 class LIR_OpLabel: public LIR_Op { | |
| 1177 friend class LIR_OpVisitState; | |
| 1178 | |
| 1179 private: | |
| 1180 Label* _label; | |
| 1181 public: | |
| 1182 LIR_OpLabel(Label* lbl) | |
| 1183 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) | |
| 1184 , _label(lbl) {} | |
| 1185 Label* label() const { return _label; } | |
| 1186 | |
| 1187 virtual void emit_code(LIR_Assembler* masm); | |
| 1188 virtual LIR_OpLabel* as_OpLabel() { return this; } | |
| 1189 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1190 }; | |
| 1191 | |
| 1192 // LIR_OpArrayCopy | |
| 1193 class LIR_OpArrayCopy: public LIR_Op { | |
| 1194 friend class LIR_OpVisitState; | |
| 1195 | |
| 1196 private: | |
| 1197 ArrayCopyStub* _stub; | |
| 1198 LIR_Opr _src; | |
| 1199 LIR_Opr _src_pos; | |
| 1200 LIR_Opr _dst; | |
| 1201 LIR_Opr _dst_pos; | |
| 1202 LIR_Opr _length; | |
| 1203 LIR_Opr _tmp; | |
| 1204 ciArrayKlass* _expected_type; | |
| 1205 int _flags; | |
| 1206 | |
| 1207 public: | |
| 1208 enum Flags { | |
| 1209 src_null_check = 1 << 0, | |
| 1210 dst_null_check = 1 << 1, | |
| 1211 src_pos_positive_check = 1 << 2, | |
| 1212 dst_pos_positive_check = 1 << 3, | |
| 1213 length_positive_check = 1 << 4, | |
| 1214 src_range_check = 1 << 5, | |
| 1215 dst_range_check = 1 << 6, | |
| 1216 type_check = 1 << 7, | |
| 1217 all_flags = (1 << 8) - 1 | |
| 1218 }; | |
| 1219 | |
| 1220 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, | |
| 1221 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); | |
| 1222 | |
| 1223 LIR_Opr src() const { return _src; } | |
| 1224 LIR_Opr src_pos() const { return _src_pos; } | |
| 1225 LIR_Opr dst() const { return _dst; } | |
| 1226 LIR_Opr dst_pos() const { return _dst_pos; } | |
| 1227 LIR_Opr length() const { return _length; } | |
| 1228 LIR_Opr tmp() const { return _tmp; } | |
| 1229 int flags() const { return _flags; } | |
| 1230 ciArrayKlass* expected_type() const { return _expected_type; } | |
| 1231 ArrayCopyStub* stub() const { return _stub; } | |
| 1232 | |
| 1233 virtual void emit_code(LIR_Assembler* masm); | |
| 1234 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } | |
| 1235 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1236 }; | |
| 1237 | |
| 1238 | |
| 1239 // -------------------------------------------------- | |
| 1240 // LIR_Op0 | |
| 1241 // -------------------------------------------------- | |
| 1242 class LIR_Op0: public LIR_Op { | |
| 1243 friend class LIR_OpVisitState; | |
| 1244 | |
| 1245 public: | |
| 1246 LIR_Op0(LIR_Code code) | |
| 1247 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1248 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1249 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1250 | |
| 1251 virtual void emit_code(LIR_Assembler* masm); | |
| 1252 virtual LIR_Op0* as_Op0() { return this; } | |
| 1253 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1254 }; | |
| 1255 | |
| 1256 | |
| 1257 // -------------------------------------------------- | |
| 1258 // LIR_Op1 | |
| 1259 // -------------------------------------------------- | |
| 1260 | |
| 1261 class LIR_Op1: public LIR_Op { | |
| 1262 friend class LIR_OpVisitState; | |
| 1263 | |
| 1264 protected: | |
| 1265 LIR_Opr _opr; // input operand | |
| 1266 BasicType _type; // Operand types | |
| 1267 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) | |
| 1268 | |
| 1269 static void print_patch_code(outputStream* out, LIR_PatchCode code); | |
| 1270 | |
| 1271 void set_kind(LIR_MoveKind kind) { | |
| 1272 assert(code() == lir_move, "must be"); | |
| 1273 _flags = kind; | |
| 1274 } | |
| 1275 | |
| 1276 public: | |
| 1277 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) | |
| 1278 : LIR_Op(code, result, info) | |
| 1279 , _opr(opr) | |
| 1280 , _patch(patch) | |
| 1281 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1282 | |
| 1283 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) | |
| 1284 : LIR_Op(code, result, info) | |
| 1285 , _opr(opr) | |
| 1286 , _patch(patch) | |
| 1287 , _type(type) { | |
| 1288 assert(code == lir_move, "must be"); | |
| 1289 set_kind(kind); | |
| 1290 } | |
| 1291 | |
| 1292 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) | |
| 1293 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1294 , _opr(opr) | |
| 1295 , _patch(lir_patch_none) | |
| 1296 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1297 | |
| 1298 LIR_Opr in_opr() const { return _opr; } | |
| 1299 LIR_PatchCode patch_code() const { return _patch; } | |
| 1300 BasicType type() const { return _type; } | |
| 1301 | |
| 1302 LIR_MoveKind move_kind() const { | |
| 1303 assert(code() == lir_move, "must be"); | |
| 1304 return (LIR_MoveKind)_flags; | |
| 1305 } | |
| 1306 | |
| 1307 virtual void emit_code(LIR_Assembler* masm); | |
| 1308 virtual LIR_Op1* as_Op1() { return this; } | |
| 1309 virtual const char * name() const PRODUCT_RETURN0; | |
| 1310 | |
| 1311 void set_in_opr(LIR_Opr opr) { _opr = opr; } | |
| 1312 | |
| 1313 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1314 virtual void verify() const; | |
| 1315 }; | |
| 1316 | |
| 1317 | |
| 1318 // for runtime calls | |
| 1319 class LIR_OpRTCall: public LIR_OpCall { | |
| 1320 friend class LIR_OpVisitState; | |
| 1321 | |
| 1322 private: | |
| 1323 LIR_Opr _tmp; | |
| 1324 public: | |
| 1325 LIR_OpRTCall(address addr, LIR_Opr tmp, | |
| 1326 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1327 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) | |
| 1328 , _tmp(tmp) {} | |
| 1329 | |
| 1330 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1331 virtual void emit_code(LIR_Assembler* masm); | |
| 1332 virtual LIR_OpRTCall* as_OpRTCall() { return this; } | |
| 1333 | |
| 1334 LIR_Opr tmp() const { return _tmp; } | |
| 1335 | |
| 1336 virtual void verify() const; | |
| 1337 }; | |
| 1338 | |
| 1339 | |
| 1340 class LIR_OpBranch: public LIR_Op { | |
| 1341 friend class LIR_OpVisitState; | |
| 1342 | |
| 1343 private: | |
| 1344 LIR_Condition _cond; | |
| 1345 BasicType _type; | |
| 1346 Label* _label; | |
| 1347 BlockBegin* _block; // if this is a branch to a block, this is the block | |
| 1348 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block | |
| 1349 CodeStub* _stub; // if this is a branch to a stub, this is the stub | |
| 1350 | |
| 1351 public: | |
| 1352 LIR_OpBranch(LIR_Condition cond, Label* lbl) | |
| 1353 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) | |
| 1354 , _cond(cond) | |
| 1355 , _label(lbl) | |
| 1356 , _block(NULL) | |
| 1357 , _ublock(NULL) | |
| 1358 , _stub(NULL) { } | |
| 1359 | |
| 1360 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); | |
| 1361 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); | |
| 1362 | |
| 1363 // for unordered comparisons | |
| 1364 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); | |
| 1365 | |
| 1366 LIR_Condition cond() const { return _cond; } | |
| 1367 BasicType type() const { return _type; } | |
| 1368 Label* label() const { return _label; } | |
| 1369 BlockBegin* block() const { return _block; } | |
| 1370 BlockBegin* ublock() const { return _ublock; } | |
| 1371 CodeStub* stub() const { return _stub; } | |
| 1372 | |
| 1373 void change_block(BlockBegin* b); | |
| 1374 void change_ublock(BlockBegin* b); | |
| 1375 void negate_cond(); | |
| 1376 | |
| 1377 virtual void emit_code(LIR_Assembler* masm); | |
| 1378 virtual LIR_OpBranch* as_OpBranch() { return this; } | |
| 1379 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1380 }; | |
| 1381 | |
| 1382 | |
| 1383 class ConversionStub; | |
| 1384 | |
| 1385 class LIR_OpConvert: public LIR_Op1 { | |
| 1386 friend class LIR_OpVisitState; | |
| 1387 | |
| 1388 private: | |
| 1389 Bytecodes::Code _bytecode; | |
| 1390 ConversionStub* _stub; | |
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1391 #ifdef PPC |
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1392 LIR_Opr _tmp1; |
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1393 LIR_Opr _tmp2; |
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1394 #endif |
| 0 | 1395 |
| 1396 public: | |
| 1397 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) | |
| 1398 : LIR_Op1(lir_convert, opr, result) | |
| 1399 , _stub(stub) | |
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1400 #ifdef PPC |
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1401 , _tmp1(LIR_OprDesc::illegalOpr()) |
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1402 , _tmp2(LIR_OprDesc::illegalOpr()) |
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1403 #endif |
| 0 | 1404 , _bytecode(code) {} |
| 1405 | |
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1406 #ifdef PPC |
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1407 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub |
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1408 ,LIR_Opr tmp1, LIR_Opr tmp2) |
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1409 : LIR_Op1(lir_convert, opr, result) |
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1410 , _stub(stub) |
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1411 , _tmp1(tmp1) |
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1412 , _tmp2(tmp2) |
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1413 , _bytecode(code) {} |
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1414 #endif |
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1415 |
| 0 | 1416 Bytecodes::Code bytecode() const { return _bytecode; } |
| 1417 ConversionStub* stub() const { return _stub; } | |
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1418 #ifdef PPC |
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1419 LIR_Opr tmp1() const { return _tmp1; } |
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1420 LIR_Opr tmp2() const { return _tmp2; } |
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1421 #endif |
| 0 | 1422 |
| 1423 virtual void emit_code(LIR_Assembler* masm); | |
| 1424 virtual LIR_OpConvert* as_OpConvert() { return this; } | |
| 1425 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1426 | |
| 1427 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; | |
| 1428 }; | |
| 1429 | |
| 1430 | |
| 1431 // LIR_OpAllocObj | |
| 1432 class LIR_OpAllocObj : public LIR_Op1 { | |
| 1433 friend class LIR_OpVisitState; | |
| 1434 | |
| 1435 private: | |
| 1436 LIR_Opr _tmp1; | |
| 1437 LIR_Opr _tmp2; | |
| 1438 LIR_Opr _tmp3; | |
| 1439 LIR_Opr _tmp4; | |
| 1440 int _hdr_size; | |
| 1441 int _obj_size; | |
| 1442 CodeStub* _stub; | |
| 1443 bool _init_check; | |
| 1444 | |
| 1445 public: | |
| 1446 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, | |
| 1447 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, | |
| 1448 int hdr_size, int obj_size, bool init_check, CodeStub* stub) | |
| 1449 : LIR_Op1(lir_alloc_object, klass, result) | |
| 1450 , _tmp1(t1) | |
| 1451 , _tmp2(t2) | |
| 1452 , _tmp3(t3) | |
| 1453 , _tmp4(t4) | |
| 1454 , _hdr_size(hdr_size) | |
| 1455 , _obj_size(obj_size) | |
| 1456 , _init_check(init_check) | |
| 1457 , _stub(stub) { } | |
| 1458 | |
| 1459 LIR_Opr klass() const { return in_opr(); } | |
| 1460 LIR_Opr obj() const { return result_opr(); } | |
| 1461 LIR_Opr tmp1() const { return _tmp1; } | |
| 1462 LIR_Opr tmp2() const { return _tmp2; } | |
| 1463 LIR_Opr tmp3() const { return _tmp3; } | |
| 1464 LIR_Opr tmp4() const { return _tmp4; } | |
| 1465 int header_size() const { return _hdr_size; } | |
| 1466 int object_size() const { return _obj_size; } | |
| 1467 bool init_check() const { return _init_check; } | |
| 1468 CodeStub* stub() const { return _stub; } | |
| 1469 | |
| 1470 virtual void emit_code(LIR_Assembler* masm); | |
| 1471 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } | |
| 1472 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1473 }; | |
| 1474 | |
| 1475 | |
| 1476 // LIR_OpRoundFP | |
| 1477 class LIR_OpRoundFP : public LIR_Op1 { | |
| 1478 friend class LIR_OpVisitState; | |
| 1479 | |
| 1480 private: | |
| 1481 LIR_Opr _tmp; | |
| 1482 | |
| 1483 public: | |
| 1484 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) | |
| 1485 : LIR_Op1(lir_roundfp, reg, result) | |
| 1486 , _tmp(stack_loc_temp) {} | |
| 1487 | |
| 1488 LIR_Opr tmp() const { return _tmp; } | |
| 1489 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } | |
| 1490 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1491 }; | |
| 1492 | |
| 1493 // LIR_OpTypeCheck | |
| 1494 class LIR_OpTypeCheck: public LIR_Op { | |
| 1495 friend class LIR_OpVisitState; | |
| 1496 | |
| 1497 private: | |
| 1498 LIR_Opr _object; | |
| 1499 LIR_Opr _array; | |
| 1500 ciKlass* _klass; | |
| 1501 LIR_Opr _tmp1; | |
| 1502 LIR_Opr _tmp2; | |
| 1503 LIR_Opr _tmp3; | |
| 1504 bool _fast_check; | |
| 1505 CodeEmitInfo* _info_for_patch; | |
| 1506 CodeEmitInfo* _info_for_exception; | |
| 1507 CodeStub* _stub; | |
| 1508 ciMethod* _profiled_method; | |
| 1509 int _profiled_bci; | |
| 1783 | 1510 bool _should_profile; |
| 0 | 1511 |
| 1512 public: | |
| 1513 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
| 1514 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 1783 | 1515 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); |
| 0 | 1516 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, |
| 1783 | 1517 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); |
| 0 | 1518 |
| 1519 LIR_Opr object() const { return _object; } | |
| 1520 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } | |
| 1521 LIR_Opr tmp1() const { return _tmp1; } | |
| 1522 LIR_Opr tmp2() const { return _tmp2; } | |
| 1523 LIR_Opr tmp3() const { return _tmp3; } | |
| 1524 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } | |
| 1525 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } | |
| 1526 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } | |
| 1527 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } | |
| 1528 CodeStub* stub() const { return _stub; } | |
| 1529 | |
| 1530 // methodDataOop profiling | |
| 1783 | 1531 void set_profiled_method(ciMethod *method) { _profiled_method = method; } |
| 1532 void set_profiled_bci(int bci) { _profiled_bci = bci; } | |
| 1533 void set_should_profile(bool b) { _should_profile = b; } | |
| 1534 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1535 int profiled_bci() const { return _profiled_bci; } | |
| 1536 bool should_profile() const { return _should_profile; } | |
| 0 | 1537 |
| 1538 virtual void emit_code(LIR_Assembler* masm); | |
| 1539 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } | |
| 1540 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1541 }; | |
| 1542 | |
| 1543 // LIR_Op2 | |
| 1544 class LIR_Op2: public LIR_Op { | |
| 1545 friend class LIR_OpVisitState; | |
| 1546 | |
| 1547 int _fpu_stack_size; // for sin/cos implementation on Intel | |
| 1548 | |
| 1549 protected: | |
| 1550 LIR_Opr _opr1; | |
| 1551 LIR_Opr _opr2; | |
| 1552 BasicType _type; | |
| 1553 LIR_Opr _tmp; | |
| 1554 LIR_Condition _condition; | |
| 1555 | |
| 1556 void verify() const; | |
| 1557 | |
| 1558 public: | |
| 1559 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) | |
| 1560 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1561 , _opr1(opr1) | |
| 1562 , _opr2(opr2) | |
| 1563 , _type(T_ILLEGAL) | |
| 1564 , _condition(condition) | |
| 1565 , _fpu_stack_size(0) | |
| 1566 , _tmp(LIR_OprFact::illegalOpr) { | |
| 1567 assert(code == lir_cmp, "code check"); | |
| 1568 } | |
| 1569 | |
| 1570 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result) | |
| 1571 : LIR_Op(code, result, NULL) | |
| 1572 , _opr1(opr1) | |
| 1573 , _opr2(opr2) | |
| 1574 , _type(T_ILLEGAL) | |
| 1575 , _condition(condition) | |
| 1576 , _fpu_stack_size(0) | |
| 1577 , _tmp(LIR_OprFact::illegalOpr) { | |
| 1578 assert(code == lir_cmove, "code check"); | |
| 1579 } | |
| 1580 | |
| 1581 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, | |
| 1582 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) | |
| 1583 : LIR_Op(code, result, info) | |
| 1584 , _opr1(opr1) | |
| 1585 , _opr2(opr2) | |
| 1586 , _type(type) | |
| 1587 , _condition(lir_cond_unknown) | |
| 1588 , _fpu_stack_size(0) | |
| 1589 , _tmp(LIR_OprFact::illegalOpr) { | |
| 1590 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); | |
| 1591 } | |
| 1592 | |
| 1593 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp) | |
| 1594 : LIR_Op(code, result, NULL) | |
| 1595 , _opr1(opr1) | |
| 1596 , _opr2(opr2) | |
| 1597 , _type(T_ILLEGAL) | |
| 1598 , _condition(lir_cond_unknown) | |
| 1599 , _fpu_stack_size(0) | |
| 1600 , _tmp(tmp) { | |
| 1601 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); | |
| 1602 } | |
| 1603 | |
| 1604 LIR_Opr in_opr1() const { return _opr1; } | |
| 1605 LIR_Opr in_opr2() const { return _opr2; } | |
| 1606 BasicType type() const { return _type; } | |
| 1607 LIR_Opr tmp_opr() const { return _tmp; } | |
| 1608 LIR_Condition condition() const { | |
| 1609 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition; | |
| 1610 } | |
|
1681
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1611 void set_condition(LIR_Condition condition) { |
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1612 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; |
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1613 } |
| 0 | 1614 |
| 1615 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } | |
| 1616 int fpu_stack_size() const { return _fpu_stack_size; } | |
| 1617 | |
| 1618 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } | |
| 1619 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } | |
| 1620 | |
| 1621 virtual void emit_code(LIR_Assembler* masm); | |
| 1622 virtual LIR_Op2* as_Op2() { return this; } | |
| 1623 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1624 }; | |
| 1625 | |
| 1626 class LIR_OpAllocArray : public LIR_Op { | |
| 1627 friend class LIR_OpVisitState; | |
| 1628 | |
| 1629 private: | |
| 1630 LIR_Opr _klass; | |
| 1631 LIR_Opr _len; | |
| 1632 LIR_Opr _tmp1; | |
| 1633 LIR_Opr _tmp2; | |
| 1634 LIR_Opr _tmp3; | |
| 1635 LIR_Opr _tmp4; | |
| 1636 BasicType _type; | |
| 1637 CodeStub* _stub; | |
| 1638 | |
| 1639 public: | |
| 1640 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) | |
| 1641 : LIR_Op(lir_alloc_array, result, NULL) | |
| 1642 , _klass(klass) | |
| 1643 , _len(len) | |
| 1644 , _tmp1(t1) | |
| 1645 , _tmp2(t2) | |
| 1646 , _tmp3(t3) | |
| 1647 , _tmp4(t4) | |
| 1648 , _type(type) | |
| 1649 , _stub(stub) {} | |
| 1650 | |
| 1651 LIR_Opr klass() const { return _klass; } | |
| 1652 LIR_Opr len() const { return _len; } | |
| 1653 LIR_Opr obj() const { return result_opr(); } | |
| 1654 LIR_Opr tmp1() const { return _tmp1; } | |
| 1655 LIR_Opr tmp2() const { return _tmp2; } | |
| 1656 LIR_Opr tmp3() const { return _tmp3; } | |
| 1657 LIR_Opr tmp4() const { return _tmp4; } | |
| 1658 BasicType type() const { return _type; } | |
| 1659 CodeStub* stub() const { return _stub; } | |
| 1660 | |
| 1661 virtual void emit_code(LIR_Assembler* masm); | |
| 1662 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } | |
| 1663 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1664 }; | |
| 1665 | |
| 1666 | |
| 1667 class LIR_Op3: public LIR_Op { | |
| 1668 friend class LIR_OpVisitState; | |
| 1669 | |
| 1670 private: | |
| 1671 LIR_Opr _opr1; | |
| 1672 LIR_Opr _opr2; | |
| 1673 LIR_Opr _opr3; | |
| 1674 public: | |
| 1675 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1676 : LIR_Op(code, result, info) | |
| 1677 , _opr1(opr1) | |
| 1678 , _opr2(opr2) | |
| 1679 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } | |
| 1680 LIR_Opr in_opr1() const { return _opr1; } | |
| 1681 LIR_Opr in_opr2() const { return _opr2; } | |
| 1682 LIR_Opr in_opr3() const { return _opr3; } | |
| 1683 | |
| 1684 virtual void emit_code(LIR_Assembler* masm); | |
| 1685 virtual LIR_Op3* as_Op3() { return this; } | |
| 1686 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1687 }; | |
| 1688 | |
| 1689 | |
| 1690 //-------------------------------- | |
| 1691 class LabelObj: public CompilationResourceObj { | |
| 1692 private: | |
| 1693 Label _label; | |
| 1694 public: | |
| 1695 LabelObj() {} | |
| 1696 Label* label() { return &_label; } | |
| 1697 }; | |
| 1698 | |
| 1699 | |
| 1700 class LIR_OpLock: public LIR_Op { | |
| 1701 friend class LIR_OpVisitState; | |
| 1702 | |
| 1703 private: | |
| 1704 LIR_Opr _hdr; | |
| 1705 LIR_Opr _obj; | |
| 1706 LIR_Opr _lock; | |
| 1707 LIR_Opr _scratch; | |
| 1708 CodeStub* _stub; | |
| 1709 public: | |
| 1710 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) | |
| 1711 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1712 , _hdr(hdr) | |
| 1713 , _obj(obj) | |
| 1714 , _lock(lock) | |
| 1715 , _scratch(scratch) | |
| 1716 , _stub(stub) {} | |
| 1717 | |
| 1718 LIR_Opr hdr_opr() const { return _hdr; } | |
| 1719 LIR_Opr obj_opr() const { return _obj; } | |
| 1720 LIR_Opr lock_opr() const { return _lock; } | |
| 1721 LIR_Opr scratch_opr() const { return _scratch; } | |
| 1722 CodeStub* stub() const { return _stub; } | |
| 1723 | |
| 1724 virtual void emit_code(LIR_Assembler* masm); | |
| 1725 virtual LIR_OpLock* as_OpLock() { return this; } | |
| 1726 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1727 }; | |
| 1728 | |
| 1729 | |
| 1730 class LIR_OpDelay: public LIR_Op { | |
| 1731 friend class LIR_OpVisitState; | |
| 1732 | |
| 1733 private: | |
| 1734 LIR_Op* _op; | |
| 1735 | |
| 1736 public: | |
| 1737 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): | |
| 1738 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), | |
| 1739 _op(op) { | |
| 1740 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); | |
| 1741 } | |
| 1742 virtual void emit_code(LIR_Assembler* masm); | |
| 1743 virtual LIR_OpDelay* as_OpDelay() { return this; } | |
| 1744 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1745 LIR_Op* delay_op() const { return _op; } | |
| 1746 CodeEmitInfo* call_info() const { return info(); } | |
| 1747 }; | |
| 1748 | |
| 1749 | |
| 1750 // LIR_OpCompareAndSwap | |
| 1751 class LIR_OpCompareAndSwap : public LIR_Op { | |
| 1752 friend class LIR_OpVisitState; | |
| 1753 | |
| 1754 private: | |
| 1755 LIR_Opr _addr; | |
| 1756 LIR_Opr _cmp_value; | |
| 1757 LIR_Opr _new_value; | |
| 1758 LIR_Opr _tmp1; | |
| 1759 LIR_Opr _tmp2; | |
| 1760 | |
| 1761 public: | |
|
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1762 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1763 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) |
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1764 : LIR_Op(code, result, NULL) // no result, no info |
| 0 | 1765 , _addr(addr) |
| 1766 , _cmp_value(cmp_value) | |
| 1767 , _new_value(new_value) | |
| 1768 , _tmp1(t1) | |
| 1769 , _tmp2(t2) { } | |
| 1770 | |
| 1771 LIR_Opr addr() const { return _addr; } | |
| 1772 LIR_Opr cmp_value() const { return _cmp_value; } | |
| 1773 LIR_Opr new_value() const { return _new_value; } | |
| 1774 LIR_Opr tmp1() const { return _tmp1; } | |
| 1775 LIR_Opr tmp2() const { return _tmp2; } | |
| 1776 | |
| 1777 virtual void emit_code(LIR_Assembler* masm); | |
| 1778 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } | |
| 1779 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1780 }; | |
| 1781 | |
| 1782 // LIR_OpProfileCall | |
| 1783 class LIR_OpProfileCall : public LIR_Op { | |
| 1784 friend class LIR_OpVisitState; | |
| 1785 | |
| 1786 private: | |
| 1787 ciMethod* _profiled_method; | |
| 1788 int _profiled_bci; | |
| 1789 LIR_Opr _mdo; | |
| 1790 LIR_Opr _recv; | |
| 1791 LIR_Opr _tmp1; | |
| 1792 ciKlass* _known_holder; | |
| 1793 | |
| 1794 public: | |
| 1795 // Destroys recv | |
| 1796 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) | |
| 1797 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info | |
| 1798 , _profiled_method(profiled_method) | |
| 1799 , _profiled_bci(profiled_bci) | |
| 1800 , _mdo(mdo) | |
| 1801 , _recv(recv) | |
| 1802 , _tmp1(t1) | |
| 1803 , _known_holder(known_holder) { } | |
| 1804 | |
| 1805 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1806 int profiled_bci() const { return _profiled_bci; } | |
| 1807 LIR_Opr mdo() const { return _mdo; } | |
| 1808 LIR_Opr recv() const { return _recv; } | |
| 1809 LIR_Opr tmp1() const { return _tmp1; } | |
| 1810 ciKlass* known_holder() const { return _known_holder; } | |
| 1811 | |
| 1812 virtual void emit_code(LIR_Assembler* masm); | |
| 1813 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } | |
| 1814 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1815 }; | |
| 1816 | |
| 1817 class LIR_InsertionBuffer; | |
| 1818 | |
| 1819 //--------------------------------LIR_List--------------------------------------------------- | |
| 1820 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) | |
| 1821 // The LIR instructions are appended by the LIR_List class itself; | |
| 1822 // | |
| 1823 // Notes: | |
| 1824 // - all offsets are(should be) in bytes | |
| 1825 // - local positions are specified with an offset, with offset 0 being local 0 | |
| 1826 | |
| 1827 class LIR_List: public CompilationResourceObj { | |
| 1828 private: | |
| 1829 LIR_OpList _operations; | |
| 1830 | |
| 1831 Compilation* _compilation; | |
| 1832 #ifndef PRODUCT | |
| 1833 BlockBegin* _block; | |
| 1834 #endif | |
| 1835 #ifdef ASSERT | |
| 1836 const char * _file; | |
| 1837 int _line; | |
| 1838 #endif | |
| 1839 | |
| 1840 void append(LIR_Op* op) { | |
| 1841 if (op->source() == NULL) | |
| 1842 op->set_source(_compilation->current_instruction()); | |
| 1843 #ifndef PRODUCT | |
| 1844 if (PrintIRWithLIR) { | |
| 1845 _compilation->maybe_print_current_instruction(); | |
| 1846 op->print(); tty->cr(); | |
| 1847 } | |
| 1848 #endif // PRODUCT | |
| 1849 | |
| 1850 _operations.append(op); | |
| 1851 | |
| 1852 #ifdef ASSERT | |
| 1853 op->verify(); | |
| 1854 op->set_file_and_line(_file, _line); | |
| 1855 _file = NULL; | |
| 1856 _line = 0; | |
| 1857 #endif | |
| 1858 } | |
| 1859 | |
| 1860 public: | |
| 1861 LIR_List(Compilation* compilation, BlockBegin* block = NULL); | |
| 1862 | |
| 1863 #ifdef ASSERT | |
| 1864 void set_file_and_line(const char * file, int line); | |
| 1865 #endif | |
| 1866 | |
| 1867 //---------- accessors --------------- | |
| 1868 LIR_OpList* instructions_list() { return &_operations; } | |
| 1869 int length() const { return _operations.length(); } | |
| 1870 LIR_Op* at(int i) const { return _operations.at(i); } | |
| 1871 | |
| 1872 NOT_PRODUCT(BlockBegin* block() const { return _block; }); | |
| 1873 | |
| 1874 // insert LIR_Ops in buffer to right places in LIR_List | |
| 1875 void append(LIR_InsertionBuffer* buffer); | |
| 1876 | |
| 1877 //---------- mutators --------------- | |
| 1878 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } | |
| 1879 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } | |
| 1783 | 1880 void remove_at(int i) { _operations.remove_at(i); } |
| 0 | 1881 |
| 1882 //---------- printing ------------- | |
| 1883 void print_instructions() PRODUCT_RETURN; | |
| 1884 | |
| 1885 | |
| 1886 //---------- instructions ------------- | |
| 1887 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1888 address dest, LIR_OprList* arguments, | |
| 1889 CodeEmitInfo* info) { | |
| 1890 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1891 } | |
| 1892 void call_static(ciMethod* method, LIR_Opr result, | |
| 1893 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1894 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); | |
| 1895 } | |
| 1896 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1897 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1898 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1899 } | |
| 1900 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1901 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1902 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); | |
| 1903 } | |
| 1295 | 1904 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
| 1905 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1906 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); | |
| 1907 } | |
| 0 | 1908 |
| 1909 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } | |
| 1910 void word_align() { append(new LIR_Op0(lir_word_align)); } | |
| 1911 void membar() { append(new LIR_Op0(lir_membar)); } | |
| 1912 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } | |
| 1913 void membar_release() { append(new LIR_Op0(lir_membar_release)); } | |
| 1914 | |
| 1915 void nop() { append(new LIR_Op0(lir_nop)); } | |
| 1916 void build_frame() { append(new LIR_Op0(lir_build_frame)); } | |
| 1917 | |
| 1918 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } | |
| 1919 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } | |
| 1920 | |
| 1921 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } | |
| 1922 | |
| 1923 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } | |
| 1924 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } | |
| 1925 | |
| 1926 // result is a stack location for old backend and vreg for UseLinearScan | |
| 1927 // stack_loc_temp is an illegal register for old backend | |
| 1928 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } | |
| 1929 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1930 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1931 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1932 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 1933 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } | |
| 1934 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } | |
| 1935 | |
| 1936 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } | |
| 1937 | |
| 1938 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } | |
| 1939 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); | |
| 1940 | |
| 1941 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } | |
| 1942 | |
| 1943 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } | |
| 1944 | |
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1945 #ifdef PPC |
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1946 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } |
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1947 #endif |
| 0 | 1948 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } |
| 1949 | |
| 1950 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } | |
| 1951 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } | |
| 1952 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } | |
| 1953 | |
| 1783 | 1954 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } |
| 1955 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } | |
| 1956 | |
| 0 | 1957 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } |
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1958 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { |
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1959 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); |
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1960 } |
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1961 void unwind_exception(LIR_Opr exceptionOop) { |
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1962 append(new LIR_Op1(lir_unwind, exceptionOop)); |
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1963 } |
| 0 | 1964 |
| 1965 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { | |
| 1966 append(new LIR_Op2(lir_compare_to, left, right, dst)); | |
| 1967 } | |
| 1968 | |
| 1969 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } | |
| 1970 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } | |
| 1971 | |
| 1972 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { | |
| 1973 append(new LIR_Op2(lir_cmp, condition, left, right, info)); | |
| 1974 } | |
| 1975 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { | |
| 1976 cmp(condition, left, LIR_OprFact::intConst(right), info); | |
| 1977 } | |
| 1978 | |
| 1979 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); | |
| 1980 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); | |
| 1981 | |
| 1982 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) { | |
| 1983 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst)); | |
| 1984 } | |
| 1985 | |
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1986 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1987 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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1988 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1989 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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1990 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1991 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
| 0 | 1992 |
| 1993 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } | |
| 1994 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } | |
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1995 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } |
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1996 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } |
| 0 | 1997 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } |
| 1998 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } | |
| 1999 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } | |
| 2000 | |
| 2001 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } | |
| 2002 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } | |
| 2003 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } | |
| 2004 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } | |
| 2005 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } | |
| 2006 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } | |
| 2007 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } | |
| 2008 | |
| 2009 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2010 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2011 | |
| 2012 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2013 | |
| 2014 void prefetch(LIR_Address* addr, bool is_store); | |
| 2015 | |
| 2016 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2017 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2018 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2019 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2020 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2021 | |
| 2022 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2023 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2024 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2025 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2026 | |
| 2027 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); | |
| 2028 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); | |
| 2029 | |
| 2030 // jump is an unconditional branch | |
| 2031 void jump(BlockBegin* block) { | |
| 2032 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); | |
| 2033 } | |
| 2034 void jump(CodeStub* stub) { | |
| 2035 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); | |
| 2036 } | |
| 2037 void branch(LIR_Condition cond, Label* lbl) { append(new LIR_OpBranch(cond, lbl)); } | |
| 2038 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { | |
| 2039 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2040 append(new LIR_OpBranch(cond, type, block)); | |
| 2041 } | |
| 2042 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { | |
| 2043 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2044 append(new LIR_OpBranch(cond, type, stub)); | |
| 2045 } | |
| 2046 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { | |
| 2047 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); | |
| 2048 append(new LIR_OpBranch(cond, type, block, unordered)); | |
| 2049 } | |
| 2050 | |
| 2051 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2052 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2053 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2054 | |
| 2055 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2056 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2057 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2058 | |
| 2059 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } | |
| 2060 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); | |
| 2061 | |
| 2062 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { | |
| 2063 append(new LIR_OpRTCall(routine, tmp, result, arguments)); | |
| 2064 } | |
| 2065 | |
| 2066 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, | |
| 2067 LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 2068 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); | |
| 2069 } | |
| 2070 | |
| 2071 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } | |
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2072 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); |
| 0 | 2073 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); |
| 2074 | |
| 2075 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } | |
| 2076 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } | |
| 2077 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } | |
| 2078 | |
| 2079 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } | |
| 2080 | |
| 2081 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } | |
| 2082 | |
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2083 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); |
| 1783 | 2084 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); |
| 2085 | |
| 0 | 2086 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, |
| 2087 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 2088 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, | |
| 2089 ciMethod* profiled_method, int profiled_bci); | |
| 2090 // methodDataOop profiling | |
| 1783 | 2091 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { |
| 2092 append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass)); | |
| 2093 } | |
| 0 | 2094 }; |
| 2095 | |
| 2096 void print_LIR(BlockList* blocks); | |
| 2097 | |
| 2098 class LIR_InsertionBuffer : public CompilationResourceObj { | |
| 2099 private: | |
| 2100 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) | |
| 2101 | |
| 2102 // list of insertion points. index and count are stored alternately: | |
| 2103 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted | |
| 2104 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index | |
| 2105 intStack _index_and_count; | |
| 2106 | |
| 2107 // the LIR_Ops to be inserted | |
| 2108 LIR_OpList _ops; | |
| 2109 | |
| 2110 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } | |
| 2111 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } | |
| 2112 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } | |
| 2113 | |
| 2114 #ifdef ASSERT | |
| 2115 void verify(); | |
| 2116 #endif | |
| 2117 public: | |
| 2118 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } | |
| 2119 | |
| 2120 // must be called before using the insertion buffer | |
| 2121 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } | |
| 2122 bool initialized() const { return _lir != NULL; } | |
| 2123 // called automatically when the buffer is appended to the LIR_List | |
| 2124 void finish() { _lir = NULL; } | |
| 2125 | |
| 2126 // accessors | |
| 2127 LIR_List* lir_list() const { return _lir; } | |
| 2128 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } | |
| 2129 int index_at(int i) const { return _index_and_count.at((i << 1)); } | |
| 2130 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } | |
| 2131 | |
| 2132 int number_of_ops() const { return _ops.length(); } | |
| 2133 LIR_Op* op_at(int i) const { return _ops.at(i); } | |
| 2134 | |
| 2135 // append an instruction to the buffer | |
| 2136 void append(int index, LIR_Op* op); | |
| 2137 | |
| 2138 // instruction | |
| 2139 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 2140 }; | |
| 2141 | |
| 2142 | |
| 2143 // | |
| 2144 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. | |
| 2145 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes | |
| 2146 // information about the input, output and temporaries used by the | |
| 2147 // op to be recorded. It also records whether the op has call semantics | |
| 2148 // and also records all the CodeEmitInfos used by this op. | |
| 2149 // | |
| 2150 | |
| 2151 | |
| 2152 class LIR_OpVisitState: public StackObj { | |
| 2153 public: | |
| 2154 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; | |
| 2155 | |
| 2156 enum { | |
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2157 maxNumberOfOperands = 16, |
| 0 | 2158 maxNumberOfInfos = 4 |
| 2159 }; | |
| 2160 | |
| 2161 private: | |
| 2162 LIR_Op* _op; | |
| 2163 | |
| 2164 // optimization: the operands and infos are not stored in a variable-length | |
| 2165 // list, but in a fixed-size array to save time of size checks and resizing | |
| 2166 int _oprs_len[numModes]; | |
| 2167 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; | |
| 2168 int _info_len; | |
| 2169 CodeEmitInfo* _info_new[maxNumberOfInfos]; | |
| 2170 | |
| 2171 bool _has_call; | |
| 2172 bool _has_slow_case; | |
| 2173 | |
| 2174 | |
| 2175 // only include register operands | |
| 2176 // addresses are decomposed to the base and index registers | |
| 2177 // constants and stack operands are ignored | |
| 2178 void append(LIR_Opr& opr, OprMode mode) { | |
| 2179 assert(opr->is_valid(), "should not call this otherwise"); | |
| 2180 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2181 | |
| 2182 if (opr->is_register()) { | |
| 2183 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); | |
| 2184 _oprs_new[mode][_oprs_len[mode]++] = &opr; | |
| 2185 | |
| 2186 } else if (opr->is_pointer()) { | |
| 2187 LIR_Address* address = opr->as_address_ptr(); | |
| 2188 if (address != NULL) { | |
| 2189 // special handling for addresses: add base and index register of the address | |
| 2190 // both are always input operands! | |
| 2191 if (address->_base->is_valid()) { | |
| 2192 assert(address->_base->is_register(), "must be"); | |
| 2193 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); | |
| 2194 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base; | |
| 2195 } | |
| 2196 if (address->_index->is_valid()) { | |
| 2197 assert(address->_index->is_register(), "must be"); | |
| 2198 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); | |
| 2199 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index; | |
| 2200 } | |
| 2201 | |
| 2202 } else { | |
| 2203 assert(opr->is_constant(), "constant operands are not processed"); | |
| 2204 } | |
| 2205 } else { | |
| 2206 assert(opr->is_stack(), "stack operands are not processed"); | |
| 2207 } | |
| 2208 } | |
| 2209 | |
| 2210 void append(CodeEmitInfo* info) { | |
| 2211 assert(info != NULL, "should not call this otherwise"); | |
| 2212 assert(_info_len < maxNumberOfInfos, "array overflow"); | |
| 2213 _info_new[_info_len++] = info; | |
| 2214 } | |
| 2215 | |
| 2216 public: | |
| 2217 LIR_OpVisitState() { reset(); } | |
| 2218 | |
| 2219 LIR_Op* op() const { return _op; } | |
| 2220 void set_op(LIR_Op* op) { reset(); _op = op; } | |
| 2221 | |
| 2222 bool has_call() const { return _has_call; } | |
| 2223 bool has_slow_case() const { return _has_slow_case; } | |
| 2224 | |
| 2225 void reset() { | |
| 2226 _op = NULL; | |
| 2227 _has_call = false; | |
| 2228 _has_slow_case = false; | |
| 2229 | |
| 2230 _oprs_len[inputMode] = 0; | |
| 2231 _oprs_len[tempMode] = 0; | |
| 2232 _oprs_len[outputMode] = 0; | |
| 2233 _info_len = 0; | |
| 2234 } | |
| 2235 | |
| 2236 | |
| 2237 int opr_count(OprMode mode) const { | |
| 2238 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2239 return _oprs_len[mode]; | |
| 2240 } | |
| 2241 | |
| 2242 LIR_Opr opr_at(OprMode mode, int index) const { | |
| 2243 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2244 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2245 return *_oprs_new[mode][index]; | |
| 2246 } | |
| 2247 | |
| 2248 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { | |
| 2249 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2250 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2251 *_oprs_new[mode][index] = opr; | |
| 2252 } | |
| 2253 | |
| 2254 int info_count() const { | |
| 2255 return _info_len; | |
| 2256 } | |
| 2257 | |
| 2258 CodeEmitInfo* info_at(int index) const { | |
| 2259 assert(index < _info_len, "index out of bounds"); | |
| 2260 return _info_new[index]; | |
| 2261 } | |
| 2262 | |
| 2263 XHandlers* all_xhandler(); | |
| 2264 | |
| 2265 // collects all register operands of the instruction | |
| 2266 void visit(LIR_Op* op); | |
| 2267 | |
| 2268 #if ASSERT | |
| 2269 // check that an operation has no operands | |
| 2270 bool no_operands(LIR_Op* op); | |
| 2271 #endif | |
| 2272 | |
| 2273 // LIR_Op visitor functions use these to fill in the state | |
| 2274 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } | |
| 2275 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } | |
| 2276 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } | |
| 2277 void do_info(CodeEmitInfo* info) { append(info); } | |
| 2278 | |
| 2279 void do_stub(CodeStub* stub); | |
| 2280 void do_call() { _has_call = true; } | |
| 2281 void do_slow_case() { _has_slow_case = true; } | |
| 2282 void do_slow_case(CodeEmitInfo* info) { | |
| 2283 _has_slow_case = true; | |
| 2284 append(info); | |
| 2285 } | |
| 2286 }; | |
| 2287 | |
| 2288 | |
| 2289 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; | |
| 1972 | 2290 |
| 2291 #endif // SHARE_VM_C1_C1_LIR_HPP |