Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 22460:f27c163d7dc2
moved JVMCI fields from ThreadShadow to Thread
author | Doug Simon <doug.simon@oracle.com> |
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date | Mon, 24 Aug 2015 22:35:47 +0200 |
parents | c2c971a9776f |
children | b14500c9da22 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
1972 | 28 #include "code/debugInfoRec.hpp" |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
22298 | 43 #if INCLUDE_JVMCI |
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44 #include "jvmci/jvmciJavaAccess.hpp" |
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45 #endif |
0 | 46 |
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47 #define __ masm-> |
0 | 48 |
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49 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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50 |
0 | 51 class SimpleRuntimeFrame { |
52 | |
53 public: | |
54 | |
55 // Most of the runtime stubs have this simple frame layout. | |
56 // This class exists to make the layout shared in one place. | |
57 // Offsets are for compiler stack slots, which are jints. | |
58 enum layout { | |
59 // The frame sender code expects that rbp will be in the "natural" place and | |
60 // will override any oopMap setting for it. We must therefore force the layout | |
61 // so that it agrees with the frame sender code. | |
62 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
63 rbp_off2, | |
64 return_off, return_off2, | |
65 framesize | |
66 }; | |
67 }; | |
68 | |
69 class RegisterSaver { | |
70 // Capture info about frame layout. Layout offsets are in jint | |
71 // units because compiler frame slots are jints. | |
72 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
73 enum layout { | |
74 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
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75 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area |
0 | 76 DEF_XMM_OFFS(0), |
77 DEF_XMM_OFFS(1), | |
78 DEF_XMM_OFFS(2), | |
79 DEF_XMM_OFFS(3), | |
80 DEF_XMM_OFFS(4), | |
81 DEF_XMM_OFFS(5), | |
82 DEF_XMM_OFFS(6), | |
83 DEF_XMM_OFFS(7), | |
84 DEF_XMM_OFFS(8), | |
85 DEF_XMM_OFFS(9), | |
86 DEF_XMM_OFFS(10), | |
87 DEF_XMM_OFFS(11), | |
88 DEF_XMM_OFFS(12), | |
89 DEF_XMM_OFFS(13), | |
90 DEF_XMM_OFFS(14), | |
91 DEF_XMM_OFFS(15), | |
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92 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), |
0 | 93 fpu_stateH_end, |
94 r15_off, r15H_off, | |
95 r14_off, r14H_off, | |
96 r13_off, r13H_off, | |
97 r12_off, r12H_off, | |
98 r11_off, r11H_off, | |
99 r10_off, r10H_off, | |
100 r9_off, r9H_off, | |
101 r8_off, r8H_off, | |
102 rdi_off, rdiH_off, | |
103 rsi_off, rsiH_off, | |
104 ignore_off, ignoreH_off, // extra copy of rbp | |
105 rsp_off, rspH_off, | |
106 rbx_off, rbxH_off, | |
107 rdx_off, rdxH_off, | |
108 rcx_off, rcxH_off, | |
109 rax_off, raxH_off, | |
110 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
111 align_off, alignH_off, | |
112 flags_off, flagsH_off, | |
113 // The frame sender code expects that rbp will be in the "natural" place and | |
114 // will override any oopMap setting for it. We must therefore force the layout | |
115 // so that it agrees with the frame sender code. | |
116 rbp_off, rbpH_off, // copy of rbp we will restore | |
117 return_off, returnH_off, // slot for return address | |
118 reg_save_size // size in compiler stack slots | |
119 }; | |
120 | |
121 public: | |
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122 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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123 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
0 | 124 |
125 // Offsets into the register save area | |
126 // Used by deoptimization when it is managing result register | |
127 // values on its own | |
128 | |
129 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 130 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 131 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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132 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
0 | 133 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
134 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
135 | |
136 // During deoptimization only the result registers need to be restored, | |
137 // all the other values have already been extracted. | |
138 static void restore_result_registers(MacroAssembler* masm); | |
139 }; | |
140 | |
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141 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
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142 int vect_words = 0; |
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143 int ymmhi_offset = -1; |
22298 | 144 #if defined(COMPILER2) || INCLUDE_JVMCI |
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145 if (save_vectors) { |
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146 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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147 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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148 // Save upper half of YMM registes |
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149 vect_words = 16 * 16 / wordSize; |
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150 ymmhi_offset = additional_frame_words; |
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151 additional_frame_words += vect_words; |
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152 } |
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153 #else |
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154 assert(!save_vectors, "vectors are generated only by C2 and JVMCI"); |
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155 #endif |
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156 |
0 | 157 // Always make the frame size 16-byte aligned |
158 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
159 reg_save_size*BytesPerInt, 16); | |
160 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
161 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
162 // The caller will allocate additional_frame_words | |
163 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
164 // CodeBlob frame size is in words. | |
165 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
166 *total_frame_words = frame_size_in_words; | |
167 | |
168 // Save registers, fpu state, and flags. | |
169 // We assume caller has already pushed the return address onto the | |
170 // stack, so rsp is 8-byte aligned here. | |
171 // We push rpb twice in this sequence because we want the real rbp | |
172 // to be under the return like a normal enter. | |
173 | |
174 __ enter(); // rsp becomes 16-byte aligned here | |
175 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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176 |
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177 if (vect_words > 0) { |
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178 assert(vect_words*wordSize == 256, ""); |
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179 __ subptr(rsp, 256); // Save upper half of YMM registes |
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180 __ vextractf128h(Address(rsp, 0),xmm0); |
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181 __ vextractf128h(Address(rsp, 16),xmm1); |
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182 __ vextractf128h(Address(rsp, 32),xmm2); |
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183 __ vextractf128h(Address(rsp, 48),xmm3); |
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184 __ vextractf128h(Address(rsp, 64),xmm4); |
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185 __ vextractf128h(Address(rsp, 80),xmm5); |
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186 __ vextractf128h(Address(rsp, 96),xmm6); |
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187 __ vextractf128h(Address(rsp,112),xmm7); |
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188 __ vextractf128h(Address(rsp,128),xmm8); |
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189 __ vextractf128h(Address(rsp,144),xmm9); |
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190 __ vextractf128h(Address(rsp,160),xmm10); |
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191 __ vextractf128h(Address(rsp,176),xmm11); |
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192 __ vextractf128h(Address(rsp,192),xmm12); |
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193 __ vextractf128h(Address(rsp,208),xmm13); |
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194 __ vextractf128h(Address(rsp,224),xmm14); |
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195 __ vextractf128h(Address(rsp,240),xmm15); |
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196 } |
0 | 197 if (frame::arg_reg_save_area_bytes != 0) { |
198 // Allocate argument register save area | |
304 | 199 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 200 } |
201 | |
202 // Set an oopmap for the call site. This oopmap will map all | |
203 // oop-registers and debug-info registers as callee-saved. This | |
204 // will allow deoptimization at this safepoint to find all possible | |
205 // debug-info recordings, as well as let GC find all oops. | |
206 | |
207 OopMapSet *oop_maps = new OopMapSet(); | |
208 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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209 |
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210 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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211 #define YMMHI_STACK_OFFSET(x) VMRegImpl::stack2reg((x / VMRegImpl::stack_slot_size) + ymmhi_offset) |
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212 |
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213 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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214 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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215 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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216 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
0 | 217 // rbp location is known implicitly by the frame sender code, needs no oopmap |
218 // and the location where rbp was saved by is ignored | |
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219 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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220 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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221 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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222 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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223 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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224 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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225 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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226 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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227 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
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228 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
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229 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
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230 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
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231 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
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232 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
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233 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
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234 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
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235 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
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238 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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239 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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240 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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241 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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242 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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243 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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244 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
0 | 245 |
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246 |
22298 | 247 #if defined(COMPILER2) || INCLUDE_JVMCI |
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248 if (save_vectors) { |
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249 assert(ymmhi_offset != -1, "save area must exist"); |
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250 map->set_callee_saved(YMMHI_STACK_OFFSET( 0), xmm0->as_VMReg()->next()->next()->next()->next()); |
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251 map->set_callee_saved(YMMHI_STACK_OFFSET( 16), xmm1->as_VMReg()->next()->next()->next()->next()); |
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252 map->set_callee_saved(YMMHI_STACK_OFFSET( 32), xmm2->as_VMReg()->next()->next()->next()->next()); |
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253 map->set_callee_saved(YMMHI_STACK_OFFSET( 48), xmm3->as_VMReg()->next()->next()->next()->next()); |
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254 map->set_callee_saved(YMMHI_STACK_OFFSET( 64), xmm4->as_VMReg()->next()->next()->next()->next()); |
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255 map->set_callee_saved(YMMHI_STACK_OFFSET( 80), xmm5->as_VMReg()->next()->next()->next()->next()); |
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256 map->set_callee_saved(YMMHI_STACK_OFFSET( 96), xmm6->as_VMReg()->next()->next()->next()->next()); |
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257 map->set_callee_saved(YMMHI_STACK_OFFSET(112), xmm7->as_VMReg()->next()->next()->next()->next()); |
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258 map->set_callee_saved(YMMHI_STACK_OFFSET(128), xmm8->as_VMReg()->next()->next()->next()->next()); |
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259 map->set_callee_saved(YMMHI_STACK_OFFSET(144), xmm9->as_VMReg()->next()->next()->next()->next()); |
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260 map->set_callee_saved(YMMHI_STACK_OFFSET(160), xmm10->as_VMReg()->next()->next()->next()->next()); |
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261 map->set_callee_saved(YMMHI_STACK_OFFSET(176), xmm11->as_VMReg()->next()->next()->next()->next()); |
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262 map->set_callee_saved(YMMHI_STACK_OFFSET(192), xmm12->as_VMReg()->next()->next()->next()->next()); |
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263 map->set_callee_saved(YMMHI_STACK_OFFSET(208), xmm13->as_VMReg()->next()->next()->next()->next()); |
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264 map->set_callee_saved(YMMHI_STACK_OFFSET(224), xmm14->as_VMReg()->next()->next()->next()->next()); |
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265 map->set_callee_saved(YMMHI_STACK_OFFSET(240), xmm15->as_VMReg()->next()->next()->next()->next()); |
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266 } |
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267 #endif |
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268 |
0 | 269 // %%% These should all be a waste but we'll keep things as they were for now |
270 if (true) { | |
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271 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
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272 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
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273 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
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274 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
0 | 275 // rbp location is known implicitly by the frame sender code, needs no oopmap |
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276 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
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277 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
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278 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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279 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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280 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
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281 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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282 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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283 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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284 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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285 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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286 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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287 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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288 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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289 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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290 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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291 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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292 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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293 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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294 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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295 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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296 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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297 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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298 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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299 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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300 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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301 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
0 | 302 } |
303 | |
304 return map; | |
305 } | |
306 | |
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307 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
0 | 308 if (frame::arg_reg_save_area_bytes != 0) { |
309 // Pop arg register save area | |
304 | 310 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 311 } |
22298 | 312 #if defined(COMPILER2) || INCLUDE_JVMCI |
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313 if (restore_vectors) { |
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314 // Restore upper half of YMM registes. |
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315 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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316 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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317 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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318 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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319 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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320 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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321 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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322 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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323 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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324 __ vinsertf128h(xmm7, Address(rsp,112)); |
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325 __ vinsertf128h(xmm8, Address(rsp,128)); |
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326 __ vinsertf128h(xmm9, Address(rsp,144)); |
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327 __ vinsertf128h(xmm10, Address(rsp,160)); |
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328 __ vinsertf128h(xmm11, Address(rsp,176)); |
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329 __ vinsertf128h(xmm12, Address(rsp,192)); |
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330 __ vinsertf128h(xmm13, Address(rsp,208)); |
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331 __ vinsertf128h(xmm14, Address(rsp,224)); |
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332 __ vinsertf128h(xmm15, Address(rsp,240)); |
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333 __ addptr(rsp, 256); |
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334 } |
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335 #else |
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336 assert(!restore_vectors, "vectors are generated only by C2 and JVMCI"); |
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337 #endif |
0 | 338 // Recover CPU state |
339 __ pop_CPU_state(); | |
340 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 341 __ pop(rbp); |
0 | 342 } |
343 | |
344 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
345 | |
346 // Just restore result register. Only used by deoptimization. By | |
347 // now any callee save register that needs to be restored to a c2 | |
348 // caller of the deoptee has been extracted into the vframeArray | |
349 // and will be stuffed into the c2i adapter we create for later | |
350 // restoration so only result registers need to be restored here. | |
351 | |
352 // Restore fp result register | |
353 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
354 // Restore integer result register | |
304 | 355 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
356 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
357 | |
0 | 358 // Pop all of the register save are off the stack except the return address |
304 | 359 __ addptr(rsp, return_offset_in_bytes()); |
0 | 360 } |
361 | |
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362 // Is vector's size (in bytes) bigger than a size saved by default? |
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363 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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364 bool SharedRuntime::is_wide_vector(int size) { |
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365 return size > 16; |
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366 } |
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367 |
0 | 368 // The java_calling_convention describes stack locations as ideal slots on |
369 // a frame with no abi restrictions. Since we must observe abi restrictions | |
370 // (like the placement of the register window) the slots must be biased by | |
371 // the following value. | |
372 static int reg2offset_in(VMReg r) { | |
373 // Account for saved rbp and return address | |
374 // This should really be in_preserve_stack_slots | |
375 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
376 } | |
377 | |
378 static int reg2offset_out(VMReg r) { | |
379 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
380 } | |
381 | |
382 // --------------------------------------------------------------------------- | |
383 // Read the array of BasicTypes from a signature, and compute where the | |
384 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
385 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
386 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
387 // as framesizes are fixed. | |
388 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
390 // up to RegisterImpl::number_of_registers) are the 64-bit | |
391 // integer registers. | |
392 | |
393 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
394 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
395 // units regardless of build. Of course for i486 there is no 64 bit build | |
396 | |
397 // The Java calling convention is a "shifted" version of the C ABI. | |
398 // By skipping the first C ABI register we can call non-static jni methods | |
399 // with small numbers of arguments without having to shuffle the arguments | |
400 // at all. Since we control the java ABI we ought to at least get some | |
401 // advantage out of it. | |
402 | |
403 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
404 VMRegPair *regs, | |
405 int total_args_passed, | |
406 int is_outgoing) { | |
407 | |
408 // Create the mapping between argument positions and | |
409 // registers. | |
410 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
411 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
412 }; | |
413 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
414 j_farg0, j_farg1, j_farg2, j_farg3, | |
415 j_farg4, j_farg5, j_farg6, j_farg7 | |
416 }; | |
417 | |
418 | |
419 uint int_args = 0; | |
420 uint fp_args = 0; | |
421 uint stk_args = 0; // inc by 2 each time | |
422 | |
423 for (int i = 0; i < total_args_passed; i++) { | |
424 switch (sig_bt[i]) { | |
425 case T_BOOLEAN: | |
426 case T_CHAR: | |
427 case T_BYTE: | |
428 case T_SHORT: | |
429 case T_INT: | |
430 if (int_args < Argument::n_int_register_parameters_j) { | |
431 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
432 } else { | |
433 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
434 stk_args += 2; | |
435 } | |
436 break; | |
437 case T_VOID: | |
438 // halves of T_LONG or T_DOUBLE | |
439 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
440 regs[i].set_bad(); | |
441 break; | |
442 case T_LONG: | |
443 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
444 // fall through | |
445 case T_OBJECT: | |
446 case T_ARRAY: | |
447 case T_ADDRESS: | |
448 if (int_args < Argument::n_int_register_parameters_j) { | |
449 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
450 } else { | |
451 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
452 stk_args += 2; | |
453 } | |
454 break; | |
455 case T_FLOAT: | |
456 if (fp_args < Argument::n_float_register_parameters_j) { | |
457 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
458 } else { | |
459 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
460 stk_args += 2; | |
461 } | |
462 break; | |
463 case T_DOUBLE: | |
464 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
465 if (fp_args < Argument::n_float_register_parameters_j) { | |
466 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
467 } else { | |
468 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
469 stk_args += 2; | |
470 } | |
471 break; | |
472 default: | |
473 ShouldNotReachHere(); | |
474 break; | |
475 } | |
476 } | |
477 | |
478 return round_to(stk_args, 2); | |
479 } | |
480 | |
481 // Patch the callers callsite with entry to compiled code if it exists. | |
482 static void patch_callers_callsite(MacroAssembler *masm) { | |
483 Label L; | |
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484 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 485 __ jcc(Assembler::equal, L); |
486 | |
487 // Save the current stack pointer | |
304 | 488 __ mov(r13, rsp); |
0 | 489 // Schedule the branch target address early. |
490 // Call into the VM to patch the caller, then jump to compiled callee | |
491 // rax isn't live so capture return address while we easily can | |
304 | 492 __ movptr(rax, Address(rsp, 0)); |
0 | 493 |
494 // align stack so push_CPU_state doesn't fault | |
304 | 495 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 496 __ push_CPU_state(); |
497 | |
498 // VM needs caller's callsite | |
499 // VM needs target method | |
500 // This needs to be a long call since we will relocate this adapter to | |
501 // the codeBuffer and it may not reach | |
502 | |
503 // Allocate argument register save area | |
504 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 505 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 506 } |
304 | 507 __ mov(c_rarg0, rbx); |
508 __ mov(c_rarg1, rax); | |
0 | 509 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
510 | |
511 // De-allocate argument register save area | |
512 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 513 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 514 } |
515 | |
516 __ pop_CPU_state(); | |
517 // restore sp | |
304 | 518 __ mov(rsp, r13); |
0 | 519 __ bind(L); |
520 } | |
521 | |
522 | |
523 static void gen_c2i_adapter(MacroAssembler *masm, | |
524 int total_args_passed, | |
525 int comp_args_on_stack, | |
526 const BasicType *sig_bt, | |
527 const VMRegPair *regs, | |
528 Label& skip_fixup) { | |
529 // Before we get into the guts of the C2I adapter, see if we should be here | |
530 // at all. We've come from compiled code and are attempting to jump to the | |
531 // interpreter, which means the caller made a static call to get here | |
532 // (vcalls always get a compiled target if there is one). Check for a | |
533 // compiled target. If there is one, we need to patch the caller's call. | |
534 patch_callers_callsite(masm); | |
535 | |
536 __ bind(skip_fixup); | |
537 | |
538 // Since all args are passed on the stack, total_args_passed * | |
539 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
540 // we also account for the return address location since | |
541 // we store it first rather than hold it in rax across all the shuffling | |
542 | |
1506 | 543 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 544 |
545 // stack is aligned, keep it that way | |
546 extraspace = round_to(extraspace, 2*wordSize); | |
547 | |
548 // Get return address | |
304 | 549 __ pop(rax); |
0 | 550 |
551 // set senderSP value | |
304 | 552 __ mov(r13, rsp); |
553 | |
554 __ subptr(rsp, extraspace); | |
0 | 555 |
556 // Store the return address in the expected location | |
304 | 557 __ movptr(Address(rsp, 0), rax); |
0 | 558 |
559 // Now write the args into the outgoing interpreter space | |
560 for (int i = 0; i < total_args_passed; i++) { | |
561 if (sig_bt[i] == T_VOID) { | |
562 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
563 continue; | |
564 } | |
565 | |
566 // offset to start parameters | |
1506 | 567 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
568 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 569 |
570 // Say 4 args: | |
571 // i st_off | |
572 // 0 32 T_LONG | |
573 // 1 24 T_VOID | |
574 // 2 16 T_OBJECT | |
575 // 3 8 T_BOOL | |
576 // - 0 return address | |
577 // | |
578 // However to make thing extra confusing. Because we can fit a long/double in | |
579 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
580 // leaves one slot empty and only stores to a single slot. In this case the | |
581 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
582 | |
583 VMReg r_1 = regs[i].first(); | |
584 VMReg r_2 = regs[i].second(); | |
585 if (!r_1->is_valid()) { | |
586 assert(!r_2->is_valid(), ""); | |
587 continue; | |
588 } | |
589 if (r_1->is_stack()) { | |
590 // memory to memory use rax | |
591 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
592 if (!r_2->is_valid()) { | |
593 // sign extend?? | |
594 __ movl(rax, Address(rsp, ld_off)); | |
304 | 595 __ movptr(Address(rsp, st_off), rax); |
0 | 596 |
597 } else { | |
598 | |
599 __ movq(rax, Address(rsp, ld_off)); | |
600 | |
601 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
602 // T_DOUBLE and T_LONG use two slots in the interpreter | |
603 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
604 // ld_off == LSW, ld_off+wordSize == MSW | |
605 // st_off == MSW, next_off == LSW | |
606 __ movq(Address(rsp, next_off), rax); | |
607 #ifdef ASSERT | |
608 // Overwrite the unused slot with known junk | |
609 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 610 __ movptr(Address(rsp, st_off), rax); |
0 | 611 #endif /* ASSERT */ |
612 } else { | |
613 __ movq(Address(rsp, st_off), rax); | |
614 } | |
615 } | |
616 } else if (r_1->is_Register()) { | |
617 Register r = r_1->as_Register(); | |
618 if (!r_2->is_valid()) { | |
619 // must be only an int (or less ) so move only 32bits to slot | |
620 // why not sign extend?? | |
621 __ movl(Address(rsp, st_off), r); | |
622 } else { | |
623 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
624 // T_DOUBLE and T_LONG use two slots in the interpreter | |
625 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
626 // long/double in gpr | |
627 #ifdef ASSERT | |
628 // Overwrite the unused slot with known junk | |
629 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 630 __ movptr(Address(rsp, st_off), rax); |
0 | 631 #endif /* ASSERT */ |
632 __ movq(Address(rsp, next_off), r); | |
633 } else { | |
304 | 634 __ movptr(Address(rsp, st_off), r); |
0 | 635 } |
636 } | |
637 } else { | |
638 assert(r_1->is_XMMRegister(), ""); | |
639 if (!r_2->is_valid()) { | |
640 // only a float use just part of the slot | |
641 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
642 } else { | |
643 #ifdef ASSERT | |
644 // Overwrite the unused slot with known junk | |
645 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 646 __ movptr(Address(rsp, st_off), rax); |
0 | 647 #endif /* ASSERT */ |
648 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
649 } | |
650 } | |
651 } | |
652 | |
653 // Schedule the branch target address early. | |
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654 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
0 | 655 __ jmp(rcx); |
656 } | |
657 | |
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658 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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659 address code_start, address code_end, |
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660 Label& L_ok) { |
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661 Label L_fail; |
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662 __ lea(temp_reg, ExternalAddress(code_start)); |
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663 __ cmpptr(pc_reg, temp_reg); |
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664 __ jcc(Assembler::belowEqual, L_fail); |
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665 __ lea(temp_reg, ExternalAddress(code_end)); |
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666 __ cmpptr(pc_reg, temp_reg); |
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667 __ jcc(Assembler::below, L_ok); |
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668 __ bind(L_fail); |
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669 } |
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670 |
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671 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, |
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672 int total_args_passed, |
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673 int comp_args_on_stack, |
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674 const BasicType *sig_bt, |
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675 const VMRegPair *regs) { |
0 | 676 |
677 // Note: r13 contains the senderSP on entry. We must preserve it since | |
678 // we may do a i2c -> c2i transition if we lose a race where compiled | |
679 // code goes non-entrant while we get args ready. | |
680 // In addition we use r13 to locate all the interpreter args as | |
681 // we must align the stack to 16 bytes on an i2c entry else we | |
682 // lose alignment we expect in all compiled code and register | |
683 // save code can segv when fxsave instructions find improperly | |
684 // aligned stack pointer. | |
685 | |
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686 // Adapters can be frameless because they do not require the caller |
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687 // to perform additional cleanup work, such as correcting the stack pointer. |
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688 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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689 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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690 // even if a callee has modified the stack pointer. |
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691 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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692 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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693 // up via the senderSP register). |
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694 // In other words, if *either* the caller or callee is interpreted, we can |
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695 // get the stack pointer repaired after a call. |
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696 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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697 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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698 // both caller and callee would be compiled methods, and neither would |
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699 // clean up the stack pointer changes performed by the two adapters. |
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700 // If this happens, control eventually transfers back to the compiled |
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701 // caller, but with an uncorrected stack, causing delayed havoc. |
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702 |
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703 // Pick up the return address |
304 | 704 __ movptr(rax, Address(rsp, 0)); |
0 | 705 |
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706 if (VerifyAdapterCalls && |
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707 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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708 // So, let's test for cascading c2i/i2c adapters right now. |
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709 // assert(Interpreter::contains($return_addr) || |
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710 // StubRoutines::contains($return_addr), |
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711 // "i2c adapter must return to an interpreter frame"); |
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712 __ block_comment("verify_i2c { "); |
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713 Label L_ok; |
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714 if (Interpreter::code() != NULL) |
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715 range_check(masm, rax, r11, |
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716 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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717 L_ok); |
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718 if (StubRoutines::code1() != NULL) |
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719 range_check(masm, rax, r11, |
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720 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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721 L_ok); |
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722 if (StubRoutines::code2() != NULL) |
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723 range_check(masm, rax, r11, |
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724 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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725 L_ok); |
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726 const char* msg = "i2c adapter must return to an interpreter frame"; |
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727 __ block_comment(msg); |
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728 __ stop(msg); |
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729 __ bind(L_ok); |
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730 __ block_comment("} verify_i2ce "); |
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731 } |
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732 |
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733 // Must preserve original SP for loading incoming arguments because |
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734 // we need to align the outgoing SP for compiled code. |
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735 __ movptr(r11, rsp); |
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736 |
0 | 737 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
738 // in registers, we will occasionally have no stack args. | |
739 int comp_words_on_stack = 0; | |
740 if (comp_args_on_stack) { | |
741 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
742 // registers are below. By subtracting stack0, we either get a negative | |
743 // number (all values in registers) or the maximum stack slot accessed. | |
744 | |
745 // Convert 4-byte c2 stack slots to words. | |
746 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
747 // Round up to miminum stack alignment, in wordSize | |
748 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 749 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 750 } |
751 | |
752 | |
753 // Ensure compiled code always sees stack at proper alignment | |
304 | 754 __ andptr(rsp, -16); |
0 | 755 |
756 // push the return address and misalign the stack that youngest frame always sees | |
757 // as far as the placement of the call instruction | |
304 | 758 __ push(rax); |
0 | 759 |
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760 // Put saved SP in another register |
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761 const Register saved_sp = rax; |
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762 __ movptr(saved_sp, r11); |
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763 |
0 | 764 // Will jump to the compiled code just as if compiled code was doing it. |
765 // Pre-load the register-jump target early, to schedule it better. | |
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766 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
0 | 767 |
22298 | 768 #if INCLUDE_JVMCI |
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769 // check if this call should be routed towards a specific entry point |
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770 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0); |
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771 Label no_alternative_target; |
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772 __ jcc(Assembler::equal, no_alternative_target); |
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773 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); |
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774 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0); |
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775 __ bind(no_alternative_target); |
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776 #endif |
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777 |
0 | 778 // Now generate the shuffle code. Pick up all register args and move the |
779 // rest through the floating point stack top. | |
780 for (int i = 0; i < total_args_passed; i++) { | |
781 if (sig_bt[i] == T_VOID) { | |
782 // Longs and doubles are passed in native word order, but misaligned | |
783 // in the 32-bit build. | |
784 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
785 continue; | |
786 } | |
787 | |
788 // Pick up 0, 1 or 2 words from SP+offset. | |
789 | |
790 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
791 "scrambled load targets?"); | |
792 // Load in argument order going down. | |
1506 | 793 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 794 // Point to interpreter value (vs. tag) |
1506 | 795 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 796 // |
797 // | |
798 // | |
799 VMReg r_1 = regs[i].first(); | |
800 VMReg r_2 = regs[i].second(); | |
801 if (!r_1->is_valid()) { | |
802 assert(!r_2->is_valid(), ""); | |
803 continue; | |
804 } | |
805 if (r_1->is_stack()) { | |
806 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
807 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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808 |
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809 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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810 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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811 // will be generated. |
0 | 812 if (!r_2->is_valid()) { |
813 // sign extend??? | |
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814 __ movl(r13, Address(saved_sp, ld_off)); |
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815 __ movptr(Address(rsp, st_off), r13); |
0 | 816 } else { |
817 // | |
818 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
819 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
820 // So we must adjust where to pick up the data to match the interpreter. | |
821 // | |
822 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
823 // are accessed as negative so LSW is at LOW address | |
824 | |
825 // ld_off is MSW so get LSW | |
826 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
827 next_off : ld_off; | |
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828 __ movq(r13, Address(saved_sp, offset)); |
0 | 829 // st_off is LSW (i.e. reg.first()) |
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830 __ movq(Address(rsp, st_off), r13); |
0 | 831 } |
832 } else if (r_1->is_Register()) { // Register argument | |
833 Register r = r_1->as_Register(); | |
834 assert(r != rax, "must be different"); | |
835 if (r_2->is_valid()) { | |
836 // | |
837 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
838 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
839 // So we must adjust where to pick up the data to match the interpreter. | |
840 | |
841 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
842 next_off : ld_off; | |
843 | |
844 // this can be a misaligned move | |
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845 __ movq(r, Address(saved_sp, offset)); |
0 | 846 } else { |
847 // sign extend and use a full word? | |
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848 __ movl(r, Address(saved_sp, ld_off)); |
0 | 849 } |
850 } else { | |
851 if (!r_2->is_valid()) { | |
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852 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 853 } else { |
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854 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 855 } |
856 } | |
857 } | |
858 | |
859 // 6243940 We might end up in handle_wrong_method if | |
860 // the callee is deoptimized as we race thru here. If that | |
861 // happens we don't want to take a safepoint because the | |
862 // caller frame will look interpreted and arguments are now | |
863 // "compiled" so it is much better to make this transition | |
864 // invisible to the stack walking code. Unfortunately if | |
865 // we try and find the callee by normal means a safepoint | |
866 // is possible. So we stash the desired callee in the thread | |
867 // and the vm will find there should this case occur. | |
868 | |
304 | 869 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 870 |
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871 // put Method* where a c2i would expect should we end up there |
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872 // only needed becaus eof c2 resolve stubs return Method* as a result in |
0 | 873 // rax |
304 | 874 __ mov(rax, rbx); |
0 | 875 __ jmp(r11); |
876 } | |
877 | |
878 // --------------------------------------------------------------- | |
879 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
880 int total_args_passed, | |
881 int comp_args_on_stack, | |
882 const BasicType *sig_bt, | |
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883 const VMRegPair *regs, |
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884 AdapterFingerPrint* fingerprint) { |
0 | 885 address i2c_entry = __ pc(); |
886 | |
887 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
888 | |
889 // ------------------------------------------------------------------------- | |
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890 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
0 | 891 // to the interpreter. The args start out packed in the compiled layout. They |
892 // need to be unpacked into the interpreter layout. This will almost always | |
893 // require some stack space. We grow the current (compiled) stack, then repack | |
894 // the args. We finally end in a jump to the generic interpreter entry point. | |
895 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
896 // compiled code, which relys solely on SP and not RBP, get sick). | |
897 | |
898 address c2i_unverified_entry = __ pc(); | |
899 Label skip_fixup; | |
900 Label ok; | |
901 | |
902 Register holder = rax; | |
903 Register receiver = j_rarg0; | |
904 Register temp = rbx; | |
905 | |
906 { | |
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907 __ load_klass(temp, receiver); |
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908 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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909 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
0 | 910 __ jcc(Assembler::equal, ok); |
911 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
912 | |
913 __ bind(ok); | |
914 // Method might have been compiled since the call site was patched to | |
915 // interpreted if that is the case treat it as a miss so we can get | |
916 // the call site corrected. | |
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917 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 918 __ jcc(Assembler::equal, skip_fixup); |
919 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
920 } | |
921 | |
922 address c2i_entry = __ pc(); | |
923 | |
924 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
925 | |
926 __ flush(); | |
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927 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 928 } |
929 | |
930 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
931 VMRegPair *regs, | |
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932 VMRegPair *regs2, |
0 | 933 int total_args_passed) { |
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934 assert(regs2 == NULL, "not needed on x86"); |
0 | 935 // We return the amount of VMRegImpl stack slots we need to reserve for all |
936 // the arguments NOT counting out_preserve_stack_slots. | |
937 | |
938 // NOTE: These arrays will have to change when c1 is ported | |
939 #ifdef _WIN64 | |
940 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
941 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
942 }; | |
943 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
944 c_farg0, c_farg1, c_farg2, c_farg3 | |
945 }; | |
946 #else | |
947 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
948 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
949 }; | |
950 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
951 c_farg0, c_farg1, c_farg2, c_farg3, | |
952 c_farg4, c_farg5, c_farg6, c_farg7 | |
953 }; | |
954 #endif // _WIN64 | |
955 | |
956 | |
957 uint int_args = 0; | |
958 uint fp_args = 0; | |
959 uint stk_args = 0; // inc by 2 each time | |
960 | |
961 for (int i = 0; i < total_args_passed; i++) { | |
962 switch (sig_bt[i]) { | |
963 case T_BOOLEAN: | |
964 case T_CHAR: | |
965 case T_BYTE: | |
966 case T_SHORT: | |
967 case T_INT: | |
968 if (int_args < Argument::n_int_register_parameters_c) { | |
969 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
970 #ifdef _WIN64 | |
971 fp_args++; | |
972 // Allocate slots for callee to stuff register args the stack. | |
973 stk_args += 2; | |
974 #endif | |
975 } else { | |
976 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
977 stk_args += 2; | |
978 } | |
979 break; | |
980 case T_LONG: | |
981 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
982 // fall through | |
983 case T_OBJECT: | |
984 case T_ARRAY: | |
985 case T_ADDRESS: | |
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986 case T_METADATA: |
0 | 987 if (int_args < Argument::n_int_register_parameters_c) { |
988 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
989 #ifdef _WIN64 | |
990 fp_args++; | |
991 stk_args += 2; | |
992 #endif | |
993 } else { | |
994 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
995 stk_args += 2; | |
996 } | |
997 break; | |
998 case T_FLOAT: | |
999 if (fp_args < Argument::n_float_register_parameters_c) { | |
1000 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
1001 #ifdef _WIN64 | |
1002 int_args++; | |
1003 // Allocate slots for callee to stuff register args the stack. | |
1004 stk_args += 2; | |
1005 #endif | |
1006 } else { | |
1007 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
1008 stk_args += 2; | |
1009 } | |
1010 break; | |
1011 case T_DOUBLE: | |
1012 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
1013 if (fp_args < Argument::n_float_register_parameters_c) { | |
1014 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
1015 #ifdef _WIN64 | |
1016 int_args++; | |
1017 // Allocate slots for callee to stuff register args the stack. | |
1018 stk_args += 2; | |
1019 #endif | |
1020 } else { | |
1021 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
1022 stk_args += 2; | |
1023 } | |
1024 break; | |
1025 case T_VOID: // Halves of longs and doubles | |
1026 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
1027 regs[i].set_bad(); | |
1028 break; | |
1029 default: | |
1030 ShouldNotReachHere(); | |
1031 break; | |
1032 } | |
1033 } | |
1034 #ifdef _WIN64 | |
1035 // windows abi requires that we always allocate enough stack space | |
1036 // for 4 64bit registers to be stored down. | |
1037 if (stk_args < 8) { | |
1038 stk_args = 8; | |
1039 } | |
1040 #endif // _WIN64 | |
1041 | |
1042 return stk_args; | |
1043 } | |
1044 | |
1045 // On 64 bit we will store integer like items to the stack as | |
1046 // 64 bits items (sparc abi) even though java would only store | |
1047 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
1048 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
1049 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1050 if (src.first()->is_stack()) { | |
1051 if (dst.first()->is_stack()) { | |
1052 // stack to stack | |
1053 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1054 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1055 } else { | |
1056 // stack to reg | |
1057 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
1058 } | |
1059 } else if (dst.first()->is_stack()) { | |
1060 // reg to stack | |
1061 // Do we really have to sign extend??? | |
1062 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
1063 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1064 } else { | |
1065 // Do we really have to sign extend??? | |
1066 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
1067 if (dst.first() != src.first()) { | |
1068 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
1069 } | |
1070 } | |
1071 } | |
1072 | |
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1073 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1074 if (src.first()->is_stack()) { |
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1075 if (dst.first()->is_stack()) { |
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1076 // stack to stack |
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1077 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1078 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1079 } else { |
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1080 // stack to reg |
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1081 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1082 } |
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1083 } else if (dst.first()->is_stack()) { |
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1084 // reg to stack |
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1085 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1086 } else { |
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1087 if (dst.first() != src.first()) { |
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1088 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1089 } |
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1090 } |
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1091 } |
0 | 1092 |
1093 // An oop arg. Must pass a handle not the oop itself | |
1094 static void object_move(MacroAssembler* masm, | |
1095 OopMap* map, | |
1096 int oop_handle_offset, | |
1097 int framesize_in_slots, | |
1098 VMRegPair src, | |
1099 VMRegPair dst, | |
1100 bool is_receiver, | |
1101 int* receiver_offset) { | |
1102 | |
1103 // must pass a handle. First figure out the location we use as a handle | |
1104 | |
1105 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
1106 | |
1107 // See if oop is NULL if it is we need no handle | |
1108 | |
1109 if (src.first()->is_stack()) { | |
1110 | |
1111 // Oop is already on the stack as an argument | |
1112 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1113 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1114 if (is_receiver) { | |
1115 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1116 } | |
1117 | |
304 | 1118 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
1119 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 1120 // conditionally move a NULL |
304 | 1121 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1122 } else { |
1123 | |
1124 // Oop is in an a register we must store it to the space we reserve | |
1125 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
1126 | |
1127 const Register rOop = src.first()->as_Register(); | |
1128 int oop_slot; | |
1129 if (rOop == j_rarg0) | |
1130 oop_slot = 0; | |
1131 else if (rOop == j_rarg1) | |
1132 oop_slot = 1; | |
1133 else if (rOop == j_rarg2) | |
1134 oop_slot = 2; | |
1135 else if (rOop == j_rarg3) | |
1136 oop_slot = 3; | |
1137 else if (rOop == j_rarg4) | |
1138 oop_slot = 4; | |
1139 else { | |
1140 assert(rOop == j_rarg5, "wrong register"); | |
1141 oop_slot = 5; | |
1142 } | |
1143 | |
1144 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1145 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1146 | |
1147 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1148 // Store oop in handle area, may be NULL | |
304 | 1149 __ movptr(Address(rsp, offset), rOop); |
0 | 1150 if (is_receiver) { |
1151 *receiver_offset = offset; | |
1152 } | |
1153 | |
304 | 1154 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1155 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1156 // conditionally move a NULL from the handle area where it was just stored |
304 | 1157 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1158 } |
1159 | |
1160 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1161 if (dst.first()->is_stack()) { | |
304 | 1162 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1163 } |
1164 } | |
1165 | |
1166 // A float arg may have to do float reg int reg conversion | |
1167 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1168 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1169 | |
1170 // The calling conventions assures us that each VMregpair is either | |
1171 // all really one physical register or adjacent stack slots. | |
1172 // This greatly simplifies the cases here compared to sparc. | |
1173 | |
1174 if (src.first()->is_stack()) { | |
1175 if (dst.first()->is_stack()) { | |
1176 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1177 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1178 } else { |
1179 // stack to reg | |
1180 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1181 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1182 } | |
1183 } else if (dst.first()->is_stack()) { | |
1184 // reg to stack | |
1185 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1186 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1187 } else { | |
1188 // reg to reg | |
1189 // In theory these overlap but the ordering is such that this is likely a nop | |
1190 if ( src.first() != dst.first()) { | |
1191 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1192 } | |
1193 } | |
1194 } | |
1195 | |
1196 // A long move | |
1197 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1198 | |
1199 // The calling conventions assures us that each VMregpair is either | |
1200 // all really one physical register or adjacent stack slots. | |
1201 // This greatly simplifies the cases here compared to sparc. | |
1202 | |
1203 if (src.is_single_phys_reg() ) { | |
1204 if (dst.is_single_phys_reg()) { | |
1205 if (dst.first() != src.first()) { | |
304 | 1206 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1207 } |
1208 } else { | |
1209 assert(dst.is_single_reg(), "not a stack pair"); | |
1210 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1211 } | |
1212 } else if (dst.is_single_phys_reg()) { | |
1213 assert(src.is_single_reg(), "not a stack pair"); | |
1214 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1215 } else { | |
1216 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1217 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1218 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1219 } | |
1220 } | |
1221 | |
1222 // A double move | |
1223 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1224 | |
1225 // The calling conventions assures us that each VMregpair is either | |
1226 // all really one physical register or adjacent stack slots. | |
1227 // This greatly simplifies the cases here compared to sparc. | |
1228 | |
1229 if (src.is_single_phys_reg() ) { | |
1230 if (dst.is_single_phys_reg()) { | |
1231 // In theory these overlap but the ordering is such that this is likely a nop | |
1232 if ( src.first() != dst.first()) { | |
1233 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1234 } | |
1235 } else { | |
1236 assert(dst.is_single_reg(), "not a stack pair"); | |
1237 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1238 } | |
1239 } else if (dst.is_single_phys_reg()) { | |
1240 assert(src.is_single_reg(), "not a stack pair"); | |
1241 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1242 } else { | |
1243 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1244 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1245 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1246 } | |
1247 } | |
1248 | |
1249 | |
1250 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1251 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1252 // which by this time is free to use | |
1253 switch (ret_type) { | |
1254 case T_FLOAT: | |
1255 __ movflt(Address(rbp, -wordSize), xmm0); | |
1256 break; | |
1257 case T_DOUBLE: | |
1258 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1259 break; | |
1260 case T_VOID: break; | |
1261 default: { | |
304 | 1262 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1263 } |
1264 } | |
1265 } | |
1266 | |
1267 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1268 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1269 // which by this time is free to use | |
1270 switch (ret_type) { | |
1271 case T_FLOAT: | |
1272 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1273 break; | |
1274 case T_DOUBLE: | |
1275 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1276 break; | |
1277 case T_VOID: break; | |
1278 default: { | |
304 | 1279 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1280 } |
1281 } | |
1282 } | |
1283 | |
1284 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1285 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1286 if (args[i].first()->is_Register()) { | |
304 | 1287 __ push(args[i].first()->as_Register()); |
0 | 1288 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1289 __ subptr(rsp, 2*wordSize); |
0 | 1290 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1291 } | |
1292 } | |
1293 } | |
1294 | |
1295 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1296 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1297 if (args[i].first()->is_Register()) { | |
304 | 1298 __ pop(args[i].first()->as_Register()); |
0 | 1299 } else if (args[i].first()->is_XMMRegister()) { |
1300 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1301 __ addptr(rsp, 2*wordSize); |
0 | 1302 } |
1303 } | |
1304 } | |
1305 | |
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1306 |
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1307 static void save_or_restore_arguments(MacroAssembler* masm, |
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1308 const int stack_slots, |
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1309 const int total_in_args, |
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1310 const int arg_save_area, |
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1311 OopMap* map, |
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1312 VMRegPair* in_regs, |
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1313 BasicType* in_sig_bt) { |
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1314 // if map is non-NULL then the code should store the values, |
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1315 // otherwise it should load them. |
5905 | 1316 int slot = arg_save_area; |
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1317 // Save down double word first |
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1318 for ( int i = 0; i < total_in_args; i++) { |
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1319 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1320 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1321 slot += VMRegImpl::slots_per_word; |
1322 assert(slot <= stack_slots, "overflow"); | |
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1323 if (map != NULL) { |
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1324 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1325 } else { |
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1326 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1327 } |
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1328 } |
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1329 if (in_regs[i].first()->is_Register() && |
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1330 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1331 int offset = slot * VMRegImpl::stack_slot_size; |
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1332 if (map != NULL) { |
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1333 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1334 if (in_sig_bt[i] == T_ARRAY) { |
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1335 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1336 } |
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1337 } else { |
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1338 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1339 } |
5907 | 1340 slot += VMRegImpl::slots_per_word; |
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1341 } |
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1342 } |
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1343 // Save or restore single word registers |
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1344 for ( int i = 0; i < total_in_args; i++) { |
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1345 if (in_regs[i].first()->is_Register()) { |
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1346 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1347 slot++; |
1348 assert(slot <= stack_slots, "overflow"); | |
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1349 |
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1350 // Value is in an input register pass we must flush it to the stack |
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1351 const Register reg = in_regs[i].first()->as_Register(); |
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1352 switch (in_sig_bt[i]) { |
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1353 case T_BOOLEAN: |
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1354 case T_CHAR: |
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1355 case T_BYTE: |
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1356 case T_SHORT: |
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1357 case T_INT: |
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1358 if (map != NULL) { |
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1359 __ movl(Address(rsp, offset), reg); |
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1360 } else { |
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1361 __ movl(reg, Address(rsp, offset)); |
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1362 } |
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1363 break; |
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1364 case T_ARRAY: |
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1365 case T_LONG: |
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1366 // handled above |
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1367 break; |
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1368 case T_OBJECT: |
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1369 default: ShouldNotReachHere(); |
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1370 } |
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1371 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1372 if (in_sig_bt[i] == T_FLOAT) { |
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1373 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1374 slot++; |
1375 assert(slot <= stack_slots, "overflow"); | |
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1376 if (map != NULL) { |
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1377 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1378 } else { |
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1379 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1380 } |
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1381 } |
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1382 } else if (in_regs[i].first()->is_stack()) { |
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1383 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1384 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1385 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1386 } |
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1387 } |
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1388 } |
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1389 } |
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1390 |
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1391 |
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1392 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1393 // keeps a new JNI critical region from starting until a GC has been |
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1394 // forced. Save down any oops in registers and describe them in an |
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1395 // OopMap. |
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1396 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1397 int stack_slots, |
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1398 int total_c_args, |
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1399 int total_in_args, |
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1400 int arg_save_area, |
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1401 OopMapSet* oop_maps, |
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1402 VMRegPair* in_regs, |
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1403 BasicType* in_sig_bt) { |
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1404 __ block_comment("check GC_locker::needs_gc"); |
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1405 Label cont; |
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1406 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1407 __ jcc(Assembler::equal, cont); |
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1408 |
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1409 // Save down any incoming oops and call into the runtime to halt for a GC |
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1410 |
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1411 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1412 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1413 arg_save_area, map, in_regs, in_sig_bt); |
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1414 |
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1415 address the_pc = __ pc(); |
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1416 oop_maps->add_gc_map( __ offset(), map); |
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1417 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1418 |
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1419 __ block_comment("block_for_jni_critical"); |
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1420 __ movptr(c_rarg0, r15_thread); |
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1421 __ mov(r12, rsp); // remember sp |
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1422 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1423 __ andptr(rsp, -16); // align stack as required by ABI |
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1424 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1425 __ mov(rsp, r12); // restore sp |
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1426 __ reinit_heapbase(); |
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1427 |
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1428 __ reset_last_Java_frame(false, true); |
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1429 |
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1430 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1431 arg_save_area, NULL, in_regs, in_sig_bt); |
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1432 |
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1433 __ bind(cont); |
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1434 #ifdef ASSERT |
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1435 if (StressCriticalJNINatives) { |
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1436 // Stress register saving |
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1437 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1438 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1439 arg_save_area, map, in_regs, in_sig_bt); |
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1440 // Destroy argument registers |
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1441 for (int i = 0; i < total_in_args - 1; i++) { |
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1442 if (in_regs[i].first()->is_Register()) { |
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1443 const Register reg = in_regs[i].first()->as_Register(); |
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1444 __ xorptr(reg, reg); |
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1445 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1446 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1447 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1448 ShouldNotReachHere(); |
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1449 } else if (in_regs[i].first()->is_stack()) { |
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1450 // Nothing to do |
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1451 } else { |
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1452 ShouldNotReachHere(); |
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1453 } |
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1454 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1455 i++; |
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1456 } |
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1457 } |
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1458 |
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1459 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1460 arg_save_area, NULL, in_regs, in_sig_bt); |
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1461 } |
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1462 #endif |
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1463 } |
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1464 |
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1465 // Unpack an array argument into a pointer to the body and the length |
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1466 // if the array is non-null, otherwise pass 0 for both. |
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1467 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1468 Register tmp_reg = rax; |
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1469 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1470 "possible collision"); |
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1471 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1472 "possible collision"); |
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1473 |
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1474 __ block_comment("unpack_array_argument {"); |
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1475 |
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1476 // Pass the length, ptr pair |
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1477 Label is_null, done; |
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1478 VMRegPair tmp; |
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1479 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1480 if (reg.first()->is_stack()) { |
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1481 // Load the arg up from the stack |
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1482 move_ptr(masm, reg, tmp); |
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1483 reg = tmp; |
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1484 } |
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1485 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1486 __ jccb(Assembler::equal, is_null); |
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1487 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1488 move_ptr(masm, tmp, body_arg); |
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1489 // load the length relative to the body. |
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1490 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1491 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1492 move32_64(masm, tmp, length_arg); |
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1493 __ jmpb(done); |
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1494 __ bind(is_null); |
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1495 // Pass zeros |
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1496 __ xorptr(tmp_reg, tmp_reg); |
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1497 move_ptr(masm, tmp, body_arg); |
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1498 move32_64(masm, tmp, length_arg); |
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1499 __ bind(done); |
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1500 |
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1501 __ block_comment("} unpack_array_argument"); |
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1502 } |
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1503 |
5905 | 1504 |
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1505 // Different signatures may require very different orders for the move |
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1506 // to avoid clobbering other arguments. There's no simple way to |
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1507 // order them safely. Compute a safe order for issuing stores and |
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1508 // break any cycles in those stores. This code is fairly general but |
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1509 // it's not necessary on the other platforms so we keep it in the |
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1510 // platform dependent code instead of moving it into a shared file. |
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1511 // (See bugs 7013347 & 7145024.) |
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1512 // Note that this code is specific to LP64. |
5905 | 1513 class ComputeMoveOrder: public StackObj { |
1514 class MoveOperation: public ResourceObj { | |
1515 friend class ComputeMoveOrder; | |
1516 private: | |
1517 VMRegPair _src; | |
1518 VMRegPair _dst; | |
1519 int _src_index; | |
1520 int _dst_index; | |
1521 bool _processed; | |
1522 MoveOperation* _next; | |
1523 MoveOperation* _prev; | |
1524 | |
1525 static int get_id(VMRegPair r) { | |
1526 return r.first()->value(); | |
1527 } | |
1528 | |
1529 public: | |
1530 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
1531 _src(src) | |
1532 , _src_index(src_index) | |
1533 , _dst(dst) | |
1534 , _dst_index(dst_index) | |
1535 , _next(NULL) | |
1536 , _prev(NULL) | |
1537 , _processed(false) { | |
1538 } | |
1539 | |
1540 VMRegPair src() const { return _src; } | |
1541 int src_id() const { return get_id(src()); } | |
1542 int src_index() const { return _src_index; } | |
1543 VMRegPair dst() const { return _dst; } | |
1544 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
1545 int dst_index() const { return _dst_index; } | |
1546 int dst_id() const { return get_id(dst()); } | |
1547 MoveOperation* next() const { return _next; } | |
1548 MoveOperation* prev() const { return _prev; } | |
1549 void set_processed() { _processed = true; } | |
1550 bool is_processed() const { return _processed; } | |
1551 | |
1552 // insert | |
1553 void break_cycle(VMRegPair temp_register) { | |
1554 // create a new store following the last store | |
1555 // to move from the temp_register to the original | |
1556 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
1557 | |
1558 // break the cycle of links and insert new_store at the end | |
1559 // break the reverse link. | |
1560 MoveOperation* p = prev(); | |
1561 assert(p->next() == this, "must be"); | |
1562 _prev = NULL; | |
1563 p->_next = new_store; | |
1564 new_store->_prev = p; | |
1565 | |
1566 // change the original store to save it's value in the temp. | |
1567 set_dst(-1, temp_register); | |
1568 } | |
1569 | |
1570 void link(GrowableArray<MoveOperation*>& killer) { | |
1571 // link this store in front the store that it depends on | |
1572 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
1573 if (n != NULL) { | |
1574 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
1575 _next = n; | |
1576 n->_prev = this; | |
1577 } | |
1578 } | |
1579 }; | |
1580 | |
1581 private: | |
1582 GrowableArray<MoveOperation*> edges; | |
1583 | |
1584 public: | |
1585 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
1586 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
1587 // Move operations where the dest is the stack can all be | |
1588 // scheduled first since they can't interfere with the other moves. | |
1589 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
1590 if (in_sig_bt[i] == T_ARRAY) { | |
1591 c_arg--; | |
1592 if (out_regs[c_arg].first()->is_stack() && | |
1593 out_regs[c_arg + 1].first()->is_stack()) { | |
1594 arg_order.push(i); | |
1595 arg_order.push(c_arg); | |
1596 } else { | |
1597 if (out_regs[c_arg].first()->is_stack() || | |
1598 in_regs[i].first() == out_regs[c_arg].first()) { | |
1599 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
1600 } else { | |
1601 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1602 } | |
1603 } | |
1604 } else if (in_sig_bt[i] == T_VOID) { | |
1605 arg_order.push(i); | |
1606 arg_order.push(c_arg); | |
1607 } else { | |
1608 if (out_regs[c_arg].first()->is_stack() || | |
1609 in_regs[i].first() == out_regs[c_arg].first()) { | |
1610 arg_order.push(i); | |
1611 arg_order.push(c_arg); | |
1612 } else { | |
1613 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1614 } | |
1615 } | |
1616 } | |
1617 // Break any cycles in the register moves and emit the in the | |
1618 // proper order. | |
1619 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
1620 for (int i = 0; i < stores->length(); i++) { | |
1621 arg_order.push(stores->at(i)->src_index()); | |
1622 arg_order.push(stores->at(i)->dst_index()); | |
1623 } | |
1624 } | |
1625 | |
1626 // Collected all the move operations | |
1627 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
1628 if (src.first() == dst.first()) return; | |
1629 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
1630 } | |
1631 | |
1632 // Walk the edges breaking cycles between moves. The result list | |
1633 // can be walked in order to produce the proper set of loads | |
1634 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
1635 // Record which moves kill which values | |
1636 GrowableArray<MoveOperation*> killer; | |
1637 for (int i = 0; i < edges.length(); i++) { | |
1638 MoveOperation* s = edges.at(i); | |
1639 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
1640 killer.at_put_grow(s->dst_id(), s, NULL); | |
1641 } | |
1642 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
1643 "make sure temp isn't in the registers that are killed"); | |
1644 | |
1645 // create links between loads and stores | |
1646 for (int i = 0; i < edges.length(); i++) { | |
1647 edges.at(i)->link(killer); | |
1648 } | |
1649 | |
1650 // at this point, all the move operations are chained together | |
1651 // in a doubly linked list. Processing it backwards finds | |
1652 // the beginning of the chain, forwards finds the end. If there's | |
1653 // a cycle it can be broken at any point, so pick an edge and walk | |
1654 // backward until the list ends or we end where we started. | |
1655 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
1656 for (int e = 0; e < edges.length(); e++) { | |
1657 MoveOperation* s = edges.at(e); | |
1658 if (!s->is_processed()) { | |
1659 MoveOperation* start = s; | |
1660 // search for the beginning of the chain or cycle | |
1661 while (start->prev() != NULL && start->prev() != s) { | |
1662 start = start->prev(); | |
1663 } | |
1664 if (start->prev() == s) { | |
1665 start->break_cycle(temp_register); | |
1666 } | |
1667 // walk the chain forward inserting to store list | |
1668 while (start != NULL) { | |
1669 stores->append(start); | |
1670 start->set_processed(); | |
1671 start = start->next(); | |
1672 } | |
1673 } | |
1674 } | |
1675 return stores; | |
1676 } | |
1677 }; | |
1678 | |
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1679 static void verify_oop_args(MacroAssembler* masm, |
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1680 methodHandle method, |
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1681 const BasicType* sig_bt, |
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1682 const VMRegPair* regs) { |
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1683 Register temp_reg = rbx; // not part of any compiled calling seq |
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1684 if (VerifyOops) { |
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1685 for (int i = 0; i < method->size_of_parameters(); i++) { |
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1686 if (sig_bt[i] == T_OBJECT || |
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1687 sig_bt[i] == T_ARRAY) { |
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1688 VMReg r = regs[i].first(); |
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1689 assert(r->is_valid(), "bad oop arg"); |
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1690 if (r->is_stack()) { |
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1691 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1692 __ verify_oop(temp_reg); |
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1693 } else { |
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1694 __ verify_oop(r->as_Register()); |
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1695 } |
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1696 } |
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1697 } |
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1698 } |
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1699 } |
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1700 |
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1701 static void gen_special_dispatch(MacroAssembler* masm, |
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1702 methodHandle method, |
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1703 const BasicType* sig_bt, |
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1704 const VMRegPair* regs) { |
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1705 verify_oop_args(masm, method, sig_bt, regs); |
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1706 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1707 |
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1708 // Now write the args into the outgoing interpreter space |
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1709 bool has_receiver = false; |
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1710 Register receiver_reg = noreg; |
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1711 int member_arg_pos = -1; |
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1712 Register member_reg = noreg; |
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1713 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
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1714 if (ref_kind != 0) { |
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1715 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
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1716 member_reg = rbx; // known to be free at this point |
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1717 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1718 } else if (iid == vmIntrinsics::_invokeBasic) { |
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1719 has_receiver = true; |
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1720 } else { |
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1721 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
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1722 } |
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1723 |
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1724 if (member_reg != noreg) { |
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1725 // Load the member_arg into register, if necessary. |
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1726 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1727 VMReg r = regs[member_arg_pos].first(); |
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1728 if (r->is_stack()) { |
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1729 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1730 } else { |
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1731 // no data motion is needed |
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1732 member_reg = r->as_Register(); |
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1733 } |
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1734 } |
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1735 |
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1736 if (has_receiver) { |
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1737 // Make sure the receiver is loaded into a register. |
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1738 assert(method->size_of_parameters() > 0, "oob"); |
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1739 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1740 VMReg r = regs[0].first(); |
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1741 assert(r->is_valid(), "bad receiver arg"); |
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1742 if (r->is_stack()) { |
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1743 // Porting note: This assumes that compiled calling conventions always |
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1744 // pass the receiver oop in a register. If this is not true on some |
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1745 // platform, pick a temp and load the receiver from stack. |
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1746 fatal("receiver always in a register"); |
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1747 receiver_reg = j_rarg0; // known to be free at this point |
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1748 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1749 } else { |
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1750 // no data motion is needed |
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1751 receiver_reg = r->as_Register(); |
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1752 } |
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1753 } |
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1754 |
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1755 // Figure out which address we are really jumping to: |
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1756 MethodHandles::generate_method_handle_dispatch(masm, iid, |
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1757 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1758 } |
5905 | 1759 |
0 | 1760 // --------------------------------------------------------------------------- |
1761 // Generate a native wrapper for a given method. The method takes arguments | |
1762 // in the Java compiled code convention, marshals them to the native | |
1763 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1764 // returns to java state (possibly blocking), unhandlizes any result and | |
1765 // returns. | |
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1766 // |
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1767 // Critical native functions are a shorthand for the use of |
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1768 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1769 // functions. The wrapper is expected to unpack the arguments before |
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1770 // passing them to the callee and perform checks before and after the |
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1771 // native call to ensure that they GC_locker |
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1772 // lock_critical/unlock_critical semantics are followed. Some other |
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1773 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1774 // block and the check for pending exceptions it's impossible for them |
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1775 // to be thrown. |
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1776 // |
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1777 // They are roughly structured like this: |
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1778 // if (GC_locker::needs_gc()) |
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1779 // SharedRuntime::block_for_jni_critical(); |
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1780 // tranistion to thread_in_native |
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1781 // unpack arrray arguments and call native entry point |
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1782 // check for safepoint in progress |
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1783 // check if any thread suspend flags are set |
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1784 // call into JVM and possible unlock the JNI critical |
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1785 // if a GC was suppressed while in the critical native. |
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1786 // transition back to thread_in_Java |
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1787 // return to caller |
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1788 // |
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1789 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1790 methodHandle method, |
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1791 int compile_id, |
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1792 BasicType* in_sig_bt, |
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1793 VMRegPair* in_regs, |
0 | 1794 BasicType ret_type) { |
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1795 if (method->is_method_handle_intrinsic()) { |
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1796 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1797 intptr_t start = (intptr_t)__ pc(); |
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1798 int vep_offset = ((intptr_t)__ pc()) - start; |
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1799 gen_special_dispatch(masm, |
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1800 method, |
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1801 in_sig_bt, |
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1802 in_regs); |
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1803 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1804 __ flush(); |
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1805 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1806 return nmethod::new_native_nmethod(method, |
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1807 compile_id, |
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1808 masm->code(), |
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1809 vep_offset, |
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1810 frame_complete, |
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1811 stack_slots / VMRegImpl::slots_per_word, |
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1812 in_ByteSize(-1), |
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1813 in_ByteSize(-1), |
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1814 (OopMapSet*)NULL); |
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1815 } |
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1816 bool is_critical_native = true; |
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1817 address native_func = method->critical_native_function(); |
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1818 if (native_func == NULL) { |
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1819 native_func = method->native_function(); |
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1820 is_critical_native = false; |
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1821 } |
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1822 assert(native_func != NULL, "must have function"); |
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1823 |
0 | 1824 // An OopMap for lock (and class if static) |
1825 OopMapSet *oop_maps = new OopMapSet(); | |
1826 intptr_t start = (intptr_t)__ pc(); | |
1827 | |
1828 // We have received a description of where all the java arg are located | |
1829 // on entry to the wrapper. We need to convert these args to where | |
1830 // the jni function will expect them. To figure out where they go | |
1831 // we convert the java signature to a C signature by inserting | |
1832 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1833 | |
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1834 const int total_in_args = method->size_of_parameters(); |
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1835 int total_c_args = total_in_args; |
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1836 if (!is_critical_native) { |
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1837 total_c_args += 1; |
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1838 if (method->is_static()) { |
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1839 total_c_args++; |
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1840 } |
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1841 } else { |
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1842 for (int i = 0; i < total_in_args; i++) { |
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1843 if (in_sig_bt[i] == T_ARRAY) { |
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1844 total_c_args++; |
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1845 } |
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1846 } |
0 | 1847 } |
1848 | |
1849 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1850 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1851 BasicType* in_elem_bt = NULL; |
0 | 1852 |
1853 int argc = 0; | |
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1854 if (!is_critical_native) { |
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1855 out_sig_bt[argc++] = T_ADDRESS; |
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1856 if (method->is_static()) { |
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1857 out_sig_bt[argc++] = T_OBJECT; |
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1858 } |
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1859 |
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1860 for (int i = 0; i < total_in_args ; i++ ) { |
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1861 out_sig_bt[argc++] = in_sig_bt[i]; |
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1862 } |
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1863 } else { |
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1864 Thread* THREAD = Thread::current(); |
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1865 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1866 SignatureStream ss(method->signature()); |
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1867 for (int i = 0; i < total_in_args ; i++ ) { |
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1868 if (in_sig_bt[i] == T_ARRAY) { |
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1869 // Arrays are passed as int, elem* pair |
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1870 out_sig_bt[argc++] = T_INT; |
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1871 out_sig_bt[argc++] = T_ADDRESS; |
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1872 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1873 const char* at = atype->as_C_string(); |
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1874 if (strlen(at) == 2) { |
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1875 assert(at[0] == '[', "must be"); |
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1876 switch (at[1]) { |
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1877 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1878 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1879 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1880 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1881 case 'I': in_elem_bt[i] = T_INT; break; |
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1882 case 'J': in_elem_bt[i] = T_LONG; break; |
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1883 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1884 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1885 default: ShouldNotReachHere(); |
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1886 } |
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1887 } |
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1888 } else { |
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1889 out_sig_bt[argc++] = in_sig_bt[i]; |
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1890 in_elem_bt[i] = T_VOID; |
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1891 } |
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1892 if (in_sig_bt[i] != T_VOID) { |
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1893 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1894 ss.next(); |
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1895 } |
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1896 } |
0 | 1897 } |
1898 | |
1899 // Now figure out where the args must be stored and how much stack space | |
1900 // they require. | |
1901 int out_arg_slots; | |
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1902 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
0 | 1903 |
1904 // Compute framesize for the wrapper. We need to handlize all oops in | |
1905 // incoming registers | |
1906 | |
1907 // Calculate the total number of stack slots we will need. | |
1908 | |
1909 // First count the abi requirement plus all of the outgoing args | |
1910 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1911 | |
1912 // Now the space for the inbound oop handle area | |
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1913 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1914 if (is_critical_native) { |
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1915 // Critical natives may have to call out so they need a save area |
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1916 // for register arguments. |
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1917 int double_slots = 0; |
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1918 int single_slots = 0; |
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1919 for ( int i = 0; i < total_in_args; i++) { |
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1920 if (in_regs[i].first()->is_Register()) { |
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1921 const Register reg = in_regs[i].first()->as_Register(); |
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1922 switch (in_sig_bt[i]) { |
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1923 case T_BOOLEAN: |
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1924 case T_BYTE: |
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1925 case T_SHORT: |
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1926 case T_CHAR: |
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1927 case T_INT: single_slots++; break; |
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1928 case T_ARRAY: // specific to LP64 (7145024) |
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1929 case T_LONG: double_slots++; break; |
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1930 default: ShouldNotReachHere(); |
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1931 } |
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1932 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1933 switch (in_sig_bt[i]) { |
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1934 case T_FLOAT: single_slots++; break; |
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1935 case T_DOUBLE: double_slots++; break; |
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1936 default: ShouldNotReachHere(); |
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1937 } |
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1938 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1939 ShouldNotReachHere(); |
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1940 } |
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1941 } |
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1942 total_save_slots = double_slots * 2 + single_slots; |
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1943 // align the save area |
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1944 if (double_slots != 0) { |
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1945 stack_slots = round_to(stack_slots, 2); |
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1946 } |
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1947 } |
0 | 1948 |
1949 int oop_handle_offset = stack_slots; | |
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1950 stack_slots += total_save_slots; |
0 | 1951 |
1952 // Now any space we need for handlizing a klass if static method | |
1953 | |
1954 int klass_slot_offset = 0; | |
1955 int klass_offset = -1; | |
1956 int lock_slot_offset = 0; | |
1957 bool is_static = false; | |
1958 | |
1959 if (method->is_static()) { | |
1960 klass_slot_offset = stack_slots; | |
1961 stack_slots += VMRegImpl::slots_per_word; | |
1962 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1963 is_static = true; | |
1964 } | |
1965 | |
1966 // Plus a lock if needed | |
1967 | |
1968 if (method->is_synchronized()) { | |
1969 lock_slot_offset = stack_slots; | |
1970 stack_slots += VMRegImpl::slots_per_word; | |
1971 } | |
1972 | |
1973 // Now a place (+2) to save return values or temp during shuffling | |
1974 // + 4 for return address (which we own) and saved rbp | |
1975 stack_slots += 6; | |
1976 | |
1977 // Ok The space we have allocated will look like: | |
1978 // | |
1979 // | |
1980 // FP-> | | | |
1981 // |---------------------| | |
1982 // | 2 slots for moves | | |
1983 // |---------------------| | |
1984 // | lock box (if sync) | | |
1985 // |---------------------| <- lock_slot_offset | |
1986 // | klass (if static) | | |
1987 // |---------------------| <- klass_slot_offset | |
1988 // | oopHandle area | | |
1989 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1990 // | outbound memory | | |
1991 // | based arguments | | |
1992 // | | | |
1993 // |---------------------| | |
1994 // | | | |
1995 // SP-> | out_preserved_slots | | |
1996 // | |
1997 // | |
1998 | |
1999 | |
2000 // Now compute actual number of stack words we need rounding to make | |
2001 // stack properly aligned. | |
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2002 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 2003 |
2004 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
2005 | |
2006 // First thing make an ic check to see if we should even be here | |
2007 | |
2008 // We are free to use all registers as temps without saving them and | |
2009 // restoring them except rbp. rbp is the only callee save register | |
2010 // as far as the interpreter and the compiler(s) are concerned. | |
2011 | |
2012 | |
2013 const Register ic_reg = rax; | |
2014 const Register receiver = j_rarg0; | |
2015 | |
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2016 Label hit; |
0 | 2017 Label exception_pending; |
2018 | |
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2019 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 2020 __ verify_oop(receiver); |
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2021 __ load_klass(rscratch1, receiver); |
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2022 __ cmpq(ic_reg, rscratch1); |
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2023 __ jcc(Assembler::equal, hit); |
0 | 2024 |
2025 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
2026 | |
2027 // Verified entry point must be aligned | |
2028 __ align(8); | |
2029 | |
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2030 __ bind(hit); |
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2031 |
0 | 2032 int vep_offset = ((intptr_t)__ pc()) - start; |
2033 | |
2034 // The instruction at the verified entry point must be 5 bytes or longer | |
2035 // because it can be patched on the fly by make_non_entrant. The stack bang | |
2036 // instruction fits that requirement. | |
2037 | |
2038 // Generate stack overflow check | |
2039 | |
2040 if (UseStackBanging) { | |
2041 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
2042 } else { | |
2043 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
2044 __ fat_nop(); | |
2045 } | |
2046 | |
2047 // Generate a new frame for the wrapper. | |
2048 __ enter(); | |
2049 // -2 because return address is already present and so is saved rbp | |
304 | 2050 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 2051 |
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2052 // Frame is now completed as far as size and linkage. |
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2053 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 2054 |
17780 | 2055 if (UseRTMLocking) { |
2056 // Abort RTM transaction before calling JNI | |
2057 // because critical section will be large and will be | |
2058 // aborted anyway. Also nmethod could be deoptimized. | |
2059 __ xabort(0); | |
2060 } | |
2061 | |
0 | 2062 #ifdef ASSERT |
2063 { | |
2064 Label L; | |
304 | 2065 __ mov(rax, rsp); |
605 | 2066 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 2067 __ cmpptr(rax, rsp); |
0 | 2068 __ jcc(Assembler::equal, L); |
2069 __ stop("improperly aligned stack"); | |
2070 __ bind(L); | |
2071 } | |
2072 #endif /* ASSERT */ | |
2073 | |
2074 | |
2075 // We use r14 as the oop handle for the receiver/klass | |
2076 // It is callee save so it survives the call to native | |
2077 | |
2078 const Register oop_handle_reg = r14; | |
2079 | |
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2080 if (is_critical_native) { |
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2081 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2082 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2083 } |
0 | 2084 |
2085 // | |
2086 // We immediately shuffle the arguments so that any vm call we have to | |
2087 // make from here on out (sync slow path, jvmti, etc.) we will have | |
2088 // captured the oops from our caller and have a valid oopMap for | |
2089 // them. | |
2090 | |
2091 // ----------------- | |
2092 // The Grand Shuffle | |
2093 | |
2094 // The Java calling convention is either equal (linux) or denser (win64) than the | |
2095 // c calling convention. However the because of the jni_env argument the c calling | |
2096 // convention always has at least one more (and two for static) arguments than Java. | |
2097 // Therefore if we move the args from java -> c backwards then we will never have | |
2098 // a register->register conflict and we don't have to build a dependency graph | |
2099 // and figure out how to break any cycles. | |
2100 // | |
2101 | |
2102 // Record esp-based slot for receiver on stack for non-static methods | |
2103 int receiver_offset = -1; | |
2104 | |
2105 // This is a trick. We double the stack slots so we can claim | |
2106 // the oops in the caller's frame. Since we are sure to have | |
2107 // more args than the caller doubling is enough to make | |
2108 // sure we can capture all the incoming oop args from the | |
2109 // caller. | |
2110 // | |
2111 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
2112 | |
2113 // Mark location of rbp (someday) | |
2114 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
2115 | |
2116 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
2117 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
2118 | |
2119 | |
2120 #ifdef ASSERT | |
2121 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
2122 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
2123 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
2124 reg_destroyed[r] = false; | |
2125 } | |
2126 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
2127 freg_destroyed[f] = false; | |
2128 } | |
2129 | |
2130 #endif /* ASSERT */ | |
2131 | |
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2132 // This may iterate in two different directions depending on the |
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2133 // kind of native it is. The reason is that for regular JNI natives |
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2134 // the incoming and outgoing registers are offset upwards and for |
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2135 // critical natives they are offset down. |
5905 | 2136 GrowableArray<int> arg_order(2 * total_in_args); |
2137 VMRegPair tmp_vmreg; | |
2138 tmp_vmreg.set1(rbx->as_VMReg()); | |
2139 | |
2140 if (!is_critical_native) { | |
2141 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
2142 arg_order.push(i); | |
2143 arg_order.push(c_arg); | |
2144 } | |
2145 } else { | |
2146 // Compute a valid move order, using tmp_vmreg to break any cycles | |
2147 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
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2148 } |
5905 | 2149 |
2150 int temploc = -1; | |
2151 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
2152 int i = arg_order.at(ai); | |
2153 int c_arg = arg_order.at(ai + 1); | |
2154 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
2155 if (c_arg == -1) { | |
2156 assert(is_critical_native, "should only be required for critical natives"); | |
2157 // This arg needs to be moved to a temporary | |
2158 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
2159 in_regs[i] = tmp_vmreg; | |
2160 temploc = i; | |
2161 continue; | |
2162 } else if (i == -1) { | |
2163 assert(is_critical_native, "should only be required for critical natives"); | |
2164 // Read from the temporary location | |
2165 assert(temploc != -1, "must be valid"); | |
2166 i = temploc; | |
2167 temploc = -1; | |
2168 } | |
0 | 2169 #ifdef ASSERT |
2170 if (in_regs[i].first()->is_Register()) { | |
2171 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
2172 } else if (in_regs[i].first()->is_XMMRegister()) { | |
2173 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
2174 } | |
2175 if (out_regs[c_arg].first()->is_Register()) { | |
2176 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
2177 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
2178 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
2179 } | |
2180 #endif /* ASSERT */ | |
2181 switch (in_sig_bt[i]) { | |
2182 case T_ARRAY: | |
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2183 if (is_critical_native) { |
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2184 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2185 c_arg++; |
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2186 #ifdef ASSERT |
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2187 if (out_regs[c_arg].first()->is_Register()) { |
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2188 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2189 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2190 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2191 } |
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2192 #endif |
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2193 break; |
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2194 } |
0 | 2195 case T_OBJECT: |
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2196 assert(!is_critical_native, "no oop arguments"); |
0 | 2197 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
2198 ((i == 0) && (!is_static)), | |
2199 &receiver_offset); | |
2200 break; | |
2201 case T_VOID: | |
2202 break; | |
2203 | |
2204 case T_FLOAT: | |
2205 float_move(masm, in_regs[i], out_regs[c_arg]); | |
2206 break; | |
2207 | |
2208 case T_DOUBLE: | |
2209 assert( i + 1 < total_in_args && | |
2210 in_sig_bt[i + 1] == T_VOID && | |
2211 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
2212 double_move(masm, in_regs[i], out_regs[c_arg]); | |
2213 break; | |
2214 | |
2215 case T_LONG : | |
2216 long_move(masm, in_regs[i], out_regs[c_arg]); | |
2217 break; | |
2218 | |
2219 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
2220 | |
2221 default: | |
2222 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
2223 } | |
2224 } | |
2225 | |
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2226 int c_arg; |
0 | 2227 |
2228 // Pre-load a static method's oop into r14. Used both by locking code and | |
2229 // the normal JNI call code. | |
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2230 if (!is_critical_native) { |
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2231 // point c_arg at the first arg that is already loaded in case we |
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2232 // need to spill before we call out |
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2233 c_arg = total_c_args - total_in_args; |
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2234 |
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2235 if (method->is_static()) { |
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2236 |
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2237 // load oop into a register |
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2238 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
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2239 |
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2240 // Now handlize the static class mirror it's known not-null. |
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2241 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
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2242 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
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2243 |
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2244 // Now get the handle |
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2245 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
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2246 // store the klass handle as second argument |
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2247 __ movptr(c_rarg1, oop_handle_reg); |
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2248 // and protect the arg if we must spill |
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2249 c_arg--; |
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2250 } |
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2251 } else { |
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2252 // For JNI critical methods we need to save all registers in save_args. |
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2253 c_arg = 0; |
0 | 2254 } |
2255 | |
2256 // Change state to native (we save the return address in the thread, since it might not | |
2257 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
2258 // points into the right code segment. It does not have to be the correct return pc. | |
2259 // We use the same pc/oopMap repeatedly when we call out | |
2260 | |
2261 intptr_t the_pc = (intptr_t) __ pc(); | |
2262 oop_maps->add_gc_map(the_pc - start, map); | |
2263 | |
2264 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
2265 | |
2266 | |
2267 // We have all of the arguments setup at this point. We must not touch any register | |
2268 // argument registers at this point (what if we save/restore them there are no oop? | |
2269 | |
2270 { | |
2271 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2272 // protect the args we've loaded | |
2273 save_args(masm, total_c_args, c_arg, out_regs); | |
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2274 __ mov_metadata(c_rarg1, method()); |
0 | 2275 __ call_VM_leaf( |
2276 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
2277 r15_thread, c_rarg1); | |
2278 restore_args(masm, total_c_args, c_arg, out_regs); | |
2279 } | |
2280 | |
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2281 // RedefineClasses() tracing support for obsolete method entry |
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2282 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2283 // protect the args we've loaded |
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2284 save_args(masm, total_c_args, c_arg, out_regs); |
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2285 __ mov_metadata(c_rarg1, method()); |
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2286 __ call_VM_leaf( |
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2287 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2288 r15_thread, c_rarg1); |
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2289 restore_args(masm, total_c_args, c_arg, out_regs); |
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2290 } |
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2291 |
0 | 2292 // Lock a synchronized method |
2293 | |
2294 // Register definitions used by locking and unlocking | |
2295 | |
2296 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
2297 const Register obj_reg = rbx; // Will contain the oop | |
2298 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
2299 const Register old_hdr = r13; // value of old header at unlock time | |
2300 | |
2301 Label slow_path_lock; | |
2302 Label lock_done; | |
2303 | |
2304 if (method->is_synchronized()) { | |
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2305 assert(!is_critical_native, "unhandled"); |
0 | 2306 |
2307 | |
2308 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
2309 | |
2310 // Get the handle (the 2nd argument) | |
304 | 2311 __ mov(oop_handle_reg, c_rarg1); |
0 | 2312 |
2313 // Get address of the box | |
2314 | |
304 | 2315 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2316 |
2317 // Load the oop from the handle | |
304 | 2318 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2319 |
2320 if (UseBiasedLocking) { | |
2321 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
2322 } | |
2323 | |
2324 // Load immediate 1 into swap_reg %rax | |
2325 __ movl(swap_reg, 1); | |
2326 | |
2327 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 2328 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 2329 |
2330 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 2331 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2332 |
2333 if (os::is_MP()) { | |
2334 __ lock(); | |
2335 } | |
2336 | |
2337 // src -> dest iff dest == rax else rax <- dest | |
304 | 2338 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 2339 __ jcc(Assembler::equal, lock_done); |
2340 | |
2341 // Hmm should this move to the slow path code area??? | |
2342 | |
2343 // Test if the oopMark is an obvious stack pointer, i.e., | |
2344 // 1) (mark & 3) == 0, and | |
2345 // 2) rsp <= mark < mark + os::pagesize() | |
2346 // These 3 tests can be done by evaluating the following | |
2347 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
2348 // assuming both stack pointer and pagesize have their | |
2349 // least significant 2 bits clear. | |
2350 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
2351 | |
304 | 2352 __ subptr(swap_reg, rsp); |
2353 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 2354 |
2355 // Save the test result, for recursive case, the result is zero | |
304 | 2356 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2357 __ jcc(Assembler::notEqual, slow_path_lock); |
2358 | |
2359 // Slow path will re-enter here | |
2360 | |
2361 __ bind(lock_done); | |
2362 } | |
2363 | |
2364 | |
2365 // Finally just about ready to make the JNI call | |
2366 | |
2367 | |
2368 // get JNIEnv* which is first argument to native | |
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2369 if (!is_critical_native) { |
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2370 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2371 } |
0 | 2372 |
2373 // Now set thread in native | |
304 | 2374 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 2375 |
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2376 __ call(RuntimeAddress(native_func)); |
0 | 2377 |
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2378 // Verify or restore cpu control state after JNI call |
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2379 __ restore_cpu_control_state_after_jni(); |
0 | 2380 |
2381 // Unpack native results. | |
2382 switch (ret_type) { | |
2383 case T_BOOLEAN: __ c2bool(rax); break; | |
2384 case T_CHAR : __ movzwl(rax, rax); break; | |
2385 case T_BYTE : __ sign_extend_byte (rax); break; | |
2386 case T_SHORT : __ sign_extend_short(rax); break; | |
2387 case T_INT : /* nothing to do */ break; | |
2388 case T_DOUBLE : | |
2389 case T_FLOAT : | |
2390 // Result is in xmm0 we'll save as needed | |
2391 break; | |
2392 case T_ARRAY: // Really a handle | |
2393 case T_OBJECT: // Really a handle | |
2394 break; // can't de-handlize until after safepoint check | |
2395 case T_VOID: break; | |
2396 case T_LONG: break; | |
2397 default : ShouldNotReachHere(); | |
2398 } | |
2399 | |
2400 // Switch thread to "native transition" state before reading the synchronization state. | |
2401 // This additional state is necessary because reading and testing the synchronization | |
2402 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2403 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2404 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2405 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2406 // didn't see any synchronization is progress, and escapes. | |
304 | 2407 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 2408 |
2409 if(os::is_MP()) { | |
2410 if (UseMembar) { | |
2411 // Force this write out before the read below | |
2412 __ membar(Assembler::Membar_mask_bits( | |
2413 Assembler::LoadLoad | Assembler::LoadStore | | |
2414 Assembler::StoreLoad | Assembler::StoreStore)); | |
2415 } else { | |
2416 // Write serialization page so VM thread can do a pseudo remote membar. | |
2417 // We use the current thread pointer to calculate a thread specific | |
2418 // offset to write to within the page. This minimizes bus traffic | |
2419 // due to cache line collision. | |
2420 __ serialize_memory(r15_thread, rcx); | |
2421 } | |
2422 } | |
2423 | |
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2424 Label after_transition; |
0 | 2425 |
2426 // check for safepoint operation in progress and/or pending suspend requests | |
2427 { | |
2428 Label Continue; | |
2429 | |
2430 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2431 SafepointSynchronize::_not_synchronized); | |
2432 | |
2433 Label L; | |
2434 __ jcc(Assembler::notEqual, L); | |
2435 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
2436 __ jcc(Assembler::equal, Continue); | |
2437 __ bind(L); | |
2438 | |
2439 // Don't use call_VM as it will see a possible pending exception and forward it | |
2440 // and never return here preventing us from clearing _last_native_pc down below. | |
2441 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2442 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2443 // by hand. | |
2444 // | |
2445 save_native_result(masm, ret_type, stack_slots); | |
304 | 2446 __ mov(c_rarg0, r15_thread); |
2447 __ mov(r12, rsp); // remember sp | |
2448 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2449 __ andptr(rsp, -16); // align stack as required by ABI | |
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2450 if (!is_critical_native) { |
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2451 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2452 } else { |
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2453 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2454 } |
304 | 2455 __ mov(rsp, r12); // restore sp |
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2456 __ reinit_heapbase(); |
0 | 2457 // Restore any method result value |
2458 restore_native_result(masm, ret_type, stack_slots); | |
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2459 |
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2460 if (is_critical_native) { |
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2461 // The call above performed the transition to thread_in_Java so |
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2462 // skip the transition logic below. |
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2463 __ jmpb(after_transition); |
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2464 } |
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2465 |
0 | 2466 __ bind(Continue); |
2467 } | |
2468 | |
2469 // change thread state | |
2470 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2471 __ bind(after_transition); |
0 | 2472 |
2473 Label reguard; | |
2474 Label reguard_done; | |
2475 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2476 __ jcc(Assembler::equal, reguard); | |
2477 __ bind(reguard_done); | |
2478 | |
2479 // native result if any is live | |
2480 | |
2481 // Unlock | |
2482 Label unlock_done; | |
2483 Label slow_path_unlock; | |
2484 if (method->is_synchronized()) { | |
2485 | |
2486 // Get locked oop from the handle we passed to jni | |
304 | 2487 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2488 |
2489 Label done; | |
2490 | |
2491 if (UseBiasedLocking) { | |
2492 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2493 } | |
2494 | |
2495 // Simple recursive lock? | |
2496 | |
304 | 2497 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2498 __ jcc(Assembler::equal, done); |
2499 | |
2500 // Must save rax if if it is live now because cmpxchg must use it | |
2501 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2502 save_native_result(masm, ret_type, stack_slots); | |
2503 } | |
2504 | |
2505 | |
2506 // get address of the stack lock | |
304 | 2507 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2508 // get old displaced header |
304 | 2509 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2510 |
2511 // Atomic swap old header if oop still contains the stack lock | |
2512 if (os::is_MP()) { | |
2513 __ lock(); | |
2514 } | |
304 | 2515 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2516 __ jcc(Assembler::notEqual, slow_path_unlock); |
2517 | |
2518 // slow path re-enters here | |
2519 __ bind(unlock_done); | |
2520 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2521 restore_native_result(masm, ret_type, stack_slots); | |
2522 } | |
2523 | |
2524 __ bind(done); | |
2525 | |
2526 } | |
2527 { | |
2528 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2529 save_native_result(masm, ret_type, stack_slots); | |
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2530 __ mov_metadata(c_rarg1, method()); |
0 | 2531 __ call_VM_leaf( |
2532 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2533 r15_thread, c_rarg1); | |
2534 restore_native_result(masm, ret_type, stack_slots); | |
2535 } | |
2536 | |
2537 __ reset_last_Java_frame(false, true); | |
2538 | |
2539 // Unpack oop result | |
2540 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2541 Label L; | |
304 | 2542 __ testptr(rax, rax); |
0 | 2543 __ jcc(Assembler::zero, L); |
304 | 2544 __ movptr(rax, Address(rax, 0)); |
0 | 2545 __ bind(L); |
2546 __ verify_oop(rax); | |
2547 } | |
2548 | |
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2549 if (!is_critical_native) { |
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2550 // reset handle block |
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2551 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2552 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2553 } |
0 | 2554 |
2555 // pop our frame | |
2556 | |
2557 __ leave(); | |
2558 | |
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2559 if (!is_critical_native) { |
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2560 // Any exception pending? |
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2561 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2562 __ jcc(Assembler::notEqual, exception_pending); |
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2563 } |
0 | 2564 |
2565 // Return | |
2566 | |
2567 __ ret(0); | |
2568 | |
2569 // Unexpected paths are out of line and go here | |
2570 | |
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2571 if (!is_critical_native) { |
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2572 // forward the exception |
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2573 __ bind(exception_pending); |
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2574 |
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2575 // and forward the exception |
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2576 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2577 } |
0 | 2578 |
2579 // Slow path locking & unlocking | |
2580 if (method->is_synchronized()) { | |
2581 | |
2582 // BEGIN Slow path lock | |
2583 __ bind(slow_path_lock); | |
2584 | |
2585 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2586 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2587 | |
2588 // protect the args we've loaded | |
2589 save_args(masm, total_c_args, c_arg, out_regs); | |
2590 | |
304 | 2591 __ mov(c_rarg0, obj_reg); |
2592 __ mov(c_rarg1, lock_reg); | |
2593 __ mov(c_rarg2, r15_thread); | |
0 | 2594 |
2595 // Not a leaf but we have last_Java_frame setup as we want | |
2596 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2597 restore_args(masm, total_c_args, c_arg, out_regs); | |
2598 | |
2599 #ifdef ASSERT | |
2600 { Label L; | |
304 | 2601 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2602 __ jcc(Assembler::equal, L); |
2603 __ stop("no pending exception allowed on exit from monitorenter"); | |
2604 __ bind(L); | |
2605 } | |
2606 #endif | |
2607 __ jmp(lock_done); | |
2608 | |
2609 // END Slow path lock | |
2610 | |
2611 // BEGIN Slow path unlock | |
2612 __ bind(slow_path_unlock); | |
2613 | |
2614 // If we haven't already saved the native result we must save it now as xmm registers | |
2615 // are still exposed. | |
2616 | |
2617 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2618 save_native_result(masm, ret_type, stack_slots); | |
2619 } | |
2620 | |
304 | 2621 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2622 | |
2623 __ mov(c_rarg0, obj_reg); | |
2624 __ mov(r12, rsp); // remember sp | |
2625 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2626 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2627 |
2628 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2629 // NOTE that obj_reg == rbx currently | |
304 | 2630 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2631 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2632 |
2633 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2634 __ mov(rsp, r12); // restore sp |
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2635 __ reinit_heapbase(); |
0 | 2636 #ifdef ASSERT |
2637 { | |
2638 Label L; | |
304 | 2639 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2640 __ jcc(Assembler::equal, L); |
2641 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2642 __ bind(L); | |
2643 } | |
2644 #endif /* ASSERT */ | |
2645 | |
304 | 2646 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2647 |
2648 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2649 restore_native_result(masm, ret_type, stack_slots); | |
2650 } | |
2651 __ jmp(unlock_done); | |
2652 | |
2653 // END Slow path unlock | |
2654 | |
2655 } // synchronized | |
2656 | |
2657 // SLOW PATH Reguard the stack if needed | |
2658 | |
2659 __ bind(reguard); | |
2660 save_native_result(masm, ret_type, stack_slots); | |
304 | 2661 __ mov(r12, rsp); // remember sp |
2662 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2663 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2664 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2665 __ mov(rsp, r12); // restore sp |
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2666 __ reinit_heapbase(); |
0 | 2667 restore_native_result(masm, ret_type, stack_slots); |
2668 // and continue | |
2669 __ jmp(reguard_done); | |
2670 | |
2671 | |
2672 | |
2673 __ flush(); | |
2674 | |
2675 nmethod *nm = nmethod::new_native_nmethod(method, | |
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2676 compile_id, |
0 | 2677 masm->code(), |
2678 vep_offset, | |
2679 frame_complete, | |
2680 stack_slots / VMRegImpl::slots_per_word, | |
2681 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2682 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2683 oop_maps); | |
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2684 |
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2685 if (is_critical_native) { |
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2686 nm->set_lazy_critical_native(true); |
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2687 } |
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2688 |
0 | 2689 return nm; |
2690 | |
2691 } | |
2692 | |
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2693 #ifdef HAVE_DTRACE_H |
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2694 // --------------------------------------------------------------------------- |
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2695 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2696 // in the Java compiled code convention, marshals them to the native |
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2697 // abi and then leaves nops at the position you would expect to call a native |
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2698 // function. When the probe is enabled the nops are replaced with a trap |
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2699 // instruction that dtrace inserts and the trace will cause a notification |
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2700 // to dtrace. |
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2701 // |
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2702 // The probes are only able to take primitive types and java/lang/String as |
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2703 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2704 // strings so that from dtrace point of view java strings are converted to C |
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2705 // strings. There is an arbitrary fixed limit on the total space that a method |
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2706 // can use for converting the strings. (256 chars per string in the signature). |
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2707 // So any java string larger then this is truncated. |
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2708 |
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2709 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2710 static bool offsets_initialized = false; |
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2711 |
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2712 |
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2713 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2714 methodHandle method) { |
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2715 |
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2716 |
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2717 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2718 // be single threaded in this method. |
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2719 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2720 |
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2721 if (!offsets_initialized) { |
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2722 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2723 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2724 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2725 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2726 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2727 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2728 |
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2729 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2730 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2731 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2732 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2733 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2734 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2735 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2736 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2737 |
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2738 offsets_initialized = true; |
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2739 } |
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2740 // Fill in the signature array, for the calling-convention call. |
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2741 int total_args_passed = method->size_of_parameters(); |
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2742 |
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2743 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2744 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2745 |
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2746 // The signature we are going to use for the trap that dtrace will see |
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2747 // java/lang/String is converted. We drop "this" and any other object |
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2748 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2749 // is converted to a two-slot long, which is why we double the allocation). |
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2750 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2751 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2752 |
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2753 int i=0; |
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2754 int total_strings = 0; |
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2755 int first_arg_to_pass = 0; |
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2756 int total_c_args = 0; |
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2757 |
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2758 // Skip the receiver as dtrace doesn't want to see it |
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2759 if( !method->is_static() ) { |
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2760 in_sig_bt[i++] = T_OBJECT; |
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2761 first_arg_to_pass = 1; |
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2762 } |
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2763 |
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2764 // We need to convert the java args to where a native (non-jni) function |
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2765 // would expect them. To figure out where they go we convert the java |
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2766 // signature to a C signature. |
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2767 |
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2768 SignatureStream ss(method->signature()); |
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2769 for ( ; !ss.at_return_type(); ss.next()) { |
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2770 BasicType bt = ss.type(); |
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2771 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2772 out_sig_bt[total_c_args++] = bt; |
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2773 if( bt == T_OBJECT) { |
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2774 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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2775 if (s == vmSymbols::java_lang_String()) { |
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2776 total_strings++; |
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2777 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2778 } else if (s == vmSymbols::java_lang_Boolean() || |
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2779 s == vmSymbols::java_lang_Character() || |
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2780 s == vmSymbols::java_lang_Byte() || |
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2781 s == vmSymbols::java_lang_Short() || |
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2782 s == vmSymbols::java_lang_Integer() || |
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2783 s == vmSymbols::java_lang_Float()) { |
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2784 out_sig_bt[total_c_args-1] = T_INT; |
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2785 } else if (s == vmSymbols::java_lang_Long() || |
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2786 s == vmSymbols::java_lang_Double()) { |
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2787 out_sig_bt[total_c_args-1] = T_LONG; |
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2788 out_sig_bt[total_c_args++] = T_VOID; |
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2789 } |
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2790 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2791 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2792 // We convert double to long |
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2793 out_sig_bt[total_c_args-1] = T_LONG; |
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2794 out_sig_bt[total_c_args++] = T_VOID; |
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2795 } else if ( bt == T_FLOAT) { |
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2796 // We convert float to int |
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2797 out_sig_bt[total_c_args-1] = T_INT; |
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2798 } |
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2799 } |
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2800 |
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2801 assert(i==total_args_passed, "validly parsed signature"); |
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2802 |
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2803 // Now get the compiled-Java layout as input arguments |
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2804 int comp_args_on_stack; |
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2805 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2806 in_sig_bt, in_regs, total_args_passed, false); |
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2807 |
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2808 // Now figure out where the args must be stored and how much stack space |
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2809 // they require (neglecting out_preserve_stack_slots but space for storing |
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2810 // the 1st six register arguments). It's weird see int_stk_helper. |
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2811 |
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2812 int out_arg_slots; |
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2813 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
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2814 |
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2815 // Calculate the total number of stack slots we will need. |
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2816 |
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2817 // First count the abi requirement plus all of the outgoing args |
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2818 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2819 |
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2820 // Now space for the string(s) we must convert |
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2821 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2822 for (i = 0; i < total_strings ; i++) { |
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2823 string_locs[i] = stack_slots; |
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2824 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2825 } |
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2826 |
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2827 // Plus the temps we might need to juggle register args |
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2828 // regs take two slots each |
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2829 stack_slots += (Argument::n_int_register_parameters_c + |
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2830 Argument::n_float_register_parameters_c) * 2; |
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2831 |
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2832 |
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2833 // + 4 for return address (which we own) and saved rbp, |
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2834 |
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2835 stack_slots += 4; |
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2836 |
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2837 // Ok The space we have allocated will look like: |
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2838 // |
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2839 // |
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2840 // FP-> | | |
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2841 // |---------------------| |
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2842 // | string[n] | |
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2843 // |---------------------| <- string_locs[n] |
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2844 // | string[n-1] | |
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2845 // |---------------------| <- string_locs[n-1] |
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2846 // | ... | |
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2847 // | ... | |
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2848 // |---------------------| <- string_locs[1] |
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2849 // | string[0] | |
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2850 // |---------------------| <- string_locs[0] |
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2851 // | outbound memory | |
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2852 // | based arguments | |
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2853 // | | |
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2854 // |---------------------| |
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2855 // | | |
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2856 // SP-> | out_preserved_slots | |
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2857 // |
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2858 // |
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2859 |
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2860 // Now compute actual number of stack words we need rounding to make |
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2861 // stack properly aligned. |
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2862 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2863 |
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2864 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2865 |
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2866 intptr_t start = (intptr_t)__ pc(); |
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2867 |
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2868 // First thing make an ic check to see if we should even be here |
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2869 |
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2870 // We are free to use all registers as temps without saving them and |
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2871 // restoring them except rbp. rbp, is the only callee save register |
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2872 // as far as the interpreter and the compiler(s) are concerned. |
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2873 |
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2874 const Register ic_reg = rax; |
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2875 const Register receiver = rcx; |
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2876 Label hit; |
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2877 Label exception_pending; |
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2878 |
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2879 |
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2880 __ verify_oop(receiver); |
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2881 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2882 __ jcc(Assembler::equal, hit); |
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2883 |
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2884 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2885 |
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2886 // verified entry must be aligned for code patching. |
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2887 // and the first 5 bytes must be in the same cache line |
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2888 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2889 __ align(8); |
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2890 |
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2891 __ bind(hit); |
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2892 |
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2893 int vep_offset = ((intptr_t)__ pc()) - start; |
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2894 |
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2895 |
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2896 // The instruction at the verified entry point must be 5 bytes or longer |
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2897 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2898 // instruction fits that requirement. |
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2899 |
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2900 // Generate stack overflow check |
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2901 |
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2902 if (UseStackBanging) { |
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2903 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2904 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2905 } else { |
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2906 __ movl(rax, stack_size); |
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2907 __ bang_stack_size(rax, rbx); |
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2908 } |
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2909 } else { |
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2910 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2911 __ fat_nop(); |
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2912 } |
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2913 |
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2914 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2915 "valid size for make_non_entrant"); |
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2916 |
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2917 // Generate a new frame for the wrapper. |
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2918 __ enter(); |
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2919 |
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2920 // -4 because return address is already present and so is saved rbp, |
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2921 if (stack_size - 2*wordSize != 0) { |
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2922 __ subq(rsp, stack_size - 2*wordSize); |
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2923 } |
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2924 |
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2925 // Frame is now completed as far a size and linkage. |
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2926 |
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2927 int frame_complete = ((intptr_t)__ pc()) - start; |
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2928 |
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2929 int c_arg, j_arg; |
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2930 |
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2931 // State of input register args |
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2932 |
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2933 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2934 |
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2935 live[j_rarg0->as_VMReg()->value()] = false; |
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2936 live[j_rarg1->as_VMReg()->value()] = false; |
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2937 live[j_rarg2->as_VMReg()->value()] = false; |
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2938 live[j_rarg3->as_VMReg()->value()] = false; |
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2939 live[j_rarg4->as_VMReg()->value()] = false; |
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2940 live[j_rarg5->as_VMReg()->value()] = false; |
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2941 |
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2942 live[j_farg0->as_VMReg()->value()] = false; |
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2943 live[j_farg1->as_VMReg()->value()] = false; |
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2944 live[j_farg2->as_VMReg()->value()] = false; |
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2945 live[j_farg3->as_VMReg()->value()] = false; |
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2946 live[j_farg4->as_VMReg()->value()] = false; |
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2947 live[j_farg5->as_VMReg()->value()] = false; |
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2948 live[j_farg6->as_VMReg()->value()] = false; |
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2949 live[j_farg7->as_VMReg()->value()] = false; |
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2950 |
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2951 |
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2952 bool rax_is_zero = false; |
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2953 |
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2954 // All args (except strings) destined for the stack are moved first |
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2955 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2956 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2957 VMRegPair src = in_regs[j_arg]; |
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2958 VMRegPair dst = out_regs[c_arg]; |
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2959 |
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2960 // Get the real reg value or a dummy (rsp) |
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2961 |
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|
2962 int src_reg = src.first()->is_reg() ? |
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|
2963 src.first()->value() : |
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|
2964 rsp->as_VMReg()->value(); |
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|
2965 |
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|
2966 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2967 (in_sig_bt[j_arg] == T_OBJECT && |
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2968 out_sig_bt[c_arg] != T_INT && |
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2969 out_sig_bt[c_arg] != T_ADDRESS && |
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|
2970 out_sig_bt[c_arg] != T_LONG); |
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|
2971 |
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|
2972 live[src_reg] = !useless; |
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|
2973 |
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113
diff
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|
2974 if (dst.first()->is_stack()) { |
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kamg
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113
diff
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|
2975 |
018d5b58dd4f
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diff
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|
2976 // Even though a string arg in a register is still live after this loop |
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2977 // after the string conversion loop (next) it will be dead so we take |
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2978 // advantage of that now for simpler code to manage live. |
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|
2979 |
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|
2980 live[src_reg] = false; |
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diff
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|
2981 switch (in_sig_bt[j_arg]) { |
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kamg
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113
diff
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|
2982 |
018d5b58dd4f
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kamg
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113
diff
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|
2983 case T_ARRAY: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2984 case T_OBJECT: |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2985 { |
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|
2986 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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kamg
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113
diff
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|
2987 |
018d5b58dd4f
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113
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|
2988 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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|
2989 // need to unbox a one-word value |
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|
2990 Register in_reg = rax; |
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|
2991 if ( src.first()->is_reg() ) { |
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|
2992 in_reg = src.first()->as_Register(); |
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|
2993 } else { |
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|
2994 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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|
2995 rax_is_zero = false; |
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113
diff
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|
2996 } |
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kamg
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113
diff
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|
2997 Label skipUnbox; |
018d5b58dd4f
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113
diff
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|
2998 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
018d5b58dd4f
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kamg
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113
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|
2999 (int32_t)NULL_WORD); |
018d5b58dd4f
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113
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|
3000 __ testq(in_reg, in_reg); |
018d5b58dd4f
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113
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|
3001 __ jcc(Assembler::zero, skipUnbox); |
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kamg
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113
diff
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|
3002 |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
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116
diff
changeset
|
3003 BasicType bt = out_sig_bt[c_arg]; |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
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116
diff
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|
3004 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
018d5b58dd4f
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kamg
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113
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|
3005 Address src1(in_reg, box_offset); |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
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116
diff
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|
3006 if ( bt == T_LONG ) { |
116
018d5b58dd4f
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kamg
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|
3007 __ movq(in_reg, src1); |
018d5b58dd4f
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113
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|
3008 __ movq(stack_dst, in_reg); |
018d5b58dd4f
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113
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|
3009 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
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kamg
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113
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|
3010 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3011 } else { |
018d5b58dd4f
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kamg
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113
diff
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|
3012 __ movl(in_reg, src1); |
018d5b58dd4f
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kamg
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113
diff
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|
3013 __ movl(stack_dst, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3014 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3015 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3016 __ bind(skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3017 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3018 // Convert the arg to NULL |
018d5b58dd4f
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kamg
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113
diff
changeset
|
3019 if (!rax_is_zero) { |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3020 __ xorq(rax, rax); |
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kamg
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113
diff
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|
3021 rax_is_zero = true; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3022 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3023 __ movq(stack_dst, rax); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3024 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3025 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3026 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3027 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3028 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3029 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3030 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3031 case T_FLOAT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3032 // This does the right thing since we know it is destined for the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3033 // stack |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3034 float_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3035 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3036 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3037 case T_DOUBLE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3038 // This does the right thing since we know it is destined for the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3039 // stack |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3040 double_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3041 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3042 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3043 case T_LONG : |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3044 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3045 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3046 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3047 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3048 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3049 default: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3050 move32_64(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3051 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3052 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3053 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3054 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3055 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3056 // If we have any strings we must store any register based arg to the stack |
018d5b58dd4f
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kamg
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113
diff
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|
3057 // This includes any still live xmm registers too. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3058 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3059 int sid = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3060 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3061 if (total_strings > 0 ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3062 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
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kamg
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113
diff
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|
3063 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3064 VMRegPair src = in_regs[j_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3065 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3066 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3067 if (src.first()->is_reg()) { |
018d5b58dd4f
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kamg
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113
diff
changeset
|
3068 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3069 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3070 // string oops were left untouched by the previous loop even if the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3071 // eventual (converted) arg is destined for the stack so park them |
018d5b58dd4f
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113
diff
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|
3072 // away now (except for first) |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3073 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3074 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3075 Address utf8_addr = Address( |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3076 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
018d5b58dd4f
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kamg
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113
diff
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|
3077 if (sid != 1) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3078 // The first string arg won't be killed until after the utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3079 // conversion |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3080 __ movq(utf8_addr, src.first()->as_Register()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3081 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3082 } else if (dst.first()->is_reg()) { |
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3083 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
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3084 |
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3085 // Convert the xmm register to an int and store it in the reserved |
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3086 // location for the eventual c register arg |
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3087 XMMRegister f = src.first()->as_XMMRegister(); |
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3088 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3089 __ movflt(src_tmp, f); |
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3090 } else { |
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3091 __ movdbl(src_tmp, f); |
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3092 } |
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|
3093 } else { |
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3094 // If the arg is an oop type we don't support don't bother to store |
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3095 // it remember string was handled above. |
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3096 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3097 (in_sig_bt[j_arg] == T_OBJECT && |
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3098 out_sig_bt[c_arg] != T_INT && |
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3099 out_sig_bt[c_arg] != T_LONG); |
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3100 |
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3101 if (!useless) { |
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3102 __ movq(src_tmp, src.first()->as_Register()); |
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3103 } |
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|
3104 } |
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|
3105 } |
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|
3106 } |
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3107 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3108 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3109 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3110 } |
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|
3111 } |
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|
3112 |
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3113 // Now that the volatile registers are safe, convert all the strings |
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3114 sid = 0; |
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|
3115 |
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3116 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3117 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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3118 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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3119 // It's a string |
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|
3120 Address utf8_addr = Address( |
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3121 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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3122 // The first string we find might still be in the original java arg |
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3123 // register |
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|
3124 |
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3125 VMReg src = in_regs[j_arg].first(); |
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3126 |
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3127 // We will need to eventually save the final argument to the trap |
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3128 // in the von-volatile location dedicated to src. This is the offset |
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3129 // from fp we will use. |
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3130 int src_off = src->is_reg() ? |
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3131 fp_offset[src->value()] : reg2offset_in(src); |
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|
3132 |
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3133 // This is where the argument will eventually reside |
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3134 VMRegPair dst = out_regs[c_arg]; |
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|
3135 |
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|
3136 if (src->is_reg()) { |
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3137 if (sid == 1) { |
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3138 __ movq(c_rarg0, src->as_Register()); |
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|
3139 } else { |
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|
3140 __ movq(c_rarg0, utf8_addr); |
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|
3141 } |
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|
3142 } else { |
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|
3143 // arg is still in the original location |
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|
3144 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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|
3145 } |
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diff
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|
3146 Label done, convert; |
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diff
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|
3147 |
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|
3148 // see if the oop is NULL |
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|
3149 __ testq(c_rarg0, c_rarg0); |
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|
3150 __ jcc(Assembler::notEqual, convert); |
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|
3151 |
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|
3152 if (dst.first()->is_reg()) { |
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|
3153 // Save the ptr to utf string in the origina src loc or the tmp |
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|
3154 // dedicated to it |
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|
3155 __ movq(Address(rbp, src_off), c_rarg0); |
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|
3156 } else { |
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|
3157 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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kamg
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|
3158 } |
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|
3159 __ jmp(done); |
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|
3160 |
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diff
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|
3161 __ bind(convert); |
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113
diff
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|
3162 |
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|
3163 __ lea(c_rarg1, utf8_addr); |
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|
3164 if (dst.first()->is_reg()) { |
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|
3165 __ movq(Address(rbp, src_off), c_rarg1); |
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113
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|
3166 } else { |
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|
3167 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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|
3168 } |
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|
3169 // And do the conversion |
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|
3170 __ call(RuntimeAddress( |
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|
3171 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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|
3172 |
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|
3173 __ bind(done); |
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|
3174 } |
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|
3175 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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|
3176 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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|
3177 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
3178 } |
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|
3179 } |
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|
3180 // The get_utf call killed all the c_arg registers |
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|
3181 live[c_rarg0->as_VMReg()->value()] = false; |
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|
3182 live[c_rarg1->as_VMReg()->value()] = false; |
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|
3183 live[c_rarg2->as_VMReg()->value()] = false; |
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|
3184 live[c_rarg3->as_VMReg()->value()] = false; |
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|
3185 live[c_rarg4->as_VMReg()->value()] = false; |
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|
3186 live[c_rarg5->as_VMReg()->value()] = false; |
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|
3187 |
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|
3188 live[c_farg0->as_VMReg()->value()] = false; |
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|
3189 live[c_farg1->as_VMReg()->value()] = false; |
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|
3190 live[c_farg2->as_VMReg()->value()] = false; |
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|
3191 live[c_farg3->as_VMReg()->value()] = false; |
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|
3192 live[c_farg4->as_VMReg()->value()] = false; |
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|
3193 live[c_farg5->as_VMReg()->value()] = false; |
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3194 live[c_farg6->as_VMReg()->value()] = false; |
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3195 live[c_farg7->as_VMReg()->value()] = false; |
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|
3196 } |
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|
3197 |
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|
3198 // Now we can finally move the register args to their desired locations |
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|
3199 |
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3200 rax_is_zero = false; |
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3201 |
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3202 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3203 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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3204 |
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3205 VMRegPair src = in_regs[j_arg]; |
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3206 VMRegPair dst = out_regs[c_arg]; |
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3207 |
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3208 // Only need to look for args destined for the interger registers (since we |
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3209 // convert float/double args to look like int/long outbound) |
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3210 if (dst.first()->is_reg()) { |
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3211 Register r = dst.first()->as_Register(); |
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3212 |
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3213 // Check if the java arg is unsupported and thereofre useless |
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3214 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3215 (in_sig_bt[j_arg] == T_OBJECT && |
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3216 out_sig_bt[c_arg] != T_INT && |
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3217 out_sig_bt[c_arg] != T_ADDRESS && |
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3218 out_sig_bt[c_arg] != T_LONG); |
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3219 |
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3220 |
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3221 // If we're going to kill an existing arg save it first |
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3222 if (live[dst.first()->value()]) { |
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3223 // you can't kill yourself |
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3224 if (src.first() != dst.first()) { |
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3225 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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3226 } |
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3227 } |
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3228 if (src.first()->is_reg()) { |
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3229 if (live[src.first()->value()] ) { |
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3230 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3231 __ movdl(r, src.first()->as_XMMRegister()); |
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3232 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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3233 __ movdq(r, src.first()->as_XMMRegister()); |
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3234 } else if (r != src.first()->as_Register()) { |
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3235 if (!useless) { |
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3236 __ movq(r, src.first()->as_Register()); |
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3237 } |
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3238 } |
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3239 } else { |
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3240 // If the arg is an oop type we don't support don't bother to store |
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3241 // it |
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3242 if (!useless) { |
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3243 if (in_sig_bt[j_arg] == T_DOUBLE || |
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3244 in_sig_bt[j_arg] == T_LONG || |
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3245 in_sig_bt[j_arg] == T_OBJECT ) { |
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3246 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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3247 } else { |
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3248 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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3249 } |
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3250 } |
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3251 } |
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3252 live[src.first()->value()] = false; |
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3253 } else if (!useless) { |
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3254 // full sized move even for int should be ok |
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3255 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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3256 } |
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3257 |
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3258 // At this point r has the original java arg in the final location |
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3259 // (assuming it wasn't useless). If the java arg was an oop |
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3260 // we have a bit more to do |
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3261 |
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3262 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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3263 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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3264 // need to unbox a one-word value |
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3265 Label skip; |
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3266 __ testq(r, r); |
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3267 __ jcc(Assembler::equal, skip); |
165
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3268 BasicType bt = out_sig_bt[c_arg]; |
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3269 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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3270 Address src1(r, box_offset); |
165
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3271 if ( bt == T_LONG ) { |
116
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3272 __ movq(r, src1); |
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3273 } else { |
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3274 __ movl(r, src1); |
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3275 } |
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3276 __ bind(skip); |
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3277 |
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3278 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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3279 // Convert the arg to NULL |
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3280 __ xorq(r, r); |
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3281 } |
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3282 } |
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3283 |
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3284 // dst can longer be holding an input value |
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3285 live[dst.first()->value()] = false; |
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3286 } |
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3287 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3288 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3289 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3290 } |
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3291 } |
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3292 |
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3293 |
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3294 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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3295 // patch in the trap |
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3296 int patch_offset = ((intptr_t)__ pc()) - start; |
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3297 |
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3298 __ nop(); |
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3299 |
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3300 |
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3301 // Return |
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3302 |
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3303 __ leave(); |
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3304 __ ret(0); |
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3305 |
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3306 __ flush(); |
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3307 |
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3308 nmethod *nm = nmethod::new_dtrace_nmethod( |
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3309 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3310 stack_slots / VMRegImpl::slots_per_word); |
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3311 return nm; |
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3312 |
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3313 } |
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3314 |
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3315 #endif // HAVE_DTRACE_H |
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3316 |
0 | 3317 // this function returns the adjust size (in number of words) to a c2i adapter |
3318 // activation for use during deoptimization | |
3319 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 3320 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3321 } |
3322 | |
3323 | |
3324 uint SharedRuntime::out_preserve_stack_slots() { | |
3325 return 0; | |
3326 } | |
3327 | |
3328 //------------------------------generate_deopt_blob---------------------------- | |
3329 void SharedRuntime::generate_deopt_blob() { | |
3330 // Allocate space for the code | |
3331 ResourceMark rm; | |
3332 // Setup code generation tools | |
3333 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
3334 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3335 int frame_size_in_words; | |
3336 OopMap* map = NULL; | |
3337 OopMapSet *oop_maps = new OopMapSet(); | |
3338 | |
3339 // ------------- | |
3340 // This code enters when returning to a de-optimized nmethod. A return | |
3341 // address has been pushed on the the stack, and return values are in | |
3342 // registers. | |
3343 // If we are doing a normal deopt then we were called from the patched | |
3344 // nmethod from the point we returned to the nmethod. So the return | |
3345 // address on the stack is wrong by NativeCall::instruction_size | |
3346 // We will adjust the value so it looks like we have the original return | |
3347 // address on the stack (like when we eagerly deoptimized). | |
3348 // In the case of an exception pending when deoptimizing, we enter | |
3349 // with a return address on the stack that points after the call we patched | |
3350 // into the exception handler. We have the following register state from, | |
3351 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
3352 // rax: exception oop | |
3353 // rbx: exception handler | |
3354 // rdx: throwing pc | |
3355 // So in this case we simply jam rdx into the useless return address and | |
3356 // the stack looks just like we want. | |
3357 // | |
3358 // At this point we need to de-opt. We save the argument return | |
3359 // registers. We call the first C routine, fetch_unroll_info(). This | |
3360 // routine captures the return values and returns a structure which | |
3361 // describes the current frame size and the sizes of all replacement frames. | |
3362 // The current frame is compiled code and may contain many inlined | |
3363 // functions, each with their own JVM state. We pop the current frame, then | |
3364 // push all the new frames. Then we call the C routine unpack_frames() to | |
3365 // populate these frames. Finally unpack_frames() returns us the new target | |
3366 // address. Notice that callee-save registers are BLOWN here; they have | |
3367 // already been captured in the vframeArray at the time the return PC was | |
3368 // patched. | |
3369 address start = __ pc(); | |
3370 Label cont; | |
3371 | |
3372 // Prolog for non exception case! | |
3373 | |
3374 // Save everything in sight. | |
3375 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3376 | |
3377 // Normal deoptimization. Save exec mode for unpack_frames. | |
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0
diff
changeset
|
3378 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 3379 __ jmp(cont); |
304 | 3380 |
3381 int reexecute_offset = __ pc() - start; | |
21559
be896a1983c0
recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents:
21074
diff
changeset
|
3382 #if defined(COMPILERJVMCI) && !defined(COMPILER1) |
be896a1983c0
recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents:
21074
diff
changeset
|
3383 // JVMCI does not use this kind of deoptimization |
9112
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3384 __ should_not_reach_here(); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3385 #endif |
304 | 3386 |
3387 // Reexecute case | |
3388 // return address is the pc describes what bci to do re-execute at | |
3389 | |
3390 // No need to update map as each call to save_live_registers will produce identical oopmap | |
3391 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3392 | |
3393 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
3394 __ jmp(cont); | |
3395 | |
22298 | 3396 #if INCLUDE_JVMCI |
9112
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3397 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
15104 | 3398 |
21559
be896a1983c0
recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents:
21074
diff
changeset
|
3399 __ pushptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); |
9112
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3400 |
19462
33a783b15758
made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents:
18041
diff
changeset
|
3401 int uncommon_trap_offset = __ pc() - start; |
33a783b15758
made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents:
18041
diff
changeset
|
3402 |
9112
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3403 // Save everything in sight. |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3404 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3405 // fetch_unroll_info needs to call last_java_frame() |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3406 __ set_last_Java_frame(noreg, noreg, NULL); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3407 |
22460
f27c163d7dc2
moved JVMCI fields from ThreadShadow to Thread
Doug Simon <doug.simon@oracle.com>
parents:
22458
diff
changeset
|
3408 __ movl(c_rarg1, Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset()))); |
f27c163d7dc2
moved JVMCI fields from ThreadShadow to Thread
Doug Simon <doug.simon@oracle.com>
parents:
22458
diff
changeset
|
3409 __ movl(Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())), -1); |
9112
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3410 |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3411 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3412 __ mov(c_rarg0, r15_thread); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3413 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3414 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3415 |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3416 __ reset_last_Java_frame(false, false); |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3417 |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3418 Label after_fetch_unroll_info_call; |
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3419 __ jmp(after_fetch_unroll_info_call); |
22298 | 3420 #endif // INCLUDE_JVMCI |
9112
6c33b2076d7c
minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents:
8883
diff
changeset
|
3421 |
0 | 3422 int exception_offset = __ pc() - start; |
3423 | |
3424 // Prolog for exception case | |
3425 | |
304 | 3426 // all registers are dead at this entry point, except for rax, and |
3427 // rdx which contain the exception oop and exception pc | |
3428 // respectively. Set them in TLS and fall thru to the | |
3429 // unpack_with_exception_in_tls entry point. | |
3430 | |
3431 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
3432 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
3433 | |
3434 int exception_in_tls_offset = __ pc() - start; | |
3435 | |
3436 // new implementation because exception oop is now passed in JavaThread | |
3437 | |
3438 // Prolog for exception case | |
3439 // All registers must be preserved because they might be used by LinearScan | |
3440 // Exceptiop oop and throwing PC are passed in JavaThread | |
3441 // tos: stack at point of call to method that threw the exception (i.e. only | |
3442 // args are on the stack, no return address) | |
3443 | |
3444 // make room on stack for the return address | |
3445 // It will be patched later with the throwing pc. The correct value is not | |
3446 // available now because loading it from memory would destroy registers. | |
3447 __ push(0); | |
0 | 3448 |
3449 // Save everything in sight. | |
3450 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3451 | |
304 | 3452 // Now it is safe to overwrite any register |
3453 | |
0 | 3454 // Deopt during an exception. Save exec mode for unpack_frames. |
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coleenp
parents:
0
diff
changeset
|
3455 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 3456 |
304 | 3457 // load throwing pc from JavaThread and patch it as the return address |
3458 // of the current frame. Then clear the field in JavaThread | |
3459 | |
3460 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3461 __ movptr(Address(rbp, wordSize), rdx); | |
3462 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3463 | |
3464 #ifdef ASSERT | |
3465 // verify that there is really an exception oop in JavaThread | |
3466 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3467 __ verify_oop(rax); | |
3468 | |
3469 // verify that there is no pending exception | |
3470 Label no_pending_exception; | |
3471 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
3472 __ testptr(rax, rax); | |
3473 __ jcc(Assembler::zero, no_pending_exception); | |
3474 __ stop("must not have pending exception here"); | |
3475 __ bind(no_pending_exception); | |
3476 #endif | |
3477 | |
0 | 3478 __ bind(cont); |
3479 | |
3480 // Call C code. Need thread and this frame, but NOT official VM entry | |
3481 // crud. We cannot block on this call, no GC can happen. | |
3482 // | |
3483 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3484 | |
3485 // fetch_unroll_info needs to call last_java_frame(). | |
3486 | |
3487 __ set_last_Java_frame(noreg, noreg, NULL); | |
3488 #ifdef ASSERT | |
3489 { Label L; | |
304 | 3490 __ cmpptr(Address(r15_thread, |
0 | 3491 JavaThread::last_Java_fp_offset()), |
304 | 3492 (int32_t)0); |
0 | 3493 __ jcc(Assembler::equal, L); |
3494 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3495 __ bind(L); | |
3496 } | |
3497 #endif // ASSERT | |
304 | 3498 __ mov(c_rarg0, r15_thread); |
0 | 3499 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3500 | |
3501 // Need to have an oopmap that tells fetch_unroll_info where to | |
3502 // find any register it might need. | |
3503 oop_maps->add_gc_map(__ pc() - start, map); | |
3504 | |
3505 __ reset_last_Java_frame(false, false); | |
3506 | |
22298 | 3507 #if INCLUDE_JVMCI |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3508 __ bind(after_fetch_unroll_info_call); |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3509 #endif |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3510 |
0 | 3511 // Load UnrollBlock* into rdi |
304 | 3512 __ mov(rdi, rax); |
3513 | |
3514 Label noException; | |
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
3515 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3516 __ jcc(Assembler::notEqual, noException); |
3517 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3518 // QQQ this is useless it was NULL above | |
3519 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3520 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3521 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3522 | |
3523 __ verify_oop(rax); | |
3524 | |
3525 // Overwrite the result registers with the exception results. | |
3526 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3527 // I think this is useless | |
3528 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3529 | |
3530 __ bind(noException); | |
0 | 3531 |
3532 // Only register save data is on the stack. | |
3533 // Now restore the result registers. Everything else is either dead | |
3534 // or captured in the vframeArray. | |
3535 RegisterSaver::restore_result_registers(masm); | |
3536 | |
3537 // All of the register save area has been popped of the stack. Only the | |
3538 // return address remains. | |
3539 | |
3540 // Pop all the frames we must move/replace. | |
3541 // | |
3542 // Frame picture (youngest to oldest) | |
3543 // 1: self-frame (no frame link) | |
3544 // 2: deopting frame (no frame link) | |
3545 // 3: caller of deopting frame (could be compiled/interpreted). | |
3546 // | |
3547 // Note: by leaving the return address of self-frame on the stack | |
3548 // and using the size of frame 2 to adjust the stack | |
3549 // when we are done the return to frame 3 will still be on the stack. | |
3550 | |
3551 // Pop deoptimized frame | |
3552 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3553 __ addptr(rsp, rcx); |
0 | 3554 |
3555 // rsp should be pointing at the return address to the caller (3) | |
3556 | |
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3557 // Pick up the initial fp we should save |
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3558 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3559 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3560 |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3561 #ifdef ASSERT |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3562 // Compilers generate code that bang the stack by as much as the |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3563 // interpreter would need. So this stack banging should never |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3564 // trigger a fault. Verify that it does not on non product builds. |
0 | 3565 if (UseStackBanging) { |
3566 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3567 __ bang_stack_size(rbx, rcx); | |
3568 } | |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3569 #endif |
0 | 3570 |
3571 // Load address of array of frame pcs into rcx | |
304 | 3572 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3573 |
3574 // Trash the old pc | |
304 | 3575 __ addptr(rsp, wordSize); |
0 | 3576 |
3577 // Load address of array of frame sizes into rsi | |
304 | 3578 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3579 |
3580 // Load counter into rdx | |
3581 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3582 | |
3583 // Now adjust the caller's stack to make up for the extra locals | |
3584 // but record the original sp so that we can save it in the skeletal interpreter | |
3585 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3586 // value and not the "real" sp value. | |
3587 | |
3588 const Register sender_sp = r8; | |
3589 | |
304 | 3590 __ mov(sender_sp, rsp); |
0 | 3591 __ movl(rbx, Address(rdi, |
3592 Deoptimization::UnrollBlock:: | |
3593 caller_adjustment_offset_in_bytes())); | |
304 | 3594 __ subptr(rsp, rbx); |
0 | 3595 |
3596 // Push interpreter frames in a loop | |
3597 Label loop; | |
3598 __ bind(loop); | |
304 | 3599 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3600 #ifdef CC_INTERP | |
3601 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3602 #ifdef ASSERT | |
3603 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3604 __ push(0xDEADDEAD); | |
3605 #else /* ASSERT */ | |
3606 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3607 #endif /* ASSERT */ | |
3608 #else | |
3609 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3610 #endif // CC_INTERP | |
3611 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3612 __ enter(); // Save old & set new ebp |
304 | 3613 __ subptr(rsp, rbx); // Prolog |
3614 #ifdef CC_INTERP | |
3615 __ movptr(Address(rbp, | |
3616 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3617 sender_sp); // Make it walkable | |
3618 #else /* CC_INTERP */ | |
0 | 3619 // This value is corrected by layout_activation_impl |
304 | 3620 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3621 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3622 #endif /* CC_INTERP */ | |
3623 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3624 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3625 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3626 __ decrementl(rdx); // Decrement counter |
3627 __ jcc(Assembler::notZero, loop); | |
304 | 3628 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3629 |
3630 // Re-push self-frame | |
3631 __ enter(); // Save old & set new ebp | |
3632 | |
3633 // Allocate a full sized register save area. | |
3634 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3635 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3636 |
3637 // Restore frame locals after moving the frame | |
3638 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3639 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3640 |
3641 // Call C code. Need thread but NOT official VM entry | |
3642 // crud. We cannot block on this call, no GC can happen. Call should | |
3643 // restore return values to their stack-slots with the new SP. | |
3644 // | |
3645 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3646 | |
3647 // Use rbp because the frames look interpreted now | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3648 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3649 // Don't need the precise return PC here, just precise enough to point into this code blob. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3650 address the_pc = __ pc(); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3651 __ set_last_Java_frame(noreg, rbp, the_pc); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3652 |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3653 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3654 __ mov(c_rarg0, r15_thread); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3655 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3656 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3657 // Revert SP alignment after call since we're going to do some SP relative addressing below |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3658 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3659 |
3660 // Set an oopmap for the call site | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3661 // Use the same PC we used for the last java frame |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3662 oop_maps->add_gc_map(the_pc - start, |
0 | 3663 new OopMap( frame_size_in_words, 0 )); |
3664 | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3665 // Clear fp AND pc |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3666 __ reset_last_Java_frame(true, true); |
0 | 3667 |
3668 // Collect return values | |
3669 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3670 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3671 // I think this is useless (throwing pc?) | |
3672 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3673 |
3674 // Pop self-frame. | |
3675 __ leave(); // Epilog | |
3676 | |
3677 // Jump to interpreter | |
3678 __ ret(0); | |
3679 | |
3680 // Make sure all code is generated | |
3681 masm->flush(); | |
3682 | |
304 | 3683 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3684 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
22298 | 3685 #if INCLUDE_JVMCI |
19462
33a783b15758
made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents:
18041
diff
changeset
|
3686 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3687 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3688 #endif |
0 | 3689 } |
3690 | |
3691 #ifdef COMPILER2 | |
3692 //------------------------------generate_uncommon_trap_blob-------------------- | |
3693 void SharedRuntime::generate_uncommon_trap_blob() { | |
3694 // Allocate space for the code | |
3695 ResourceMark rm; | |
3696 // Setup code generation tools | |
3697 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3698 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3699 | |
3700 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3701 | |
3702 address start = __ pc(); | |
3703 | |
17780 | 3704 if (UseRTMLocking) { |
3705 // Abort RTM transaction before possible nmethod deoptimization. | |
3706 __ xabort(0); | |
3707 } | |
3708 | |
0 | 3709 // Push self-frame. We get here with a return address on the |
3710 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3711 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3712 |
3713 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3714 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3715 |
3716 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3717 // runtime expects it. | |
3718 __ movl(c_rarg1, j_rarg0); | |
3719 | |
3720 __ set_last_Java_frame(noreg, noreg, NULL); | |
3721 | |
3722 // Call C code. Need thread but NOT official VM entry | |
3723 // crud. We cannot block on this call, no GC can happen. Call should | |
3724 // capture callee-saved registers as well as return values. | |
3725 // Thread is in rdi already. | |
3726 // | |
3727 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3728 | |
304 | 3729 __ mov(c_rarg0, r15_thread); |
0 | 3730 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3731 | |
3732 // Set an oopmap for the call site | |
3733 OopMapSet* oop_maps = new OopMapSet(); | |
3734 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3735 | |
3736 // location of rbp is known implicitly by the frame sender code | |
3737 | |
3738 oop_maps->add_gc_map(__ pc() - start, map); | |
3739 | |
3740 __ reset_last_Java_frame(false, false); | |
3741 | |
3742 // Load UnrollBlock* into rdi | |
304 | 3743 __ mov(rdi, rax); |
0 | 3744 |
3745 // Pop all the frames we must move/replace. | |
3746 // | |
3747 // Frame picture (youngest to oldest) | |
3748 // 1: self-frame (no frame link) | |
3749 // 2: deopting frame (no frame link) | |
3750 // 3: caller of deopting frame (could be compiled/interpreted). | |
3751 | |
3752 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3753 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3754 |
3755 // Pop deoptimized frame (int) | |
3756 __ movl(rcx, Address(rdi, | |
3757 Deoptimization::UnrollBlock:: | |
3758 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3759 __ addptr(rsp, rcx); |
0 | 3760 |
3761 // rsp should be pointing at the return address to the caller (3) | |
3762 | |
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3763 // Pick up the initial fp we should save |
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3764 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3765 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3766 |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3767 #ifdef ASSERT |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3768 // Compilers generate code that bang the stack by as much as the |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3769 // interpreter would need. So this stack banging should never |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3770 // trigger a fault. Verify that it does not on non product builds. |
0 | 3771 if (UseStackBanging) { |
3772 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3773 __ bang_stack_size(rbx, rcx); | |
3774 } | |
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3775 #endif |
0 | 3776 |
3777 // Load address of array of frame pcs into rcx (address*) | |
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3778 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3779 |
3780 // Trash the return pc | |
304 | 3781 __ addptr(rsp, wordSize); |
0 | 3782 |
3783 // Load address of array of frame sizes into rsi (intptr_t*) | |
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3784 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes())); |
0 | 3785 |
3786 // Counter | |
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3787 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int) |
0 | 3788 |
3789 // Now adjust the caller's stack to make up for the extra locals but | |
3790 // record the original sp so that we can save it in the skeletal | |
3791 // interpreter frame and the stack walking of interpreter_sender | |
3792 // will get the unextended sp value and not the "real" sp value. | |
3793 | |
3794 const Register sender_sp = r8; | |
3795 | |
304 | 3796 __ mov(sender_sp, rsp); |
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3797 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int) |
304 | 3798 __ subptr(rsp, rbx); |
0 | 3799 |
3800 // Push interpreter frames in a loop | |
3801 Label loop; | |
3802 __ bind(loop); | |
304 | 3803 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3804 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3805 __ pushptr(Address(rcx, 0)); // Save return address | |
3806 __ enter(); // Save old & set new rbp | |
3807 __ subptr(rsp, rbx); // Prolog | |
520
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3808 #ifdef CC_INTERP |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3809 __ movptr(Address(rbp, |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3810 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3811 sender_sp); // Make it walkable |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3812 #else // CC_INTERP |
304 | 3813 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3814 sender_sp); // Make it walkable | |
0 | 3815 // This value is corrected by layout_activation_impl |
304 | 3816 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
520
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3817 #endif // CC_INTERP |
304 | 3818 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3819 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3820 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3821 __ decrementl(rdx); // Decrement counter | |
0 | 3822 __ jcc(Assembler::notZero, loop); |
304 | 3823 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3824 |
3825 // Re-push self-frame | |
3826 __ enter(); // Save old & set new rbp | |
304 | 3827 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3828 // Prolog |
3829 | |
3830 // Use rbp because the frames look interpreted now | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3831 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3832 // Don't need the precise return PC here, just precise enough to point into this code blob. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3833 address the_pc = __ pc(); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3834 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3835 |
3836 // Call C code. Need thread but NOT official VM entry | |
3837 // crud. We cannot block on this call, no GC can happen. Call should | |
3838 // restore return values to their stack-slots with the new SP. | |
3839 // Thread is in rdi already. | |
3840 // | |
3841 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3842 | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3843 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3844 __ mov(c_rarg0, r15_thread); |
0 | 3845 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3846 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3847 | |
3848 // Set an oopmap for the call site | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3849 // Use the same PC we used for the last java frame |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3850 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3851 |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3852 // Clear fp AND pc |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3853 __ reset_last_Java_frame(true, true); |
0 | 3854 |
3855 // Pop self-frame. | |
3856 __ leave(); // Epilog | |
3857 | |
3858 // Jump to interpreter | |
3859 __ ret(0); | |
3860 | |
3861 // Make sure all code is generated | |
3862 masm->flush(); | |
3863 | |
3864 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3865 SimpleRuntimeFrame::framesize >> 1); | |
3866 } | |
3867 #endif // COMPILER2 | |
3868 | |
3869 | |
3870 //------------------------------generate_handler_blob------ | |
3871 // | |
3872 // Generate a special Compile2Runtime blob that saves all registers, | |
3873 // and setup oopmap. | |
3874 // | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3875 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
0 | 3876 assert(StubRoutines::forward_exception_entry() != NULL, |
3877 "must be generated before"); | |
3878 | |
3879 ResourceMark rm; | |
3880 OopMapSet *oop_maps = new OopMapSet(); | |
3881 OopMap* map; | |
3882 | |
3883 // Allocate space for the code. Setup code generation tools. | |
3884 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3885 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3886 | |
3887 address start = __ pc(); | |
3888 address call_pc = NULL; | |
3889 int frame_size_in_words; | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3890 bool cause_return = (poll_type == POLL_AT_RETURN); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3891 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
0 | 3892 |
17780 | 3893 if (UseRTMLocking) { |
3894 // Abort RTM transaction before calling runtime | |
3895 // because critical section will be large and will be | |
3896 // aborted anyway. Also nmethod could be deoptimized. | |
3897 __ xabort(0); | |
3898 } | |
3899 | |
0 | 3900 // Make room for return address (or push it again) |
3901 if (!cause_return) { | |
304 | 3902 __ push(rbx); |
0 | 3903 } |
3904 | |
3905 // Save registers, fpu state, and flags | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3906 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
0 | 3907 |
3908 // The following is basically a call_VM. However, we need the precise | |
3909 // address of the call in order to generate an oopmap. Hence, we do all the | |
3910 // work outselves. | |
3911 | |
3912 __ set_last_Java_frame(noreg, noreg, NULL); | |
3913 | |
3914 // The return address must always be correct so that frame constructor never | |
3915 // sees an invalid pc. | |
3916 | |
3917 if (!cause_return) { | |
3918 // overwrite the dummy value we pushed on entry | |
304 | 3919 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3920 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3921 } |
3922 | |
3923 // Do the call | |
304 | 3924 __ mov(c_rarg0, r15_thread); |
0 | 3925 __ call(RuntimeAddress(call_ptr)); |
3926 | |
3927 // Set an oopmap for the call site. This oopmap will map all | |
3928 // oop-registers and debug-info registers as callee-saved. This | |
3929 // will allow deoptimization at this safepoint to find all possible | |
3930 // debug-info recordings, as well as let GC find all oops. | |
3931 | |
3932 oop_maps->add_gc_map( __ pc() - start, map); | |
3933 | |
3934 Label noException; | |
3935 | |
3936 __ reset_last_Java_frame(false, false); | |
3937 | |
304 | 3938 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3939 __ jcc(Assembler::equal, noException); |
3940 | |
3941 // Exception pending | |
3942 | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3943 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3944 |
3945 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3946 | |
3947 // No exception case | |
3948 __ bind(noException); | |
3949 | |
3950 // Normal exit, restore registers and exit. | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3951 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3952 |
3953 __ ret(0); | |
3954 | |
3955 // Make sure all code is generated | |
3956 masm->flush(); | |
3957 | |
3958 // Fill-out other meta info | |
3959 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3960 } | |
3961 | |
3962 // | |
3963 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3964 // | |
3965 // Generate a stub that calls into vm to find out the proper destination | |
3966 // of a java call. All the argument registers are live at this point | |
3967 // but since this is generic code we don't know what they are and the caller | |
3968 // must do any gc of the args. | |
3969 // | |
3442
f7d55ea6ee56
7045514: SPARC assembly code for JSR 292 ricochet frames
never
parents:
3363
diff
changeset
|
3970 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3971 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3972 | |
3973 // allocate space for the code | |
3974 ResourceMark rm; | |
3975 | |
3976 CodeBuffer buffer(name, 1000, 512); | |
3977 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3978 | |
3979 int frame_size_in_words; | |
3980 | |
3981 OopMapSet *oop_maps = new OopMapSet(); | |
3982 OopMap* map = NULL; | |
3983 | |
3984 int start = __ offset(); | |
3985 | |
3986 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3987 | |
3988 int frame_complete = __ offset(); | |
3989 | |
3990 __ set_last_Java_frame(noreg, noreg, NULL); | |
3991 | |
304 | 3992 __ mov(c_rarg0, r15_thread); |
0 | 3993 |
3994 __ call(RuntimeAddress(destination)); | |
3995 | |
3996 | |
3997 // Set an oopmap for the call site. | |
3998 // We need this not only for callee-saved registers, but also for volatile | |
3999 // registers that the compiler might be keeping live across a safepoint. | |
4000 | |
4001 oop_maps->add_gc_map( __ offset() - start, map); | |
4002 | |
4003 // rax contains the address we are going to jump to assuming no exception got installed | |
4004 | |
4005 // clear last_Java_sp | |
4006 __ reset_last_Java_frame(false, false); | |
4007 // check for pending exceptions | |
4008 Label pending; | |
304 | 4009 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 4010 __ jcc(Assembler::notEqual, pending); |
4011 | |
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4012 // get the returned Method* |
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4013 __ get_vm_result_2(rbx, r15_thread); |
304 | 4014 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
4015 | |
4016 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 4017 |
4018 RegisterSaver::restore_live_registers(masm); | |
4019 | |
4020 // We are back the the original state on entry and ready to go. | |
4021 | |
4022 __ jmp(rax); | |
4023 | |
4024 // Pending exception after the safepoint | |
4025 | |
4026 __ bind(pending); | |
4027 | |
4028 RegisterSaver::restore_live_registers(masm); | |
4029 | |
4030 // exception pending => remove activation and forward to exception handler | |
4031 | |
4032 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
4033 | |
304 | 4034 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 4035 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
4036 | |
4037 // ------------- | |
4038 // make sure all code is generated | |
4039 masm->flush(); | |
4040 | |
4041 // return the blob | |
4042 // frame_size_words or bytes?? | |
4043 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
4044 } | |
4045 | |
4046 | |
4047 #ifdef COMPILER2 | |
4048 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
4049 // | |
4050 //------------------------------generate_exception_blob--------------------------- | |
4051 // creates exception blob at the end | |
4052 // Using exception blob, this code is jumped from a compiled method. | |
4053 // (see emit_exception_handler in x86_64.ad file) | |
4054 // | |
4055 // Given an exception pc at a call we call into the runtime for the | |
4056 // handler in this method. This handler might merely restore state | |
4057 // (i.e. callee save registers) unwind the frame and jump to the | |
4058 // exception handler for the nmethod if there is no Java level handler | |
4059 // for the nmethod. | |
4060 // | |
4061 // This code is entered with a jmp. | |
4062 // | |
4063 // Arguments: | |
4064 // rax: exception oop | |
4065 // rdx: exception pc | |
4066 // | |
4067 // Results: | |
4068 // rax: exception oop | |
4069 // rdx: exception pc in caller or ??? | |
4070 // destination: exception handler of caller | |
4071 // | |
4072 // Note: the exception pc MUST be at a call (precise debug information) | |
4073 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
4074 // | |
4075 | |
4076 void OptoRuntime::generate_exception_blob() { | |
4077 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
4078 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
4079 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
4080 | |
4081 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
4082 | |
4083 // Allocate space for the code | |
4084 ResourceMark rm; | |
4085 // Setup code generation tools | |
4086 CodeBuffer buffer("exception_blob", 2048, 1024); | |
4087 MacroAssembler* masm = new MacroAssembler(&buffer); | |
4088 | |
4089 | |
4090 address start = __ pc(); | |
4091 | |
4092 // Exception pc is 'return address' for stack walker | |
304 | 4093 __ push(rdx); |
4094 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 4095 |
4096 // Save callee-saved registers. See x86_64.ad. | |
4097 | |
4098 // rbp is an implicitly saved callee saved register (i.e. the calling | |
4099 // convention will save restore it in prolog/epilog) Other than that | |
4100 // there are no callee save registers now that adapter frames are gone. | |
4101 | |
304 | 4102 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 4103 |
4104 // Store exception in Thread object. We cannot pass any arguments to the | |
4105 // handle_exception call, since we do not want to make any assumption | |
4106 // about the size of the frame where the exception happened in. | |
4107 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 4108 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
4109 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 4110 |
4111 // This call does all the hard work. It checks if an exception handler | |
4112 // exists in the method. | |
4113 // If so, it returns the handler address. | |
4114 // If not, it prepares for stack-unwinding, restoring the callee-save | |
4115 // registers of the frame being removed. | |
4116 // | |
4117 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
4118 | |
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4119 // At a method handle call, the stack may not be properly aligned |
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4120 // when returning with an exception. |
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4121 address the_pc = __ pc(); |
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4122 __ set_last_Java_frame(noreg, noreg, the_pc); |
304 | 4123 __ mov(c_rarg0, r15_thread); |
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4124 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
0 | 4125 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
4126 | |
4127 // Set an oopmap for the call site. This oopmap will only be used if we | |
4128 // are unwinding the stack. Hence, all locations will be dead. | |
4129 // Callee-saved registers will be the same as the frame above (i.e., | |
4130 // handle_exception_stub), since they were restored when we got the | |
4131 // exception. | |
4132 | |
4133 OopMapSet* oop_maps = new OopMapSet(); | |
4134 | |
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4135 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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4136 |
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4137 __ reset_last_Java_frame(false, true); |
0 | 4138 |
4139 // Restore callee-saved registers | |
4140 | |
4141 // rbp is an implicitly saved callee saved register (i.e. the calling | |
4142 // convention will save restore it in prolog/epilog) Other than that | |
4143 // there are no callee save registers no that adapter frames are gone. | |
4144 | |
304 | 4145 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
4146 | |
4147 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
4148 __ pop(rdx); // No need for exception pc anymore | |
0 | 4149 |
4150 // rax: exception handler | |
4151 | |
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4152 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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4153 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 4154 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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4155 |
0 | 4156 // We have a handler in rax (could be deopt blob). |
304 | 4157 __ mov(r8, rax); |
0 | 4158 |
4159 // Get the exception oop | |
304 | 4160 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 4161 // Get the exception pc in case we are deoptimized |
304 | 4162 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 4163 #ifdef ASSERT |
4164 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
4165 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
4166 #endif | |
4167 // Clear the exception oop so GC no longer processes it as a root. | |
4168 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
4169 | |
4170 // rax: exception oop | |
4171 // r8: exception handler | |
4172 // rdx: exception pc | |
4173 // Jump to handler | |
4174 | |
4175 __ jmp(r8); | |
4176 | |
4177 // Make sure all code is generated | |
4178 masm->flush(); | |
4179 | |
4180 // Set exception blob | |
4181 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
4182 } | |
4183 #endif // COMPILER2 |