Mercurial > hg > truffle
annotate src/cpu/x86/vm/x86.ad @ 9378:0e661acc3b4a
Fix null pointer exception in if reordering.
author | Thomas Wuerthinger <thomas.wuerthinger@oracle.com> |
---|---|
date | Sun, 28 Apr 2013 01:01:00 +0200 |
parents | b2c669fd8114 |
children | 00f5eff62d18 |
rev | line source |
---|---|
4761 | 1 // |
4950 | 2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. |
4761 | 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 // | |
5 // This code is free software; you can redistribute it and/or modify it | |
6 // under the terms of the GNU General Public License version 2 only, as | |
7 // published by the Free Software Foundation. | |
8 // | |
9 // This code is distributed in the hope that it will be useful, but WITHOUT | |
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 // version 2 for more details (a copy is included in the LICENSE file that | |
13 // accompanied this code). | |
14 // | |
15 // You should have received a copy of the GNU General Public License version | |
16 // 2 along with this work; if not, write to the Free Software Foundation, | |
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 // | |
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | |
20 // or visit www.oracle.com if you need additional information or have any | |
21 // questions. | |
22 // | |
23 // | |
24 | |
25 // X86 Common Architecture Description File | |
26 | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
27 //----------REGISTER DEFINITION BLOCK------------------------------------------ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
28 // This information is used by the matcher and the register allocator to |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
29 // describe individual registers and classes of registers within the target |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
30 // archtecture. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
31 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
32 register %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
33 //----------Architecture Description Register Definitions---------------------- |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
34 // General Registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
35 // "reg_def" name ( register save type, C convention save type, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
36 // ideal register type, encoding ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
37 // Register Save Types: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
38 // |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
39 // NS = No-Save: The register allocator assumes that these registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
40 // can be used without saving upon entry to the method, & |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
41 // that they do not need to be saved at call sites. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
42 // |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
43 // SOC = Save-On-Call: The register allocator assumes that these registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
44 // can be used without saving upon entry to the method, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
45 // but that they must be saved at call sites. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
46 // |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
47 // SOE = Save-On-Entry: The register allocator assumes that these registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
48 // must be saved before using them upon entry to the |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
49 // method, but they do not need to be saved at call |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
50 // sites. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
51 // |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
52 // AS = Always-Save: The register allocator assumes that these registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
53 // must be saved before using them upon entry to the |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
54 // method, & that they must be saved at call sites. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
55 // |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
56 // Ideal Register Type is used to determine how to save & restore a |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
57 // register. Op_RegI will get spilled with LoadI/StoreI, Op_RegP will get |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
58 // spilled with LoadP/StoreP. If the register supports both, use Op_RegI. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
59 // |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
60 // The encoding number is the actual bit-pattern placed into the opcodes. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
61 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
62 // XMM registers. 256-bit registers or 8 words each, labeled (a)-h. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
63 // Word a in each register holds a Float, words ab hold a Double. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
64 // The whole registers are used in SSE4.2 version intrinsics, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
65 // array copy stubs and superword operations (see UseSSE42Intrinsics, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
66 // UseXMMForArrayCopy and UseSuperword flags). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
67 // XMM8-XMM15 must be encoded with REX (VEX for UseAVX). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
68 // Linux ABI: No register preserved across function calls |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
69 // XMM0-XMM7 might hold parameters |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
70 // Windows ABI: XMM6-XMM15 preserved across function calls |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
71 // XMM0-XMM3 might hold parameters |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
72 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
73 reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()); |
6225 | 74 reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1)); |
75 reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2)); | |
76 reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3)); | |
77 reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4)); | |
78 reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5)); | |
79 reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6)); | |
80 reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
81 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
82 reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()); |
6225 | 83 reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1)); |
84 reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2)); | |
85 reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3)); | |
86 reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4)); | |
87 reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5)); | |
88 reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6)); | |
89 reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
90 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
91 reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()); |
6225 | 92 reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1)); |
93 reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2)); | |
94 reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3)); | |
95 reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4)); | |
96 reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5)); | |
97 reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6)); | |
98 reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
99 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
100 reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()); |
6225 | 101 reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1)); |
102 reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2)); | |
103 reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3)); | |
104 reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4)); | |
105 reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5)); | |
106 reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6)); | |
107 reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
108 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
109 reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()); |
6225 | 110 reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1)); |
111 reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2)); | |
112 reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3)); | |
113 reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4)); | |
114 reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5)); | |
115 reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6)); | |
116 reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
117 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
118 reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()); |
6225 | 119 reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1)); |
120 reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2)); | |
121 reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3)); | |
122 reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4)); | |
123 reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5)); | |
124 reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6)); | |
125 reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
126 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
127 #ifdef _WIN64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
128 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
129 reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()); |
6225 | 130 reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1)); |
131 reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2)); | |
132 reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3)); | |
133 reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4)); | |
134 reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5)); | |
135 reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6)); | |
136 reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
137 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
138 reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()); |
6225 | 139 reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1)); |
140 reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2)); | |
141 reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3)); | |
142 reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4)); | |
143 reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5)); | |
144 reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6)); | |
145 reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
146 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
147 reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()); |
6225 | 148 reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1)); |
149 reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2)); | |
150 reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3)); | |
151 reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4)); | |
152 reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5)); | |
153 reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6)); | |
154 reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
155 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
156 reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()); |
6225 | 157 reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1)); |
158 reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2)); | |
159 reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3)); | |
160 reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4)); | |
161 reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5)); | |
162 reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6)); | |
163 reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
164 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
165 reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()); |
6225 | 166 reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1)); |
167 reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2)); | |
168 reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3)); | |
169 reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4)); | |
170 reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5)); | |
171 reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6)); | |
172 reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
173 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
174 reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()); |
6225 | 175 reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1)); |
176 reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2)); | |
177 reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3)); | |
178 reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4)); | |
179 reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5)); | |
180 reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6)); | |
181 reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
182 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
183 reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()); |
6225 | 184 reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1)); |
185 reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2)); | |
186 reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3)); | |
187 reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4)); | |
188 reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5)); | |
189 reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6)); | |
190 reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
191 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
192 reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()); |
6225 | 193 reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1)); |
194 reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2)); | |
195 reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3)); | |
196 reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4)); | |
197 reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5)); | |
198 reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6)); | |
199 reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
200 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
201 reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()); |
6225 | 202 reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1)); |
203 reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2)); | |
204 reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3)); | |
205 reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4)); | |
206 reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5)); | |
207 reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6)); | |
208 reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
209 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
210 reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()); |
6225 | 211 reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1)); |
212 reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2)); | |
213 reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3)); | |
214 reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4)); | |
215 reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5)); | |
216 reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6)); | |
217 reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
218 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
219 #else // _WIN64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
220 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
221 reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()); |
6225 | 222 reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1)); |
223 reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2)); | |
224 reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3)); | |
225 reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4)); | |
226 reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5)); | |
227 reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6)); | |
228 reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
229 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
230 reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()); |
6225 | 231 reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1)); |
232 reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2)); | |
233 reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3)); | |
234 reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4)); | |
235 reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5)); | |
236 reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6)); | |
237 reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
238 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
239 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
240 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
241 reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()); |
6225 | 242 reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1)); |
243 reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2)); | |
244 reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3)); | |
245 reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4)); | |
246 reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5)); | |
247 reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6)); | |
248 reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
249 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
250 reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()); |
6225 | 251 reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1)); |
252 reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2)); | |
253 reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3)); | |
254 reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4)); | |
255 reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5)); | |
256 reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6)); | |
257 reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
258 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
259 reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()); |
6225 | 260 reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1)); |
261 reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2)); | |
262 reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3)); | |
263 reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4)); | |
264 reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5)); | |
265 reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6)); | |
266 reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
267 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
268 reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()); |
6225 | 269 reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1)); |
270 reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2)); | |
271 reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3)); | |
272 reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4)); | |
273 reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5)); | |
274 reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6)); | |
275 reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
276 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
277 reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()); |
6225 | 278 reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1)); |
279 reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2)); | |
280 reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3)); | |
281 reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4)); | |
282 reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5)); | |
283 reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6)); | |
284 reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
285 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
286 reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()); |
6225 | 287 reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1)); |
288 reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2)); | |
289 reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3)); | |
290 reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4)); | |
291 reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5)); | |
292 reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6)); | |
293 reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
294 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
295 reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()); |
6225 | 296 reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1)); |
297 reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2)); | |
298 reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3)); | |
299 reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4)); | |
300 reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5)); | |
301 reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6)); | |
302 reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
303 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
304 reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()); |
6225 | 305 reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1)); |
306 reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2)); | |
307 reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3)); | |
308 reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4)); | |
309 reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5)); | |
310 reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6)); | |
311 reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
312 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
313 #endif // _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
314 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
315 #endif // _WIN64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
316 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
317 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
318 reg_def RFLAGS(SOC, SOC, 0, 16, VMRegImpl::Bad()); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
319 #else |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
320 reg_def RFLAGS(SOC, SOC, 0, 8, VMRegImpl::Bad()); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
321 #endif // _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
322 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
323 alloc_class chunk1(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
324 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
325 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
326 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
327 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
328 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
329 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
330 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
331 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
332 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
333 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
334 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
335 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
336 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
337 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
338 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
339 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
340 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
341 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
342 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
343 // flags allocation class should be last. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
344 alloc_class chunk2(RFLAGS); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
345 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
346 // Singleton class for condition codes |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
347 reg_class int_flags(RFLAGS); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
348 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
349 // Class for all float registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
350 reg_class float_reg(XMM0, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
351 XMM1, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
352 XMM2, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
353 XMM3, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
354 XMM4, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
355 XMM5, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
356 XMM6, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
357 XMM7 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
358 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
359 ,XMM8, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
360 XMM9, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
361 XMM10, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
362 XMM11, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
363 XMM12, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
364 XMM13, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
365 XMM14, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
366 XMM15 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
367 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
368 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
369 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
370 // Class for all double registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
371 reg_class double_reg(XMM0, XMM0b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
372 XMM1, XMM1b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
373 XMM2, XMM2b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
374 XMM3, XMM3b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
375 XMM4, XMM4b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
376 XMM5, XMM5b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
377 XMM6, XMM6b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
378 XMM7, XMM7b |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
379 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
380 ,XMM8, XMM8b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
381 XMM9, XMM9b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
382 XMM10, XMM10b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
383 XMM11, XMM11b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
384 XMM12, XMM12b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
385 XMM13, XMM13b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
386 XMM14, XMM14b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
387 XMM15, XMM15b |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
388 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
389 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
390 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
391 // Class for all 32bit vector registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
392 reg_class vectors_reg(XMM0, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
393 XMM1, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
394 XMM2, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
395 XMM3, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
396 XMM4, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
397 XMM5, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
398 XMM6, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
399 XMM7 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
400 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
401 ,XMM8, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
402 XMM9, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
403 XMM10, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
404 XMM11, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
405 XMM12, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
406 XMM13, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
407 XMM14, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
408 XMM15 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
409 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
410 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
411 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
412 // Class for all 64bit vector registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
413 reg_class vectord_reg(XMM0, XMM0b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
414 XMM1, XMM1b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
415 XMM2, XMM2b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
416 XMM3, XMM3b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
417 XMM4, XMM4b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
418 XMM5, XMM5b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
419 XMM6, XMM6b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
420 XMM7, XMM7b |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
421 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
422 ,XMM8, XMM8b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
423 XMM9, XMM9b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
424 XMM10, XMM10b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
425 XMM11, XMM11b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
426 XMM12, XMM12b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
427 XMM13, XMM13b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
428 XMM14, XMM14b, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
429 XMM15, XMM15b |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
430 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
431 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
432 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
433 // Class for all 128bit vector registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
434 reg_class vectorx_reg(XMM0, XMM0b, XMM0c, XMM0d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
435 XMM1, XMM1b, XMM1c, XMM1d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
436 XMM2, XMM2b, XMM2c, XMM2d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
437 XMM3, XMM3b, XMM3c, XMM3d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
438 XMM4, XMM4b, XMM4c, XMM4d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
439 XMM5, XMM5b, XMM5c, XMM5d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
440 XMM6, XMM6b, XMM6c, XMM6d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
441 XMM7, XMM7b, XMM7c, XMM7d |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
442 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
443 ,XMM8, XMM8b, XMM8c, XMM8d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
444 XMM9, XMM9b, XMM9c, XMM9d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
445 XMM10, XMM10b, XMM10c, XMM10d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
446 XMM11, XMM11b, XMM11c, XMM11d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
447 XMM12, XMM12b, XMM12c, XMM12d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
448 XMM13, XMM13b, XMM13c, XMM13d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
449 XMM14, XMM14b, XMM14c, XMM14d, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
450 XMM15, XMM15b, XMM15c, XMM15d |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
451 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
452 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
453 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
454 // Class for all 256bit vector registers |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
455 reg_class vectory_reg(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
456 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
457 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
458 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
459 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
460 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
461 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
462 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
463 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
464 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
465 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
466 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
467 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
468 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
469 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
470 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
471 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
472 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
473 ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
474 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
475 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
476 |
4761 | 477 source %{ |
478 // Float masks come from different places depending on platform. | |
479 #ifdef _LP64 | |
480 static address float_signmask() { return StubRoutines::x86::float_sign_mask(); } | |
481 static address float_signflip() { return StubRoutines::x86::float_sign_flip(); } | |
482 static address double_signmask() { return StubRoutines::x86::double_sign_mask(); } | |
483 static address double_signflip() { return StubRoutines::x86::double_sign_flip(); } | |
484 #else | |
485 static address float_signmask() { return (address)float_signmask_pool; } | |
486 static address float_signflip() { return (address)float_signflip_pool; } | |
487 static address double_signmask() { return (address)double_signmask_pool; } | |
488 static address double_signflip() { return (address)double_signflip_pool; } | |
489 #endif | |
4950 | 490 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
491 |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
492 const bool Matcher::match_rule_supported(int opcode) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
493 if (!has_match_rule(opcode)) |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
494 return false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
495 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
496 switch (opcode) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
497 case Op_PopCountI: |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
498 case Op_PopCountL: |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
499 if (!UsePopCountInstruction) |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
500 return false; |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
501 break; |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
502 case Op_MulVI: |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
503 if ((UseSSE < 4) && (UseAVX < 1)) // only with SSE4_1 or AVX |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
504 return false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
505 break; |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6792
diff
changeset
|
506 case Op_CompareAndSwapL: |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6792
diff
changeset
|
507 #ifdef _LP64 |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6792
diff
changeset
|
508 case Op_CompareAndSwapP: |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6792
diff
changeset
|
509 #endif |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6792
diff
changeset
|
510 if (!VM_Version::supports_cx8()) |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6792
diff
changeset
|
511 return false; |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6792
diff
changeset
|
512 break; |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
513 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
514 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
515 return true; // Per default match rules are supported. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
516 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
517 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
518 // Max vector size in bytes. 0 if not supported. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
519 const int Matcher::vector_width_in_bytes(BasicType bt) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
520 assert(is_java_primitive(bt), "only primitive type vectors"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
521 if (UseSSE < 2) return 0; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
522 // SSE2 supports 128bit vectors for all types. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
523 // AVX2 supports 256bit vectors for all types. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
524 int size = (UseAVX > 1) ? 32 : 16; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
525 // AVX1 supports 256bit vectors only for FLOAT and DOUBLE. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
526 if (UseAVX > 0 && (bt == T_FLOAT || bt == T_DOUBLE)) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
527 size = 32; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
528 // Use flag to limit vector size. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
529 size = MIN2(size,(int)MaxVectorSize); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
530 // Minimum 2 values in vector (or 4 for bytes). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
531 switch (bt) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
532 case T_DOUBLE: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
533 case T_LONG: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
534 if (size < 16) return 0; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
535 case T_FLOAT: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
536 case T_INT: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
537 if (size < 8) return 0; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
538 case T_BOOLEAN: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
539 case T_BYTE: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
540 case T_CHAR: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
541 case T_SHORT: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
542 if (size < 4) return 0; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
543 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
544 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
545 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
546 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
547 return size; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
548 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
549 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
550 // Limits on vector size (number of elements) loaded into vector. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
551 const int Matcher::max_vector_size(const BasicType bt) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
552 return vector_width_in_bytes(bt)/type2aelembytes(bt); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
553 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
554 const int Matcher::min_vector_size(const BasicType bt) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
555 int max_size = max_vector_size(bt); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
556 // Min size which can be loaded into vector is 4 bytes. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
557 int size = (type2aelembytes(bt) == 1) ? 4 : 2; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
558 return MIN2(size,max_size); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
559 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
560 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
561 // Vector ideal reg corresponding to specidied size in bytes |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
562 const int Matcher::vector_ideal_reg(int size) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
563 assert(MaxVectorSize >= size, ""); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
564 switch(size) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
565 case 4: return Op_VecS; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
566 case 8: return Op_VecD; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
567 case 16: return Op_VecX; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
568 case 32: return Op_VecY; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
569 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
570 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
571 return 0; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
572 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
573 |
6823 | 574 // Only lowest bits of xmm reg are used for vector shift count. |
575 const int Matcher::vector_shift_count_ideal_reg(int size) { | |
576 return Op_VecS; | |
577 } | |
578 | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
579 // x86 supports misaligned vectors store/load. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
580 const bool Matcher::misaligned_vectors_ok() { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
581 return !AlignVector; // can be changed by flag |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
582 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
583 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
584 // Helper methods for MachSpillCopyNode::implementation(). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
585 static int vec_mov_helper(CodeBuffer *cbuf, bool do_size, int src_lo, int dst_lo, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
586 int src_hi, int dst_hi, uint ireg, outputStream* st) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
587 // In 64-bit VM size calculation is very complex. Emitting instructions |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
588 // into scratch buffer is used to get size in 64-bit VM. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
589 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); ) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
590 assert(ireg == Op_VecS || // 32bit vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
591 (src_lo & 1) == 0 && (src_lo + 1) == src_hi && |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
592 (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
593 "no non-adjacent vector moves" ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
594 if (cbuf) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
595 MacroAssembler _masm(cbuf); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
596 int offset = __ offset(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
597 switch (ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
598 case Op_VecS: // copy whole register |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
599 case Op_VecD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
600 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
601 __ movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo])); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
602 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
603 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
604 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo])); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
605 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
606 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
607 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
608 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
609 int size = __ offset() - offset; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
610 #ifdef ASSERT |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
611 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
612 assert(!do_size || size == 4, "incorrect size calculattion"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
613 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
614 return size; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
615 #ifndef PRODUCT |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
616 } else if (!do_size) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
617 switch (ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
618 case Op_VecS: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
619 case Op_VecD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
620 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
621 st->print("movdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
622 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
623 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
624 st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
625 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
626 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
627 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
628 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
629 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
630 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
631 // VEX_2bytes prefix is used if UseAVX > 0, and it takes the same 2 bytes as SIMD prefix. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
632 return 4; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
633 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
634 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
635 static int vec_spill_helper(CodeBuffer *cbuf, bool do_size, bool is_load, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
636 int stack_offset, int reg, uint ireg, outputStream* st) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
637 // In 64-bit VM size calculation is very complex. Emitting instructions |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
638 // into scratch buffer is used to get size in 64-bit VM. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
639 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); ) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
640 if (cbuf) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
641 MacroAssembler _masm(cbuf); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
642 int offset = __ offset(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
643 if (is_load) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
644 switch (ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
645 case Op_VecS: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
646 __ movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
647 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
648 case Op_VecD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
649 __ movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
650 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
651 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
652 __ movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
653 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
654 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
655 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
656 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
657 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
658 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
659 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
660 } else { // store |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
661 switch (ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
662 case Op_VecS: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
663 __ movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
664 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
665 case Op_VecD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
666 __ movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
667 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
668 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
669 __ movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
670 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
671 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
672 __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg])); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
673 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
674 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
675 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
676 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
677 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
678 int size = __ offset() - offset; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
679 #ifdef ASSERT |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
680 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
681 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
682 assert(!do_size || size == (5+offset_size), "incorrect size calculattion"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
683 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
684 return size; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
685 #ifndef PRODUCT |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
686 } else if (!do_size) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
687 if (is_load) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
688 switch (ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
689 case Op_VecS: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
690 st->print("movd %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
691 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
692 case Op_VecD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
693 st->print("movq %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
694 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
695 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
696 st->print("movdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
697 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
698 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
699 st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
700 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
701 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
702 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
703 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
704 } else { // store |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
705 switch (ireg) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
706 case Op_VecS: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
707 st->print("movd [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
708 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
709 case Op_VecD: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
710 st->print("movq [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
711 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
712 case Op_VecX: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
713 st->print("movdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
714 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
715 case Op_VecY: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
716 st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
717 break; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
718 default: |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
719 ShouldNotReachHere(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
720 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
721 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
722 #endif |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
723 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
724 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
725 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
726 return 5+offset_size; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
727 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
728 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
729 static inline jfloat replicate4_imm(int con, int width) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
730 // Load a constant of "width" (in bytes) and replicate it to fill 32bit. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
731 assert(width == 1 || width == 2, "only byte or short types here"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
732 int bit_width = width * 8; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
733 jint val = con; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
734 val &= (1 << bit_width) - 1; // mask off sign bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
735 while(bit_width < 32) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
736 val |= (val << bit_width); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
737 bit_width <<= 1; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
738 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
739 jfloat fval = *((jfloat*) &val); // coerce to float type |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
740 return fval; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
741 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
742 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
743 static inline jdouble replicate8_imm(int con, int width) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
744 // Load a constant of "width" (in bytes) and replicate it to fill 64bit. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
745 assert(width == 1 || width == 2 || width == 4, "only byte, short or int types here"); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
746 int bit_width = width * 8; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
747 jlong val = con; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
748 val &= (((jlong) 1) << bit_width) - 1; // mask off sign bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
749 while(bit_width < 64) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
750 val |= (val << bit_width); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
751 bit_width <<= 1; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
752 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
753 jdouble dval = *((jdouble*) &val); // coerce to double type |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
754 return dval; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
755 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
756 |
4950 | 757 #ifndef PRODUCT |
758 void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const { | |
759 st->print("nop \t# %d bytes pad for loops and calls", _count); | |
760 } | |
761 #endif | |
762 | |
763 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const { | |
764 MacroAssembler _masm(&cbuf); | |
765 __ nop(_count); | |
766 } | |
767 | |
768 uint MachNopNode::size(PhaseRegAlloc*) const { | |
769 return _count; | |
770 } | |
771 | |
772 #ifndef PRODUCT | |
773 void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const { | |
774 st->print("# breakpoint"); | |
775 } | |
776 #endif | |
777 | |
778 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const { | |
779 MacroAssembler _masm(&cbuf); | |
780 __ int3(); | |
781 } | |
782 | |
783 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const { | |
784 return MachNode::size(ra_); | |
785 } | |
786 | |
787 %} | |
788 | |
789 encode %{ | |
790 | |
791 enc_class preserve_SP %{ | |
792 debug_only(int off0 = cbuf.insts_size()); | |
793 MacroAssembler _masm(&cbuf); | |
794 // RBP is preserved across all calls, even compiled calls. | |
795 // Use it to preserve RSP in places where the callee might change the SP. | |
796 __ movptr(rbp_mh_SP_save, rsp); | |
797 debug_only(int off1 = cbuf.insts_size()); | |
798 assert(off1 - off0 == preserve_SP_size(), "correct size prediction"); | |
799 %} | |
800 | |
801 enc_class restore_SP %{ | |
802 MacroAssembler _masm(&cbuf); | |
803 __ movptr(rsp, rbp_mh_SP_save); | |
804 %} | |
805 | |
806 enc_class call_epilog %{ | |
807 if (VerifyStackAtCalls) { | |
808 // Check that stack depth is unchanged: find majik cookie on stack | |
809 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word)); | |
810 MacroAssembler _masm(&cbuf); | |
811 Label L; | |
812 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d); | |
813 __ jccb(Assembler::equal, L); | |
814 // Die if stack mismatch | |
815 __ int3(); | |
816 __ bind(L); | |
817 } | |
818 %} | |
819 | |
4761 | 820 %} |
821 | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
822 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
823 //----------OPERANDS----------------------------------------------------------- |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
824 // Operand definitions must precede instruction definitions for correct parsing |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
825 // in the ADLC because operands constitute user defined types which are used in |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
826 // instruction definitions. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
827 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
828 // Vectors |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
829 operand vecS() %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
830 constraint(ALLOC_IN_RC(vectors_reg)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
831 match(VecS); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
832 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
833 format %{ %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
834 interface(REG_INTER); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
835 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
836 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
837 operand vecD() %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
838 constraint(ALLOC_IN_RC(vectord_reg)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
839 match(VecD); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
840 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
841 format %{ %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
842 interface(REG_INTER); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
843 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
844 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
845 operand vecX() %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
846 constraint(ALLOC_IN_RC(vectorx_reg)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
847 match(VecX); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
848 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
849 format %{ %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
850 interface(REG_INTER); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
851 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
852 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
853 operand vecY() %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
854 constraint(ALLOC_IN_RC(vectory_reg)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
855 match(VecY); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
856 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
857 format %{ %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
858 interface(REG_INTER); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
859 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
860 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
861 |
4761 | 862 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit) |
863 | |
4950 | 864 // ============================================================================ |
865 | |
866 instruct ShouldNotReachHere() %{ | |
867 match(Halt); | |
868 format %{ "int3\t# ShouldNotReachHere" %} | |
869 ins_encode %{ | |
870 __ int3(); | |
871 %} | |
872 ins_pipe(pipe_slow); | |
873 %} | |
874 | |
875 // ============================================================================ | |
876 | |
4761 | 877 instruct addF_reg(regF dst, regF src) %{ |
878 predicate((UseSSE>=1) && (UseAVX == 0)); | |
879 match(Set dst (AddF dst src)); | |
880 | |
881 format %{ "addss $dst, $src" %} | |
882 ins_cost(150); | |
883 ins_encode %{ | |
884 __ addss($dst$$XMMRegister, $src$$XMMRegister); | |
885 %} | |
886 ins_pipe(pipe_slow); | |
887 %} | |
888 | |
889 instruct addF_mem(regF dst, memory src) %{ | |
890 predicate((UseSSE>=1) && (UseAVX == 0)); | |
891 match(Set dst (AddF dst (LoadF src))); | |
892 | |
893 format %{ "addss $dst, $src" %} | |
894 ins_cost(150); | |
895 ins_encode %{ | |
896 __ addss($dst$$XMMRegister, $src$$Address); | |
897 %} | |
898 ins_pipe(pipe_slow); | |
899 %} | |
900 | |
901 instruct addF_imm(regF dst, immF con) %{ | |
902 predicate((UseSSE>=1) && (UseAVX == 0)); | |
903 match(Set dst (AddF dst con)); | |
904 format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
905 ins_cost(150); | |
906 ins_encode %{ | |
907 __ addss($dst$$XMMRegister, $constantaddress($con)); | |
908 %} | |
909 ins_pipe(pipe_slow); | |
910 %} | |
911 | |
6225 | 912 instruct addF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 913 predicate(UseAVX > 0); |
914 match(Set dst (AddF src1 src2)); | |
915 | |
916 format %{ "vaddss $dst, $src1, $src2" %} | |
917 ins_cost(150); | |
918 ins_encode %{ | |
919 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
920 %} | |
921 ins_pipe(pipe_slow); | |
922 %} | |
923 | |
6225 | 924 instruct addF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 925 predicate(UseAVX > 0); |
926 match(Set dst (AddF src1 (LoadF src2))); | |
927 | |
928 format %{ "vaddss $dst, $src1, $src2" %} | |
929 ins_cost(150); | |
930 ins_encode %{ | |
931 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
932 %} | |
933 ins_pipe(pipe_slow); | |
934 %} | |
935 | |
6225 | 936 instruct addF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 937 predicate(UseAVX > 0); |
938 match(Set dst (AddF src con)); | |
939 | |
940 format %{ "vaddss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
941 ins_cost(150); | |
942 ins_encode %{ | |
943 __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
944 %} | |
945 ins_pipe(pipe_slow); | |
946 %} | |
947 | |
948 instruct addD_reg(regD dst, regD src) %{ | |
949 predicate((UseSSE>=2) && (UseAVX == 0)); | |
950 match(Set dst (AddD dst src)); | |
951 | |
952 format %{ "addsd $dst, $src" %} | |
953 ins_cost(150); | |
954 ins_encode %{ | |
955 __ addsd($dst$$XMMRegister, $src$$XMMRegister); | |
956 %} | |
957 ins_pipe(pipe_slow); | |
958 %} | |
959 | |
960 instruct addD_mem(regD dst, memory src) %{ | |
961 predicate((UseSSE>=2) && (UseAVX == 0)); | |
962 match(Set dst (AddD dst (LoadD src))); | |
963 | |
964 format %{ "addsd $dst, $src" %} | |
965 ins_cost(150); | |
966 ins_encode %{ | |
967 __ addsd($dst$$XMMRegister, $src$$Address); | |
968 %} | |
969 ins_pipe(pipe_slow); | |
970 %} | |
971 | |
972 instruct addD_imm(regD dst, immD con) %{ | |
973 predicate((UseSSE>=2) && (UseAVX == 0)); | |
974 match(Set dst (AddD dst con)); | |
975 format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
976 ins_cost(150); | |
977 ins_encode %{ | |
978 __ addsd($dst$$XMMRegister, $constantaddress($con)); | |
979 %} | |
980 ins_pipe(pipe_slow); | |
981 %} | |
982 | |
6225 | 983 instruct addD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 984 predicate(UseAVX > 0); |
985 match(Set dst (AddD src1 src2)); | |
986 | |
987 format %{ "vaddsd $dst, $src1, $src2" %} | |
988 ins_cost(150); | |
989 ins_encode %{ | |
990 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
991 %} | |
992 ins_pipe(pipe_slow); | |
993 %} | |
994 | |
6225 | 995 instruct addD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 996 predicate(UseAVX > 0); |
997 match(Set dst (AddD src1 (LoadD src2))); | |
998 | |
999 format %{ "vaddsd $dst, $src1, $src2" %} | |
1000 ins_cost(150); | |
1001 ins_encode %{ | |
1002 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1003 %} | |
1004 ins_pipe(pipe_slow); | |
1005 %} | |
1006 | |
6225 | 1007 instruct addD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1008 predicate(UseAVX > 0); |
1009 match(Set dst (AddD src con)); | |
1010 | |
1011 format %{ "vaddsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1012 ins_cost(150); | |
1013 ins_encode %{ | |
1014 __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1015 %} | |
1016 ins_pipe(pipe_slow); | |
1017 %} | |
1018 | |
1019 instruct subF_reg(regF dst, regF src) %{ | |
1020 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1021 match(Set dst (SubF dst src)); | |
1022 | |
1023 format %{ "subss $dst, $src" %} | |
1024 ins_cost(150); | |
1025 ins_encode %{ | |
1026 __ subss($dst$$XMMRegister, $src$$XMMRegister); | |
1027 %} | |
1028 ins_pipe(pipe_slow); | |
1029 %} | |
1030 | |
1031 instruct subF_mem(regF dst, memory src) %{ | |
1032 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1033 match(Set dst (SubF dst (LoadF src))); | |
1034 | |
1035 format %{ "subss $dst, $src" %} | |
1036 ins_cost(150); | |
1037 ins_encode %{ | |
1038 __ subss($dst$$XMMRegister, $src$$Address); | |
1039 %} | |
1040 ins_pipe(pipe_slow); | |
1041 %} | |
1042 | |
1043 instruct subF_imm(regF dst, immF con) %{ | |
1044 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1045 match(Set dst (SubF dst con)); | |
1046 format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1047 ins_cost(150); | |
1048 ins_encode %{ | |
1049 __ subss($dst$$XMMRegister, $constantaddress($con)); | |
1050 %} | |
1051 ins_pipe(pipe_slow); | |
1052 %} | |
1053 | |
6225 | 1054 instruct subF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 1055 predicate(UseAVX > 0); |
1056 match(Set dst (SubF src1 src2)); | |
1057 | |
1058 format %{ "vsubss $dst, $src1, $src2" %} | |
1059 ins_cost(150); | |
1060 ins_encode %{ | |
1061 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1062 %} | |
1063 ins_pipe(pipe_slow); | |
1064 %} | |
1065 | |
6225 | 1066 instruct subF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 1067 predicate(UseAVX > 0); |
1068 match(Set dst (SubF src1 (LoadF src2))); | |
1069 | |
1070 format %{ "vsubss $dst, $src1, $src2" %} | |
1071 ins_cost(150); | |
1072 ins_encode %{ | |
1073 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1074 %} | |
1075 ins_pipe(pipe_slow); | |
1076 %} | |
1077 | |
6225 | 1078 instruct subF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 1079 predicate(UseAVX > 0); |
1080 match(Set dst (SubF src con)); | |
1081 | |
1082 format %{ "vsubss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
1083 ins_cost(150); | |
1084 ins_encode %{ | |
1085 __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1086 %} | |
1087 ins_pipe(pipe_slow); | |
1088 %} | |
1089 | |
1090 instruct subD_reg(regD dst, regD src) %{ | |
1091 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1092 match(Set dst (SubD dst src)); | |
1093 | |
1094 format %{ "subsd $dst, $src" %} | |
1095 ins_cost(150); | |
1096 ins_encode %{ | |
1097 __ subsd($dst$$XMMRegister, $src$$XMMRegister); | |
1098 %} | |
1099 ins_pipe(pipe_slow); | |
1100 %} | |
1101 | |
1102 instruct subD_mem(regD dst, memory src) %{ | |
1103 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1104 match(Set dst (SubD dst (LoadD src))); | |
1105 | |
1106 format %{ "subsd $dst, $src" %} | |
1107 ins_cost(150); | |
1108 ins_encode %{ | |
1109 __ subsd($dst$$XMMRegister, $src$$Address); | |
1110 %} | |
1111 ins_pipe(pipe_slow); | |
1112 %} | |
1113 | |
1114 instruct subD_imm(regD dst, immD con) %{ | |
1115 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1116 match(Set dst (SubD dst con)); | |
1117 format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1118 ins_cost(150); | |
1119 ins_encode %{ | |
1120 __ subsd($dst$$XMMRegister, $constantaddress($con)); | |
1121 %} | |
1122 ins_pipe(pipe_slow); | |
1123 %} | |
1124 | |
6225 | 1125 instruct subD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 1126 predicate(UseAVX > 0); |
1127 match(Set dst (SubD src1 src2)); | |
1128 | |
1129 format %{ "vsubsd $dst, $src1, $src2" %} | |
1130 ins_cost(150); | |
1131 ins_encode %{ | |
1132 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1133 %} | |
1134 ins_pipe(pipe_slow); | |
1135 %} | |
1136 | |
6225 | 1137 instruct subD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 1138 predicate(UseAVX > 0); |
1139 match(Set dst (SubD src1 (LoadD src2))); | |
1140 | |
1141 format %{ "vsubsd $dst, $src1, $src2" %} | |
1142 ins_cost(150); | |
1143 ins_encode %{ | |
1144 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1145 %} | |
1146 ins_pipe(pipe_slow); | |
1147 %} | |
1148 | |
6225 | 1149 instruct subD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1150 predicate(UseAVX > 0); |
1151 match(Set dst (SubD src con)); | |
1152 | |
1153 format %{ "vsubsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1154 ins_cost(150); | |
1155 ins_encode %{ | |
1156 __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1157 %} | |
1158 ins_pipe(pipe_slow); | |
1159 %} | |
1160 | |
1161 instruct mulF_reg(regF dst, regF src) %{ | |
1162 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1163 match(Set dst (MulF dst src)); | |
1164 | |
1165 format %{ "mulss $dst, $src" %} | |
1166 ins_cost(150); | |
1167 ins_encode %{ | |
1168 __ mulss($dst$$XMMRegister, $src$$XMMRegister); | |
1169 %} | |
1170 ins_pipe(pipe_slow); | |
1171 %} | |
1172 | |
1173 instruct mulF_mem(regF dst, memory src) %{ | |
1174 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1175 match(Set dst (MulF dst (LoadF src))); | |
1176 | |
1177 format %{ "mulss $dst, $src" %} | |
1178 ins_cost(150); | |
1179 ins_encode %{ | |
1180 __ mulss($dst$$XMMRegister, $src$$Address); | |
1181 %} | |
1182 ins_pipe(pipe_slow); | |
1183 %} | |
1184 | |
1185 instruct mulF_imm(regF dst, immF con) %{ | |
1186 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1187 match(Set dst (MulF dst con)); | |
1188 format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1189 ins_cost(150); | |
1190 ins_encode %{ | |
1191 __ mulss($dst$$XMMRegister, $constantaddress($con)); | |
1192 %} | |
1193 ins_pipe(pipe_slow); | |
1194 %} | |
1195 | |
6225 | 1196 instruct mulF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 1197 predicate(UseAVX > 0); |
1198 match(Set dst (MulF src1 src2)); | |
1199 | |
1200 format %{ "vmulss $dst, $src1, $src2" %} | |
1201 ins_cost(150); | |
1202 ins_encode %{ | |
1203 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1204 %} | |
1205 ins_pipe(pipe_slow); | |
1206 %} | |
1207 | |
6225 | 1208 instruct mulF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 1209 predicate(UseAVX > 0); |
1210 match(Set dst (MulF src1 (LoadF src2))); | |
1211 | |
1212 format %{ "vmulss $dst, $src1, $src2" %} | |
1213 ins_cost(150); | |
1214 ins_encode %{ | |
1215 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1216 %} | |
1217 ins_pipe(pipe_slow); | |
1218 %} | |
1219 | |
6225 | 1220 instruct mulF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 1221 predicate(UseAVX > 0); |
1222 match(Set dst (MulF src con)); | |
1223 | |
1224 format %{ "vmulss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
1225 ins_cost(150); | |
1226 ins_encode %{ | |
1227 __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1228 %} | |
1229 ins_pipe(pipe_slow); | |
1230 %} | |
1231 | |
1232 instruct mulD_reg(regD dst, regD src) %{ | |
1233 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1234 match(Set dst (MulD dst src)); | |
1235 | |
1236 format %{ "mulsd $dst, $src" %} | |
1237 ins_cost(150); | |
1238 ins_encode %{ | |
1239 __ mulsd($dst$$XMMRegister, $src$$XMMRegister); | |
1240 %} | |
1241 ins_pipe(pipe_slow); | |
1242 %} | |
1243 | |
1244 instruct mulD_mem(regD dst, memory src) %{ | |
1245 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1246 match(Set dst (MulD dst (LoadD src))); | |
1247 | |
1248 format %{ "mulsd $dst, $src" %} | |
1249 ins_cost(150); | |
1250 ins_encode %{ | |
1251 __ mulsd($dst$$XMMRegister, $src$$Address); | |
1252 %} | |
1253 ins_pipe(pipe_slow); | |
1254 %} | |
1255 | |
1256 instruct mulD_imm(regD dst, immD con) %{ | |
1257 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1258 match(Set dst (MulD dst con)); | |
1259 format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1260 ins_cost(150); | |
1261 ins_encode %{ | |
1262 __ mulsd($dst$$XMMRegister, $constantaddress($con)); | |
1263 %} | |
1264 ins_pipe(pipe_slow); | |
1265 %} | |
1266 | |
6225 | 1267 instruct mulD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 1268 predicate(UseAVX > 0); |
1269 match(Set dst (MulD src1 src2)); | |
1270 | |
1271 format %{ "vmulsd $dst, $src1, $src2" %} | |
1272 ins_cost(150); | |
1273 ins_encode %{ | |
1274 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1275 %} | |
1276 ins_pipe(pipe_slow); | |
1277 %} | |
1278 | |
6225 | 1279 instruct mulD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 1280 predicate(UseAVX > 0); |
1281 match(Set dst (MulD src1 (LoadD src2))); | |
1282 | |
1283 format %{ "vmulsd $dst, $src1, $src2" %} | |
1284 ins_cost(150); | |
1285 ins_encode %{ | |
1286 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1287 %} | |
1288 ins_pipe(pipe_slow); | |
1289 %} | |
1290 | |
6225 | 1291 instruct mulD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1292 predicate(UseAVX > 0); |
1293 match(Set dst (MulD src con)); | |
1294 | |
1295 format %{ "vmulsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1296 ins_cost(150); | |
1297 ins_encode %{ | |
1298 __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1299 %} | |
1300 ins_pipe(pipe_slow); | |
1301 %} | |
1302 | |
1303 instruct divF_reg(regF dst, regF src) %{ | |
1304 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1305 match(Set dst (DivF dst src)); | |
1306 | |
1307 format %{ "divss $dst, $src" %} | |
1308 ins_cost(150); | |
1309 ins_encode %{ | |
1310 __ divss($dst$$XMMRegister, $src$$XMMRegister); | |
1311 %} | |
1312 ins_pipe(pipe_slow); | |
1313 %} | |
1314 | |
1315 instruct divF_mem(regF dst, memory src) %{ | |
1316 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1317 match(Set dst (DivF dst (LoadF src))); | |
1318 | |
1319 format %{ "divss $dst, $src" %} | |
1320 ins_cost(150); | |
1321 ins_encode %{ | |
1322 __ divss($dst$$XMMRegister, $src$$Address); | |
1323 %} | |
1324 ins_pipe(pipe_slow); | |
1325 %} | |
1326 | |
1327 instruct divF_imm(regF dst, immF con) %{ | |
1328 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1329 match(Set dst (DivF dst con)); | |
1330 format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1331 ins_cost(150); | |
1332 ins_encode %{ | |
1333 __ divss($dst$$XMMRegister, $constantaddress($con)); | |
1334 %} | |
1335 ins_pipe(pipe_slow); | |
1336 %} | |
1337 | |
6225 | 1338 instruct divF_reg_reg(regF dst, regF src1, regF src2) %{ |
4761 | 1339 predicate(UseAVX > 0); |
1340 match(Set dst (DivF src1 src2)); | |
1341 | |
1342 format %{ "vdivss $dst, $src1, $src2" %} | |
1343 ins_cost(150); | |
1344 ins_encode %{ | |
1345 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1346 %} | |
1347 ins_pipe(pipe_slow); | |
1348 %} | |
1349 | |
6225 | 1350 instruct divF_reg_mem(regF dst, regF src1, memory src2) %{ |
4761 | 1351 predicate(UseAVX > 0); |
1352 match(Set dst (DivF src1 (LoadF src2))); | |
1353 | |
1354 format %{ "vdivss $dst, $src1, $src2" %} | |
1355 ins_cost(150); | |
1356 ins_encode %{ | |
1357 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1358 %} | |
1359 ins_pipe(pipe_slow); | |
1360 %} | |
1361 | |
6225 | 1362 instruct divF_reg_imm(regF dst, regF src, immF con) %{ |
4761 | 1363 predicate(UseAVX > 0); |
1364 match(Set dst (DivF src con)); | |
1365 | |
1366 format %{ "vdivss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %} | |
1367 ins_cost(150); | |
1368 ins_encode %{ | |
1369 __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1370 %} | |
1371 ins_pipe(pipe_slow); | |
1372 %} | |
1373 | |
1374 instruct divD_reg(regD dst, regD src) %{ | |
1375 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1376 match(Set dst (DivD dst src)); | |
1377 | |
1378 format %{ "divsd $dst, $src" %} | |
1379 ins_cost(150); | |
1380 ins_encode %{ | |
1381 __ divsd($dst$$XMMRegister, $src$$XMMRegister); | |
1382 %} | |
1383 ins_pipe(pipe_slow); | |
1384 %} | |
1385 | |
1386 instruct divD_mem(regD dst, memory src) %{ | |
1387 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1388 match(Set dst (DivD dst (LoadD src))); | |
1389 | |
1390 format %{ "divsd $dst, $src" %} | |
1391 ins_cost(150); | |
1392 ins_encode %{ | |
1393 __ divsd($dst$$XMMRegister, $src$$Address); | |
1394 %} | |
1395 ins_pipe(pipe_slow); | |
1396 %} | |
1397 | |
1398 instruct divD_imm(regD dst, immD con) %{ | |
1399 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1400 match(Set dst (DivD dst con)); | |
1401 format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1402 ins_cost(150); | |
1403 ins_encode %{ | |
1404 __ divsd($dst$$XMMRegister, $constantaddress($con)); | |
1405 %} | |
1406 ins_pipe(pipe_slow); | |
1407 %} | |
1408 | |
6225 | 1409 instruct divD_reg_reg(regD dst, regD src1, regD src2) %{ |
4761 | 1410 predicate(UseAVX > 0); |
1411 match(Set dst (DivD src1 src2)); | |
1412 | |
1413 format %{ "vdivsd $dst, $src1, $src2" %} | |
1414 ins_cost(150); | |
1415 ins_encode %{ | |
1416 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister); | |
1417 %} | |
1418 ins_pipe(pipe_slow); | |
1419 %} | |
1420 | |
6225 | 1421 instruct divD_reg_mem(regD dst, regD src1, memory src2) %{ |
4761 | 1422 predicate(UseAVX > 0); |
1423 match(Set dst (DivD src1 (LoadD src2))); | |
1424 | |
1425 format %{ "vdivsd $dst, $src1, $src2" %} | |
1426 ins_cost(150); | |
1427 ins_encode %{ | |
1428 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address); | |
1429 %} | |
1430 ins_pipe(pipe_slow); | |
1431 %} | |
1432 | |
6225 | 1433 instruct divD_reg_imm(regD dst, regD src, immD con) %{ |
4761 | 1434 predicate(UseAVX > 0); |
1435 match(Set dst (DivD src con)); | |
1436 | |
1437 format %{ "vdivsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %} | |
1438 ins_cost(150); | |
1439 ins_encode %{ | |
1440 __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con)); | |
1441 %} | |
1442 ins_pipe(pipe_slow); | |
1443 %} | |
1444 | |
1445 instruct absF_reg(regF dst) %{ | |
1446 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1447 match(Set dst (AbsF dst)); | |
1448 ins_cost(150); | |
1449 format %{ "andps $dst, [0x7fffffff]\t# abs float by sign masking" %} | |
1450 ins_encode %{ | |
1451 __ andps($dst$$XMMRegister, ExternalAddress(float_signmask())); | |
1452 %} | |
1453 ins_pipe(pipe_slow); | |
1454 %} | |
1455 | |
6225 | 1456 instruct absF_reg_reg(regF dst, regF src) %{ |
4761 | 1457 predicate(UseAVX > 0); |
1458 match(Set dst (AbsF src)); | |
1459 ins_cost(150); | |
1460 format %{ "vandps $dst, $src, [0x7fffffff]\t# abs float by sign masking" %} | |
1461 ins_encode %{ | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1462 bool vector256 = false; |
4761 | 1463 __ vandps($dst$$XMMRegister, $src$$XMMRegister, |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1464 ExternalAddress(float_signmask()), vector256); |
4761 | 1465 %} |
1466 ins_pipe(pipe_slow); | |
1467 %} | |
1468 | |
1469 instruct absD_reg(regD dst) %{ | |
1470 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1471 match(Set dst (AbsD dst)); | |
1472 ins_cost(150); | |
1473 format %{ "andpd $dst, [0x7fffffffffffffff]\t" | |
1474 "# abs double by sign masking" %} | |
1475 ins_encode %{ | |
1476 __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask())); | |
1477 %} | |
1478 ins_pipe(pipe_slow); | |
1479 %} | |
1480 | |
6225 | 1481 instruct absD_reg_reg(regD dst, regD src) %{ |
4761 | 1482 predicate(UseAVX > 0); |
1483 match(Set dst (AbsD src)); | |
1484 ins_cost(150); | |
1485 format %{ "vandpd $dst, $src, [0x7fffffffffffffff]\t" | |
1486 "# abs double by sign masking" %} | |
1487 ins_encode %{ | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1488 bool vector256 = false; |
4761 | 1489 __ vandpd($dst$$XMMRegister, $src$$XMMRegister, |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1490 ExternalAddress(double_signmask()), vector256); |
4761 | 1491 %} |
1492 ins_pipe(pipe_slow); | |
1493 %} | |
1494 | |
1495 instruct negF_reg(regF dst) %{ | |
1496 predicate((UseSSE>=1) && (UseAVX == 0)); | |
1497 match(Set dst (NegF dst)); | |
1498 ins_cost(150); | |
1499 format %{ "xorps $dst, [0x80000000]\t# neg float by sign flipping" %} | |
1500 ins_encode %{ | |
1501 __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip())); | |
1502 %} | |
1503 ins_pipe(pipe_slow); | |
1504 %} | |
1505 | |
6225 | 1506 instruct negF_reg_reg(regF dst, regF src) %{ |
4761 | 1507 predicate(UseAVX > 0); |
1508 match(Set dst (NegF src)); | |
1509 ins_cost(150); | |
1510 format %{ "vxorps $dst, $src, [0x80000000]\t# neg float by sign flipping" %} | |
1511 ins_encode %{ | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1512 bool vector256 = false; |
4761 | 1513 __ vxorps($dst$$XMMRegister, $src$$XMMRegister, |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1514 ExternalAddress(float_signflip()), vector256); |
4761 | 1515 %} |
1516 ins_pipe(pipe_slow); | |
1517 %} | |
1518 | |
1519 instruct negD_reg(regD dst) %{ | |
1520 predicate((UseSSE>=2) && (UseAVX == 0)); | |
1521 match(Set dst (NegD dst)); | |
1522 ins_cost(150); | |
1523 format %{ "xorpd $dst, [0x8000000000000000]\t" | |
1524 "# neg double by sign flipping" %} | |
1525 ins_encode %{ | |
1526 __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip())); | |
1527 %} | |
1528 ins_pipe(pipe_slow); | |
1529 %} | |
1530 | |
6225 | 1531 instruct negD_reg_reg(regD dst, regD src) %{ |
4761 | 1532 predicate(UseAVX > 0); |
1533 match(Set dst (NegD src)); | |
1534 ins_cost(150); | |
1535 format %{ "vxorpd $dst, $src, [0x8000000000000000]\t" | |
1536 "# neg double by sign flipping" %} | |
1537 ins_encode %{ | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1538 bool vector256 = false; |
4761 | 1539 __ vxorpd($dst$$XMMRegister, $src$$XMMRegister, |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
1540 ExternalAddress(double_signflip()), vector256); |
4761 | 1541 %} |
1542 ins_pipe(pipe_slow); | |
1543 %} | |
1544 | |
1545 instruct sqrtF_reg(regF dst, regF src) %{ | |
1546 predicate(UseSSE>=1); | |
1547 match(Set dst (ConvD2F (SqrtD (ConvF2D src)))); | |
1548 | |
1549 format %{ "sqrtss $dst, $src" %} | |
1550 ins_cost(150); | |
1551 ins_encode %{ | |
1552 __ sqrtss($dst$$XMMRegister, $src$$XMMRegister); | |
1553 %} | |
1554 ins_pipe(pipe_slow); | |
1555 %} | |
1556 | |
1557 instruct sqrtF_mem(regF dst, memory src) %{ | |
1558 predicate(UseSSE>=1); | |
1559 match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src))))); | |
1560 | |
1561 format %{ "sqrtss $dst, $src" %} | |
1562 ins_cost(150); | |
1563 ins_encode %{ | |
1564 __ sqrtss($dst$$XMMRegister, $src$$Address); | |
1565 %} | |
1566 ins_pipe(pipe_slow); | |
1567 %} | |
1568 | |
1569 instruct sqrtF_imm(regF dst, immF con) %{ | |
1570 predicate(UseSSE>=1); | |
1571 match(Set dst (ConvD2F (SqrtD (ConvF2D con)))); | |
1572 format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %} | |
1573 ins_cost(150); | |
1574 ins_encode %{ | |
1575 __ sqrtss($dst$$XMMRegister, $constantaddress($con)); | |
1576 %} | |
1577 ins_pipe(pipe_slow); | |
1578 %} | |
1579 | |
1580 instruct sqrtD_reg(regD dst, regD src) %{ | |
1581 predicate(UseSSE>=2); | |
1582 match(Set dst (SqrtD src)); | |
1583 | |
1584 format %{ "sqrtsd $dst, $src" %} | |
1585 ins_cost(150); | |
1586 ins_encode %{ | |
1587 __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister); | |
1588 %} | |
1589 ins_pipe(pipe_slow); | |
1590 %} | |
1591 | |
1592 instruct sqrtD_mem(regD dst, memory src) %{ | |
1593 predicate(UseSSE>=2); | |
1594 match(Set dst (SqrtD (LoadD src))); | |
1595 | |
1596 format %{ "sqrtsd $dst, $src" %} | |
1597 ins_cost(150); | |
1598 ins_encode %{ | |
1599 __ sqrtsd($dst$$XMMRegister, $src$$Address); | |
1600 %} | |
1601 ins_pipe(pipe_slow); | |
1602 %} | |
1603 | |
1604 instruct sqrtD_imm(regD dst, immD con) %{ | |
1605 predicate(UseSSE>=2); | |
1606 match(Set dst (SqrtD con)); | |
1607 format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %} | |
1608 ins_cost(150); | |
1609 ins_encode %{ | |
1610 __ sqrtsd($dst$$XMMRegister, $constantaddress($con)); | |
1611 %} | |
1612 ins_pipe(pipe_slow); | |
1613 %} | |
1614 | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1615 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1616 // ====================VECTOR INSTRUCTIONS===================================== |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1617 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1618 // Load vectors (4 bytes long) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1619 instruct loadV4(vecS dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1620 predicate(n->as_LoadVector()->memory_size() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1621 match(Set dst (LoadVector mem)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1622 ins_cost(125); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1623 format %{ "movd $dst,$mem\t! load vector (4 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1624 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1625 __ movdl($dst$$XMMRegister, $mem$$Address); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1626 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1627 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1628 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1629 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1630 // Load vectors (8 bytes long) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1631 instruct loadV8(vecD dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1632 predicate(n->as_LoadVector()->memory_size() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1633 match(Set dst (LoadVector mem)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1634 ins_cost(125); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1635 format %{ "movq $dst,$mem\t! load vector (8 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1636 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1637 __ movq($dst$$XMMRegister, $mem$$Address); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1638 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1639 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1640 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1641 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1642 // Load vectors (16 bytes long) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1643 instruct loadV16(vecX dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1644 predicate(n->as_LoadVector()->memory_size() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1645 match(Set dst (LoadVector mem)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1646 ins_cost(125); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1647 format %{ "movdqu $dst,$mem\t! load vector (16 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1648 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1649 __ movdqu($dst$$XMMRegister, $mem$$Address); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1650 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1651 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1652 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1653 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1654 // Load vectors (32 bytes long) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1655 instruct loadV32(vecY dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1656 predicate(n->as_LoadVector()->memory_size() == 32); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1657 match(Set dst (LoadVector mem)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1658 ins_cost(125); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1659 format %{ "vmovdqu $dst,$mem\t! load vector (32 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1660 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1661 __ vmovdqu($dst$$XMMRegister, $mem$$Address); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1662 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1663 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1664 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1665 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1666 // Store vectors |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1667 instruct storeV4(memory mem, vecS src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1668 predicate(n->as_StoreVector()->memory_size() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1669 match(Set mem (StoreVector mem src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1670 ins_cost(145); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1671 format %{ "movd $mem,$src\t! store vector (4 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1672 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1673 __ movdl($mem$$Address, $src$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1674 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1675 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1676 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1677 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1678 instruct storeV8(memory mem, vecD src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1679 predicate(n->as_StoreVector()->memory_size() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1680 match(Set mem (StoreVector mem src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1681 ins_cost(145); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1682 format %{ "movq $mem,$src\t! store vector (8 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1683 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1684 __ movq($mem$$Address, $src$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1685 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1686 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1687 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1688 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1689 instruct storeV16(memory mem, vecX src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1690 predicate(n->as_StoreVector()->memory_size() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1691 match(Set mem (StoreVector mem src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1692 ins_cost(145); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1693 format %{ "movdqu $mem,$src\t! store vector (16 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1694 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1695 __ movdqu($mem$$Address, $src$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1696 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1697 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1698 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1699 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1700 instruct storeV32(memory mem, vecY src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1701 predicate(n->as_StoreVector()->memory_size() == 32); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1702 match(Set mem (StoreVector mem src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1703 ins_cost(145); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1704 format %{ "vmovdqu $mem,$src\t! store vector (32 bytes)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1705 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1706 __ vmovdqu($mem$$Address, $src$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1707 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1708 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1709 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1710 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1711 // Replicate byte scalar to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1712 instruct Repl4B(vecS dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1713 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1714 match(Set dst (ReplicateB src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1715 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1716 "punpcklbw $dst,$dst\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1717 "pshuflw $dst,$dst,0x00\t! replicate4B" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1718 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1719 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1720 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1721 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1722 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1723 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1724 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1725 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1726 instruct Repl8B(vecD dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1727 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1728 match(Set dst (ReplicateB src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1729 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1730 "punpcklbw $dst,$dst\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1731 "pshuflw $dst,$dst,0x00\t! replicate8B" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1732 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1733 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1734 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1735 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1736 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1737 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1738 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1739 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1740 instruct Repl16B(vecX dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1741 predicate(n->as_Vector()->length() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1742 match(Set dst (ReplicateB src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1743 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1744 "punpcklbw $dst,$dst\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1745 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1746 "punpcklqdq $dst,$dst\t! replicate16B" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1747 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1748 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1749 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1750 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1751 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1752 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1753 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1754 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1755 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1756 instruct Repl32B(vecY dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1757 predicate(n->as_Vector()->length() == 32); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1758 match(Set dst (ReplicateB src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1759 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1760 "punpcklbw $dst,$dst\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1761 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1762 "punpcklqdq $dst,$dst\n\t" |
1763 "vinserti128h $dst,$dst,$dst\t! replicate32B" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1764 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1765 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1766 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1767 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1768 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
1769 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1770 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1771 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1772 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1773 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1774 // Replicate byte scalar immediate to be vector by loading from const table. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1775 instruct Repl4B_imm(vecS dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1776 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1777 match(Set dst (ReplicateB con)); |
6225 | 1778 format %{ "movdl $dst,[$constantaddress]\t! replicate4B($con)" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1779 ins_encode %{ |
6225 | 1780 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 1))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1781 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1782 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1783 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1784 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1785 instruct Repl8B_imm(vecD dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1786 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1787 match(Set dst (ReplicateB con)); |
6225 | 1788 format %{ "movq $dst,[$constantaddress]\t! replicate8B($con)" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1789 ins_encode %{ |
6225 | 1790 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1791 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1792 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1793 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1794 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1795 instruct Repl16B_imm(vecX dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1796 predicate(n->as_Vector()->length() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1797 match(Set dst (ReplicateB con)); |
6225 | 1798 format %{ "movq $dst,[$constantaddress]\n\t" |
1799 "punpcklqdq $dst,$dst\t! replicate16B($con)" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1800 ins_encode %{ |
6225 | 1801 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1))); |
1802 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1803 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1804 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1805 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1806 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1807 instruct Repl32B_imm(vecY dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1808 predicate(n->as_Vector()->length() == 32); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1809 match(Set dst (ReplicateB con)); |
6225 | 1810 format %{ "movq $dst,[$constantaddress]\n\t" |
1811 "punpcklqdq $dst,$dst\n\t" | |
1812 "vinserti128h $dst,$dst,$dst\t! lreplicate32B($con)" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1813 ins_encode %{ |
6225 | 1814 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1))); |
1815 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
1816 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1817 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1818 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1819 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1820 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1821 // Replicate byte scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1822 instruct Repl4B_zero(vecS dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1823 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1824 match(Set dst (ReplicateB zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1825 format %{ "pxor $dst,$dst\t! replicate4B zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1826 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1827 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1828 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1829 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1830 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1831 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1832 instruct Repl8B_zero(vecD dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1833 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1834 match(Set dst (ReplicateB zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1835 format %{ "pxor $dst,$dst\t! replicate8B zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1836 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1837 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1838 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1839 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1840 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1841 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1842 instruct Repl16B_zero(vecX dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1843 predicate(n->as_Vector()->length() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1844 match(Set dst (ReplicateB zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1845 format %{ "pxor $dst,$dst\t! replicate16B zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1846 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1847 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1848 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1849 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1850 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1851 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1852 instruct Repl32B_zero(vecY dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1853 predicate(n->as_Vector()->length() == 32); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1854 match(Set dst (ReplicateB zero)); |
6225 | 1855 format %{ "vpxor $dst,$dst,$dst\t! replicate32B zero" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1856 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1857 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1858 bool vector256 = true; |
6225 | 1859 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1860 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1861 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1862 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1863 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1864 // Replicate char/short (2 byte) scalar to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1865 instruct Repl2S(vecS dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1866 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1867 match(Set dst (ReplicateS src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1868 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1869 "pshuflw $dst,$dst,0x00\t! replicate2S" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1870 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1871 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1872 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1873 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1874 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1875 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1876 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1877 instruct Repl4S(vecD dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1878 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1879 match(Set dst (ReplicateS src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1880 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1881 "pshuflw $dst,$dst,0x00\t! replicate4S" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1882 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1883 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1884 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1885 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1886 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1887 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1888 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1889 instruct Repl8S(vecX dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1890 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1891 match(Set dst (ReplicateS src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1892 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1893 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1894 "punpcklqdq $dst,$dst\t! replicate8S" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1895 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1896 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1897 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1898 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1899 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1900 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1901 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1902 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1903 instruct Repl16S(vecY dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1904 predicate(n->as_Vector()->length() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1905 match(Set dst (ReplicateS src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1906 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1907 "pshuflw $dst,$dst,0x00\n\t" |
6225 | 1908 "punpcklqdq $dst,$dst\n\t" |
1909 "vinserti128h $dst,$dst,$dst\t! replicate16S" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1910 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1911 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1912 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 1913 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
1914 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1915 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1916 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1917 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1918 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1919 // Replicate char/short (2 byte) scalar immediate to be vector by loading from const table. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1920 instruct Repl2S_imm(vecS dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1921 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1922 match(Set dst (ReplicateS con)); |
6225 | 1923 format %{ "movdl $dst,[$constantaddress]\t! replicate2S($con)" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1924 ins_encode %{ |
6225 | 1925 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 2))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1926 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1927 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1928 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1929 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1930 instruct Repl4S_imm(vecD dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1931 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1932 match(Set dst (ReplicateS con)); |
6225 | 1933 format %{ "movq $dst,[$constantaddress]\t! replicate4S($con)" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1934 ins_encode %{ |
6225 | 1935 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1936 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1937 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1938 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1939 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1940 instruct Repl8S_imm(vecX dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1941 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1942 match(Set dst (ReplicateS con)); |
6225 | 1943 format %{ "movq $dst,[$constantaddress]\n\t" |
1944 "punpcklqdq $dst,$dst\t! replicate8S($con)" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1945 ins_encode %{ |
6225 | 1946 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2))); |
1947 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1948 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1949 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1950 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1951 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1952 instruct Repl16S_imm(vecY dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1953 predicate(n->as_Vector()->length() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1954 match(Set dst (ReplicateS con)); |
6225 | 1955 format %{ "movq $dst,[$constantaddress]\n\t" |
1956 "punpcklqdq $dst,$dst\n\t" | |
1957 "vinserti128h $dst,$dst,$dst\t! replicate16S($con)" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1958 ins_encode %{ |
6225 | 1959 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2))); |
1960 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
1961 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1962 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1963 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1964 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1965 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1966 // Replicate char/short (2 byte) scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1967 instruct Repl2S_zero(vecS dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1968 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1969 match(Set dst (ReplicateS zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1970 format %{ "pxor $dst,$dst\t! replicate2S zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1971 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1972 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1973 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1974 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1975 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1976 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1977 instruct Repl4S_zero(vecD dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1978 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1979 match(Set dst (ReplicateS zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1980 format %{ "pxor $dst,$dst\t! replicate4S zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1981 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1982 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1983 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1984 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1985 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1986 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1987 instruct Repl8S_zero(vecX dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1988 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1989 match(Set dst (ReplicateS zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1990 format %{ "pxor $dst,$dst\t! replicate8S zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1991 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1992 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1993 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1994 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1995 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1996 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1997 instruct Repl16S_zero(vecY dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1998 predicate(n->as_Vector()->length() == 16); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
1999 match(Set dst (ReplicateS zero)); |
6225 | 2000 format %{ "vpxor $dst,$dst,$dst\t! replicate16S zero" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2001 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2002 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2003 bool vector256 = true; |
6225 | 2004 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2005 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2006 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2007 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2008 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2009 // Replicate integer (4 byte) scalar to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2010 instruct Repl2I(vecD dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2011 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2012 match(Set dst (ReplicateI src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2013 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2014 "pshufd $dst,$dst,0x00\t! replicate2I" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2015 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2016 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2017 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2018 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2019 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2020 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2021 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2022 instruct Repl4I(vecX dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2023 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2024 match(Set dst (ReplicateI src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2025 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2026 "pshufd $dst,$dst,0x00\t! replicate4I" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2027 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2028 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2029 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2030 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2031 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2032 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2033 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2034 instruct Repl8I(vecY dst, rRegI src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2035 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2036 match(Set dst (ReplicateI src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2037 format %{ "movd $dst,$src\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2038 "pshufd $dst,$dst,0x00\n\t" |
6225 | 2039 "vinserti128h $dst,$dst,$dst\t! replicate8I" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2040 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2041 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2042 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 2043 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2044 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2045 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2046 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2047 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2048 // Replicate integer (4 byte) scalar immediate to be vector by loading from const table. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2049 instruct Repl2I_imm(vecD dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2050 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2051 match(Set dst (ReplicateI con)); |
6225 | 2052 format %{ "movq $dst,[$constantaddress]\t! replicate2I($con)" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2053 ins_encode %{ |
6225 | 2054 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2055 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2056 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2057 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2058 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2059 instruct Repl4I_imm(vecX dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2060 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2061 match(Set dst (ReplicateI con)); |
6225 | 2062 format %{ "movq $dst,[$constantaddress]\t! replicate4I($con)\n\t" |
2063 "punpcklqdq $dst,$dst" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2064 ins_encode %{ |
6225 | 2065 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4))); |
2066 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2067 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2068 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2069 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2070 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2071 instruct Repl8I_imm(vecY dst, immI con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2072 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2073 match(Set dst (ReplicateI con)); |
6225 | 2074 format %{ "movq $dst,[$constantaddress]\t! replicate8I($con)\n\t" |
2075 "punpcklqdq $dst,$dst\n\t" | |
2076 "vinserti128h $dst,$dst,$dst" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2077 ins_encode %{ |
6225 | 2078 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4))); |
2079 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
2080 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2081 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2082 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2083 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2084 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2085 // Integer could be loaded into xmm register directly from memory. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2086 instruct Repl2I_mem(vecD dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2087 predicate(n->as_Vector()->length() == 2); |
6225 | 2088 match(Set dst (ReplicateI (LoadI mem))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2089 format %{ "movd $dst,$mem\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2090 "pshufd $dst,$dst,0x00\t! replicate2I" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2091 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2092 __ movdl($dst$$XMMRegister, $mem$$Address); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2093 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2094 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2095 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2096 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2097 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2098 instruct Repl4I_mem(vecX dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2099 predicate(n->as_Vector()->length() == 4); |
6225 | 2100 match(Set dst (ReplicateI (LoadI mem))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2101 format %{ "movd $dst,$mem\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2102 "pshufd $dst,$dst,0x00\t! replicate4I" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2103 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2104 __ movdl($dst$$XMMRegister, $mem$$Address); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2105 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2106 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2107 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2108 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2109 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2110 instruct Repl8I_mem(vecY dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2111 predicate(n->as_Vector()->length() == 8); |
6225 | 2112 match(Set dst (ReplicateI (LoadI mem))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2113 format %{ "movd $dst,$mem\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2114 "pshufd $dst,$dst,0x00\n\t" |
6225 | 2115 "vinserti128h $dst,$dst,$dst\t! replicate8I" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2116 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2117 __ movdl($dst$$XMMRegister, $mem$$Address); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2118 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00); |
6225 | 2119 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2120 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2121 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2122 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2123 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2124 // Replicate integer (4 byte) scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2125 instruct Repl2I_zero(vecD dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2126 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2127 match(Set dst (ReplicateI zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2128 format %{ "pxor $dst,$dst\t! replicate2I" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2129 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2130 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2131 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2132 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2133 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2134 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2135 instruct Repl4I_zero(vecX dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2136 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2137 match(Set dst (ReplicateI zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2138 format %{ "pxor $dst,$dst\t! replicate4I zero)" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2139 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2140 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2141 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2142 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2143 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2144 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2145 instruct Repl8I_zero(vecY dst, immI0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2146 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2147 match(Set dst (ReplicateI zero)); |
6225 | 2148 format %{ "vpxor $dst,$dst,$dst\t! replicate8I zero" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2149 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2150 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2151 bool vector256 = true; |
6225 | 2152 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2153 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2154 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2155 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2156 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2157 // Replicate long (8 byte) scalar to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2158 #ifdef _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2159 instruct Repl2L(vecX dst, rRegL src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2160 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2161 match(Set dst (ReplicateL src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2162 format %{ "movdq $dst,$src\n\t" |
6225 | 2163 "punpcklqdq $dst,$dst\t! replicate2L" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2164 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2165 __ movdq($dst$$XMMRegister, $src$$Register); |
6225 | 2166 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2167 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2168 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2169 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2170 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2171 instruct Repl4L(vecY dst, rRegL src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2172 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2173 match(Set dst (ReplicateL src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2174 format %{ "movdq $dst,$src\n\t" |
6225 | 2175 "punpcklqdq $dst,$dst\n\t" |
2176 "vinserti128h $dst,$dst,$dst\t! replicate4L" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2177 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2178 __ movdq($dst$$XMMRegister, $src$$Register); |
6225 | 2179 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
2180 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2181 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2182 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2183 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2184 #else // _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2185 instruct Repl2L(vecX dst, eRegL src, regD tmp) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2186 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2187 match(Set dst (ReplicateL src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2188 effect(TEMP dst, USE src, TEMP tmp); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2189 format %{ "movdl $dst,$src.lo\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2190 "movdl $tmp,$src.hi\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2191 "punpckldq $dst,$tmp\n\t" |
6225 | 2192 "punpcklqdq $dst,$dst\t! replicate2L"%} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2193 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2194 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2195 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2196 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister); |
6225 | 2197 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2198 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2199 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2200 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2201 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2202 instruct Repl4L(vecY dst, eRegL src, regD tmp) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2203 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2204 match(Set dst (ReplicateL src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2205 effect(TEMP dst, USE src, TEMP tmp); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2206 format %{ "movdl $dst,$src.lo\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2207 "movdl $tmp,$src.hi\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2208 "punpckldq $dst,$tmp\n\t" |
6225 | 2209 "punpcklqdq $dst,$dst\n\t" |
2210 "vinserti128h $dst,$dst,$dst\t! replicate4L" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2211 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2212 __ movdl($dst$$XMMRegister, $src$$Register); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2213 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2214 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister); |
6225 | 2215 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
2216 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2217 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2218 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2219 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2220 #endif // _LP64 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2221 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2222 // Replicate long (8 byte) scalar immediate to be vector by loading from const table. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2223 instruct Repl2L_imm(vecX dst, immL con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2224 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2225 match(Set dst (ReplicateL con)); |
6225 | 2226 format %{ "movq $dst,[$constantaddress]\n\t" |
2227 "punpcklqdq $dst,$dst\t! replicate2L($con)" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2228 ins_encode %{ |
6225 | 2229 __ movq($dst$$XMMRegister, $constantaddress($con)); |
2230 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2231 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2232 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2233 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2234 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2235 instruct Repl4L_imm(vecY dst, immL con) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2236 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2237 match(Set dst (ReplicateL con)); |
6225 | 2238 format %{ "movq $dst,[$constantaddress]\n\t" |
2239 "punpcklqdq $dst,$dst\n\t" | |
2240 "vinserti128h $dst,$dst,$dst\t! replicate4L($con)" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2241 ins_encode %{ |
6225 | 2242 __ movq($dst$$XMMRegister, $constantaddress($con)); |
2243 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); | |
2244 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2245 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2246 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2247 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2248 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2249 // Long could be loaded into xmm register directly from memory. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2250 instruct Repl2L_mem(vecX dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2251 predicate(n->as_Vector()->length() == 2); |
6225 | 2252 match(Set dst (ReplicateL (LoadL mem))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2253 format %{ "movq $dst,$mem\n\t" |
6225 | 2254 "punpcklqdq $dst,$dst\t! replicate2L" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2255 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2256 __ movq($dst$$XMMRegister, $mem$$Address); |
6225 | 2257 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2258 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2259 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2260 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2261 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2262 instruct Repl4L_mem(vecY dst, memory mem) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2263 predicate(n->as_Vector()->length() == 4); |
6225 | 2264 match(Set dst (ReplicateL (LoadL mem))); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2265 format %{ "movq $dst,$mem\n\t" |
6225 | 2266 "punpcklqdq $dst,$dst\n\t" |
2267 "vinserti128h $dst,$dst,$dst\t! replicate4L" %} | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2268 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2269 __ movq($dst$$XMMRegister, $mem$$Address); |
6225 | 2270 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister); |
2271 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2272 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2273 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2274 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2275 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2276 // Replicate long (8 byte) scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2277 instruct Repl2L_zero(vecX dst, immL0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2278 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2279 match(Set dst (ReplicateL zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2280 format %{ "pxor $dst,$dst\t! replicate2L zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2281 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2282 __ pxor($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2283 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2284 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2285 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2286 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2287 instruct Repl4L_zero(vecY dst, immL0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2288 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2289 match(Set dst (ReplicateL zero)); |
6225 | 2290 format %{ "vpxor $dst,$dst,$dst\t! replicate4L zero" %} |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2291 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2292 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it). |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2293 bool vector256 = true; |
6225 | 2294 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2295 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2296 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2297 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2298 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2299 // Replicate float (4 byte) scalar to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2300 instruct Repl2F(vecD dst, regF src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2301 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2302 match(Set dst (ReplicateF src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2303 format %{ "pshufd $dst,$dst,0x00\t! replicate2F" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2304 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2305 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2306 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2307 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2308 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2309 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2310 instruct Repl4F(vecX dst, regF src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2311 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2312 match(Set dst (ReplicateF src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2313 format %{ "pshufd $dst,$dst,0x00\t! replicate4F" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2314 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2315 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2316 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2317 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2318 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2319 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2320 instruct Repl8F(vecY dst, regF src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2321 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2322 match(Set dst (ReplicateF src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2323 format %{ "pshufd $dst,$src,0x00\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2324 "vinsertf128h $dst,$dst,$dst\t! replicate8F" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2325 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2326 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2327 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2328 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2329 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2330 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2331 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2332 // Replicate float (4 byte) scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2333 instruct Repl2F_zero(vecD dst, immF0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2334 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2335 match(Set dst (ReplicateF zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2336 format %{ "xorps $dst,$dst\t! replicate2F zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2337 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2338 __ xorps($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2339 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2340 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2341 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2342 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2343 instruct Repl4F_zero(vecX dst, immF0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2344 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2345 match(Set dst (ReplicateF zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2346 format %{ "xorps $dst,$dst\t! replicate4F zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2347 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2348 __ xorps($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2349 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2350 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2351 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2352 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2353 instruct Repl8F_zero(vecY dst, immF0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2354 predicate(n->as_Vector()->length() == 8); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2355 match(Set dst (ReplicateF zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2356 format %{ "vxorps $dst,$dst,$dst\t! replicate8F zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2357 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2358 bool vector256 = true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2359 __ vxorps($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2360 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2361 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2362 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2363 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2364 // Replicate double (8 bytes) scalar to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2365 instruct Repl2D(vecX dst, regD src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2366 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2367 match(Set dst (ReplicateD src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2368 format %{ "pshufd $dst,$src,0x44\t! replicate2D" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2369 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2370 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2371 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2372 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2373 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2374 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2375 instruct Repl4D(vecY dst, regD src) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2376 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2377 match(Set dst (ReplicateD src)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2378 format %{ "pshufd $dst,$src,0x44\n\t" |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2379 "vinsertf128h $dst,$dst,$dst\t! replicate4D" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2380 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2381 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2382 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2383 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2384 ins_pipe( pipe_slow ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2385 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2386 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2387 // Replicate double (8 byte) scalar zero to be vector |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2388 instruct Repl2D_zero(vecX dst, immD0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2389 predicate(n->as_Vector()->length() == 2); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2390 match(Set dst (ReplicateD zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2391 format %{ "xorpd $dst,$dst\t! replicate2D zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2392 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2393 __ xorpd($dst$$XMMRegister, $dst$$XMMRegister); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2394 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2395 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2396 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2397 |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2398 instruct Repl4D_zero(vecY dst, immD0 zero) %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2399 predicate(n->as_Vector()->length() == 4); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2400 match(Set dst (ReplicateD zero)); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2401 format %{ "vxorpd $dst,$dst,$dst,vect256\t! replicate4D zero" %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2402 ins_encode %{ |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2403 bool vector256 = true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2404 __ vxorpd($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2405 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2406 ins_pipe( fpu_reg_reg ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2407 %} |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4950
diff
changeset
|
2408 |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2409 // ====================VECTOR ARITHMETIC======================================= |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2410 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2411 // --------------------------------- ADD -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2412 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2413 // Bytes vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2414 instruct vadd4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2415 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2416 match(Set dst (AddVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2417 format %{ "paddb $dst,$src\t! add packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2418 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2419 __ paddb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2420 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2421 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2422 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2423 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2424 instruct vadd4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2425 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2426 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2427 format %{ "vpaddb $dst,$src1,$src2\t! add packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2428 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2429 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2430 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2431 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2432 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2433 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2434 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2435 instruct vadd8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2436 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2437 match(Set dst (AddVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2438 format %{ "paddb $dst,$src\t! add packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2439 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2440 __ paddb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2441 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2442 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2443 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2444 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2445 instruct vadd8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2446 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2447 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2448 format %{ "vpaddb $dst,$src1,$src2\t! add packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2449 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2450 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2451 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2452 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2453 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2454 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2455 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2456 instruct vadd16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2457 predicate(n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2458 match(Set dst (AddVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2459 format %{ "paddb $dst,$src\t! add packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2460 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2461 __ paddb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2462 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2463 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2464 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2465 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2466 instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2467 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2468 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2469 format %{ "vpaddb $dst,$src1,$src2\t! add packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2470 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2471 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2472 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2473 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2474 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2475 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2476 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2477 instruct vadd16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2478 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2479 match(Set dst (AddVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2480 format %{ "vpaddb $dst,$src,$mem\t! add packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2481 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2482 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2483 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2484 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2485 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2486 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2487 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2488 instruct vadd32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2489 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2490 match(Set dst (AddVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2491 format %{ "vpaddb $dst,$src1,$src2\t! add packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2492 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2493 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2494 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2495 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2496 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2497 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2498 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2499 instruct vadd32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2500 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2501 match(Set dst (AddVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2502 format %{ "vpaddb $dst,$src,$mem\t! add packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2503 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2504 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2505 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2506 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2507 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2508 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2509 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2510 // Shorts/Chars vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2511 instruct vadd2S(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2512 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2513 match(Set dst (AddVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2514 format %{ "paddw $dst,$src\t! add packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2515 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2516 __ paddw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2517 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2518 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2519 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2520 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2521 instruct vadd2S_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2522 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2523 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2524 format %{ "vpaddw $dst,$src1,$src2\t! add packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2525 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2526 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2527 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2528 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2529 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2530 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2531 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2532 instruct vadd4S(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2533 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2534 match(Set dst (AddVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2535 format %{ "paddw $dst,$src\t! add packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2536 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2537 __ paddw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2538 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2539 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2540 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2541 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2542 instruct vadd4S_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2543 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2544 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2545 format %{ "vpaddw $dst,$src1,$src2\t! add packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2546 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2547 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2548 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2549 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2550 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2551 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2552 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2553 instruct vadd8S(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2554 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2555 match(Set dst (AddVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2556 format %{ "paddw $dst,$src\t! add packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2557 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2558 __ paddw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2559 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2560 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2561 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2562 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2563 instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2564 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2565 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2566 format %{ "vpaddw $dst,$src1,$src2\t! add packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2567 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2568 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2569 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2570 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2571 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2572 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2573 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2574 instruct vadd8S_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2575 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2576 match(Set dst (AddVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2577 format %{ "vpaddw $dst,$src,$mem\t! add packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2578 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2579 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2580 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2581 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2582 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2583 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2584 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2585 instruct vadd16S_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2586 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2587 match(Set dst (AddVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2588 format %{ "vpaddw $dst,$src1,$src2\t! add packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2589 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2590 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2591 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2592 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2593 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2594 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2595 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2596 instruct vadd16S_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2597 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2598 match(Set dst (AddVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2599 format %{ "vpaddw $dst,$src,$mem\t! add packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2600 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2601 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2602 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2603 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2604 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2605 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2606 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2607 // Integers vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2608 instruct vadd2I(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2609 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2610 match(Set dst (AddVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2611 format %{ "paddd $dst,$src\t! add packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2612 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2613 __ paddd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2614 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2615 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2616 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2617 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2618 instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2619 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2620 match(Set dst (AddVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2621 format %{ "vpaddd $dst,$src1,$src2\t! add packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2622 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2623 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2624 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2625 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2626 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2627 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2628 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2629 instruct vadd4I(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2630 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2631 match(Set dst (AddVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2632 format %{ "paddd $dst,$src\t! add packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2633 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2634 __ paddd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2635 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2636 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2637 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2638 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2639 instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2640 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2641 match(Set dst (AddVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2642 format %{ "vpaddd $dst,$src1,$src2\t! add packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2643 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2644 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2645 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2646 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2647 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2648 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2649 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2650 instruct vadd4I_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2651 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2652 match(Set dst (AddVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2653 format %{ "vpaddd $dst,$src,$mem\t! add packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2654 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2655 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2656 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2657 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2658 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2659 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2660 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2661 instruct vadd8I_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2662 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2663 match(Set dst (AddVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2664 format %{ "vpaddd $dst,$src1,$src2\t! add packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2665 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2666 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2667 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2668 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2669 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2670 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2671 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2672 instruct vadd8I_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2673 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2674 match(Set dst (AddVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2675 format %{ "vpaddd $dst,$src,$mem\t! add packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2676 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2677 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2678 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2679 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2680 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2681 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2682 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2683 // Longs vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2684 instruct vadd2L(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2685 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2686 match(Set dst (AddVL dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2687 format %{ "paddq $dst,$src\t! add packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2688 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2689 __ paddq($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2690 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2691 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2692 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2693 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2694 instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2695 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2696 match(Set dst (AddVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2697 format %{ "vpaddq $dst,$src1,$src2\t! add packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2698 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2699 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2700 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2701 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2702 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2703 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2704 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2705 instruct vadd2L_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2706 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2707 match(Set dst (AddVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2708 format %{ "vpaddq $dst,$src,$mem\t! add packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2709 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2710 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2711 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2712 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2713 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2714 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2715 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2716 instruct vadd4L_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2717 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2718 match(Set dst (AddVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2719 format %{ "vpaddq $dst,$src1,$src2\t! add packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2720 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2721 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2722 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2723 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2724 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2725 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2726 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2727 instruct vadd4L_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2728 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2729 match(Set dst (AddVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2730 format %{ "vpaddq $dst,$src,$mem\t! add packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2731 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2732 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2733 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2734 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2735 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2736 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2737 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2738 // Floats vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2739 instruct vadd2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2740 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2741 match(Set dst (AddVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2742 format %{ "addps $dst,$src\t! add packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2743 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2744 __ addps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2745 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2746 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2747 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2748 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2749 instruct vadd2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2750 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2751 match(Set dst (AddVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2752 format %{ "vaddps $dst,$src1,$src2\t! add packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2753 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2754 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2755 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2756 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2757 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2758 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2759 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2760 instruct vadd4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2761 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2762 match(Set dst (AddVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2763 format %{ "addps $dst,$src\t! add packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2764 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2765 __ addps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2766 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2767 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2768 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2769 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2770 instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2771 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2772 match(Set dst (AddVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2773 format %{ "vaddps $dst,$src1,$src2\t! add packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2774 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2775 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2776 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2777 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2778 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2779 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2780 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2781 instruct vadd4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2782 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2783 match(Set dst (AddVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2784 format %{ "vaddps $dst,$src,$mem\t! add packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2785 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2786 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2787 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2788 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2789 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2790 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2791 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2792 instruct vadd8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2793 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2794 match(Set dst (AddVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2795 format %{ "vaddps $dst,$src1,$src2\t! add packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2796 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2797 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2798 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2799 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2800 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2801 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2802 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2803 instruct vadd8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2804 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2805 match(Set dst (AddVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2806 format %{ "vaddps $dst,$src,$mem\t! add packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2807 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2808 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2809 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2810 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2811 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2812 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2813 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2814 // Doubles vector add |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2815 instruct vadd2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2816 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2817 match(Set dst (AddVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2818 format %{ "addpd $dst,$src\t! add packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2819 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2820 __ addpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2821 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2822 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2823 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2824 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2825 instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2826 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2827 match(Set dst (AddVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2828 format %{ "vaddpd $dst,$src1,$src2\t! add packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2829 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2830 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2831 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2832 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2833 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2834 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2835 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2836 instruct vadd2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2837 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2838 match(Set dst (AddVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2839 format %{ "vaddpd $dst,$src,$mem\t! add packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2840 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2841 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2842 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2843 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2844 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2845 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2846 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2847 instruct vadd4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2848 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2849 match(Set dst (AddVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2850 format %{ "vaddpd $dst,$src1,$src2\t! add packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2851 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2852 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2853 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2854 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2855 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2856 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2857 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2858 instruct vadd4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2859 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2860 match(Set dst (AddVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2861 format %{ "vaddpd $dst,$src,$mem\t! add packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2862 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2863 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2864 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2865 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2866 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2867 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2868 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2869 // --------------------------------- SUB -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2870 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2871 // Bytes vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2872 instruct vsub4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2873 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2874 match(Set dst (SubVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2875 format %{ "psubb $dst,$src\t! sub packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2876 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2877 __ psubb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2878 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2879 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2880 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2881 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2882 instruct vsub4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2883 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2884 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2885 format %{ "vpsubb $dst,$src1,$src2\t! sub packed4B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2886 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2887 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2888 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2889 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2890 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2891 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2892 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2893 instruct vsub8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2894 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2895 match(Set dst (SubVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2896 format %{ "psubb $dst,$src\t! sub packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2897 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2898 __ psubb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2899 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2900 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2901 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2902 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2903 instruct vsub8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2904 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2905 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2906 format %{ "vpsubb $dst,$src1,$src2\t! sub packed8B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2907 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2908 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2909 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2910 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2911 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2912 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2913 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2914 instruct vsub16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2915 predicate(n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2916 match(Set dst (SubVB dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2917 format %{ "psubb $dst,$src\t! sub packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2918 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2919 __ psubb($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2920 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2921 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2922 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2923 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2924 instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2925 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2926 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2927 format %{ "vpsubb $dst,$src1,$src2\t! sub packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2928 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2929 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2930 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2931 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2932 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2933 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2934 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2935 instruct vsub16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2936 predicate(UseAVX > 0 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2937 match(Set dst (SubVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2938 format %{ "vpsubb $dst,$src,$mem\t! sub packed16B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2939 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2940 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2941 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2942 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2943 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2944 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2945 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2946 instruct vsub32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2947 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2948 match(Set dst (SubVB src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2949 format %{ "vpsubb $dst,$src1,$src2\t! sub packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2950 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2951 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2952 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2953 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2954 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2955 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2956 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2957 instruct vsub32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2958 predicate(UseAVX > 1 && n->as_Vector()->length() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2959 match(Set dst (SubVB src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2960 format %{ "vpsubb $dst,$src,$mem\t! sub packed32B" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2961 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2962 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2963 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2964 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2965 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2966 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2967 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2968 // Shorts/Chars vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2969 instruct vsub2S(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2970 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2971 match(Set dst (SubVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2972 format %{ "psubw $dst,$src\t! sub packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2973 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2974 __ psubw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2975 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2976 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2977 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2978 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2979 instruct vsub2S_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2980 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2981 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2982 format %{ "vpsubw $dst,$src1,$src2\t! sub packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2983 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2984 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2985 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2986 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2987 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2988 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2989 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2990 instruct vsub4S(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2991 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2992 match(Set dst (SubVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2993 format %{ "psubw $dst,$src\t! sub packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2994 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2995 __ psubw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2996 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2997 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2998 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
2999 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3000 instruct vsub4S_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3001 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3002 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3003 format %{ "vpsubw $dst,$src1,$src2\t! sub packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3004 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3005 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3006 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3007 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3008 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3009 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3010 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3011 instruct vsub8S(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3012 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3013 match(Set dst (SubVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3014 format %{ "psubw $dst,$src\t! sub packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3015 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3016 __ psubw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3017 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3018 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3019 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3020 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3021 instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3022 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3023 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3024 format %{ "vpsubw $dst,$src1,$src2\t! sub packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3025 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3026 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3027 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3028 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3029 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3030 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3031 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3032 instruct vsub8S_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3033 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3034 match(Set dst (SubVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3035 format %{ "vpsubw $dst,$src,$mem\t! sub packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3036 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3037 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3038 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3039 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3040 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3041 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3042 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3043 instruct vsub16S_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3044 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3045 match(Set dst (SubVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3046 format %{ "vpsubw $dst,$src1,$src2\t! sub packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3047 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3048 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3049 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3050 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3051 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3052 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3053 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3054 instruct vsub16S_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3055 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3056 match(Set dst (SubVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3057 format %{ "vpsubw $dst,$src,$mem\t! sub packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3058 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3059 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3060 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3061 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3062 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3063 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3064 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3065 // Integers vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3066 instruct vsub2I(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3067 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3068 match(Set dst (SubVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3069 format %{ "psubd $dst,$src\t! sub packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3070 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3071 __ psubd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3072 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3073 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3074 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3075 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3076 instruct vsub2I_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3077 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3078 match(Set dst (SubVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3079 format %{ "vpsubd $dst,$src1,$src2\t! sub packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3080 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3081 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3082 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3083 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3084 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3085 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3086 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3087 instruct vsub4I(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3088 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3089 match(Set dst (SubVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3090 format %{ "psubd $dst,$src\t! sub packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3091 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3092 __ psubd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3093 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3094 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3095 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3096 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3097 instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3098 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3099 match(Set dst (SubVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3100 format %{ "vpsubd $dst,$src1,$src2\t! sub packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3101 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3102 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3103 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3104 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3105 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3106 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3107 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3108 instruct vsub4I_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3109 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3110 match(Set dst (SubVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3111 format %{ "vpsubd $dst,$src,$mem\t! sub packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3112 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3113 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3114 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3115 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3116 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3117 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3118 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3119 instruct vsub8I_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3120 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3121 match(Set dst (SubVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3122 format %{ "vpsubd $dst,$src1,$src2\t! sub packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3123 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3124 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3125 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3126 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3127 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3128 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3129 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3130 instruct vsub8I_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3131 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3132 match(Set dst (SubVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3133 format %{ "vpsubd $dst,$src,$mem\t! sub packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3134 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3135 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3136 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3137 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3138 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3139 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3140 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3141 // Longs vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3142 instruct vsub2L(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3143 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3144 match(Set dst (SubVL dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3145 format %{ "psubq $dst,$src\t! sub packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3146 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3147 __ psubq($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3148 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3149 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3150 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3151 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3152 instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3153 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3154 match(Set dst (SubVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3155 format %{ "vpsubq $dst,$src1,$src2\t! sub packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3156 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3157 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3158 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3159 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3160 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3161 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3162 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3163 instruct vsub2L_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3164 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3165 match(Set dst (SubVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3166 format %{ "vpsubq $dst,$src,$mem\t! sub packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3167 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3168 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3169 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3170 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3171 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3172 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3173 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3174 instruct vsub4L_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3175 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3176 match(Set dst (SubVL src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3177 format %{ "vpsubq $dst,$src1,$src2\t! sub packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3178 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3179 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3180 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3181 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3182 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3183 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3184 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3185 instruct vsub4L_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3186 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3187 match(Set dst (SubVL src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3188 format %{ "vpsubq $dst,$src,$mem\t! sub packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3189 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3190 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3191 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3192 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3193 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3194 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3195 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3196 // Floats vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3197 instruct vsub2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3198 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3199 match(Set dst (SubVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3200 format %{ "subps $dst,$src\t! sub packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3201 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3202 __ subps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3203 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3204 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3205 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3206 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3207 instruct vsub2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3208 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3209 match(Set dst (SubVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3210 format %{ "vsubps $dst,$src1,$src2\t! sub packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3211 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3212 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3213 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3214 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3215 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3216 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3217 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3218 instruct vsub4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3219 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3220 match(Set dst (SubVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3221 format %{ "subps $dst,$src\t! sub packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3222 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3223 __ subps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3224 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3225 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3226 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3227 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3228 instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3229 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3230 match(Set dst (SubVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3231 format %{ "vsubps $dst,$src1,$src2\t! sub packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3232 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3233 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3234 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3235 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3236 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3237 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3238 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3239 instruct vsub4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3240 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3241 match(Set dst (SubVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3242 format %{ "vsubps $dst,$src,$mem\t! sub packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3243 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3244 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3245 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3246 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3247 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3248 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3249 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3250 instruct vsub8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3251 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3252 match(Set dst (SubVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3253 format %{ "vsubps $dst,$src1,$src2\t! sub packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3254 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3255 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3256 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3257 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3258 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3259 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3260 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3261 instruct vsub8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3262 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3263 match(Set dst (SubVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3264 format %{ "vsubps $dst,$src,$mem\t! sub packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3265 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3266 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3267 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3268 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3269 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3270 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3271 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3272 // Doubles vector sub |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3273 instruct vsub2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3274 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3275 match(Set dst (SubVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3276 format %{ "subpd $dst,$src\t! sub packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3277 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3278 __ subpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3279 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3280 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3281 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3282 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3283 instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3284 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3285 match(Set dst (SubVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3286 format %{ "vsubpd $dst,$src1,$src2\t! sub packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3287 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3288 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3289 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3290 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3291 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3292 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3293 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3294 instruct vsub2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3295 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3296 match(Set dst (SubVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3297 format %{ "vsubpd $dst,$src,$mem\t! sub packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3298 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3299 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3300 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3301 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3302 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3303 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3304 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3305 instruct vsub4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3306 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3307 match(Set dst (SubVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3308 format %{ "vsubpd $dst,$src1,$src2\t! sub packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3309 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3310 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3311 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3312 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3313 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3314 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3315 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3316 instruct vsub4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3317 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3318 match(Set dst (SubVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3319 format %{ "vsubpd $dst,$src,$mem\t! sub packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3320 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3321 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3322 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3323 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3324 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3325 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3326 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3327 // --------------------------------- MUL -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3328 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3329 // Shorts/Chars vector mul |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3330 instruct vmul2S(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3331 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3332 match(Set dst (MulVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3333 format %{ "pmullw $dst,$src\t! mul packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3334 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3335 __ pmullw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3336 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3337 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3338 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3339 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3340 instruct vmul2S_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3341 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3342 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3343 format %{ "vpmullw $dst,$src1,$src2\t! mul packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3344 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3345 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3346 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3347 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3348 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3349 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3350 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3351 instruct vmul4S(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3352 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3353 match(Set dst (MulVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3354 format %{ "pmullw $dst,$src\t! mul packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3355 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3356 __ pmullw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3357 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3358 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3359 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3360 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3361 instruct vmul4S_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3362 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3363 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3364 format %{ "vpmullw $dst,$src1,$src2\t! mul packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3365 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3366 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3367 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3368 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3369 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3370 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3371 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3372 instruct vmul8S(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3373 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3374 match(Set dst (MulVS dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3375 format %{ "pmullw $dst,$src\t! mul packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3376 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3377 __ pmullw($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3378 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3379 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3380 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3381 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3382 instruct vmul8S_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3383 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3384 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3385 format %{ "vpmullw $dst,$src1,$src2\t! mul packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3386 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3387 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3388 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3389 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3390 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3391 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3392 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3393 instruct vmul8S_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3394 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3395 match(Set dst (MulVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3396 format %{ "vpmullw $dst,$src,$mem\t! mul packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3397 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3398 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3399 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3400 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3401 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3402 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3403 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3404 instruct vmul16S_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3405 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3406 match(Set dst (MulVS src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3407 format %{ "vpmullw $dst,$src1,$src2\t! mul packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3408 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3409 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3410 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3411 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3412 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3413 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3414 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3415 instruct vmul16S_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3416 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3417 match(Set dst (MulVS src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3418 format %{ "vpmullw $dst,$src,$mem\t! mul packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3419 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3420 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3421 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3422 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3423 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3424 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3425 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3426 // Integers vector mul (sse4_1) |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3427 instruct vmul2I(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3428 predicate(UseSSE > 3 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3429 match(Set dst (MulVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3430 format %{ "pmulld $dst,$src\t! mul packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3431 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3432 __ pmulld($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3433 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3434 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3435 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3436 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3437 instruct vmul2I_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3438 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3439 match(Set dst (MulVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3440 format %{ "vpmulld $dst,$src1,$src2\t! mul packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3441 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3442 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3443 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3444 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3445 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3446 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3447 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3448 instruct vmul4I(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3449 predicate(UseSSE > 3 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3450 match(Set dst (MulVI dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3451 format %{ "pmulld $dst,$src\t! mul packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3452 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3453 __ pmulld($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3454 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3455 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3456 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3457 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3458 instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3459 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3460 match(Set dst (MulVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3461 format %{ "vpmulld $dst,$src1,$src2\t! mul packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3462 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3463 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3464 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3465 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3466 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3467 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3468 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3469 instruct vmul4I_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3470 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3471 match(Set dst (MulVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3472 format %{ "vpmulld $dst,$src,$mem\t! mul packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3473 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3474 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3475 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3476 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3477 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3478 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3479 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3480 instruct vmul8I_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3481 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3482 match(Set dst (MulVI src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3483 format %{ "vpmulld $dst,$src1,$src2\t! mul packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3484 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3485 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3486 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3487 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3488 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3489 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3490 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3491 instruct vmul8I_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3492 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3493 match(Set dst (MulVI src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3494 format %{ "vpmulld $dst,$src,$mem\t! mul packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3495 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3496 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3497 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3498 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3499 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3500 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3501 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3502 // Floats vector mul |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3503 instruct vmul2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3504 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3505 match(Set dst (MulVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3506 format %{ "mulps $dst,$src\t! mul packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3507 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3508 __ mulps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3509 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3510 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3511 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3512 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3513 instruct vmul2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3514 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3515 match(Set dst (MulVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3516 format %{ "vmulps $dst,$src1,$src2\t! mul packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3517 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3518 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3519 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3520 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3521 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3522 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3523 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3524 instruct vmul4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3525 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3526 match(Set dst (MulVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3527 format %{ "mulps $dst,$src\t! mul packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3528 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3529 __ mulps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3530 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3531 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3532 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3533 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3534 instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3535 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3536 match(Set dst (MulVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3537 format %{ "vmulps $dst,$src1,$src2\t! mul packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3538 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3539 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3540 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3541 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3542 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3543 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3544 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3545 instruct vmul4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3546 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3547 match(Set dst (MulVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3548 format %{ "vmulps $dst,$src,$mem\t! mul packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3549 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3550 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3551 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3552 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3553 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3554 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3555 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3556 instruct vmul8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3557 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3558 match(Set dst (MulVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3559 format %{ "vmulps $dst,$src1,$src2\t! mul packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3560 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3561 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3562 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3563 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3564 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3565 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3566 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3567 instruct vmul8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3568 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3569 match(Set dst (MulVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3570 format %{ "vmulps $dst,$src,$mem\t! mul packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3571 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3572 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3573 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3574 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3575 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3576 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3577 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3578 // Doubles vector mul |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3579 instruct vmul2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3580 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3581 match(Set dst (MulVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3582 format %{ "mulpd $dst,$src\t! mul packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3583 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3584 __ mulpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3585 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3586 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3587 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3588 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3589 instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3590 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3591 match(Set dst (MulVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3592 format %{ "vmulpd $dst,$src1,$src2\t! mul packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3593 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3594 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3595 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3596 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3597 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3598 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3599 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3600 instruct vmul2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3601 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3602 match(Set dst (MulVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3603 format %{ "vmulpd $dst,$src,$mem\t! mul packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3604 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3605 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3606 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3607 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3608 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3609 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3610 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3611 instruct vmul4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3612 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3613 match(Set dst (MulVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3614 format %{ "vmulpd $dst,$src1,$src2\t! mul packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3615 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3616 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3617 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3618 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3619 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3620 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3621 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3622 instruct vmul4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3623 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3624 match(Set dst (MulVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3625 format %{ "vmulpd $dst,$src,$mem\t! mul packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3626 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3627 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3628 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3629 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3630 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3631 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3632 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3633 // --------------------------------- DIV -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3634 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3635 // Floats vector div |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3636 instruct vdiv2F(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3637 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3638 match(Set dst (DivVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3639 format %{ "divps $dst,$src\t! div packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3640 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3641 __ divps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3642 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3643 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3644 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3645 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3646 instruct vdiv2F_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3647 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3648 match(Set dst (DivVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3649 format %{ "vdivps $dst,$src1,$src2\t! div packed2F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3650 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3651 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3652 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3653 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3654 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3655 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3656 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3657 instruct vdiv4F(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3658 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3659 match(Set dst (DivVF dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3660 format %{ "divps $dst,$src\t! div packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3661 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3662 __ divps($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3663 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3664 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3665 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3666 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3667 instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3668 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3669 match(Set dst (DivVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3670 format %{ "vdivps $dst,$src1,$src2\t! div packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3671 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3672 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3673 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3674 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3675 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3676 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3677 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3678 instruct vdiv4F_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3679 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3680 match(Set dst (DivVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3681 format %{ "vdivps $dst,$src,$mem\t! div packed4F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3682 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3683 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3684 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3685 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3686 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3687 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3688 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3689 instruct vdiv8F_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3690 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3691 match(Set dst (DivVF src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3692 format %{ "vdivps $dst,$src1,$src2\t! div packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3693 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3694 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3695 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3696 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3697 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3698 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3699 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3700 instruct vdiv8F_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3701 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3702 match(Set dst (DivVF src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3703 format %{ "vdivps $dst,$src,$mem\t! div packed8F" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3704 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3705 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3706 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3707 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3708 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3709 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3710 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3711 // Doubles vector div |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3712 instruct vdiv2D(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3713 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3714 match(Set dst (DivVD dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3715 format %{ "divpd $dst,$src\t! div packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3716 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3717 __ divpd($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3718 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3719 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3720 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3721 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3722 instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3723 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3724 match(Set dst (DivVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3725 format %{ "vdivpd $dst,$src1,$src2\t! div packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3726 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3727 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3728 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3729 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3730 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3731 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3732 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3733 instruct vdiv2D_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3734 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3735 match(Set dst (DivVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3736 format %{ "vdivpd $dst,$src,$mem\t! div packed2D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3737 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3738 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3739 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3740 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3741 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3742 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3743 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3744 instruct vdiv4D_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3745 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3746 match(Set dst (DivVD src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3747 format %{ "vdivpd $dst,$src1,$src2\t! div packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3748 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3749 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3750 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3751 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3752 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3753 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3754 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3755 instruct vdiv4D_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3756 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3757 match(Set dst (DivVD src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3758 format %{ "vdivpd $dst,$src,$mem\t! div packed4D" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3759 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3760 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3761 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3762 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3763 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3764 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3765 |
6823 | 3766 // ------------------------------ Shift --------------------------------------- |
3767 | |
3768 // Left and right shift count vectors are the same on x86 | |
3769 // (only lowest bits of xmm reg are used for count). | |
3770 instruct vshiftcnt(vecS dst, rRegI cnt) %{ | |
3771 match(Set dst (LShiftCntV cnt)); | |
3772 match(Set dst (RShiftCntV cnt)); | |
3773 format %{ "movd $dst,$cnt\t! load shift count" %} | |
3774 ins_encode %{ | |
3775 __ movdl($dst$$XMMRegister, $cnt$$Register); | |
3776 %} | |
3777 ins_pipe( pipe_slow ); | |
3778 %} | |
3779 | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3780 // ------------------------------ LeftShift ----------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3781 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3782 // Shorts/Chars vector left shift |
6823 | 3783 instruct vsll2S(vecS dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3784 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3785 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3786 format %{ "psllw $dst,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3787 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3788 __ psllw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3789 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3790 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3791 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3792 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3793 instruct vsll2S_imm(vecS dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3794 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3795 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3796 format %{ "psllw $dst,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3797 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3798 __ psllw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3799 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3800 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3801 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3802 |
6823 | 3803 instruct vsll2S_reg(vecS dst, vecS src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3804 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3805 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3806 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3807 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3808 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3809 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3810 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3811 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3812 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3813 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3814 instruct vsll2S_reg_imm(vecS dst, vecS src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3815 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3816 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3817 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3818 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3819 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3820 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3821 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3822 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3823 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3824 |
6823 | 3825 instruct vsll4S(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3826 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3827 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3828 format %{ "psllw $dst,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3829 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3830 __ psllw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3831 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3832 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3833 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3834 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3835 instruct vsll4S_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3836 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3837 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3838 format %{ "psllw $dst,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3839 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3840 __ psllw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3841 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3842 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3843 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3844 |
6823 | 3845 instruct vsll4S_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3846 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3847 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3848 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3849 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3850 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3851 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3852 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3853 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3854 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3855 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3856 instruct vsll4S_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3857 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3858 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3859 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3860 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3861 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3862 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3863 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3864 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3865 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3866 |
6823 | 3867 instruct vsll8S(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3868 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3869 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3870 format %{ "psllw $dst,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3871 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3872 __ psllw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3873 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3874 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3875 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3876 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3877 instruct vsll8S_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3878 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3879 match(Set dst (LShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3880 format %{ "psllw $dst,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3881 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3882 __ psllw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3883 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3884 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3885 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3886 |
6823 | 3887 instruct vsll8S_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3888 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3889 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3890 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3891 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3892 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3893 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3894 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3895 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3896 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3897 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3898 instruct vsll8S_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3899 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3900 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3901 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3902 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3903 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3904 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3905 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3906 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3907 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3908 |
6823 | 3909 instruct vsll16S_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3910 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3911 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3912 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3913 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3914 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3915 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3916 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3917 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3918 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3919 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3920 instruct vsll16S_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3921 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3922 match(Set dst (LShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3923 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3924 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3925 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3926 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3927 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3928 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3929 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3930 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3931 // Integers vector left shift |
6823 | 3932 instruct vsll2I(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3933 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3934 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3935 format %{ "pslld $dst,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3936 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3937 __ pslld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3938 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3939 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3940 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3941 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3942 instruct vsll2I_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3943 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3944 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3945 format %{ "pslld $dst,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3946 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3947 __ pslld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3948 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3949 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3950 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3951 |
6823 | 3952 instruct vsll2I_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3953 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3954 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3955 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3956 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3957 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3958 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3959 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3960 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3961 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3962 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3963 instruct vsll2I_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3964 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3965 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3966 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3967 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3968 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3969 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3970 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3971 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3972 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3973 |
6823 | 3974 instruct vsll4I(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3975 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3976 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3977 format %{ "pslld $dst,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3978 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3979 __ pslld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3980 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3981 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3982 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3983 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3984 instruct vsll4I_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3985 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3986 match(Set dst (LShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3987 format %{ "pslld $dst,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3988 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3989 __ pslld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3990 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3991 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3992 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3993 |
6823 | 3994 instruct vsll4I_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3995 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3996 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3997 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3998 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
3999 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4000 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4001 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4002 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4003 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4004 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4005 instruct vsll4I_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4006 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4007 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4008 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4009 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4010 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4011 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4012 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4013 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4014 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4015 |
6823 | 4016 instruct vsll8I_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4017 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4018 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4019 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4020 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4021 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4022 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4023 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4024 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4025 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4026 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4027 instruct vsll8I_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4028 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4029 match(Set dst (LShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4030 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4031 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4032 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4033 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4034 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4035 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4036 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4037 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4038 // Longs vector left shift |
6823 | 4039 instruct vsll2L(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4040 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4041 match(Set dst (LShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4042 format %{ "psllq $dst,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4043 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4044 __ psllq($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4045 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4046 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4047 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4048 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4049 instruct vsll2L_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4050 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4051 match(Set dst (LShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4052 format %{ "psllq $dst,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4053 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4054 __ psllq($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4055 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4056 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4057 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4058 |
6823 | 4059 instruct vsll2L_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4060 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4061 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4062 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4063 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4064 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4065 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4066 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4067 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4068 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4069 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4070 instruct vsll2L_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4071 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4072 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4073 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4074 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4075 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4076 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4077 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4078 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4079 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4080 |
6823 | 4081 instruct vsll4L_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4082 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4083 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4084 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4085 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4086 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4087 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4088 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4089 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4090 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4091 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4092 instruct vsll4L_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4093 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4094 match(Set dst (LShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4095 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4096 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4097 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4098 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4099 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4100 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4101 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4102 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4103 // ----------------------- LogicalRightShift ----------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4104 |
6893
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4105 // Shorts vector logical right shift produces incorrect Java result |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4106 // for negative data because java code convert short value into int with |
6893
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4107 // sign extension before a shift. But char vectors are fine since chars are |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4108 // unsigned values. |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4109 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4110 instruct vsrl2S(vecS dst, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4111 predicate(n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4112 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4113 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4114 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4115 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4116 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4117 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4118 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4119 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4120 instruct vsrl2S_imm(vecS dst, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4121 predicate(n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4122 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4123 format %{ "psrlw $dst,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4124 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4125 __ psrlw($dst$$XMMRegister, (int)$shift$$constant); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4126 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4127 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4128 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4129 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4130 instruct vsrl2S_reg(vecS dst, vecS src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4131 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4132 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4133 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4134 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4135 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4136 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4137 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4138 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4139 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4140 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4141 instruct vsrl2S_reg_imm(vecS dst, vecS src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4142 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4143 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4144 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed2S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4145 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4146 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4147 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4148 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4149 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4150 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4151 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4152 instruct vsrl4S(vecD dst, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4153 predicate(n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4154 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4155 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4156 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4157 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4158 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4159 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4160 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4161 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4162 instruct vsrl4S_imm(vecD dst, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4163 predicate(n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4164 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4165 format %{ "psrlw $dst,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4166 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4167 __ psrlw($dst$$XMMRegister, (int)$shift$$constant); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4168 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4169 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4170 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4171 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4172 instruct vsrl4S_reg(vecD dst, vecD src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4173 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4174 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4175 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4176 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4177 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4178 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4179 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4180 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4181 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4182 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4183 instruct vsrl4S_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4184 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4185 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4186 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed4S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4187 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4188 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4189 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4190 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4191 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4192 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4193 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4194 instruct vsrl8S(vecX dst, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4195 predicate(n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4196 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4197 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4198 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4199 __ psrlw($dst$$XMMRegister, $shift$$XMMRegister); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4200 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4201 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4202 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4203 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4204 instruct vsrl8S_imm(vecX dst, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4205 predicate(n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4206 match(Set dst (URShiftVS dst shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4207 format %{ "psrlw $dst,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4208 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4209 __ psrlw($dst$$XMMRegister, (int)$shift$$constant); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4210 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4211 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4212 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4213 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4214 instruct vsrl8S_reg(vecX dst, vecX src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4215 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4216 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4217 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4218 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4219 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4220 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4221 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4222 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4223 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4224 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4225 instruct vsrl8S_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4226 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4227 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4228 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed8S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4229 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4230 bool vector256 = false; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4231 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4232 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4233 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4234 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4235 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4236 instruct vsrl16S_reg(vecY dst, vecY src, vecS shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4237 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4238 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4239 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4240 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4241 bool vector256 = true; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4242 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4243 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4244 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4245 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4246 |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4247 instruct vsrl16S_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4248 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4249 match(Set dst (URShiftVS src shift)); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4250 format %{ "vpsrlw $dst,$src,$shift\t! logical right shift packed16S" %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4251 ins_encode %{ |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4252 bool vector256 = true; |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4253 __ vpsrlw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4254 %} |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4255 ins_pipe( pipe_slow ); |
b2c669fd8114
8001183: incorrect results of char vectors right shift operaiton
kvn
parents:
6823
diff
changeset
|
4256 %} |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4257 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4258 // Integers vector logical right shift |
6823 | 4259 instruct vsrl2I(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4260 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4261 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4262 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4263 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4264 __ psrld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4265 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4266 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4267 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4268 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4269 instruct vsrl2I_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4270 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4271 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4272 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4273 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4274 __ psrld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4275 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4276 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4277 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4278 |
6823 | 4279 instruct vsrl2I_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4280 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4281 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4282 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4283 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4284 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4285 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4286 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4287 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4288 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4289 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4290 instruct vsrl2I_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4291 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4292 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4293 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4294 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4295 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4296 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4297 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4298 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4299 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4300 |
6823 | 4301 instruct vsrl4I(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4302 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4303 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4304 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4305 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4306 __ psrld($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4307 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4308 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4309 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4310 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4311 instruct vsrl4I_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4312 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4313 match(Set dst (URShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4314 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4315 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4316 __ psrld($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4317 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4318 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4319 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4320 |
6823 | 4321 instruct vsrl4I_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4322 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4323 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4324 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4325 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4326 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4327 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4328 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4329 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4330 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4331 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4332 instruct vsrl4I_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4333 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4334 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4335 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4336 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4337 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4338 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4339 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4340 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4341 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4342 |
6823 | 4343 instruct vsrl8I_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4344 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4345 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4346 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4347 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4348 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4349 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4350 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4351 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4352 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4353 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4354 instruct vsrl8I_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4355 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4356 match(Set dst (URShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4357 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4358 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4359 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4360 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4361 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4362 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4363 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4364 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4365 // Longs vector logical right shift |
6823 | 4366 instruct vsrl2L(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4367 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4368 match(Set dst (URShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4369 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4370 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4371 __ psrlq($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4372 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4373 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4374 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4375 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4376 instruct vsrl2L_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4377 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4378 match(Set dst (URShiftVL dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4379 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4380 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4381 __ psrlq($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4382 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4383 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4384 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4385 |
6823 | 4386 instruct vsrl2L_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4387 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4388 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4389 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4390 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4391 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4392 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4393 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4394 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4395 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4396 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4397 instruct vsrl2L_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4398 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4399 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4400 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4401 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4402 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4403 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4404 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4405 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4406 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4407 |
6823 | 4408 instruct vsrl4L_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4409 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4410 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4411 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4412 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4413 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4414 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4415 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4416 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4417 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4418 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4419 instruct vsrl4L_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4420 predicate(UseAVX > 1 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4421 match(Set dst (URShiftVL src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4422 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4423 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4424 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4425 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4426 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4427 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4428 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4429 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4430 // ------------------- ArithmeticRightShift ----------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4431 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4432 // Shorts/Chars vector arithmetic right shift |
6823 | 4433 instruct vsra2S(vecS dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4434 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4435 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4436 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4437 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4438 __ psraw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4439 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4440 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4441 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4442 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4443 instruct vsra2S_imm(vecS dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4444 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4445 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4446 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4447 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4448 __ psraw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4449 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4450 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4451 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4452 |
6823 | 4453 instruct vsra2S_reg(vecS dst, vecS src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4454 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4455 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4456 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4457 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4458 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4459 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4460 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4461 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4462 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4463 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4464 instruct vsra2S_reg_imm(vecS dst, vecS src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4465 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4466 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4467 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4468 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4469 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4470 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4471 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4472 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4473 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4474 |
6823 | 4475 instruct vsra4S(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4476 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4477 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4478 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4479 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4480 __ psraw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4481 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4482 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4483 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4484 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4485 instruct vsra4S_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4486 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4487 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4488 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4489 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4490 __ psraw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4491 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4492 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4493 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4494 |
6823 | 4495 instruct vsra4S_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4496 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4497 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4498 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4499 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4500 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4501 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4502 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4503 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4504 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4505 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4506 instruct vsra4S_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4507 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4508 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4509 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4510 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4511 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4512 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4513 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4514 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4515 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4516 |
6823 | 4517 instruct vsra8S(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4518 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4519 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4520 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4521 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4522 __ psraw($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4523 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4524 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4525 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4526 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4527 instruct vsra8S_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4528 predicate(n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4529 match(Set dst (RShiftVS dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4530 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4531 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4532 __ psraw($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4533 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4534 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4535 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4536 |
6823 | 4537 instruct vsra8S_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4538 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4539 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4540 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4541 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4542 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4543 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4544 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4545 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4546 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4547 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4548 instruct vsra8S_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4549 predicate(UseAVX > 0 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4550 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4551 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4552 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4553 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4554 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4555 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4556 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4557 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4558 |
6823 | 4559 instruct vsra16S_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4560 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4561 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4562 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4563 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4564 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4565 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4566 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4567 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4568 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4569 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4570 instruct vsra16S_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4571 predicate(UseAVX > 1 && n->as_Vector()->length() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4572 match(Set dst (RShiftVS src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4573 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4574 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4575 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4576 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4577 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4578 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4579 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4580 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4581 // Integers vector arithmetic right shift |
6823 | 4582 instruct vsra2I(vecD dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4583 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4584 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4585 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4586 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4587 __ psrad($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4588 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4589 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4590 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4591 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4592 instruct vsra2I_imm(vecD dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4593 predicate(n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4594 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4595 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4596 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4597 __ psrad($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4598 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4599 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4600 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4601 |
6823 | 4602 instruct vsra2I_reg(vecD dst, vecD src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4603 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4604 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4605 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4606 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4607 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4608 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4609 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4610 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4611 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4612 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4613 instruct vsra2I_reg_imm(vecD dst, vecD src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4614 predicate(UseAVX > 0 && n->as_Vector()->length() == 2); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4615 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4616 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4617 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4618 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4619 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4620 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4621 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4622 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4623 |
6823 | 4624 instruct vsra4I(vecX dst, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4625 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4626 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4627 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4628 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4629 __ psrad($dst$$XMMRegister, $shift$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4630 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4631 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4632 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4633 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4634 instruct vsra4I_imm(vecX dst, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4635 predicate(n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4636 match(Set dst (RShiftVI dst shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4637 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4638 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4639 __ psrad($dst$$XMMRegister, (int)$shift$$constant); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4640 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4641 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4642 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4643 |
6823 | 4644 instruct vsra4I_reg(vecX dst, vecX src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4645 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4646 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4647 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4648 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4649 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4650 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4651 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4652 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4653 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4654 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4655 instruct vsra4I_reg_imm(vecX dst, vecX src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4656 predicate(UseAVX > 0 && n->as_Vector()->length() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4657 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4658 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4659 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4660 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4661 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4662 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4663 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4664 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4665 |
6823 | 4666 instruct vsra8I_reg(vecY dst, vecY src, vecS shift) %{ |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4667 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4668 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4669 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4670 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4671 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4672 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4673 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4674 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4675 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4676 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4677 instruct vsra8I_reg_imm(vecY dst, vecY src, immI8 shift) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4678 predicate(UseAVX > 1 && n->as_Vector()->length() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4679 match(Set dst (RShiftVI src shift)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4680 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4681 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4682 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4683 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4684 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4685 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4686 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4687 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4688 // There are no longs vector arithmetic right shift instructions. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4689 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4690 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4691 // --------------------------------- AND -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4692 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4693 instruct vand4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4694 predicate(n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4695 match(Set dst (AndV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4696 format %{ "pand $dst,$src\t! and vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4697 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4698 __ pand($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4699 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4700 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4701 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4702 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4703 instruct vand4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4704 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4705 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4706 format %{ "vpand $dst,$src1,$src2\t! and vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4707 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4708 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4709 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4710 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4711 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4712 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4713 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4714 instruct vand8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4715 predicate(n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4716 match(Set dst (AndV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4717 format %{ "pand $dst,$src\t! and vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4718 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4719 __ pand($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4720 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4721 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4722 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4723 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4724 instruct vand8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4725 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4726 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4727 format %{ "vpand $dst,$src1,$src2\t! and vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4728 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4729 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4730 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4731 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4732 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4733 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4734 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4735 instruct vand16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4736 predicate(n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4737 match(Set dst (AndV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4738 format %{ "pand $dst,$src\t! and vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4739 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4740 __ pand($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4741 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4742 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4743 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4744 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4745 instruct vand16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4746 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4747 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4748 format %{ "vpand $dst,$src1,$src2\t! and vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4749 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4750 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4751 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4752 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4753 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4754 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4755 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4756 instruct vand16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4757 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4758 match(Set dst (AndV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4759 format %{ "vpand $dst,$src,$mem\t! and vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4760 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4761 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4762 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4763 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4764 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4765 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4766 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4767 instruct vand32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4768 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4769 match(Set dst (AndV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4770 format %{ "vpand $dst,$src1,$src2\t! and vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4771 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4772 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4773 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4774 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4775 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4776 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4777 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4778 instruct vand32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4779 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4780 match(Set dst (AndV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4781 format %{ "vpand $dst,$src,$mem\t! and vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4782 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4783 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4784 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4785 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4786 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4787 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4788 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4789 // --------------------------------- OR --------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4790 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4791 instruct vor4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4792 predicate(n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4793 match(Set dst (OrV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4794 format %{ "por $dst,$src\t! or vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4795 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4796 __ por($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4797 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4798 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4799 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4800 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4801 instruct vor4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4802 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4803 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4804 format %{ "vpor $dst,$src1,$src2\t! or vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4805 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4806 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4807 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4808 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4809 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4810 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4811 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4812 instruct vor8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4813 predicate(n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4814 match(Set dst (OrV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4815 format %{ "por $dst,$src\t! or vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4816 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4817 __ por($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4818 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4819 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4820 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4821 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4822 instruct vor8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4823 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4824 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4825 format %{ "vpor $dst,$src1,$src2\t! or vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4826 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4827 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4828 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4829 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4830 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4831 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4832 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4833 instruct vor16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4834 predicate(n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4835 match(Set dst (OrV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4836 format %{ "por $dst,$src\t! or vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4837 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4838 __ por($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4839 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4840 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4841 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4842 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4843 instruct vor16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4844 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4845 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4846 format %{ "vpor $dst,$src1,$src2\t! or vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4847 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4848 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4849 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4850 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4851 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4852 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4853 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4854 instruct vor16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4855 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4856 match(Set dst (OrV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4857 format %{ "vpor $dst,$src,$mem\t! or vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4858 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4859 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4860 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4861 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4862 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4863 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4864 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4865 instruct vor32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4866 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4867 match(Set dst (OrV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4868 format %{ "vpor $dst,$src1,$src2\t! or vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4869 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4870 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4871 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4872 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4873 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4874 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4875 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4876 instruct vor32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4877 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4878 match(Set dst (OrV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4879 format %{ "vpor $dst,$src,$mem\t! or vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4880 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4881 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4882 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4883 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4884 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4885 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4886 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4887 // --------------------------------- XOR -------------------------------------- |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4888 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4889 instruct vxor4B(vecS dst, vecS src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4890 predicate(n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4891 match(Set dst (XorV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4892 format %{ "pxor $dst,$src\t! xor vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4893 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4894 __ pxor($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4895 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4896 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4897 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4898 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4899 instruct vxor4B_reg(vecS dst, vecS src1, vecS src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4900 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4901 match(Set dst (XorV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4902 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (4 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4903 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4904 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4905 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4906 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4907 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4908 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4909 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4910 instruct vxor8B(vecD dst, vecD src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4911 predicate(n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4912 match(Set dst (XorV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4913 format %{ "pxor $dst,$src\t! xor vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4914 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4915 __ pxor($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4916 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4917 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4918 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4919 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4920 instruct vxor8B_reg(vecD dst, vecD src1, vecD src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4921 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4922 match(Set dst (XorV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4923 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (8 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4924 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4925 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4926 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4927 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4928 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4929 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4930 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4931 instruct vxor16B(vecX dst, vecX src) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4932 predicate(n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4933 match(Set dst (XorV dst src)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4934 format %{ "pxor $dst,$src\t! xor vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4935 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4936 __ pxor($dst$$XMMRegister, $src$$XMMRegister); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4937 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4938 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4939 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4940 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4941 instruct vxor16B_reg(vecX dst, vecX src1, vecX src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4942 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4943 match(Set dst (XorV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4944 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4945 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4946 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4947 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4948 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4949 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4950 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4951 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4952 instruct vxor16B_mem(vecX dst, vecX src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4953 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4954 match(Set dst (XorV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4955 format %{ "vpxor $dst,$src,$mem\t! xor vectors (16 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4956 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4957 bool vector256 = false; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4958 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4959 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4960 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4961 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4962 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4963 instruct vxor32B_reg(vecY dst, vecY src1, vecY src2) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4964 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4965 match(Set dst (XorV src1 src2)); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4966 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4967 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4968 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4969 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4970 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4971 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4972 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4973 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4974 instruct vxor32B_mem(vecY dst, vecY src, memory mem) %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4975 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4976 match(Set dst (XorV src (LoadVector mem))); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4977 format %{ "vpxor $dst,$src,$mem\t! xor vectors (32 bytes)" %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4978 ins_encode %{ |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4979 bool vector256 = true; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4980 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4981 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4982 ins_pipe( pipe_slow ); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4983 %} |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6225
diff
changeset
|
4984 |