Mercurial > hg > truffle
annotate src/share/vm/opto/machnode.cpp @ 12316:190899198332
7195622: CheckUnhandledOops has limited usefulness now
Summary: Enable CHECK_UNHANDLED_OOPS in fastdebug builds across all supported platforms.
Reviewed-by: coleenp, hseigel, dholmes, stefank, twisti, ihse, rdurbin
Contributed-by: lois.foltan@oracle.com
| author | hseigel |
|---|---|
| date | Thu, 26 Sep 2013 10:25:02 -0400 |
| parents | 70120f47d403 |
| children | 044b28168e20 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "gc_interface/collectedHeap.hpp" | |
| 27 #include "opto/machnode.hpp" | |
| 28 #include "opto/regalloc.hpp" | |
| 0 | 29 |
| 30 //============================================================================= | |
| 31 // Return the value requested | |
| 32 // result register lookup, corresponding to int_format | |
| 33 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const { | |
| 34 return (int)ra_->get_encode(node); | |
| 35 } | |
| 36 // input register lookup, corresponding to ext_format | |
| 37 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
| 38 return (int)(ra_->get_encode(node->in(idx))); | |
| 39 } | |
| 40 intptr_t MachOper::constant() const { return 0x00; } | |
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41 relocInfo::relocType MachOper::constant_reloc() const { return relocInfo::none; } |
| 0 | 42 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; } |
| 43 jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; } | |
| 44 jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; } | |
| 45 TypeOopPtr *MachOper::oop() const { return NULL; } | |
| 46 int MachOper::ccode() const { return 0x00; } | |
| 47 // A zero, default, indicates this value is not needed. | |
| 48 // May need to lookup the base register, as done in int_ and ext_format | |
| 49 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 50 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 51 int MachOper::scale() const { return 0x00; } | |
| 52 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } | |
| 53 int MachOper::constant_disp() const { return 0; } | |
| 54 int MachOper::base_position() const { return -1; } // no base input | |
| 55 int MachOper::index_position() const { return -1; } // no index input | |
| 56 // Check for PC-Relative displacement | |
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57 relocInfo::relocType MachOper::disp_reloc() const { return relocInfo::none; } |
| 0 | 58 // Return the label |
| 59 Label* MachOper::label() const { ShouldNotReachHere(); return 0; } | |
| 60 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; } | |
| 61 | |
| 62 | |
| 63 //------------------------------negate----------------------------------------- | |
| 64 // Negate conditional branches. Error for non-branch operands | |
| 65 void MachOper::negate() { | |
| 66 ShouldNotCallThis(); | |
| 67 } | |
| 68 | |
| 69 //-----------------------------type-------------------------------------------- | |
| 70 const Type *MachOper::type() const { | |
| 71 return Type::BOTTOM; | |
| 72 } | |
| 73 | |
| 74 //------------------------------in_RegMask------------------------------------- | |
| 75 const RegMask *MachOper::in_RegMask(int index) const { | |
| 76 ShouldNotReachHere(); | |
| 77 return NULL; | |
| 78 } | |
| 79 | |
| 80 //------------------------------dump_spec-------------------------------------- | |
| 81 // Print any per-operand special info | |
| 82 #ifndef PRODUCT | |
| 83 void MachOper::dump_spec(outputStream *st) const { } | |
| 84 #endif | |
| 85 | |
| 86 //------------------------------hash------------------------------------------- | |
| 87 // Print any per-operand special info | |
| 88 uint MachOper::hash() const { | |
| 89 ShouldNotCallThis(); | |
| 90 return 5; | |
| 91 } | |
| 92 | |
| 93 //------------------------------cmp-------------------------------------------- | |
| 94 // Print any per-operand special info | |
| 95 uint MachOper::cmp( const MachOper &oper ) const { | |
| 96 ShouldNotCallThis(); | |
| 97 return opcode() == oper.opcode(); | |
| 98 } | |
| 99 | |
| 100 //------------------------------hash------------------------------------------- | |
| 101 // Print any per-operand special info | |
| 102 uint labelOper::hash() const { | |
| 103 return _block_num; | |
| 104 } | |
| 105 | |
| 106 //------------------------------cmp-------------------------------------------- | |
| 107 // Print any per-operand special info | |
| 108 uint labelOper::cmp( const MachOper &oper ) const { | |
| 109 return (opcode() == oper.opcode()) && (_label == oper.label()); | |
| 110 } | |
| 111 | |
| 112 //------------------------------hash------------------------------------------- | |
| 113 // Print any per-operand special info | |
| 114 uint methodOper::hash() const { | |
| 115 return (uint)_method; | |
| 116 } | |
| 117 | |
| 118 //------------------------------cmp-------------------------------------------- | |
| 119 // Print any per-operand special info | |
| 120 uint methodOper::cmp( const MachOper &oper ) const { | |
| 121 return (opcode() == oper.opcode()) && (_method == oper.method()); | |
| 122 } | |
| 123 | |
| 124 | |
| 125 //============================================================================= | |
| 126 //------------------------------MachNode--------------------------------------- | |
| 127 | |
| 128 //------------------------------emit------------------------------------------- | |
| 129 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
| 130 #ifdef ASSERT | |
| 131 tty->print("missing MachNode emit function: "); | |
| 132 dump(); | |
| 133 #endif | |
| 134 ShouldNotCallThis(); | |
| 135 } | |
| 136 | |
| 137 //------------------------------size------------------------------------------- | |
| 138 // Size of instruction in bytes | |
| 139 uint MachNode::size(PhaseRegAlloc *ra_) const { | |
| 140 // If a virtual was not defined for this specific instruction, | |
| 605 | 141 // Call the helper which finds the size by emitting the bits. |
| 0 | 142 return MachNode::emit_size(ra_); |
| 143 } | |
| 144 | |
| 145 //------------------------------size------------------------------------------- | |
| 146 // Helper function that computes size by emitting code | |
| 147 uint MachNode::emit_size(PhaseRegAlloc *ra_) const { | |
| 148 // Emit into a trash buffer and count bytes emitted. | |
| 149 assert(ra_ == ra_->C->regalloc(), "sanity"); | |
| 150 return ra_->C->scratch_emit_size(this); | |
| 151 } | |
| 152 | |
| 153 | |
| 154 | |
| 155 //------------------------------hash------------------------------------------- | |
| 156 uint MachNode::hash() const { | |
| 157 uint no = num_opnds(); | |
| 158 uint sum = rule(); | |
| 159 for( uint i=0; i<no; i++ ) | |
| 160 sum += _opnds[i]->hash(); | |
| 161 return sum+Node::hash(); | |
| 162 } | |
| 163 | |
| 164 //-----------------------------cmp--------------------------------------------- | |
| 165 uint MachNode::cmp( const Node &node ) const { | |
| 166 MachNode& n = *((Node&)node).as_Mach(); | |
| 167 uint no = num_opnds(); | |
| 168 if( no != n.num_opnds() ) return 0; | |
| 169 if( rule() != n.rule() ) return 0; | |
| 170 for( uint i=0; i<no; i++ ) // All operands must match | |
| 171 if( !_opnds[i]->cmp( *n._opnds[i] ) ) | |
| 172 return 0; // mis-matched operands | |
| 173 return 1; // match | |
| 174 } | |
| 175 | |
| 176 // Return an equivalent instruction using memory for cisc_operand position | |
| 177 MachNode *MachNode::cisc_version(int offset, Compile* C) { | |
| 178 ShouldNotCallThis(); | |
| 179 return NULL; | |
| 180 } | |
| 181 | |
| 182 void MachNode::use_cisc_RegMask() { | |
| 183 ShouldNotReachHere(); | |
| 184 } | |
| 185 | |
| 186 | |
| 187 //-----------------------------in_RegMask-------------------------------------- | |
| 188 const RegMask &MachNode::in_RegMask( uint idx ) const { | |
| 189 uint numopnds = num_opnds(); // Virtual call for number of operands | |
| 190 uint skipped = oper_input_base(); // Sum of leaves skipped so far | |
| 191 if( idx < skipped ) { | |
| 192 assert( ideal_Opcode() == Op_AddP, "expected base ptr here" ); | |
| 193 assert( idx == 1, "expected base ptr here" ); | |
| 194 // debug info can be anywhere | |
| 195 return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP]; | |
| 196 } | |
| 197 uint opcnt = 1; // First operand | |
| 198 uint num_edges = _opnds[1]->num_edges(); // leaves for first operand | |
| 199 while( idx >= skipped+num_edges ) { | |
| 200 skipped += num_edges; | |
| 201 opcnt++; // Bump operand count | |
| 202 assert( opcnt < numopnds, "Accessing non-existent operand" ); | |
| 203 num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand | |
| 204 } | |
| 205 | |
| 206 const RegMask *rm = cisc_RegMask(); | |
| 207 if( rm == NULL || (int)opcnt != cisc_operand() ) { | |
| 208 rm = _opnds[opcnt]->in_RegMask(idx-skipped); | |
| 209 } | |
| 210 return *rm; | |
| 211 } | |
| 212 | |
| 213 //-----------------------------memory_inputs-------------------------------- | |
| 214 const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const { | |
| 215 const MachOper* oper = memory_operand(); | |
| 216 | |
| 217 if (oper == (MachOper*)-1) { | |
| 218 base = NodeSentinel; | |
| 219 index = NodeSentinel; | |
| 220 } else { | |
| 221 base = NULL; | |
| 222 index = NULL; | |
| 223 if (oper != NULL) { | |
| 224 // It has a unique memory operand. Find its index. | |
| 225 int oper_idx = num_opnds(); | |
| 226 while (--oper_idx >= 0) { | |
| 227 if (_opnds[oper_idx] == oper) break; | |
| 228 } | |
| 229 int oper_pos = operand_index(oper_idx); | |
| 230 int base_pos = oper->base_position(); | |
| 231 if (base_pos >= 0) { | |
| 232 base = _in[oper_pos+base_pos]; | |
| 233 } | |
| 234 int index_pos = oper->index_position(); | |
| 235 if (index_pos >= 0) { | |
| 236 index = _in[oper_pos+index_pos]; | |
| 237 } | |
| 238 } | |
| 239 } | |
| 240 | |
| 241 return oper; | |
| 242 } | |
| 243 | |
| 244 //-----------------------------get_base_and_disp---------------------------- | |
| 245 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const { | |
| 246 | |
| 247 // Find the memory inputs using our helper function | |
| 248 Node* base; | |
| 249 Node* index; | |
| 250 const MachOper* oper = memory_inputs(base, index); | |
| 251 | |
| 252 if (oper == NULL) { | |
| 253 // Base has been set to NULL | |
| 254 offset = 0; | |
| 255 } else if (oper == (MachOper*)-1) { | |
| 256 // Base has been set to NodeSentinel | |
| 257 // There is not a unique memory use here. We will fall to AliasIdxBot. | |
| 258 offset = Type::OffsetBot; | |
| 259 } else { | |
| 260 // Base may be NULL, even if offset turns out to be != 0 | |
| 261 | |
| 262 intptr_t disp = oper->constant_disp(); | |
| 263 int scale = oper->scale(); | |
| 264 // Now we have collected every part of the ADLC MEMORY_INTER. | |
| 265 // See if it adds up to a base + offset. | |
| 266 if (index != NULL) { | |
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267 const Type* t_index = index->bottom_type(); |
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268 if (t_index->isa_narrowoop() || t_index->isa_narrowklass()) { // EncodeN, LoadN, LoadConN, LoadNKlass, |
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269 // EncodeNKlass, LoadConNklass. |
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270 // Memory references through narrow oops have a |
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271 // funny base so grab the type from the index: |
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272 // [R12 + narrow_oop_reg<<3 + offset] |
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273 assert(base == NULL, "Memory references through narrow oops have no base"); |
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274 offset = disp; |
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275 adr_type = t_index->make_ptr()->add_offset(offset); |
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276 return NULL; |
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277 } else if (!index->is_Con()) { |
| 0 | 278 disp = Type::OffsetBot; |
| 279 } else if (disp != Type::OffsetBot) { | |
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280 const TypeX* ti = t_index->isa_intptr_t(); |
| 0 | 281 if (ti == NULL) { |
| 282 disp = Type::OffsetBot; // a random constant?? | |
| 283 } else { | |
| 284 disp += ti->get_con() << scale; | |
| 285 } | |
| 286 } | |
| 287 } | |
| 288 offset = disp; | |
| 289 | |
| 290 // In i486.ad, indOffset32X uses base==RegI and disp==RegP, | |
| 291 // this will prevent alias analysis without the following support: | |
| 292 // Lookup the TypePtr used by indOffset32X, a compile-time constant oop, | |
| 293 // Add the offset determined by the "base", or use Type::OffsetBot. | |
| 294 if( adr_type == TYPE_PTR_SENTINAL ) { | |
| 295 const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X | |
| 296 if (t_disp != NULL) { | |
| 297 offset = Type::OffsetBot; | |
| 298 const Type* t_base = base->bottom_type(); | |
| 299 if (t_base->isa_intptr_t()) { | |
| 300 const TypeX *t_offset = t_base->is_intptr_t(); | |
| 301 if( t_offset->is_con() ) { | |
| 302 offset = t_offset->get_con(); | |
| 303 } | |
| 304 } | |
| 305 adr_type = t_disp->add_offset(offset); | |
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306 } else if( base == NULL && offset != 0 && offset != Type::OffsetBot ) { |
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307 // Use ideal type if it is oop ptr. |
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308 const TypePtr *tp = oper->type()->isa_ptr(); |
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309 if( tp != NULL) { |
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310 adr_type = tp; |
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311 } |
| 0 | 312 } |
| 313 } | |
| 314 | |
| 315 } | |
| 316 return base; | |
| 317 } | |
| 318 | |
| 319 | |
| 320 //---------------------------------adr_type--------------------------------- | |
| 321 const class TypePtr *MachNode::adr_type() const { | |
| 322 intptr_t offset = 0; | |
| 323 const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type | |
| 324 const Node *base = get_base_and_disp(offset, adr_type); | |
| 325 if( adr_type != TYPE_PTR_SENTINAL ) { | |
| 326 return adr_type; // get_base_and_disp has the answer | |
| 327 } | |
| 328 | |
| 329 // Direct addressing modes have no base node, simply an indirect | |
| 330 // offset, which is always to raw memory. | |
| 331 // %%%%% Someday we'd like to allow constant oop offsets which | |
| 332 // would let Intel load from static globals in 1 instruction. | |
| 333 // Currently Intel requires 2 instructions and a register temp. | |
| 334 if (base == NULL) { | |
| 335 // NULL base, zero offset means no memory at all (a null pointer!) | |
| 336 if (offset == 0) { | |
| 337 return NULL; | |
| 338 } | |
| 339 // NULL base, any offset means any pointer whatever | |
| 340 if (offset == Type::OffsetBot) { | |
| 341 return TypePtr::BOTTOM; | |
| 342 } | |
| 343 // %%% make offset be intptr_t | |
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344 assert(!Universe::heap()->is_in_reserved(cast_to_oop(offset)), "must be a raw ptr"); |
| 0 | 345 return TypeRawPtr::BOTTOM; |
| 346 } | |
| 347 | |
| 348 // base of -1 with no particular offset means all of memory | |
| 349 if (base == NodeSentinel) return TypePtr::BOTTOM; | |
| 350 | |
| 351 const Type* t = base->bottom_type(); | |
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352 if (t->isa_narrowoop() && Universe::narrow_oop_shift() == 0) { |
| 673 | 353 // 32-bit unscaled narrow oop can be the base of any address expression |
| 354 t = t->make_ptr(); | |
| 355 } | |
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356 if (t->isa_narrowklass() && Universe::narrow_klass_shift() == 0) { |
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357 // 32-bit unscaled narrow oop can be the base of any address expression |
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358 t = t->make_ptr(); |
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359 } |
| 0 | 360 if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) { |
| 361 // We cannot assert that the offset does not look oop-ish here. | |
| 362 // Depending on the heap layout the cardmark base could land | |
| 363 // inside some oopish region. It definitely does for Win2K. | |
| 364 // The sum of cardmark-base plus shift-by-9-oop lands outside | |
| 365 // the oop-ish area but we can't assert for that statically. | |
| 366 return TypeRawPtr::BOTTOM; | |
| 367 } | |
| 368 | |
| 369 const TypePtr *tp = t->isa_ptr(); | |
| 370 | |
| 371 // be conservative if we do not recognize the type | |
| 372 if (tp == NULL) { | |
| 673 | 373 assert(false, "this path may produce not optimal code"); |
| 0 | 374 return TypePtr::BOTTOM; |
| 375 } | |
| 376 assert(tp->base() != Type::AnyPtr, "not a bare pointer"); | |
| 377 | |
| 378 return tp->add_offset(offset); | |
| 379 } | |
| 380 | |
| 381 | |
| 382 //-----------------------------operand_index--------------------------------- | |
| 383 int MachNode::operand_index( uint operand ) const { | |
| 384 if( operand < 1 ) return -1; | |
| 385 assert(operand < num_opnds(), "oob"); | |
| 386 if( _opnds[operand]->num_edges() == 0 ) return -1; | |
| 387 | |
| 388 uint skipped = oper_input_base(); // Sum of leaves skipped so far | |
| 389 for (uint opcnt = 1; opcnt < operand; opcnt++) { | |
| 390 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand | |
| 391 skipped += num_edges; | |
| 392 } | |
| 393 return skipped; | |
| 394 } | |
| 395 | |
| 396 | |
| 397 //------------------------------peephole--------------------------------------- | |
| 398 // Apply peephole rule(s) to this instruction | |
| 399 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) { | |
| 400 return NULL; | |
| 401 } | |
| 402 | |
| 403 //------------------------------add_case_label--------------------------------- | |
| 404 // Adds the label for the case | |
| 405 void MachNode::add_case_label( int index_num, Label* blockLabel) { | |
| 406 ShouldNotCallThis(); | |
| 407 } | |
| 408 | |
| 409 //------------------------------method_set------------------------------------- | |
| 410 // Set the absolute address of a method | |
| 411 void MachNode::method_set( intptr_t addr ) { | |
| 412 ShouldNotCallThis(); | |
| 413 } | |
| 414 | |
| 415 //------------------------------rematerialize---------------------------------- | |
| 416 bool MachNode::rematerialize() const { | |
| 417 // Temps are always rematerializable | |
| 418 if (is_MachTemp()) return true; | |
| 419 | |
| 420 uint r = rule(); // Match rule | |
| 421 if( r < Matcher::_begin_rematerialize || | |
| 422 r >= Matcher::_end_rematerialize ) | |
| 423 return false; | |
| 424 | |
| 425 // For 2-address instructions, the input live range is also the output | |
| 426 // live range. Remateralizing does not make progress on the that live range. | |
| 427 if( two_adr() ) return false; | |
| 428 | |
| 429 // Check for rematerializing float constants, or not | |
| 430 if( !Matcher::rematerialize_float_constants ) { | |
| 431 int op = ideal_Opcode(); | |
| 432 if( op == Op_ConF || op == Op_ConD ) | |
| 433 return false; | |
| 434 } | |
| 435 | |
| 436 // Defining flags - can't spill these! Must remateralize. | |
| 437 if( ideal_reg() == Op_RegFlags ) | |
| 438 return true; | |
| 439 | |
| 440 // Stretching lots of inputs - don't do it. | |
| 441 if( req() > 2 ) | |
| 442 return false; | |
| 443 | |
| 444 // Don't remateralize somebody with bound inputs - it stretches a | |
| 445 // fixed register lifetime. | |
| 446 uint idx = oper_input_base(); | |
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447 if (req() > idx) { |
| 0 | 448 const RegMask &rm = in_RegMask(idx); |
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449 if (rm.is_bound(ideal_reg())) |
| 0 | 450 return false; |
| 451 } | |
| 452 | |
| 453 return true; | |
| 454 } | |
| 455 | |
| 456 #ifndef PRODUCT | |
| 457 //------------------------------dump_spec-------------------------------------- | |
| 458 // Print any per-operand special info | |
| 459 void MachNode::dump_spec(outputStream *st) const { | |
| 460 uint cnt = num_opnds(); | |
| 461 for( uint i=0; i<cnt; i++ ) | |
| 462 _opnds[i]->dump_spec(st); | |
| 463 const TypePtr *t = adr_type(); | |
| 464 if( t ) { | |
| 465 Compile* C = Compile::current(); | |
| 466 if( C->alias_type(t)->is_volatile() ) | |
| 467 st->print(" Volatile!"); | |
| 468 } | |
| 469 } | |
| 470 | |
| 471 //------------------------------dump_format------------------------------------ | |
| 472 // access to virtual | |
| 473 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const { | |
| 474 format(ra, st); // access to virtual | |
| 475 } | |
| 476 #endif | |
| 477 | |
| 478 //============================================================================= | |
| 479 #ifndef PRODUCT | |
| 480 void MachTypeNode::dump_spec(outputStream *st) const { | |
| 481 _bottom_type->dump_on(st); | |
| 482 } | |
| 483 #endif | |
| 484 | |
| 2008 | 485 |
| 486 //============================================================================= | |
| 487 int MachConstantNode::constant_offset() { | |
| 488 // Bind the offset lazily. | |
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489 if (_constant.offset() == -1) { |
| 2008 | 490 Compile::ConstantTable& constant_table = Compile::current()->constant_table(); |
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491 int offset = constant_table.find_offset(_constant); |
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492 // If called from Compile::scratch_emit_size return the |
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493 // pre-calculated offset. |
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494 // NOTE: If the AD file does some table base offset optimizations |
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495 // later the AD file needs to take care of this fact. |
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496 if (Compile::current()->in_scratch_emit_size()) { |
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497 return constant_table.calculate_table_base_offset() + offset; |
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498 } |
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499 _constant.set_offset(constant_table.table_base_offset() + offset); |
| 2008 | 500 } |
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501 return _constant.offset(); |
| 2008 | 502 } |
| 503 | |
| 504 | |
| 0 | 505 //============================================================================= |
| 506 #ifndef PRODUCT | |
| 507 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const { | |
| 508 int reg = ra_->get_reg_first(in(1)->in(_vidx)); | |
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509 st->print("%s %s", Name(), Matcher::regName[reg]); |
| 0 | 510 } |
| 511 #endif | |
| 512 | |
| 513 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
| 514 // only emits entries in the null-pointer exception handler table | |
| 515 } | |
| 3839 | 516 void MachNullCheckNode::label_set(Label* label, uint block_num) { |
| 517 // Nothing to emit | |
| 518 } | |
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519 void MachNullCheckNode::save_label( Label** label, uint* block_num ) { |
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520 // Nothing to emit |
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521 } |
| 0 | 522 |
| 523 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const { | |
| 524 if( idx == 0 ) return RegMask::Empty; | |
| 525 else return in(1)->as_Mach()->out_RegMask(); | |
| 526 } | |
| 527 | |
| 528 //============================================================================= | |
| 529 const Type *MachProjNode::bottom_type() const { | |
| 530 if( _ideal_reg == fat_proj ) return Type::BOTTOM; | |
| 531 // Try the normal mechanism first | |
| 532 const Type *t = in(0)->bottom_type(); | |
| 533 if( t->base() == Type::Tuple ) { | |
| 534 const TypeTuple *tt = t->is_tuple(); | |
| 535 if (_con < tt->cnt()) | |
| 536 return tt->field_at(_con); | |
| 537 } | |
| 538 // Else use generic type from ideal register set | |
| 539 assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds"); | |
| 540 return Type::mreg2type[_ideal_reg]; | |
| 541 } | |
| 542 | |
| 543 const TypePtr *MachProjNode::adr_type() const { | |
| 544 if (bottom_type() == Type::MEMORY) { | |
| 545 // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM | |
| 546 const TypePtr* adr_type = in(0)->adr_type(); | |
| 547 #ifdef ASSERT | |
| 548 if (!is_error_reported() && !Node::in_dump()) | |
| 549 assert(adr_type != NULL, "source must have adr_type"); | |
| 550 #endif | |
| 551 return adr_type; | |
| 552 } | |
| 553 assert(bottom_type()->base() != Type::Memory, "no other memories?"); | |
| 554 return NULL; | |
| 555 } | |
| 556 | |
| 557 #ifndef PRODUCT | |
| 558 void MachProjNode::dump_spec(outputStream *st) const { | |
| 559 ProjNode::dump_spec(st); | |
| 560 switch (_ideal_reg) { | |
| 561 case unmatched_proj: st->print("/unmatched"); break; | |
| 562 case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break; | |
| 563 } | |
| 564 } | |
| 565 #endif | |
| 566 | |
| 567 //============================================================================= | |
| 568 #ifndef PRODUCT | |
| 569 void MachIfNode::dump_spec(outputStream *st) const { | |
| 570 st->print("P=%f, C=%f",_prob, _fcnt); | |
| 571 } | |
| 572 #endif | |
| 573 | |
| 574 //============================================================================= | |
| 575 uint MachReturnNode::size_of() const { return sizeof(*this); } | |
| 576 | |
| 577 //------------------------------Registers-------------------------------------- | |
| 578 const RegMask &MachReturnNode::in_RegMask( uint idx ) const { | |
| 579 return _in_rms[idx]; | |
| 580 } | |
| 581 | |
| 582 const TypePtr *MachReturnNode::adr_type() const { | |
| 583 // most returns and calls are assumed to consume & modify all of memory | |
| 584 // the matcher will copy non-wide adr_types from ideal originals | |
| 585 return _adr_type; | |
| 586 } | |
| 587 | |
| 588 //============================================================================= | |
| 589 const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; } | |
| 590 | |
| 591 //------------------------------Registers-------------------------------------- | |
| 592 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const { | |
| 593 // Values in the domain use the users calling convention, embodied in the | |
| 594 // _in_rms array of RegMasks. | |
| 595 if( idx < TypeFunc::Parms ) return _in_rms[idx]; | |
| 596 | |
| 597 if (SafePointNode::needs_polling_address_input() && | |
| 598 idx == TypeFunc::Parms && | |
| 599 ideal_Opcode() == Op_SafePoint) { | |
| 600 return MachNode::in_RegMask(idx); | |
| 601 } | |
| 602 | |
| 603 // Values outside the domain represent debug info | |
| 604 return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()]; | |
| 605 } | |
| 606 | |
| 607 | |
| 608 //============================================================================= | |
| 609 | |
| 610 uint MachCallNode::cmp( const Node &n ) const | |
| 611 { return _tf == ((MachCallNode&)n)._tf; } | |
| 612 const Type *MachCallNode::bottom_type() const { return tf()->range(); } | |
| 613 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); } | |
| 614 | |
| 615 #ifndef PRODUCT | |
| 616 void MachCallNode::dump_spec(outputStream *st) const { | |
| 617 st->print("# "); | |
| 618 tf()->dump_on(st); | |
| 619 if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt); | |
| 620 if (jvms() != NULL) jvms()->dump_spec(st); | |
| 621 } | |
| 622 #endif | |
| 623 | |
| 624 | |
| 625 bool MachCallNode::return_value_is_used() const { | |
| 626 if (tf()->range()->cnt() == TypeFunc::Parms) { | |
| 627 // void return | |
| 628 return false; | |
| 629 } | |
| 630 | |
| 631 // find the projection corresponding to the return value | |
| 632 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) { | |
| 633 Node *use = fast_out(i); | |
| 634 if (!use->is_Proj()) continue; | |
| 635 if (use->as_Proj()->_con == TypeFunc::Parms) { | |
| 636 return true; | |
| 637 } | |
| 638 } | |
| 639 return false; | |
| 640 } | |
| 641 | |
| 642 | |
| 643 //------------------------------Registers-------------------------------------- | |
| 644 const RegMask &MachCallNode::in_RegMask( uint idx ) const { | |
| 645 // Values in the domain use the users calling convention, embodied in the | |
| 646 // _in_rms array of RegMasks. | |
| 647 if (idx < tf()->domain()->cnt()) return _in_rms[idx]; | |
| 648 // Values outside the domain represent debug info | |
| 649 return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()]; | |
| 650 } | |
| 651 | |
| 652 //============================================================================= | |
| 653 uint MachCallJavaNode::size_of() const { return sizeof(*this); } | |
| 654 uint MachCallJavaNode::cmp( const Node &n ) const { | |
| 655 MachCallJavaNode &call = (MachCallJavaNode&)n; | |
| 656 return MachCallNode::cmp(call) && _method->equals(call._method); | |
| 657 } | |
| 658 #ifndef PRODUCT | |
| 659 void MachCallJavaNode::dump_spec(outputStream *st) const { | |
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660 if (_method_handle_invoke) |
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661 st->print("MethodHandle "); |
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662 if (_method) { |
| 0 | 663 _method->print_short_name(st); |
| 664 st->print(" "); | |
| 665 } | |
| 666 MachCallNode::dump_spec(st); | |
| 667 } | |
| 668 #endif | |
| 669 | |
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670 //------------------------------Registers-------------------------------------- |
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671 const RegMask &MachCallJavaNode::in_RegMask(uint idx) const { |
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672 // Values in the domain use the users calling convention, embodied in the |
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673 // _in_rms array of RegMasks. |
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674 if (idx < tf()->domain()->cnt()) return _in_rms[idx]; |
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675 // Values outside the domain represent debug info |
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676 Matcher* m = Compile::current()->matcher(); |
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677 // If this call is a MethodHandle invoke we have to use a different |
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678 // debugmask which does not include the register we use to save the |
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679 // SP over MH invokes. |
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680 RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask; |
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681 return *debugmask[in(idx)->ideal_reg()]; |
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682 } |
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683 |
| 0 | 684 //============================================================================= |
| 685 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); } | |
| 686 uint MachCallStaticJavaNode::cmp( const Node &n ) const { | |
| 687 MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n; | |
| 688 return MachCallJavaNode::cmp(call) && _name == call._name; | |
| 689 } | |
| 690 | |
| 691 //----------------------------uncommon_trap_request---------------------------- | |
| 692 // If this is an uncommon trap, return the request code, else zero. | |
| 693 int MachCallStaticJavaNode::uncommon_trap_request() const { | |
| 694 if (_name != NULL && !strcmp(_name, "uncommon_trap")) { | |
| 695 return CallStaticJavaNode::extract_uncommon_trap_request(this); | |
| 696 } | |
| 697 return 0; | |
| 698 } | |
| 699 | |
| 700 #ifndef PRODUCT | |
| 701 // Helper for summarizing uncommon_trap arguments. | |
| 702 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const { | |
| 703 int trap_req = uncommon_trap_request(); | |
| 704 if (trap_req != 0) { | |
| 705 char buf[100]; | |
| 706 st->print("(%s)", | |
| 707 Deoptimization::format_trap_request(buf, sizeof(buf), | |
| 708 trap_req)); | |
| 709 } | |
| 710 } | |
| 711 | |
| 712 void MachCallStaticJavaNode::dump_spec(outputStream *st) const { | |
| 713 st->print("Static "); | |
| 714 if (_name != NULL) { | |
| 715 st->print("wrapper for: %s", _name ); | |
| 716 dump_trap_args(st); | |
| 717 st->print(" "); | |
| 718 } | |
| 719 MachCallJavaNode::dump_spec(st); | |
| 720 } | |
| 721 #endif | |
| 722 | |
| 723 //============================================================================= | |
| 724 #ifndef PRODUCT | |
| 725 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const { | |
| 726 st->print("Dynamic "); | |
| 727 MachCallJavaNode::dump_spec(st); | |
| 728 } | |
| 729 #endif | |
| 730 //============================================================================= | |
| 731 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); } | |
| 732 uint MachCallRuntimeNode::cmp( const Node &n ) const { | |
| 733 MachCallRuntimeNode &call = (MachCallRuntimeNode&)n; | |
| 734 return MachCallNode::cmp(call) && !strcmp(_name,call._name); | |
| 735 } | |
| 736 #ifndef PRODUCT | |
| 737 void MachCallRuntimeNode::dump_spec(outputStream *st) const { | |
| 738 st->print("%s ",_name); | |
| 739 MachCallNode::dump_spec(st); | |
| 740 } | |
| 741 #endif | |
| 742 //============================================================================= | |
| 743 // A shared JVMState for all HaltNodes. Indicates the start of debug info | |
| 744 // is at TypeFunc::Parms. Only required for SOE register spill handling - | |
| 745 // to indicate where the stack-slot-only debug info inputs begin. | |
| 746 // There is no other JVM state needed here. | |
| 747 JVMState jvms_for_throw(0); | |
| 748 JVMState *MachHaltNode::jvms() const { | |
| 749 return &jvms_for_throw; | |
| 750 } | |
| 751 | |
| 752 //============================================================================= | |
| 753 #ifndef PRODUCT | |
| 754 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { | |
| 755 st->print("B%d", _block_num); | |
| 756 } | |
| 757 #endif // PRODUCT | |
| 758 | |
| 759 //============================================================================= | |
| 760 #ifndef PRODUCT | |
| 761 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { | |
| 762 st->print(INTPTR_FORMAT, _method); | |
| 763 } | |
| 764 #endif // PRODUCT |