Mercurial > hg > truffle
annotate src/cpu/sparc/vm/sharedRuntime_sparc.cpp @ 6790:2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
Reviewed-by: kvn, jrose, bdelsart
author | twisti |
---|---|
date | Mon, 17 Sep 2012 12:57:58 -0700 |
parents | 8a02ca5e5576 |
children | 137868b7aa6f |
rev | line source |
---|---|
0 | 1 /* |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1506
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1506
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1506
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "asm/assembler.hpp" | |
27 #include "assembler_sparc.inline.hpp" | |
28 #include "code/debugInfoRec.hpp" | |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
32 #include "oops/compiledICHolder.hpp" |
1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_sparc.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
43 #ifdef SHARK | |
44 #include "compiler/compileBroker.hpp" | |
45 #include "shark/sharkCompiler.hpp" | |
46 #endif | |
0 | 47 |
48 #define __ masm-> | |
49 | |
50 | |
51 class RegisterSaver { | |
52 | |
53 // Used for saving volatile registers. This is Gregs, Fregs, I/L/O. | |
54 // The Oregs are problematic. In the 32bit build the compiler can | |
55 // have O registers live with 64 bit quantities. A window save will | |
56 // cut the heads off of the registers. We have to do a very extensive | |
57 // stack dance to save and restore these properly. | |
58 | |
59 // Note that the Oregs problem only exists if we block at either a polling | |
60 // page exception a compiled code safepoint that was not originally a call | |
61 // or deoptimize following one of these kinds of safepoints. | |
62 | |
63 // Lots of registers to save. For all builds, a window save will preserve | |
64 // the %i and %l registers. For the 32-bit longs-in-two entries and 64-bit | |
65 // builds a window-save will preserve the %o registers. In the LION build | |
66 // we need to save the 64-bit %o registers which requires we save them | |
67 // before the window-save (as then they become %i registers and get their | |
68 // heads chopped off on interrupt). We have to save some %g registers here | |
69 // as well. | |
70 enum { | |
71 // This frame's save area. Includes extra space for the native call: | |
72 // vararg's layout space and the like. Briefly holds the caller's | |
73 // register save area. | |
74 call_args_area = frame::register_save_words_sp_offset + | |
75 frame::memory_parameter_word_sp_offset*wordSize, | |
76 // Make sure save locations are always 8 byte aligned. | |
77 // can't use round_to because it doesn't produce compile time constant | |
78 start_of_extra_save_area = ((call_args_area + 7) & ~7), | |
79 g1_offset = start_of_extra_save_area, // g-regs needing saving | |
80 g3_offset = g1_offset+8, | |
81 g4_offset = g3_offset+8, | |
82 g5_offset = g4_offset+8, | |
83 o0_offset = g5_offset+8, | |
84 o1_offset = o0_offset+8, | |
85 o2_offset = o1_offset+8, | |
86 o3_offset = o2_offset+8, | |
87 o4_offset = o3_offset+8, | |
88 o5_offset = o4_offset+8, | |
89 start_of_flags_save_area = o5_offset+8, | |
90 ccr_offset = start_of_flags_save_area, | |
91 fsr_offset = ccr_offset + 8, | |
92 d00_offset = fsr_offset+8, // Start of float save area | |
93 register_save_size = d00_offset+8*32 | |
94 }; | |
95 | |
96 | |
97 public: | |
98 | |
99 static int Oexception_offset() { return o0_offset; }; | |
100 static int G3_offset() { return g3_offset; }; | |
101 static int G5_offset() { return g5_offset; }; | |
102 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
103 static void restore_live_registers(MacroAssembler* masm); | |
104 | |
105 // During deoptimization only the result register need to be restored | |
106 // all the other values have already been extracted. | |
107 | |
108 static void restore_result_registers(MacroAssembler* masm); | |
109 }; | |
110 | |
111 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
112 // Record volatile registers as callee-save values in an OopMap so their save locations will be | |
113 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for | |
114 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers | |
115 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame | |
116 // (as the stub's I's) when the runtime routine called by the stub creates its frame. | |
117 int i; | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
118 // Always make the frame size 16 byte aligned. |
0 | 119 int frame_size = round_to(additional_frame_words + register_save_size, 16); |
120 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words | |
121 int frame_size_in_slots = frame_size / sizeof(jint); | |
122 // CodeBlob frame size is in words. | |
123 *total_frame_words = frame_size / wordSize; | |
124 // OopMap* map = new OopMap(*total_frame_words, 0); | |
125 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
126 | |
127 #if !defined(_LP64) | |
128 | |
129 // Save 64-bit O registers; they will get their heads chopped off on a 'save'. | |
130 __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); | |
131 __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); | |
132 __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); | |
133 __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); | |
134 __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); | |
135 __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); | |
136 #endif /* _LP64 */ | |
137 | |
138 __ save(SP, -frame_size, SP); | |
139 | |
140 #ifndef _LP64 | |
141 // Reload the 64 bit Oregs. Although they are now Iregs we load them | |
142 // to Oregs here to avoid interrupts cutting off their heads | |
143 | |
144 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); | |
145 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); | |
146 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); | |
147 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); | |
148 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); | |
149 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); | |
150 | |
151 __ stx(O0, SP, o0_offset+STACK_BIAS); | |
152 map->set_callee_saved(VMRegImpl::stack2reg((o0_offset + 4)>>2), O0->as_VMReg()); | |
153 | |
154 __ stx(O1, SP, o1_offset+STACK_BIAS); | |
155 | |
156 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset + 4)>>2), O1->as_VMReg()); | |
157 | |
158 __ stx(O2, SP, o2_offset+STACK_BIAS); | |
159 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset + 4)>>2), O2->as_VMReg()); | |
160 | |
161 __ stx(O3, SP, o3_offset+STACK_BIAS); | |
162 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset + 4)>>2), O3->as_VMReg()); | |
163 | |
164 __ stx(O4, SP, o4_offset+STACK_BIAS); | |
165 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset + 4)>>2), O4->as_VMReg()); | |
166 | |
167 __ stx(O5, SP, o5_offset+STACK_BIAS); | |
168 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg()); | |
169 #endif /* _LP64 */ | |
170 | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
171 |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
172 #ifdef _LP64 |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
173 int debug_offset = 0; |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
174 #else |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
175 int debug_offset = 4; |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
176 #endif |
0 | 177 // Save the G's |
178 __ stx(G1, SP, g1_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
179 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + debug_offset)>>2), G1->as_VMReg()); |
0 | 180 |
181 __ stx(G3, SP, g3_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
182 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + debug_offset)>>2), G3->as_VMReg()); |
0 | 183 |
184 __ stx(G4, SP, g4_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
185 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + debug_offset)>>2), G4->as_VMReg()); |
0 | 186 |
187 __ stx(G5, SP, g5_offset+STACK_BIAS); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
188 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + debug_offset)>>2), G5->as_VMReg()); |
0 | 189 |
190 // This is really a waste but we'll keep things as they were for now | |
191 if (true) { | |
192 #ifndef _LP64 | |
193 map->set_callee_saved(VMRegImpl::stack2reg((o0_offset)>>2), O0->as_VMReg()->next()); | |
194 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset)>>2), O1->as_VMReg()->next()); | |
195 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset)>>2), O2->as_VMReg()->next()); | |
196 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next()); | |
197 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next()); | |
198 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next()); | |
199 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next()); | |
200 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next()); | |
201 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next()); | |
202 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next()); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
203 #endif /* _LP64 */ |
0 | 204 } |
205 | |
206 | |
207 // Save the flags | |
208 __ rdccr( G5 ); | |
209 __ stx(G5, SP, ccr_offset+STACK_BIAS); | |
210 __ stxfsr(SP, fsr_offset+STACK_BIAS); | |
211 | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
212 // Save all the FP registers: 32 doubles (32 floats correspond to the 2 halves of the first 16 doubles) |
0 | 213 int offset = d00_offset; |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
214 for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
0 | 215 FloatRegister f = as_FloatRegister(i); |
216 __ stf(FloatRegisterImpl::D, f, SP, offset+STACK_BIAS); | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
217 // Record as callee saved both halves of double registers (2 float registers). |
0 | 218 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), f->as_VMReg()); |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
219 map->set_callee_saved(VMRegImpl::stack2reg((offset + sizeof(float))>>2), f->as_VMReg()->next()); |
0 | 220 offset += sizeof(double); |
221 } | |
222 | |
223 // And we're done. | |
224 | |
225 return map; | |
226 } | |
227 | |
228 | |
229 // Pop the current frame and restore all the registers that we | |
230 // saved. | |
231 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
232 | |
233 // Restore all the FP registers | |
1007
1ce3281a8e93
6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
kvn
parents:
1006
diff
changeset
|
234 for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
0 | 235 __ ldf(FloatRegisterImpl::D, SP, d00_offset+i*sizeof(float)+STACK_BIAS, as_FloatRegister(i)); |
236 } | |
237 | |
238 __ ldx(SP, ccr_offset+STACK_BIAS, G1); | |
239 __ wrccr (G1) ; | |
240 | |
241 // Restore the G's | |
242 // Note that G2 (AKA GThread) must be saved and restored separately. | |
243 // TODO-FIXME: save and restore some of the other ASRs, viz., %asi and %gsr. | |
244 | |
245 __ ldx(SP, g1_offset+STACK_BIAS, G1); | |
246 __ ldx(SP, g3_offset+STACK_BIAS, G3); | |
247 __ ldx(SP, g4_offset+STACK_BIAS, G4); | |
248 __ ldx(SP, g5_offset+STACK_BIAS, G5); | |
249 | |
250 | |
251 #if !defined(_LP64) | |
252 // Restore the 64-bit O's. | |
253 __ ldx(SP, o0_offset+STACK_BIAS, O0); | |
254 __ ldx(SP, o1_offset+STACK_BIAS, O1); | |
255 __ ldx(SP, o2_offset+STACK_BIAS, O2); | |
256 __ ldx(SP, o3_offset+STACK_BIAS, O3); | |
257 __ ldx(SP, o4_offset+STACK_BIAS, O4); | |
258 __ ldx(SP, o5_offset+STACK_BIAS, O5); | |
259 | |
260 // And temporarily place them in TLS | |
261 | |
262 __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); | |
263 __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); | |
264 __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); | |
265 __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); | |
266 __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); | |
267 __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); | |
268 #endif /* _LP64 */ | |
269 | |
270 // Restore flags | |
271 | |
272 __ ldxfsr(SP, fsr_offset+STACK_BIAS); | |
273 | |
274 __ restore(); | |
275 | |
276 #if !defined(_LP64) | |
277 // Now reload the 64bit Oregs after we've restore the window. | |
278 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); | |
279 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); | |
280 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); | |
281 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); | |
282 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); | |
283 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); | |
284 #endif /* _LP64 */ | |
285 | |
286 } | |
287 | |
288 // Pop the current frame and restore the registers that might be holding | |
289 // a result. | |
290 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
291 | |
292 #if !defined(_LP64) | |
293 // 32bit build returns longs in G1 | |
294 __ ldx(SP, g1_offset+STACK_BIAS, G1); | |
295 | |
296 // Retrieve the 64-bit O's. | |
297 __ ldx(SP, o0_offset+STACK_BIAS, O0); | |
298 __ ldx(SP, o1_offset+STACK_BIAS, O1); | |
299 // and save to TLS | |
300 __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); | |
301 __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); | |
302 #endif /* _LP64 */ | |
303 | |
304 __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0)); | |
305 | |
306 __ restore(); | |
307 | |
308 #if !defined(_LP64) | |
309 // Now reload the 64bit Oregs after we've restore the window. | |
310 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); | |
311 __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); | |
312 #endif /* _LP64 */ | |
313 | |
314 } | |
315 | |
316 // The java_calling_convention describes stack locations as ideal slots on | |
317 // a frame with no abi restrictions. Since we must observe abi restrictions | |
318 // (like the placement of the register window) the slots must be biased by | |
319 // the following value. | |
320 static int reg2offset(VMReg r) { | |
321 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
322 } | |
323 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
324 static VMRegPair reg64_to_VMRegPair(Register r) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
325 VMRegPair ret; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
326 if (wordSize == 8) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
327 ret.set2(r->as_VMReg()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
328 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
329 ret.set_pair(r->successor()->as_VMReg(), r->as_VMReg()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
330 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
331 return ret; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
332 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
333 |
0 | 334 // --------------------------------------------------------------------------- |
335 // Read the array of BasicTypes from a signature, and compute where the | |
336 // arguments should go. Values in the VMRegPair regs array refer to 4-byte (VMRegImpl::stack_slot_size) | |
337 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
338 // refer to 4-byte stack slots. All stack slots are based off of the window | |
339 // top. VMRegImpl::stack0 refers to the first slot past the 16-word window, | |
340 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
341 // values 0-63 (up to RegisterImpl::number_of_registers) are the 64-bit | |
342 // integer registers. Values 64-95 are the (32-bit only) float registers. | |
343 // Each 32-bit quantity is given its own number, so the integer registers | |
344 // (in either 32- or 64-bit builds) use 2 numbers. For example, there is | |
345 // an O0-low and an O0-high. Essentially, all int register numbers are doubled. | |
346 | |
347 // Register results are passed in O0-O5, for outgoing call arguments. To | |
348 // convert to incoming arguments, convert all O's to I's. The regs array | |
349 // refer to the low and hi 32-bit words of 64-bit registers or stack slots. | |
350 // If the regs[].second() field is set to VMRegImpl::Bad(), it means it's unused (a | |
351 // 32-bit value was passed). If both are VMRegImpl::Bad(), it means no value was | |
352 // passed (used as a placeholder for the other half of longs and doubles in | |
353 // the 64-bit build). regs[].second() is either VMRegImpl::Bad() or regs[].second() is | |
354 // regs[].first()+1 (regs[].first() may be misaligned in the C calling convention). | |
355 // Sparc never passes a value in regs[].second() but not regs[].first() (regs[].first() | |
356 // == VMRegImpl::Bad() && regs[].second() != VMRegImpl::Bad()) nor unrelated values in the | |
357 // same VMRegPair. | |
358 | |
359 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
360 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
361 // units regardless of build. | |
362 | |
363 | |
364 // --------------------------------------------------------------------------- | |
365 // The compiled Java calling convention. The Java convention always passes | |
366 // 64-bit values in adjacent aligned locations (either registers or stack), | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
367 // floats in float registers and doubles in aligned float pairs. There is |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
368 // no backing varargs store for values in registers. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
369 // In the 32-bit build, longs are passed on the stack (cannot be |
0 | 370 // passed in I's, because longs in I's get their heads chopped off at |
371 // interrupt). | |
372 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
373 VMRegPair *regs, | |
374 int total_args_passed, | |
375 int is_outgoing) { | |
376 assert(F31->as_VMReg()->is_reg(), "overlapping stack/register numbers"); | |
377 | |
378 const int int_reg_max = SPARC_ARGS_IN_REGS_NUM; | |
379 const int flt_reg_max = 8; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
380 |
0 | 381 int int_reg = 0; |
382 int flt_reg = 0; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
383 int slot = 0; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
384 |
0 | 385 for (int i = 0; i < total_args_passed; i++) { |
386 switch (sig_bt[i]) { | |
387 case T_INT: | |
388 case T_SHORT: | |
389 case T_CHAR: | |
390 case T_BYTE: | |
391 case T_BOOLEAN: | |
392 #ifndef _LP64 | |
393 case T_OBJECT: | |
394 case T_ARRAY: | |
395 case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address | |
396 #endif // _LP64 | |
397 if (int_reg < int_reg_max) { | |
398 Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); | |
399 regs[i].set1(r->as_VMReg()); | |
400 } else { | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
401 regs[i].set1(VMRegImpl::stack2reg(slot++)); |
0 | 402 } |
403 break; | |
404 | |
405 #ifdef _LP64 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
406 case T_LONG: |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
407 assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
408 // fall-through |
0 | 409 case T_OBJECT: |
410 case T_ARRAY: | |
411 case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address | |
412 if (int_reg < int_reg_max) { | |
413 Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); | |
414 regs[i].set2(r->as_VMReg()); | |
415 } else { | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
416 slot = round_to(slot, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
417 regs[i].set2(VMRegImpl::stack2reg(slot)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
418 slot += 2; |
0 | 419 } |
420 break; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
421 #else |
0 | 422 case T_LONG: |
423 assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
424 // On 32-bit SPARC put longs always on the stack to keep the pressure off |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
425 // integer argument registers. They should be used for oops. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
426 slot = round_to(slot, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
427 regs[i].set2(VMRegImpl::stack2reg(slot)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
428 slot += 2; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
429 #endif |
0 | 430 break; |
431 | |
432 case T_FLOAT: | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
433 if (flt_reg < flt_reg_max) { |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
434 FloatRegister r = as_FloatRegister(flt_reg++); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
435 regs[i].set1(r->as_VMReg()); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
436 } else { |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
437 regs[i].set1(VMRegImpl::stack2reg(slot++)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
438 } |
0 | 439 break; |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
440 |
0 | 441 case T_DOUBLE: |
442 assert(sig_bt[i+1] == T_VOID, "expecting half"); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
443 if (round_to(flt_reg, 2) + 1 < flt_reg_max) { |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
444 flt_reg = round_to(flt_reg, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
445 FloatRegister r = as_FloatRegister(flt_reg); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
446 regs[i].set2(r->as_VMReg()); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
447 flt_reg += 2; |
0 | 448 } else { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
449 slot = round_to(slot, 2); // align |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
450 regs[i].set2(VMRegImpl::stack2reg(slot)); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
451 slot += 2; |
0 | 452 } |
453 break; | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
454 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
455 case T_VOID: |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
456 regs[i].set_bad(); // Halves of longs & doubles |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
457 break; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
458 |
0 | 459 default: |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
460 fatal(err_msg_res("unknown basic type %d", sig_bt[i])); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
461 break; |
0 | 462 } |
463 } | |
464 | |
465 // retun the amount of stack space these arguments will need. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
466 return slot; |
0 | 467 } |
468 | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
469 // Helper class mostly to avoid passing masm everywhere, and handle |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
470 // store displacement overflow logic. |
0 | 471 class AdapterGenerator { |
472 MacroAssembler *masm; | |
473 Register Rdisp; | |
474 void set_Rdisp(Register r) { Rdisp = r; } | |
475 | |
476 void patch_callers_callsite(); | |
477 | |
478 // base+st_off points to top of argument | |
1506 | 479 int arg_offset(const int st_off) { return st_off; } |
0 | 480 int next_arg_offset(const int st_off) { |
1506 | 481 return st_off - Interpreter::stackElementSize; |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
482 } |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
483 |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
484 // Argument slot values may be loaded first into a register because |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
485 // they might not fit into displacement. |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
486 RegisterOrConstant arg_slot(const int st_off); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
487 RegisterOrConstant next_arg_slot(const int st_off); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
488 |
0 | 489 // Stores long into offset pointed to by base |
490 void store_c2i_long(Register r, Register base, | |
491 const int st_off, bool is_stack); | |
492 void store_c2i_object(Register r, Register base, | |
493 const int st_off); | |
494 void store_c2i_int(Register r, Register base, | |
495 const int st_off); | |
496 void store_c2i_double(VMReg r_2, | |
497 VMReg r_1, Register base, const int st_off); | |
498 void store_c2i_float(FloatRegister f, Register base, | |
499 const int st_off); | |
500 | |
501 public: | |
502 void gen_c2i_adapter(int total_args_passed, | |
503 // VMReg max_arg, | |
504 int comp_args_on_stack, // VMRegStackSlots | |
505 const BasicType *sig_bt, | |
506 const VMRegPair *regs, | |
507 Label& skip_fixup); | |
508 void gen_i2c_adapter(int total_args_passed, | |
509 // VMReg max_arg, | |
510 int comp_args_on_stack, // VMRegStackSlots | |
511 const BasicType *sig_bt, | |
512 const VMRegPair *regs); | |
513 | |
514 AdapterGenerator(MacroAssembler *_masm) : masm(_masm) {} | |
515 }; | |
516 | |
517 | |
518 // Patch the callers callsite with entry to compiled code if it exists. | |
519 void AdapterGenerator::patch_callers_callsite() { | |
520 Label L; | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
521 __ ld_ptr(G5_method, in_bytes(Method::code_offset()), G3_scratch); |
3839 | 522 __ br_null(G3_scratch, false, Assembler::pt, L); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
523 __ delayed()->nop(); |
0 | 524 // Call into the VM to patch the caller, then jump to compiled callee |
525 __ save_frame(4); // Args in compiled layout; do not blow them | |
526 | |
527 // Must save all the live Gregs the list is: | |
528 // G1: 1st Long arg (32bit build) | |
529 // G2: global allocated to TLS | |
530 // G3: used in inline cache check (scratch) | |
531 // G4: 2nd Long arg (32bit build); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
532 // G5: used in inline cache check (Method*) |
0 | 533 |
534 // The longs must go to the stack by hand since in the 32 bit build they can be trashed by window ops. | |
535 | |
536 #ifdef _LP64 | |
537 // mov(s,d) | |
538 __ mov(G1, L1); | |
539 __ mov(G4, L4); | |
540 __ mov(G5_method, L5); | |
541 __ mov(G5_method, O0); // VM needs target method | |
542 __ mov(I7, O1); // VM needs caller's callsite | |
543 // Must be a leaf call... | |
544 // can be very far once the blob has been relocated | |
727 | 545 AddressLiteral dest(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)); |
0 | 546 __ relocate(relocInfo::runtime_call_type); |
727 | 547 __ jumpl_to(dest, O7, O7); |
0 | 548 __ delayed()->mov(G2_thread, L7_thread_cache); |
549 __ mov(L7_thread_cache, G2_thread); | |
550 __ mov(L1, G1); | |
551 __ mov(L4, G4); | |
552 __ mov(L5, G5_method); | |
553 #else | |
554 __ stx(G1, FP, -8 + STACK_BIAS); | |
555 __ stx(G4, FP, -16 + STACK_BIAS); | |
556 __ mov(G5_method, L5); | |
557 __ mov(G5_method, O0); // VM needs target method | |
558 __ mov(I7, O1); // VM needs caller's callsite | |
559 // Must be a leaf call... | |
560 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), relocInfo::runtime_call_type); | |
561 __ delayed()->mov(G2_thread, L7_thread_cache); | |
562 __ mov(L7_thread_cache, G2_thread); | |
563 __ ldx(FP, -8 + STACK_BIAS, G1); | |
564 __ ldx(FP, -16 + STACK_BIAS, G4); | |
565 __ mov(L5, G5_method); | |
566 #endif /* _LP64 */ | |
567 | |
568 __ restore(); // Restore args | |
569 __ bind(L); | |
570 } | |
571 | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
572 |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
573 RegisterOrConstant AdapterGenerator::arg_slot(const int st_off) { |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
574 RegisterOrConstant roc(arg_offset(st_off)); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
575 return __ ensure_simm13_or_reg(roc, Rdisp); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
576 } |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
577 |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
578 RegisterOrConstant AdapterGenerator::next_arg_slot(const int st_off) { |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
579 RegisterOrConstant roc(next_arg_offset(st_off)); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
580 return __ ensure_simm13_or_reg(roc, Rdisp); |
0 | 581 } |
582 | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
583 |
0 | 584 // Stores long into offset pointed to by base |
585 void AdapterGenerator::store_c2i_long(Register r, Register base, | |
586 const int st_off, bool is_stack) { | |
587 #ifdef _LP64 | |
588 // In V9, longs are given 2 64-bit slots in the interpreter, but the | |
589 // data is passed in only 1 slot. | |
590 __ stx(r, base, next_arg_slot(st_off)); | |
591 #else | |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
116
diff
changeset
|
592 #ifdef COMPILER2 |
0 | 593 // Misaligned store of 64-bit data |
594 __ stw(r, base, arg_slot(st_off)); // lo bits | |
595 __ srlx(r, 32, r); | |
596 __ stw(r, base, next_arg_slot(st_off)); // hi bits | |
597 #else | |
598 if (is_stack) { | |
599 // Misaligned store of 64-bit data | |
600 __ stw(r, base, arg_slot(st_off)); // lo bits | |
601 __ srlx(r, 32, r); | |
602 __ stw(r, base, next_arg_slot(st_off)); // hi bits | |
603 } else { | |
604 __ stw(r->successor(), base, arg_slot(st_off) ); // lo bits | |
605 __ stw(r , base, next_arg_slot(st_off)); // hi bits | |
606 } | |
607 #endif // COMPILER2 | |
342
37f87013dfd8
6711316: Open source the Garbage-First garbage collector
ysr
parents:
116
diff
changeset
|
608 #endif // _LP64 |
0 | 609 } |
610 | |
611 void AdapterGenerator::store_c2i_object(Register r, Register base, | |
612 const int st_off) { | |
613 __ st_ptr (r, base, arg_slot(st_off)); | |
614 } | |
615 | |
616 void AdapterGenerator::store_c2i_int(Register r, Register base, | |
617 const int st_off) { | |
618 __ st (r, base, arg_slot(st_off)); | |
619 } | |
620 | |
621 // Stores into offset pointed to by base | |
622 void AdapterGenerator::store_c2i_double(VMReg r_2, | |
623 VMReg r_1, Register base, const int st_off) { | |
624 #ifdef _LP64 | |
625 // In V9, doubles are given 2 64-bit slots in the interpreter, but the | |
626 // data is passed in only 1 slot. | |
627 __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); | |
628 #else | |
629 // Need to marshal 64-bit value from misaligned Lesp loads | |
630 __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); | |
631 __ stf(FloatRegisterImpl::S, r_2->as_FloatRegister(), base, arg_slot(st_off) ); | |
632 #endif | |
633 } | |
634 | |
635 void AdapterGenerator::store_c2i_float(FloatRegister f, Register base, | |
636 const int st_off) { | |
637 __ stf(FloatRegisterImpl::S, f, base, arg_slot(st_off)); | |
638 } | |
639 | |
640 void AdapterGenerator::gen_c2i_adapter( | |
641 int total_args_passed, | |
642 // VMReg max_arg, | |
643 int comp_args_on_stack, // VMRegStackSlots | |
644 const BasicType *sig_bt, | |
645 const VMRegPair *regs, | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
646 Label& L_skip_fixup) { |
0 | 647 |
648 // Before we get into the guts of the C2I adapter, see if we should be here | |
649 // at all. We've come from compiled code and are attempting to jump to the | |
650 // interpreter, which means the caller made a static call to get here | |
651 // (vcalls always get a compiled target if there is one). Check for a | |
652 // compiled target. If there is one, we need to patch the caller's call. | |
653 // However we will run interpreted if we come thru here. The next pass | |
654 // thru the call site will run compiled. If we ran compiled here then | |
655 // we can (theorectically) do endless i2c->c2i->i2c transitions during | |
656 // deopt/uncommon trap cycles. If we always go interpreted here then | |
657 // we can have at most one and don't need to play any tricks to keep | |
658 // from endlessly growing the stack. | |
659 // | |
660 // Actually if we detected that we had an i2c->c2i transition here we | |
661 // ought to be able to reset the world back to the state of the interpreted | |
662 // call and not bother building another interpreter arg area. We don't | |
663 // do that at this point. | |
664 | |
665 patch_callers_callsite(); | |
666 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
667 __ bind(L_skip_fixup); |
0 | 668 |
669 // Since all args are passed on the stack, total_args_passed*wordSize is the | |
670 // space we need. Add in varargs area needed by the interpreter. Round up | |
671 // to stack alignment. | |
1506 | 672 const int arg_size = total_args_passed * Interpreter::stackElementSize; |
0 | 673 const int varargs_area = |
674 (frame::varargs_offset - frame::register_save_words)*wordSize; | |
675 const int extraspace = round_to(arg_size + varargs_area, 2*wordSize); | |
676 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
677 const int bias = STACK_BIAS; |
0 | 678 const int interp_arg_offset = frame::varargs_offset*wordSize + |
1506 | 679 (total_args_passed-1)*Interpreter::stackElementSize; |
0 | 680 |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
681 const Register base = SP; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
682 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
683 // Make some extra space on the stack. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
684 __ sub(SP, __ ensure_simm13_or_reg(extraspace, G3_scratch), SP); |
0 | 685 set_Rdisp(G3_scratch); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
686 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
687 // Write the args into the outgoing interpreter space. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
688 for (int i = 0; i < total_args_passed; i++) { |
1506 | 689 const int st_off = interp_arg_offset - (i*Interpreter::stackElementSize) + bias; |
0 | 690 VMReg r_1 = regs[i].first(); |
691 VMReg r_2 = regs[i].second(); | |
692 if (!r_1->is_valid()) { | |
693 assert(!r_2->is_valid(), ""); | |
694 continue; | |
695 } | |
696 if (r_1->is_stack()) { // Pretend stack targets are loaded into G1 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
697 RegisterOrConstant ld_off = reg2offset(r_1) + extraspace + bias; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
698 ld_off = __ ensure_simm13_or_reg(ld_off, Rdisp); |
0 | 699 r_1 = G1_scratch->as_VMReg();// as part of the load/store shuffle |
700 if (!r_2->is_valid()) __ ld (base, ld_off, G1_scratch); | |
701 else __ ldx(base, ld_off, G1_scratch); | |
702 } | |
703 | |
704 if (r_1->is_Register()) { | |
705 Register r = r_1->as_Register()->after_restore(); | |
706 if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ARRAY) { | |
707 store_c2i_object(r, base, st_off); | |
708 } else if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
709 store_c2i_long(r, base, st_off, r_2->is_stack()); | |
710 } else { | |
711 store_c2i_int(r, base, st_off); | |
712 } | |
713 } else { | |
714 assert(r_1->is_FloatRegister(), ""); | |
715 if (sig_bt[i] == T_FLOAT) { | |
716 store_c2i_float(r_1->as_FloatRegister(), base, st_off); | |
717 } else { | |
718 assert(sig_bt[i] == T_DOUBLE, "wrong type"); | |
719 store_c2i_double(r_2, r_1, base, st_off); | |
720 } | |
721 } | |
722 } | |
723 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
724 // Load the interpreter entry point. |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
725 __ ld_ptr(G5_method, in_bytes(Method::interpreter_entry_offset()), G3_scratch); |
0 | 726 |
727 // Pass O5_savedSP as an argument to the interpreter. | |
728 // The interpreter will restore SP to this value before returning. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
729 __ add(SP, __ ensure_simm13_or_reg(extraspace, G1), O5_savedSP); |
0 | 730 |
731 __ mov((frame::varargs_offset)*wordSize - | |
1506 | 732 1*Interpreter::stackElementSize+bias+BytesPerWord, G1); |
0 | 733 // Jump to the interpreter just as if interpreter was doing it. |
734 __ jmpl(G3_scratch, 0, G0); | |
735 // Setup Lesp for the call. Cannot actually set Lesp as the current Lesp | |
736 // (really L0) is in use by the compiled frame as a generic temp. However, | |
737 // the interpreter does not know where its args are without some kind of | |
738 // arg pointer being passed in. Pass it in Gargs. | |
739 __ delayed()->add(SP, G1, Gargs); | |
740 } | |
741 | |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
742 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, Register temp2_reg, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
743 address code_start, address code_end, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
744 Label& L_ok) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
745 Label L_fail; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
746 __ set(ExternalAddress(code_start), temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
747 __ set(pointer_delta(code_end, code_start, 1), temp2_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
748 __ cmp(pc_reg, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
749 __ brx(Assembler::lessEqualUnsigned, false, Assembler::pn, L_fail); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
750 __ delayed()->add(temp_reg, temp2_reg, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
751 __ cmp(pc_reg, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
752 __ cmp_and_brx_short(pc_reg, temp_reg, Assembler::lessUnsigned, Assembler::pt, L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
753 __ bind(L_fail); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
754 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
755 |
0 | 756 void AdapterGenerator::gen_i2c_adapter( |
757 int total_args_passed, | |
758 // VMReg max_arg, | |
759 int comp_args_on_stack, // VMRegStackSlots | |
760 const BasicType *sig_bt, | |
761 const VMRegPair *regs) { | |
762 | |
763 // Generate an I2C adapter: adjust the I-frame to make space for the C-frame | |
764 // layout. Lesp was saved by the calling I-frame and will be restored on | |
765 // return. Meanwhile, outgoing arg space is all owned by the callee | |
766 // C-frame, so we can mangle it at will. After adjusting the frame size, | |
767 // hoist register arguments and repack other args according to the compiled | |
768 // code convention. Finally, end in a jump to the compiled code. The entry | |
769 // point address is the start of the buffer. | |
770 | |
771 // We will only enter here from an interpreted frame and never from after | |
772 // passing thru a c2i. Azul allowed this but we do not. If we lose the | |
773 // race and use a c2i we will remain interpreted for the race loser(s). | |
774 // This removes all sorts of headaches on the x86 side and also eliminates | |
775 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. | |
776 | |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
777 // More detail: |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
778 // Adapters can be frameless because they do not require the caller |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
779 // to perform additional cleanup work, such as correcting the stack pointer. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
780 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
781 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
782 // even if a callee has modified the stack pointer. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
783 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
784 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
785 // up via the senderSP register). |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
786 // In other words, if *either* the caller or callee is interpreted, we can |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
787 // get the stack pointer repaired after a call. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
788 // This is why c2i and i2c adapters cannot be indefinitely composed. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
789 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
790 // both caller and callee would be compiled methods, and neither would |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
791 // clean up the stack pointer changes performed by the two adapters. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
792 // If this happens, control eventually transfers back to the compiled |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
793 // caller, but with an uncorrected stack, causing delayed havoc. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
794 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
795 if (VerifyAdapterCalls && |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
796 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
797 // So, let's test for cascading c2i/i2c adapters right now. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
798 // assert(Interpreter::contains($return_addr) || |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
799 // StubRoutines::contains($return_addr), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
800 // "i2c adapter must return to an interpreter frame"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
801 __ block_comment("verify_i2c { "); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
802 Label L_ok; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
803 if (Interpreter::code() != NULL) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
804 range_check(masm, O7, O0, O1, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
805 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
806 L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
807 if (StubRoutines::code1() != NULL) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
808 range_check(masm, O7, O0, O1, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
809 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
810 L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
811 if (StubRoutines::code2() != NULL) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
812 range_check(masm, O7, O0, O1, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
813 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
814 L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
815 const char* msg = "i2c adapter must return to an interpreter frame"; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
816 __ block_comment(msg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
817 __ stop(msg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
818 __ bind(L_ok); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
819 __ block_comment("} verify_i2ce "); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
820 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
821 |
0 | 822 // As you can see from the list of inputs & outputs there are not a lot |
823 // of temp registers to work with: mostly G1, G3 & G4. | |
824 | |
825 // Inputs: | |
826 // G2_thread - TLS | |
827 // G5_method - Method oop | |
710 | 828 // G4 (Gargs) - Pointer to interpreter's args |
829 // O0..O4 - free for scratch | |
830 // O5_savedSP - Caller's saved SP, to be restored if needed | |
0 | 831 // O6 - Current SP! |
832 // O7 - Valid return address | |
710 | 833 // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
0 | 834 |
835 // Outputs: | |
836 // G2_thread - TLS | |
837 // O0-O5 - Outgoing args in compiled layout | |
838 // O6 - Adjusted or restored SP | |
839 // O7 - Valid return address | |
1564 | 840 // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
0 | 841 // F0-F7 - more outgoing args |
842 | |
843 | |
710 | 844 // Gargs is the incoming argument base, and also an outgoing argument. |
0 | 845 __ sub(Gargs, BytesPerWord, Gargs); |
846 | |
847 // ON ENTRY TO THE CODE WE ARE MAKING, WE HAVE AN INTERPRETED FRAME | |
848 // WITH O7 HOLDING A VALID RETURN PC | |
849 // | |
850 // | | | |
851 // : java stack : | |
852 // | | | |
853 // +--------------+ <--- start of outgoing args | |
854 // | receiver | | | |
855 // : rest of args : |---size is java-arg-words | |
856 // | | | | |
857 // +--------------+ <--- O4_args (misaligned) and Lesp if prior is not C2I | |
858 // | | | | |
859 // : unused : |---Space for max Java stack, plus stack alignment | |
860 // | | | | |
861 // +--------------+ <--- SP + 16*wordsize | |
862 // | | | |
863 // : window : | |
864 // | | | |
865 // +--------------+ <--- SP | |
866 | |
867 // WE REPACK THE STACK. We use the common calling convention layout as | |
868 // discovered by calling SharedRuntime::calling_convention. We assume it | |
869 // causes an arbitrary shuffle of memory, which may require some register | |
870 // temps to do the shuffle. We hope for (and optimize for) the case where | |
871 // temps are not needed. We may have to resize the stack slightly, in case | |
872 // we need alignment padding (32-bit interpreter can pass longs & doubles | |
873 // misaligned, but the compilers expect them aligned). | |
874 // | |
875 // | | | |
876 // : java stack : | |
877 // | | | |
878 // +--------------+ <--- start of outgoing args | |
879 // | pad, align | | | |
880 // +--------------+ | | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
881 // | ints, longs, | | |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
882 // | floats, | |---Outgoing stack args. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
883 // : doubles : | First few args in registers. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
884 // | | | |
0 | 885 // +--------------+ <--- SP' + 16*wordsize |
886 // | | | |
887 // : window : | |
888 // | | | |
889 // +--------------+ <--- SP' | |
890 | |
891 // ON EXIT FROM THE CODE WE ARE MAKING, WE STILL HAVE AN INTERPRETED FRAME | |
892 // WITH O7 HOLDING A VALID RETURN PC - ITS JUST THAT THE ARGS ARE NOW SETUP | |
893 // FOR COMPILED CODE AND THE FRAME SLIGHTLY GROWN. | |
894 | |
895 // Cut-out for having no stack args. Since up to 6 args are passed | |
896 // in registers, we will commonly have no stack args. | |
897 if (comp_args_on_stack > 0) { | |
898 // Convert VMReg stack slots to words. | |
899 int comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
900 // Round up to miminum stack alignment, in wordSize | |
901 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
902 // Now compute the distance from Lesp to SP. This calculation does not | |
903 // include the space for total_args_passed because Lesp has not yet popped | |
904 // the arguments. | |
905 __ sub(SP, (comp_words_on_stack)*wordSize, SP); | |
906 } | |
907 | |
908 // Now generate the shuffle code. Pick up all register args and move the | |
909 // rest through G1_scratch. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
910 for (int i = 0; i < total_args_passed; i++) { |
0 | 911 if (sig_bt[i] == T_VOID) { |
912 // Longs and doubles are passed in native word order, but misaligned | |
913 // in the 32-bit build. | |
914 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
915 continue; | |
916 } | |
917 | |
918 // Pick up 0, 1 or 2 words from Lesp+offset. Assume mis-aligned in the | |
919 // 32-bit build and aligned in the 64-bit build. Look for the obvious | |
920 // ldx/lddf optimizations. | |
921 | |
922 // Load in argument order going down. | |
1506 | 923 const int ld_off = (total_args_passed-i)*Interpreter::stackElementSize; |
0 | 924 set_Rdisp(G1_scratch); |
925 | |
926 VMReg r_1 = regs[i].first(); | |
927 VMReg r_2 = regs[i].second(); | |
928 if (!r_1->is_valid()) { | |
929 assert(!r_2->is_valid(), ""); | |
930 continue; | |
931 } | |
932 if (r_1->is_stack()) { // Pretend stack targets are loaded into F8/F9 | |
933 r_1 = F8->as_VMReg(); // as part of the load/store shuffle | |
934 if (r_2->is_valid()) r_2 = r_1->next(); | |
935 } | |
936 if (r_1->is_Register()) { // Register argument | |
937 Register r = r_1->as_Register()->after_restore(); | |
938 if (!r_2->is_valid()) { | |
939 __ ld(Gargs, arg_slot(ld_off), r); | |
940 } else { | |
941 #ifdef _LP64 | |
942 // In V9, longs are given 2 64-bit slots in the interpreter, but the | |
943 // data is passed in only 1 slot. | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
944 RegisterOrConstant slot = (sig_bt[i] == T_LONG) ? |
0 | 945 next_arg_slot(ld_off) : arg_slot(ld_off); |
946 __ ldx(Gargs, slot, r); | |
947 #else | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
948 fatal("longs should be on stack"); |
0 | 949 #endif |
950 } | |
951 } else { | |
952 assert(r_1->is_FloatRegister(), ""); | |
953 if (!r_2->is_valid()) { | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
954 __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_1->as_FloatRegister()); |
0 | 955 } else { |
956 #ifdef _LP64 | |
957 // In V9, doubles are given 2 64-bit slots in the interpreter, but the | |
958 // data is passed in only 1 slot. This code also handles longs that | |
959 // are passed on the stack, but need a stack-to-stack move through a | |
960 // spare float register. | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
961 RegisterOrConstant slot = (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) ? |
0 | 962 next_arg_slot(ld_off) : arg_slot(ld_off); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
963 __ ldf(FloatRegisterImpl::D, Gargs, slot, r_1->as_FloatRegister()); |
0 | 964 #else |
965 // Need to marshal 64-bit value from misaligned Lesp loads | |
966 __ ldf(FloatRegisterImpl::S, Gargs, next_arg_slot(ld_off), r_1->as_FloatRegister()); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
967 __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_2->as_FloatRegister()); |
0 | 968 #endif |
969 } | |
970 } | |
971 // Was the argument really intended to be on the stack, but was loaded | |
972 // into F8/F9? | |
973 if (regs[i].first()->is_stack()) { | |
974 assert(r_1->as_FloatRegister() == F8, "fix this code"); | |
975 // Convert stack slot to an SP offset | |
976 int st_off = reg2offset(regs[i].first()) + STACK_BIAS; | |
977 // Store down the shuffled stack word. Target address _is_ aligned. | |
1006
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
978 RegisterOrConstant slot = __ ensure_simm13_or_reg(st_off, Rdisp); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
979 if (!r_2->is_valid()) __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), SP, slot); |
dcf03e02b020
6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845
twisti
parents:
727
diff
changeset
|
980 else __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), SP, slot); |
0 | 981 } |
982 } | |
983 | |
984 // Jump to the compiled code just as if compiled code was doing it. | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
985 __ ld_ptr(G5_method, in_bytes(Method::from_compiled_offset()), G3); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
986 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
987 // 6243940 We might end up in handle_wrong_method if |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
988 // the callee is deoptimized as we race thru here. If that |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
989 // happens we don't want to take a safepoint because the |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
990 // caller frame will look interpreted and arguments are now |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
991 // "compiled" so it is much better to make this transition |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
992 // invisible to the stack walking code. Unfortunately if |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
993 // we try and find the callee by normal means a safepoint |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
994 // is possible. So we stash the desired callee in the thread |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
995 // and the vm will find there should this case occur. |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
996 Address callee_target_addr(G2_thread, JavaThread::callee_target_offset()); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
997 __ st_ptr(G5_method, callee_target_addr); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
998 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
999 if (StressNonEntrant) { |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1000 // Open a big window for deopt failure |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1001 __ save_frame(0); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1002 __ mov(G0, L0); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1003 Label loop; |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1004 __ bind(loop); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1005 __ sub(L0, 1, L0); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1006 __ br_null_short(L0, Assembler::pt, loop); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1007 __ restore(); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1008 } |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1009 |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1010 __ jmpl(G3, 0, G0); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1011 __ delayed()->nop(); |
0 | 1012 } |
1013 | |
1014 // --------------------------------------------------------------- | |
1015 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
1016 int total_args_passed, | |
1017 // VMReg max_arg, | |
1018 int comp_args_on_stack, // VMRegStackSlots | |
1019 const BasicType *sig_bt, | |
1187
cf0685d550f1
6911204: generated adapters with large signatures can fill up the code cache
never
parents:
1037
diff
changeset
|
1020 const VMRegPair *regs, |
cf0685d550f1
6911204: generated adapters with large signatures can fill up the code cache
never
parents:
1037
diff
changeset
|
1021 AdapterFingerPrint* fingerprint) { |
0 | 1022 address i2c_entry = __ pc(); |
1023 | |
1024 AdapterGenerator agen(masm); | |
1025 | |
1026 agen.gen_i2c_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs); | |
1027 | |
1028 | |
1029 // ------------------------------------------------------------------------- | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1030 // Generate a C2I adapter. On entry we know G5 holds the Method*. The |
0 | 1031 // args start out packed in the compiled layout. They need to be unpacked |
1032 // into the interpreter layout. This will almost always require some stack | |
1033 // space. We grow the current (compiled) stack, then repack the args. We | |
1034 // finally end in a jump to the generic interpreter entry point. On exit | |
1035 // from the interpreter, the interpreter will restore our SP (lest the | |
1036 // compiled code, which relys solely on SP and not FP, get sick). | |
1037 | |
1038 address c2i_unverified_entry = __ pc(); | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1039 Label L_skip_fixup; |
0 | 1040 { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1041 Register R_temp = G1; // another scratch register |
0 | 1042 |
727 | 1043 AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
0 | 1044 |
1045 __ verify_oop(O0); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1046 __ load_klass(O0, G3_scratch); |
0 | 1047 |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1048 __ ld_ptr(G5_method, CompiledICHolder::holder_klass_offset(), R_temp); |
0 | 1049 __ cmp(G3_scratch, R_temp); |
1050 | |
1051 Label ok, ok2; | |
1052 __ brx(Assembler::equal, false, Assembler::pt, ok); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1053 __ delayed()->ld_ptr(G5_method, CompiledICHolder::holder_method_offset(), G5_method); |
727 | 1054 __ jump_to(ic_miss, G3_scratch); |
0 | 1055 __ delayed()->nop(); |
1056 | |
1057 __ bind(ok); | |
1058 // Method might have been compiled since the call site was patched to | |
1059 // interpreted if that is the case treat it as a miss so we can get | |
1060 // the call site corrected. | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
1061 __ ld_ptr(G5_method, in_bytes(Method::code_offset()), G3_scratch); |
0 | 1062 __ bind(ok2); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1063 __ br_null(G3_scratch, false, Assembler::pt, L_skip_fixup); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1064 __ delayed()->nop(); |
727 | 1065 __ jump_to(ic_miss, G3_scratch); |
0 | 1066 __ delayed()->nop(); |
1067 | |
1068 } | |
1069 | |
1070 address c2i_entry = __ pc(); | |
1071 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1072 agen.gen_c2i_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs, L_skip_fixup); |
0 | 1073 |
1074 __ flush(); | |
1187
cf0685d550f1
6911204: generated adapters with large signatures can fill up the code cache
never
parents:
1037
diff
changeset
|
1075 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 1076 |
1077 } | |
1078 | |
1079 // Helper function for native calling conventions | |
1080 static VMReg int_stk_helper( int i ) { | |
1081 // Bias any stack based VMReg we get by ignoring the window area | |
1082 // but not the register parameter save area. | |
1083 // | |
1084 // This is strange for the following reasons. We'd normally expect | |
1085 // the calling convention to return an VMReg for a stack slot | |
1086 // completely ignoring any abi reserved area. C2 thinks of that | |
1087 // abi area as only out_preserve_stack_slots. This does not include | |
1088 // the area allocated by the C abi to store down integer arguments | |
1089 // because the java calling convention does not use it. So | |
1090 // since c2 assumes that there are only out_preserve_stack_slots | |
1091 // to bias the optoregs (which impacts VMRegs) when actually referencing any actual stack | |
1092 // location the c calling convention must add in this bias amount | |
1093 // to make up for the fact that the out_preserve_stack_slots is | |
1094 // insufficient for C calls. What a mess. I sure hope those 6 | |
1095 // stack words were worth it on every java call! | |
1096 | |
1097 // Another way of cleaning this up would be for out_preserve_stack_slots | |
1098 // to take a parameter to say whether it was C or java calling conventions. | |
1099 // Then things might look a little better (but not much). | |
1100 | |
1101 int mem_parm_offset = i - SPARC_ARGS_IN_REGS_NUM; | |
1102 if( mem_parm_offset < 0 ) { | |
1103 return as_oRegister(i)->as_VMReg(); | |
1104 } else { | |
1105 int actual_offset = (mem_parm_offset + frame::memory_parameter_word_sp_offset) * VMRegImpl::slots_per_word; | |
1106 // Now return a biased offset that will be correct when out_preserve_slots is added back in | |
1107 return VMRegImpl::stack2reg(actual_offset - SharedRuntime::out_preserve_stack_slots()); | |
1108 } | |
1109 } | |
1110 | |
1111 | |
1112 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
1113 VMRegPair *regs, | |
1114 int total_args_passed) { | |
1115 | |
1116 // Return the number of VMReg stack_slots needed for the args. | |
1117 // This value does not include an abi space (like register window | |
1118 // save area). | |
1119 | |
1120 // The native convention is V8 if !LP64 | |
1121 // The LP64 convention is the V9 convention which is slightly more sane. | |
1122 | |
1123 // We return the amount of VMReg stack slots we need to reserve for all | |
1124 // the arguments NOT counting out_preserve_stack_slots. Since we always | |
1125 // have space for storing at least 6 registers to memory we start with that. | |
1126 // See int_stk_helper for a further discussion. | |
1127 int max_stack_slots = (frame::varargs_offset * VMRegImpl::slots_per_word) - SharedRuntime::out_preserve_stack_slots(); | |
1128 | |
1129 #ifdef _LP64 | |
1130 // V9 convention: All things "as-if" on double-wide stack slots. | |
1131 // Hoist any int/ptr/long's in the first 6 to int regs. | |
1132 // Hoist any flt/dbl's in the first 16 dbl regs. | |
1133 int j = 0; // Count of actual args, not HALVES | |
1134 for( int i=0; i<total_args_passed; i++, j++ ) { | |
1135 switch( sig_bt[i] ) { | |
1136 case T_BOOLEAN: | |
1137 case T_BYTE: | |
1138 case T_CHAR: | |
1139 case T_INT: | |
1140 case T_SHORT: | |
1141 regs[i].set1( int_stk_helper( j ) ); break; | |
1142 case T_LONG: | |
1143 assert( sig_bt[i+1] == T_VOID, "expecting half" ); | |
1144 case T_ADDRESS: // raw pointers, like current thread, for VM calls | |
1145 case T_ARRAY: | |
1146 case T_OBJECT: | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1147 case T_METADATA: |
0 | 1148 regs[i].set2( int_stk_helper( j ) ); |
1149 break; | |
1150 case T_FLOAT: | |
1151 if ( j < 16 ) { | |
1152 // V9ism: floats go in ODD registers | |
1153 regs[i].set1(as_FloatRegister(1 + (j<<1))->as_VMReg()); | |
1154 } else { | |
1155 // V9ism: floats go in ODD stack slot | |
1156 regs[i].set1(VMRegImpl::stack2reg(1 + (j<<1))); | |
1157 } | |
1158 break; | |
1159 case T_DOUBLE: | |
1160 assert( sig_bt[i+1] == T_VOID, "expecting half" ); | |
1161 if ( j < 16 ) { | |
1162 // V9ism: doubles go in EVEN/ODD regs | |
1163 regs[i].set2(as_FloatRegister(j<<1)->as_VMReg()); | |
1164 } else { | |
1165 // V9ism: doubles go in EVEN/ODD stack slots | |
1166 regs[i].set2(VMRegImpl::stack2reg(j<<1)); | |
1167 } | |
1168 break; | |
1169 case T_VOID: regs[i].set_bad(); j--; break; // Do not count HALVES | |
1170 default: | |
1171 ShouldNotReachHere(); | |
1172 } | |
1173 if (regs[i].first()->is_stack()) { | |
1174 int off = regs[i].first()->reg2stack(); | |
1175 if (off > max_stack_slots) max_stack_slots = off; | |
1176 } | |
1177 if (regs[i].second()->is_stack()) { | |
1178 int off = regs[i].second()->reg2stack(); | |
1179 if (off > max_stack_slots) max_stack_slots = off; | |
1180 } | |
1181 } | |
1182 | |
1183 #else // _LP64 | |
1184 // V8 convention: first 6 things in O-regs, rest on stack. | |
1185 // Alignment is willy-nilly. | |
1186 for( int i=0; i<total_args_passed; i++ ) { | |
1187 switch( sig_bt[i] ) { | |
1188 case T_ADDRESS: // raw pointers, like current thread, for VM calls | |
1189 case T_ARRAY: | |
1190 case T_BOOLEAN: | |
1191 case T_BYTE: | |
1192 case T_CHAR: | |
1193 case T_FLOAT: | |
1194 case T_INT: | |
1195 case T_OBJECT: | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1196 case T_METADATA: |
0 | 1197 case T_SHORT: |
1198 regs[i].set1( int_stk_helper( i ) ); | |
1199 break; | |
1200 case T_DOUBLE: | |
1201 case T_LONG: | |
1202 assert( sig_bt[i+1] == T_VOID, "expecting half" ); | |
1203 regs[i].set_pair( int_stk_helper( i+1 ), int_stk_helper( i ) ); | |
1204 break; | |
1205 case T_VOID: regs[i].set_bad(); break; | |
1206 default: | |
1207 ShouldNotReachHere(); | |
1208 } | |
1209 if (regs[i].first()->is_stack()) { | |
1210 int off = regs[i].first()->reg2stack(); | |
1211 if (off > max_stack_slots) max_stack_slots = off; | |
1212 } | |
1213 if (regs[i].second()->is_stack()) { | |
1214 int off = regs[i].second()->reg2stack(); | |
1215 if (off > max_stack_slots) max_stack_slots = off; | |
1216 } | |
1217 } | |
1218 #endif // _LP64 | |
1219 | |
1220 return round_to(max_stack_slots + 1, 2); | |
1221 | |
1222 } | |
1223 | |
1224 | |
1225 // --------------------------------------------------------------------------- | |
1226 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1227 switch (ret_type) { | |
1228 case T_FLOAT: | |
1229 __ stf(FloatRegisterImpl::S, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS); | |
1230 break; | |
1231 case T_DOUBLE: | |
1232 __ stf(FloatRegisterImpl::D, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS); | |
1233 break; | |
1234 } | |
1235 } | |
1236 | |
1237 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1238 switch (ret_type) { | |
1239 case T_FLOAT: | |
1240 __ ldf(FloatRegisterImpl::S, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS, F0); | |
1241 break; | |
1242 case T_DOUBLE: | |
1243 __ ldf(FloatRegisterImpl::D, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS, F0); | |
1244 break; | |
1245 } | |
1246 } | |
1247 | |
1248 // Check and forward and pending exception. Thread is stored in | |
1249 // L7_thread_cache and possibly NOT in G2_thread. Since this is a native call, there | |
1250 // is no exception handler. We merely pop this frame off and throw the | |
1251 // exception in the caller's frame. | |
1252 static void check_forward_pending_exception(MacroAssembler *masm, Register Rex_oop) { | |
1253 Label L; | |
1254 __ br_null(Rex_oop, false, Assembler::pt, L); | |
1255 __ delayed()->mov(L7_thread_cache, G2_thread); // restore in case we have exception | |
1256 // Since this is a native call, we *know* the proper exception handler | |
1257 // without calling into the VM: it's the empty function. Just pop this | |
1258 // frame and then jump to forward_exception_entry; O7 will contain the | |
1259 // native caller's return PC. | |
727 | 1260 AddressLiteral exception_entry(StubRoutines::forward_exception_entry()); |
1261 __ jump_to(exception_entry, G3_scratch); | |
0 | 1262 __ delayed()->restore(); // Pop this frame off. |
1263 __ bind(L); | |
1264 } | |
1265 | |
1266 // A simple move of integer like type | |
1267 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1268 if (src.first()->is_stack()) { | |
1269 if (dst.first()->is_stack()) { | |
1270 // stack to stack | |
1271 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1272 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1273 } else { | |
1274 // stack to reg | |
1275 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1276 } | |
1277 } else if (dst.first()->is_stack()) { | |
1278 // reg to stack | |
1279 __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1280 } else { | |
1281 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1282 } | |
1283 } | |
1284 | |
1285 // On 64 bit we will store integer like items to the stack as | |
1286 // 64 bits items (sparc abi) even though java would only store | |
1287 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
1288 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
1289 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1290 if (src.first()->is_stack()) { | |
1291 if (dst.first()->is_stack()) { | |
1292 // stack to stack | |
1293 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1294 __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1295 } else { | |
1296 // stack to reg | |
1297 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1298 } | |
1299 } else if (dst.first()->is_stack()) { | |
1300 // reg to stack | |
1301 __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1302 } else { | |
1303 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1304 } | |
1305 } | |
1306 | |
1307 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1308 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1309 if (src.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1310 if (dst.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1311 // stack to stack |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1312 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1313 __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1314 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1315 // stack to reg |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1316 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1317 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1318 } else if (dst.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1319 // reg to stack |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1320 __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1321 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1322 __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1323 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1324 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1325 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1326 |
0 | 1327 // An oop arg. Must pass a handle not the oop itself |
1328 static void object_move(MacroAssembler* masm, | |
1329 OopMap* map, | |
1330 int oop_handle_offset, | |
1331 int framesize_in_slots, | |
1332 VMRegPair src, | |
1333 VMRegPair dst, | |
1334 bool is_receiver, | |
1335 int* receiver_offset) { | |
1336 | |
1337 // must pass a handle. First figure out the location we use as a handle | |
1338 | |
1339 if (src.first()->is_stack()) { | |
1340 // Oop is already on the stack | |
1341 Register rHandle = dst.first()->is_stack() ? L5 : dst.first()->as_Register(); | |
1342 __ add(FP, reg2offset(src.first()) + STACK_BIAS, rHandle); | |
1343 __ ld_ptr(rHandle, 0, L4); | |
1344 #ifdef _LP64 | |
1345 __ movr( Assembler::rc_z, L4, G0, rHandle ); | |
1346 #else | |
1347 __ tst( L4 ); | |
1348 __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); | |
1349 #endif | |
1350 if (dst.first()->is_stack()) { | |
1351 __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1352 } | |
1353 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1354 if (is_receiver) { | |
1355 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1356 } | |
1357 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1358 } else { | |
1359 // Oop is in an input register pass we must flush it to the stack | |
1360 const Register rOop = src.first()->as_Register(); | |
1361 const Register rHandle = L5; | |
1362 int oop_slot = rOop->input_number() * VMRegImpl::slots_per_word + oop_handle_offset; | |
1363 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1364 Label skip; | |
1365 __ st_ptr(rOop, SP, offset + STACK_BIAS); | |
1366 if (is_receiver) { | |
1367 *receiver_offset = oop_slot * VMRegImpl::stack_slot_size; | |
1368 } | |
1369 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1370 __ add(SP, offset + STACK_BIAS, rHandle); | |
1371 #ifdef _LP64 | |
1372 __ movr( Assembler::rc_z, rOop, G0, rHandle ); | |
1373 #else | |
1374 __ tst( rOop ); | |
1375 __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); | |
1376 #endif | |
1377 | |
1378 if (dst.first()->is_stack()) { | |
1379 __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1380 } else { | |
1381 __ mov(rHandle, dst.first()->as_Register()); | |
1382 } | |
1383 } | |
1384 } | |
1385 | |
1386 // A float arg may have to do float reg int reg conversion | |
1387 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1388 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1389 | |
1390 if (src.first()->is_stack()) { | |
1391 if (dst.first()->is_stack()) { | |
1392 // stack to stack the easiest of the bunch | |
1393 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1394 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1395 } else { | |
1396 // stack to reg | |
1397 if (dst.first()->is_Register()) { | |
1398 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1399 } else { | |
1400 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1401 } | |
1402 } | |
1403 } else if (dst.first()->is_stack()) { | |
1404 // reg to stack | |
1405 if (src.first()->is_Register()) { | |
1406 __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1407 } else { | |
1408 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1409 } | |
1410 } else { | |
1411 // reg to reg | |
1412 if (src.first()->is_Register()) { | |
1413 if (dst.first()->is_Register()) { | |
1414 // gpr -> gpr | |
1415 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1416 } else { | |
1417 // gpr -> fpr | |
1418 __ st(src.first()->as_Register(), FP, -4 + STACK_BIAS); | |
1419 __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1420 } | |
1421 } else if (dst.first()->is_Register()) { | |
1422 // fpr -> gpr | |
1423 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), FP, -4 + STACK_BIAS); | |
1424 __ ld(FP, -4 + STACK_BIAS, dst.first()->as_Register()); | |
1425 } else { | |
1426 // fpr -> fpr | |
1427 // In theory these overlap but the ordering is such that this is likely a nop | |
1428 if ( src.first() != dst.first()) { | |
1429 __ fmov(FloatRegisterImpl::S, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); | |
1430 } | |
1431 } | |
1432 } | |
1433 } | |
1434 | |
1435 static void split_long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1436 VMRegPair src_lo(src.first()); | |
1437 VMRegPair src_hi(src.second()); | |
1438 VMRegPair dst_lo(dst.first()); | |
1439 VMRegPair dst_hi(dst.second()); | |
1440 simple_move32(masm, src_lo, dst_lo); | |
1441 simple_move32(masm, src_hi, dst_hi); | |
1442 } | |
1443 | |
1444 // A long move | |
1445 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1446 | |
1447 // Do the simple ones here else do two int moves | |
1448 if (src.is_single_phys_reg() ) { | |
1449 if (dst.is_single_phys_reg()) { | |
1450 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1451 } else { | |
1452 // split src into two separate registers | |
1453 // Remember hi means hi address or lsw on sparc | |
1454 // Move msw to lsw | |
1455 if (dst.second()->is_reg()) { | |
1456 // MSW -> MSW | |
1457 __ srax(src.first()->as_Register(), 32, dst.first()->as_Register()); | |
1458 // Now LSW -> LSW | |
1459 // this will only move lo -> lo and ignore hi | |
1460 VMRegPair split(dst.second()); | |
1461 simple_move32(masm, src, split); | |
1462 } else { | |
1463 VMRegPair split(src.first(), L4->as_VMReg()); | |
1464 // MSW -> MSW (lo ie. first word) | |
1465 __ srax(src.first()->as_Register(), 32, L4); | |
1466 split_long_move(masm, split, dst); | |
1467 } | |
1468 } | |
1469 } else if (dst.is_single_phys_reg()) { | |
1470 if (src.is_adjacent_aligned_on_stack(2)) { | |
304 | 1471 __ ldx(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
0 | 1472 } else { |
1473 // dst is a single reg. | |
1474 // Remember lo is low address not msb for stack slots | |
1475 // and lo is the "real" register for registers | |
1476 // src is | |
1477 | |
1478 VMRegPair split; | |
1479 | |
1480 if (src.first()->is_reg()) { | |
1481 // src.lo (msw) is a reg, src.hi is stk/reg | |
1482 // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> src.lo [the MSW is in the LSW of the reg] | |
1483 split.set_pair(dst.first(), src.first()); | |
1484 } else { | |
1485 // msw is stack move to L5 | |
1486 // lsw is stack move to dst.lo (real reg) | |
1487 // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> L5 | |
1488 split.set_pair(dst.first(), L5->as_VMReg()); | |
1489 } | |
1490 | |
1491 // src.lo -> src.lo/L5, src.hi -> dst.lo (the real reg) | |
1492 // msw -> src.lo/L5, lsw -> dst.lo | |
1493 split_long_move(masm, src, split); | |
1494 | |
1495 // So dst now has the low order correct position the | |
1496 // msw half | |
1497 __ sllx(split.first()->as_Register(), 32, L5); | |
1498 | |
1499 const Register d = dst.first()->as_Register(); | |
1500 __ or3(L5, d, d); | |
1501 } | |
1502 } else { | |
1503 // For LP64 we can probably do better. | |
1504 split_long_move(masm, src, dst); | |
1505 } | |
1506 } | |
1507 | |
1508 // A double move | |
1509 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1510 | |
1511 // The painful thing here is that like long_move a VMRegPair might be | |
1512 // 1: a single physical register | |
1513 // 2: two physical registers (v8) | |
1514 // 3: a physical reg [lo] and a stack slot [hi] (v8) | |
1515 // 4: two stack slots | |
1516 | |
1517 // Since src is always a java calling convention we know that the src pair | |
1518 // is always either all registers or all stack (and aligned?) | |
1519 | |
1520 // in a register [lo] and a stack slot [hi] | |
1521 if (src.first()->is_stack()) { | |
1522 if (dst.first()->is_stack()) { | |
1523 // stack to stack the easiest of the bunch | |
1524 // ought to be a way to do this where if alignment is ok we use ldd/std when possible | |
1525 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
1526 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); | |
1527 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
1528 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1529 } else { | |
1530 // stack to reg | |
1531 if (dst.second()->is_stack()) { | |
1532 // stack -> reg, stack -> stack | |
1533 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); | |
1534 if (dst.first()->is_Register()) { | |
1535 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1536 } else { | |
1537 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1538 } | |
1539 // This was missing. (very rare case) | |
1540 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1541 } else { | |
1542 // stack -> reg | |
1543 // Eventually optimize for alignment QQQ | |
1544 if (dst.first()->is_Register()) { | |
1545 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); | |
1546 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_Register()); | |
1547 } else { | |
1548 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1549 __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_FloatRegister()); | |
1550 } | |
1551 } | |
1552 } | |
1553 } else if (dst.first()->is_stack()) { | |
1554 // reg to stack | |
1555 if (src.first()->is_Register()) { | |
1556 // Eventually optimize for alignment QQQ | |
1557 __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1558 if (src.second()->is_stack()) { | |
1559 __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); | |
1560 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1561 } else { | |
1562 __ st(src.second()->as_Register(), SP, reg2offset(dst.second()) + STACK_BIAS); | |
1563 } | |
1564 } else { | |
1565 // fpr to stack | |
1566 if (src.second()->is_stack()) { | |
1567 ShouldNotReachHere(); | |
1568 } else { | |
1569 // Is the stack aligned? | |
1570 if (reg2offset(dst.first()) & 0x7) { | |
1571 // No do as pairs | |
1572 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1573 __ stf(FloatRegisterImpl::S, src.second()->as_FloatRegister(), SP, reg2offset(dst.second()) + STACK_BIAS); | |
1574 } else { | |
1575 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); | |
1576 } | |
1577 } | |
1578 } | |
1579 } else { | |
1580 // reg to reg | |
1581 if (src.first()->is_Register()) { | |
1582 if (dst.first()->is_Register()) { | |
1583 // gpr -> gpr | |
1584 __ mov(src.first()->as_Register(), dst.first()->as_Register()); | |
1585 __ mov(src.second()->as_Register(), dst.second()->as_Register()); | |
1586 } else { | |
1587 // gpr -> fpr | |
1588 // ought to be able to do a single store | |
1589 __ stx(src.first()->as_Register(), FP, -8 + STACK_BIAS); | |
1590 __ stx(src.second()->as_Register(), FP, -4 + STACK_BIAS); | |
1591 // ought to be able to do a single load | |
1592 __ ldf(FloatRegisterImpl::S, FP, -8 + STACK_BIAS, dst.first()->as_FloatRegister()); | |
1593 __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.second()->as_FloatRegister()); | |
1594 } | |
1595 } else if (dst.first()->is_Register()) { | |
1596 // fpr -> gpr | |
1597 // ought to be able to do a single store | |
1598 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), FP, -8 + STACK_BIAS); | |
1599 // ought to be able to do a single load | |
1600 // REMEMBER first() is low address not LSB | |
1601 __ ld(FP, -8 + STACK_BIAS, dst.first()->as_Register()); | |
1602 if (dst.second()->is_Register()) { | |
1603 __ ld(FP, -4 + STACK_BIAS, dst.second()->as_Register()); | |
1604 } else { | |
1605 __ ld(FP, -4 + STACK_BIAS, L4); | |
1606 __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); | |
1607 } | |
1608 } else { | |
1609 // fpr -> fpr | |
1610 // In theory these overlap but the ordering is such that this is likely a nop | |
1611 if ( src.first() != dst.first()) { | |
1612 __ fmov(FloatRegisterImpl::D, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); | |
1613 } | |
1614 } | |
1615 } | |
1616 } | |
1617 | |
1618 // Creates an inner frame if one hasn't already been created, and | |
1619 // saves a copy of the thread in L7_thread_cache | |
1620 static void create_inner_frame(MacroAssembler* masm, bool* already_created) { | |
1621 if (!*already_created) { | |
1622 __ save_frame(0); | |
1623 // Save thread in L7 (INNER FRAME); it crosses a bunch of VM calls below | |
1624 // Don't use save_thread because it smashes G2 and we merely want to save a | |
1625 // copy | |
1626 __ mov(G2_thread, L7_thread_cache); | |
1627 *already_created = true; | |
1628 } | |
1629 } | |
1630 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1631 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1632 static void save_or_restore_arguments(MacroAssembler* masm, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1633 const int stack_slots, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1634 const int total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1635 const int arg_save_area, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1636 OopMap* map, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1637 VMRegPair* in_regs, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1638 BasicType* in_sig_bt) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1639 // if map is non-NULL then the code should store the values, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1640 // otherwise it should load them. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1641 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1642 // Fill in the map |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1643 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1644 if (in_sig_bt[i] == T_ARRAY) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1645 if (in_regs[i].first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1646 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1647 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1648 } else if (in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1649 map->set_oop(in_regs[i].first()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1650 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1651 ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1652 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1653 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1654 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1655 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1656 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1657 // Save or restore double word values |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1658 int handle_index = 0; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1659 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1660 int slot = handle_index + arg_save_area; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1661 int offset = slot * VMRegImpl::stack_slot_size; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1662 if (in_sig_bt[i] == T_LONG && in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1663 const Register reg = in_regs[i].first()->as_Register(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1664 if (reg->is_global()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1665 handle_index += 2; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1666 assert(handle_index <= stack_slots, "overflow"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1667 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1668 __ stx(reg, SP, offset + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1669 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1670 __ ldx(SP, offset + STACK_BIAS, reg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1671 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1672 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1673 } else if (in_sig_bt[i] == T_DOUBLE && in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1674 handle_index += 2; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1675 assert(handle_index <= stack_slots, "overflow"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1676 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1677 __ stf(FloatRegisterImpl::D, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1678 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1679 __ ldf(FloatRegisterImpl::D, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1680 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1681 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1682 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1683 // Save floats |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1684 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1685 int slot = handle_index + arg_save_area; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1686 int offset = slot * VMRegImpl::stack_slot_size; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1687 if (in_sig_bt[i] == T_FLOAT && in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1688 handle_index++; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1689 assert(handle_index <= stack_slots, "overflow"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1690 if (map != NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1691 __ stf(FloatRegisterImpl::S, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1692 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1693 __ ldf(FloatRegisterImpl::S, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1694 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1695 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1696 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1697 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1698 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1699 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1700 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1701 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1702 // keeps a new JNI critical region from starting until a GC has been |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1703 // forced. Save down any oops in registers and describe them in an |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1704 // OopMap. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1705 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1706 const int stack_slots, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1707 const int total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1708 const int arg_save_area, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1709 OopMapSet* oop_maps, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1710 VMRegPair* in_regs, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1711 BasicType* in_sig_bt) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1712 __ block_comment("check GC_locker::needs_gc"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1713 Label cont; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1714 AddressLiteral sync_state(GC_locker::needs_gc_address()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1715 __ load_bool_contents(sync_state, G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1716 __ cmp_zero_and_br(Assembler::equal, G3_scratch, cont); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1717 __ delayed()->nop(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1718 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1719 // Save down any values that are live in registers and call into the |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1720 // runtime to halt for a GC |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1721 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1722 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1723 arg_save_area, map, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1724 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1725 __ mov(G2_thread, L7_thread_cache); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1726 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1727 __ set_last_Java_frame(SP, noreg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1728 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1729 __ block_comment("block_for_jni_critical"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1730 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical), relocInfo::runtime_call_type); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1731 __ delayed()->mov(L7_thread_cache, O0); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1732 oop_maps->add_gc_map( __ offset(), map); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1733 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1734 __ restore_thread(L7_thread_cache); // restore G2_thread |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1735 __ reset_last_Java_frame(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1736 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1737 // Reload all the register arguments |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1738 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1739 arg_save_area, NULL, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1740 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1741 __ bind(cont); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1742 #ifdef ASSERT |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1743 if (StressCriticalJNINatives) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1744 // Stress register saving |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1745 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1746 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1747 arg_save_area, map, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1748 // Destroy argument registers |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1749 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1750 if (in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1751 const Register reg = in_regs[i].first()->as_Register(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1752 if (reg->is_global()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1753 __ mov(G0, reg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1754 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1755 } else if (in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1756 __ fneg(FloatRegisterImpl::D, in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1757 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1758 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1759 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1760 save_or_restore_arguments(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1761 arg_save_area, NULL, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1762 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1763 #endif |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1764 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1765 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1766 // Unpack an array argument into a pointer to the body and the length |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1767 // if the array is non-null, otherwise pass 0 for both. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1768 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1769 // Pass the length, ptr pair |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1770 Label is_null, done; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1771 if (reg.first()->is_stack()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1772 VMRegPair tmp = reg64_to_VMRegPair(L2); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1773 // Load the arg up from the stack |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1774 move_ptr(masm, reg, tmp); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1775 reg = tmp; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1776 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1777 __ cmp(reg.first()->as_Register(), G0); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1778 __ brx(Assembler::equal, false, Assembler::pt, is_null); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1779 __ delayed()->add(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type), L4); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1780 move_ptr(masm, reg64_to_VMRegPair(L4), body_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1781 __ ld(reg.first()->as_Register(), arrayOopDesc::length_offset_in_bytes(), L4); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1782 move32_64(masm, reg64_to_VMRegPair(L4), length_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1783 __ ba_short(done); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1784 __ bind(is_null); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1785 // Pass zeros |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1786 move_ptr(masm, reg64_to_VMRegPair(G0), body_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1787 move32_64(masm, reg64_to_VMRegPair(G0), length_arg); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1788 __ bind(done); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1789 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1790 |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1791 static void verify_oop_args(MacroAssembler* masm, |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1792 methodHandle method, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1793 const BasicType* sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1794 const VMRegPair* regs) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1795 Register temp_reg = G5_method; // not part of any compiled calling seq |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1796 if (VerifyOops) { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1797 for (int i = 0; i < method->size_of_parameters(); i++) { |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1798 if (sig_bt[i] == T_OBJECT || |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1799 sig_bt[i] == T_ARRAY) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1800 VMReg r = regs[i].first(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1801 assert(r->is_valid(), "bad oop arg"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1802 if (r->is_stack()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1803 RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1804 ld_off = __ ensure_simm13_or_reg(ld_off, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1805 __ ld_ptr(SP, ld_off, temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1806 __ verify_oop(temp_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1807 } else { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1808 __ verify_oop(r->as_Register()); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1809 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1810 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1811 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1812 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1813 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1814 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1815 static void gen_special_dispatch(MacroAssembler* masm, |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1816 methodHandle method, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1817 const BasicType* sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1818 const VMRegPair* regs) { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1819 verify_oop_args(masm, method, sig_bt, regs); |
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1820 vmIntrinsics::ID iid = method->intrinsic_id(); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1821 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1822 // Now write the args into the outgoing interpreter space |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1823 bool has_receiver = false; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1824 Register receiver_reg = noreg; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1825 int member_arg_pos = -1; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1826 Register member_reg = noreg; |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1827 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1828 if (ref_kind != 0) { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1829 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1830 member_reg = G5_method; // known to be free at this point |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1831 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1832 } else if (iid == vmIntrinsics::_invokeBasic) { |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1833 has_receiver = true; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1834 } else { |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1835 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1836 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1837 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1838 if (member_reg != noreg) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1839 // Load the member_arg into register, if necessary. |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1840 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1841 VMReg r = regs[member_arg_pos].first(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1842 if (r->is_stack()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1843 RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1844 ld_off = __ ensure_simm13_or_reg(ld_off, member_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1845 __ ld_ptr(SP, ld_off, member_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1846 } else { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1847 // no data motion is needed |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1848 member_reg = r->as_Register(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1849 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1850 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1851 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1852 if (has_receiver) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1853 // Make sure the receiver is loaded into a register. |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1854 assert(method->size_of_parameters() > 0, "oob"); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1855 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1856 VMReg r = regs[0].first(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1857 assert(r->is_valid(), "bad receiver arg"); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1858 if (r->is_stack()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1859 // Porting note: This assumes that compiled calling conventions always |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1860 // pass the receiver oop in a register. If this is not true on some |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1861 // platform, pick a temp and load the receiver from stack. |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1862 fatal("receiver always in a register"); |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1863 receiver_reg = G3_scratch; // known to be free at this point |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1864 RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1865 ld_off = __ ensure_simm13_or_reg(ld_off, member_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1866 __ ld_ptr(SP, ld_off, receiver_reg); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1867 } else { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1868 // no data motion is needed |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1869 receiver_reg = r->as_Register(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1870 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1871 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1872 |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1873 // Figure out which address we are really jumping to: |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1874 MethodHandles::generate_method_handle_dispatch(masm, iid, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1875 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1876 } |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1877 |
0 | 1878 // --------------------------------------------------------------------------- |
1879 // Generate a native wrapper for a given method. The method takes arguments | |
1880 // in the Java compiled code convention, marshals them to the native | |
1881 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1882 // returns to java state (possibly blocking), unhandlizes any result and | |
1883 // returns. | |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1884 // |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1885 // Critical native functions are a shorthand for the use of |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1886 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1887 // functions. The wrapper is expected to unpack the arguments before |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1888 // passing them to the callee and perform checks before and after the |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1889 // native call to ensure that they GC_locker |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1890 // lock_critical/unlock_critical semantics are followed. Some other |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1891 // parts of JNI setup are skipped like the tear down of the JNI handle |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1892 // block and the check for pending exceptions it's impossible for them |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1893 // to be thrown. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1894 // |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1895 // They are roughly structured like this: |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1896 // if (GC_locker::needs_gc()) |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1897 // SharedRuntime::block_for_jni_critical(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1898 // tranistion to thread_in_native |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1899 // unpack arrray arguments and call native entry point |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1900 // check for safepoint in progress |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1901 // check if any thread suspend flags are set |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1902 // call into JVM and possible unlock the JNI critical |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1903 // if a GC was suppressed while in the critical native. |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1904 // transition back to thread_in_Java |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1905 // return to caller |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1906 // |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1907 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1908 methodHandle method, |
2405
3d58a4983660
7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents:
2177
diff
changeset
|
1909 int compile_id, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1910 BasicType* in_sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1911 VMRegPair* in_regs, |
0 | 1912 BasicType ret_type) { |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1913 if (method->is_method_handle_intrinsic()) { |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1914 vmIntrinsics::ID iid = method->intrinsic_id(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1915 intptr_t start = (intptr_t)__ pc(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1916 int vep_offset = ((intptr_t)__ pc()) - start; |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1917 gen_special_dispatch(masm, |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
1918 method, |
6266
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1919 in_sig_bt, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1920 in_regs); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1921 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1922 __ flush(); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1923 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1924 return nmethod::new_native_nmethod(method, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1925 compile_id, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1926 masm->code(), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1927 vep_offset, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1928 frame_complete, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1929 stack_slots / VMRegImpl::slots_per_word, |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1930 in_ByteSize(-1), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1931 in_ByteSize(-1), |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1932 (OopMapSet*)NULL); |
1d7922586cf6
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
5923
diff
changeset
|
1933 } |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1934 bool is_critical_native = true; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1935 address native_func = method->critical_native_function(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1936 if (native_func == NULL) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1937 native_func = method->native_function(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1938 is_critical_native = false; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1939 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
1940 assert(native_func != NULL, "must have function"); |
0 | 1941 |
1942 // Native nmethod wrappers never take possesion of the oop arguments. | |
1943 // So the caller will gc the arguments. The only thing we need an | |
1944 // oopMap for is if the call is static | |
1945 // | |
1946 // An OopMap for lock (and class if static), and one for the VM call itself | |
1947 OopMapSet *oop_maps = new OopMapSet(); | |
1948 intptr_t start = (intptr_t)__ pc(); | |
1949 | |
1950 // First thing make an ic check to see if we should even be here | |
1951 { | |
1952 Label L; | |
1953 const Register temp_reg = G3_scratch; | |
727 | 1954 AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
0 | 1955 __ verify_oop(O0); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1956 __ load_klass(O0, temp_reg); |
3839 | 1957 __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
0 | 1958 |
727 | 1959 __ jump_to(ic_miss, temp_reg); |
0 | 1960 __ delayed()->nop(); |
1961 __ align(CodeEntryAlignment); | |
1962 __ bind(L); | |
1963 } | |
1964 | |
1965 int vep_offset = ((intptr_t)__ pc()) - start; | |
1966 | |
1967 #ifdef COMPILER1 | |
1968 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
1969 // Object.hashCode can pull the hashCode from the header word | |
1970 // instead of doing a full VM transition once it's been computed. | |
1971 // Since hashCode is usually polymorphic at call sites we can't do | |
1972 // this optimization at the call site without a lot of work. | |
1973 Label slowCase; | |
1974 Register receiver = O0; | |
1975 Register result = O0; | |
1976 Register header = G3_scratch; | |
1977 Register hash = G3_scratch; // overwrite header value with hash value | |
1978 Register mask = G1; // to get hash field from header | |
1979 | |
1980 // Read the header and build a mask to get its hash field. Give up if the object is not unlocked. | |
1981 // We depend on hash_mask being at most 32 bits and avoid the use of | |
1982 // hash_mask_in_place because it could be larger than 32 bits in a 64-bit | |
1983 // vm: see markOop.hpp. | |
1984 __ ld_ptr(receiver, oopDesc::mark_offset_in_bytes(), header); | |
1985 __ sethi(markOopDesc::hash_mask, mask); | |
1986 __ btst(markOopDesc::unlocked_value, header); | |
1987 __ br(Assembler::zero, false, Assembler::pn, slowCase); | |
1988 if (UseBiasedLocking) { | |
1989 // Check if biased and fall through to runtime if so | |
1990 __ delayed()->nop(); | |
1991 __ btst(markOopDesc::biased_lock_bit_in_place, header); | |
1992 __ br(Assembler::notZero, false, Assembler::pn, slowCase); | |
1993 } | |
1994 __ delayed()->or3(mask, markOopDesc::hash_mask & 0x3ff, mask); | |
1995 | |
1996 // Check for a valid (non-zero) hash code and get its value. | |
1997 #ifdef _LP64 | |
1998 __ srlx(header, markOopDesc::hash_shift, hash); | |
1999 #else | |
2000 __ srl(header, markOopDesc::hash_shift, hash); | |
2001 #endif | |
2002 __ andcc(hash, mask, hash); | |
2003 __ br(Assembler::equal, false, Assembler::pn, slowCase); | |
2004 __ delayed()->nop(); | |
2005 | |
2006 // leaf return. | |
2007 __ retl(); | |
2008 __ delayed()->mov(hash, result); | |
2009 __ bind(slowCase); | |
2010 } | |
2011 #endif // COMPILER1 | |
2012 | |
2013 | |
2014 // We have received a description of where all the java arg are located | |
2015 // on entry to the wrapper. We need to convert these args to where | |
2016 // the jni function will expect them. To figure out where they go | |
2017 // we convert the java signature to a C signature by inserting | |
2018 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
2019 | |
6790
2cb2f30450c7
7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents:
6739
diff
changeset
|
2020 const int total_in_args = method->size_of_parameters(); |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2021 int total_c_args = total_in_args; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2022 int total_save_slots = 6 * VMRegImpl::slots_per_word; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2023 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2024 total_c_args += 1; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2025 if (method->is_static()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2026 total_c_args++; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2027 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2028 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2029 for (int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2030 if (in_sig_bt[i] == T_ARRAY) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2031 // These have to be saved and restored across the safepoint |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2032 total_c_args++; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2033 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2034 } |
0 | 2035 } |
2036 | |
2037 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2038 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2039 BasicType* in_elem_bt = NULL; |
0 | 2040 |
2041 int argc = 0; | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2042 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2043 out_sig_bt[argc++] = T_ADDRESS; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2044 if (method->is_static()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2045 out_sig_bt[argc++] = T_OBJECT; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2046 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2047 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2048 for (int i = 0; i < total_in_args ; i++ ) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2049 out_sig_bt[argc++] = in_sig_bt[i]; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2050 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2051 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2052 Thread* THREAD = Thread::current(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2053 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2054 SignatureStream ss(method->signature()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2055 for (int i = 0; i < total_in_args ; i++ ) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2056 if (in_sig_bt[i] == T_ARRAY) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2057 // Arrays are passed as int, elem* pair |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2058 out_sig_bt[argc++] = T_INT; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2059 out_sig_bt[argc++] = T_ADDRESS; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2060 Symbol* atype = ss.as_symbol(CHECK_NULL); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2061 const char* at = atype->as_C_string(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2062 if (strlen(at) == 2) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2063 assert(at[0] == '[', "must be"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2064 switch (at[1]) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2065 case 'B': in_elem_bt[i] = T_BYTE; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2066 case 'C': in_elem_bt[i] = T_CHAR; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2067 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2068 case 'F': in_elem_bt[i] = T_FLOAT; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2069 case 'I': in_elem_bt[i] = T_INT; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2070 case 'J': in_elem_bt[i] = T_LONG; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2071 case 'S': in_elem_bt[i] = T_SHORT; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2072 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2073 default: ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2074 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2075 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2076 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2077 out_sig_bt[argc++] = in_sig_bt[i]; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2078 in_elem_bt[i] = T_VOID; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2079 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2080 if (in_sig_bt[i] != T_VOID) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2081 assert(in_sig_bt[i] == ss.type(), "must match"); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2082 ss.next(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2083 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2084 } |
0 | 2085 } |
2086 | |
2087 // Now figure out where the args must be stored and how much stack space | |
2088 // they require (neglecting out_preserve_stack_slots but space for storing | |
2089 // the 1st six register arguments). It's weird see int_stk_helper. | |
2090 // | |
2091 int out_arg_slots; | |
2092 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
2093 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2094 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2095 // Critical natives may have to call out so they need a save area |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2096 // for register arguments. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2097 int double_slots = 0; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2098 int single_slots = 0; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2099 for ( int i = 0; i < total_in_args; i++) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2100 if (in_regs[i].first()->is_Register()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2101 const Register reg = in_regs[i].first()->as_Register(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2102 switch (in_sig_bt[i]) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2103 case T_ARRAY: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2104 case T_BOOLEAN: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2105 case T_BYTE: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2106 case T_SHORT: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2107 case T_CHAR: |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2108 case T_INT: assert(reg->is_in(), "don't need to save these"); break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2109 case T_LONG: if (reg->is_global()) double_slots++; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2110 default: ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2111 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2112 } else if (in_regs[i].first()->is_FloatRegister()) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2113 switch (in_sig_bt[i]) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2114 case T_FLOAT: single_slots++; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2115 case T_DOUBLE: double_slots++; break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2116 default: ShouldNotReachHere(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2117 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2118 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2119 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2120 total_save_slots = double_slots * 2 + single_slots; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2121 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2122 |
0 | 2123 // Compute framesize for the wrapper. We need to handlize all oops in |
2124 // registers. We must create space for them here that is disjoint from | |
2125 // the windowed save area because we have no control over when we might | |
2126 // flush the window again and overwrite values that gc has since modified. | |
2127 // (The live window race) | |
2128 // | |
2129 // We always just allocate 6 word for storing down these object. This allow | |
2130 // us to simply record the base and use the Ireg number to decide which | |
2131 // slot to use. (Note that the reg number is the inbound number not the | |
2132 // outbound number). | |
2133 // We must shuffle args to match the native convention, and include var-args space. | |
2134 | |
2135 // Calculate the total number of stack slots we will need. | |
2136 | |
2137 // First count the abi requirement plus all of the outgoing args | |
2138 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
2139 | |
2140 // Now the space for the inbound oop handle area | |
2141 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2142 int oop_handle_offset = round_to(stack_slots, 2); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2143 stack_slots += total_save_slots; |
0 | 2144 |
2145 // Now any space we need for handlizing a klass if static method | |
2146 | |
2147 int klass_slot_offset = 0; | |
2148 int klass_offset = -1; | |
2149 int lock_slot_offset = 0; | |
2150 bool is_static = false; | |
2151 | |
2152 if (method->is_static()) { | |
2153 klass_slot_offset = stack_slots; | |
2154 stack_slots += VMRegImpl::slots_per_word; | |
2155 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
2156 is_static = true; | |
2157 } | |
2158 | |
2159 // Plus a lock if needed | |
2160 | |
2161 if (method->is_synchronized()) { | |
2162 lock_slot_offset = stack_slots; | |
2163 stack_slots += VMRegImpl::slots_per_word; | |
2164 } | |
2165 | |
2166 // Now a place to save return value or as a temporary for any gpr -> fpr moves | |
2167 stack_slots += 2; | |
2168 | |
2169 // Ok The space we have allocated will look like: | |
2170 // | |
2171 // | |
2172 // FP-> | | | |
2173 // |---------------------| | |
2174 // | 2 slots for moves | | |
2175 // |---------------------| | |
2176 // | lock box (if sync) | | |
2177 // |---------------------| <- lock_slot_offset | |
2178 // | klass (if static) | | |
2179 // |---------------------| <- klass_slot_offset | |
2180 // | oopHandle area | | |
2181 // |---------------------| <- oop_handle_offset | |
2182 // | outbound memory | | |
2183 // | based arguments | | |
2184 // | | | |
2185 // |---------------------| | |
2186 // | vararg area | | |
2187 // |---------------------| | |
2188 // | | | |
2189 // SP-> | out_preserved_slots | | |
2190 // | |
2191 // | |
2192 | |
2193 | |
2194 // Now compute actual number of stack words we need rounding to make | |
2195 // stack properly aligned. | |
2196 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); | |
2197 | |
2198 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
2199 | |
2200 // Generate stack overflow check before creating frame | |
2201 __ generate_stack_overflow_check(stack_size); | |
2202 | |
2203 // Generate a new frame for the wrapper. | |
2204 __ save(SP, -stack_size, SP); | |
2205 | |
2206 int frame_complete = ((intptr_t)__ pc()) - start; | |
2207 | |
2208 __ verify_thread(); | |
2209 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2210 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2211 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2212 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2213 } |
0 | 2214 |
2215 // | |
2216 // We immediately shuffle the arguments so that any vm call we have to | |
2217 // make from here on out (sync slow path, jvmti, etc.) we will have | |
2218 // captured the oops from our caller and have a valid oopMap for | |
2219 // them. | |
2220 | |
2221 // ----------------- | |
2222 // The Grand Shuffle | |
2223 // | |
2224 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
2225 // (derived from JavaThread* which is in L7_thread_cache) and, if static, | |
2226 // the class mirror instead of a receiver. This pretty much guarantees that | |
2227 // register layout will not match. We ignore these extra arguments during | |
2228 // the shuffle. The shuffle is described by the two calling convention | |
2229 // vectors we have in our possession. We simply walk the java vector to | |
2230 // get the source locations and the c vector to get the destinations. | |
2231 // Because we have a new window and the argument registers are completely | |
2232 // disjoint ( I0 -> O1, I1 -> O2, ...) we have nothing to worry about | |
2233 // here. | |
2234 | |
2235 // This is a trick. We double the stack slots so we can claim | |
2236 // the oops in the caller's frame. Since we are sure to have | |
2237 // more args than the caller doubling is enough to make | |
2238 // sure we can capture all the incoming oop args from the | |
2239 // caller. | |
2240 // | |
2241 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
2242 // Record sp-based slot for receiver on stack for non-static methods | |
2243 int receiver_offset = -1; | |
2244 | |
2245 // We move the arguments backward because the floating point registers | |
2246 // destination will always be to a register with a greater or equal register | |
2247 // number or the stack. | |
2248 | |
2249 #ifdef ASSERT | |
2250 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
2251 bool freg_destroyed[FloatRegisterImpl::number_of_registers]; | |
2252 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
2253 reg_destroyed[r] = false; | |
2254 } | |
2255 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { | |
2256 freg_destroyed[f] = false; | |
2257 } | |
2258 | |
2259 #endif /* ASSERT */ | |
2260 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2261 for ( int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0 ; i--, c_arg-- ) { |
0 | 2262 |
2263 #ifdef ASSERT | |
2264 if (in_regs[i].first()->is_Register()) { | |
2265 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "ack!"); | |
2266 } else if (in_regs[i].first()->is_FloatRegister()) { | |
2267 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)], "ack!"); | |
2268 } | |
2269 if (out_regs[c_arg].first()->is_Register()) { | |
2270 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
2271 } else if (out_regs[c_arg].first()->is_FloatRegister()) { | |
2272 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)] = true; | |
2273 } | |
2274 #endif /* ASSERT */ | |
2275 | |
2276 switch (in_sig_bt[i]) { | |
2277 case T_ARRAY: | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2278 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2279 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg], out_regs[c_arg - 1]); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2280 c_arg--; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2281 break; |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2282 } |
0 | 2283 case T_OBJECT: |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2284 assert(!is_critical_native, "no oop arguments"); |
0 | 2285 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
2286 ((i == 0) && (!is_static)), | |
2287 &receiver_offset); | |
2288 break; | |
2289 case T_VOID: | |
2290 break; | |
2291 | |
2292 case T_FLOAT: | |
2293 float_move(masm, in_regs[i], out_regs[c_arg]); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2294 break; |
0 | 2295 |
2296 case T_DOUBLE: | |
2297 assert( i + 1 < total_in_args && | |
2298 in_sig_bt[i + 1] == T_VOID && | |
2299 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
2300 double_move(masm, in_regs[i], out_regs[c_arg]); | |
2301 break; | |
2302 | |
2303 case T_LONG : | |
2304 long_move(masm, in_regs[i], out_regs[c_arg]); | |
2305 break; | |
2306 | |
2307 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
2308 | |
2309 default: | |
2310 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
2311 } | |
2312 } | |
2313 | |
2314 // Pre-load a static method's oop into O1. Used both by locking code and | |
2315 // the normal JNI call code. | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2316 if (method->is_static() && !is_critical_native) { |
0 | 2317 __ set_oop_constant(JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()), O1); |
2318 | |
2319 // Now handlize the static class mirror in O1. It's known not-null. | |
2320 __ st_ptr(O1, SP, klass_offset + STACK_BIAS); | |
2321 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); | |
2322 __ add(SP, klass_offset + STACK_BIAS, O1); | |
2323 } | |
2324 | |
2325 | |
2326 const Register L6_handle = L6; | |
2327 | |
2328 if (method->is_synchronized()) { | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2329 assert(!is_critical_native, "unhandled"); |
0 | 2330 __ mov(O1, L6_handle); |
2331 } | |
2332 | |
2333 // We have all of the arguments setup at this point. We MUST NOT touch any Oregs | |
2334 // except O6/O7. So if we must call out we must push a new frame. We immediately | |
2335 // push a new frame and flush the windows. | |
2336 #ifdef _LP64 | |
2337 intptr_t thepc = (intptr_t) __ pc(); | |
2338 { | |
2339 address here = __ pc(); | |
2340 // Call the next instruction | |
2341 __ call(here + 8, relocInfo::none); | |
2342 __ delayed()->nop(); | |
2343 } | |
2344 #else | |
2345 intptr_t thepc = __ load_pc_address(O7, 0); | |
2346 #endif /* _LP64 */ | |
2347 | |
2348 // We use the same pc/oopMap repeatedly when we call out | |
2349 oop_maps->add_gc_map(thepc - start, map); | |
2350 | |
2351 // O7 now has the pc loaded that we will use when we finally call to native. | |
2352 | |
2353 // Save thread in L7; it crosses a bunch of VM calls below | |
2354 // Don't use save_thread because it smashes G2 and we merely | |
2355 // want to save a copy | |
2356 __ mov(G2_thread, L7_thread_cache); | |
2357 | |
2358 | |
2359 // If we create an inner frame once is plenty | |
2360 // when we create it we must also save G2_thread | |
2361 bool inner_frame_created = false; | |
2362 | |
2363 // dtrace method entry support | |
2364 { | |
2365 SkipIfEqual skip_if( | |
2366 masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); | |
2367 // create inner frame | |
2368 __ save_frame(0); | |
2369 __ mov(G2_thread, L7_thread_cache); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
2370 __ set_metadata_constant(method(), O1); |
0 | 2371 __ call_VM_leaf(L7_thread_cache, |
2372 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
2373 G2_thread, O1); | |
2374 __ restore(); | |
2375 } | |
2376 | |
610
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2377 // RedefineClasses() tracing support for obsolete method entry |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2378 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2379 // create inner frame |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2380 __ save_frame(0); |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2381 __ mov(G2_thread, L7_thread_cache); |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
2382 __ set_metadata_constant(method(), O1); |
610
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2383 __ call_VM_leaf(L7_thread_cache, |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2384 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2385 G2_thread, O1); |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2386 __ restore(); |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2387 } |
70998f2e05ef
6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents:
362
diff
changeset
|
2388 |
0 | 2389 // We are in the jni frame unless saved_frame is true in which case |
2390 // we are in one frame deeper (the "inner" frame). If we are in the | |
2391 // "inner" frames the args are in the Iregs and if the jni frame then | |
2392 // they are in the Oregs. | |
2393 // If we ever need to go to the VM (for locking, jvmti) then | |
2394 // we will always be in the "inner" frame. | |
2395 | |
2396 // Lock a synchronized method | |
2397 int lock_offset = -1; // Set if locked | |
2398 if (method->is_synchronized()) { | |
2399 Register Roop = O1; | |
2400 const Register L3_box = L3; | |
2401 | |
2402 create_inner_frame(masm, &inner_frame_created); | |
2403 | |
2404 __ ld_ptr(I1, 0, O1); | |
2405 Label done; | |
2406 | |
2407 lock_offset = (lock_slot_offset * VMRegImpl::stack_slot_size); | |
2408 __ add(FP, lock_offset+STACK_BIAS, L3_box); | |
2409 #ifdef ASSERT | |
2410 if (UseBiasedLocking) { | |
2411 // making the box point to itself will make it clear it went unused | |
2412 // but also be obviously invalid | |
2413 __ st_ptr(L3_box, L3_box, 0); | |
2414 } | |
2415 #endif // ASSERT | |
2416 // | |
2417 // Compiler_lock_object (Roop, Rmark, Rbox, Rscratch) -- kills Rmark, Rbox, Rscratch | |
2418 // | |
2419 __ compiler_lock_object(Roop, L1, L3_box, L2); | |
2420 __ br(Assembler::equal, false, Assembler::pt, done); | |
2421 __ delayed() -> add(FP, lock_offset+STACK_BIAS, L3_box); | |
2422 | |
2423 | |
2424 // None of the above fast optimizations worked so we have to get into the | |
2425 // slow case of monitor enter. Inline a special case of call_VM that | |
2426 // disallows any pending_exception. | |
2427 __ mov(Roop, O0); // Need oop in O0 | |
2428 __ mov(L3_box, O1); | |
2429 | |
2430 // Record last_Java_sp, in case the VM code releases the JVM lock. | |
2431 | |
2432 __ set_last_Java_frame(FP, I7); | |
2433 | |
2434 // do the call | |
2435 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), relocInfo::runtime_call_type); | |
2436 __ delayed()->mov(L7_thread_cache, O2); | |
2437 | |
2438 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2439 __ reset_last_Java_frame(); | |
2440 | |
2441 #ifdef ASSERT | |
2442 { Label L; | |
2443 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); | |
3839 | 2444 __ br_null_short(O0, Assembler::pt, L); |
0 | 2445 __ stop("no pending exception allowed on exit from IR::monitorenter"); |
2446 __ bind(L); | |
2447 } | |
2448 #endif | |
2449 __ bind(done); | |
2450 } | |
2451 | |
2452 | |
2453 // Finally just about ready to make the JNI call | |
2454 | |
2455 __ flush_windows(); | |
2456 if (inner_frame_created) { | |
2457 __ restore(); | |
2458 } else { | |
2459 // Store only what we need from this frame | |
2460 // QQQ I think that non-v9 (like we care) we don't need these saves | |
2461 // either as the flush traps and the current window goes too. | |
2462 __ st_ptr(FP, SP, FP->sp_offset_in_saved_window()*wordSize + STACK_BIAS); | |
2463 __ st_ptr(I7, SP, I7->sp_offset_in_saved_window()*wordSize + STACK_BIAS); | |
2464 } | |
2465 | |
2466 // get JNIEnv* which is first argument to native | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2467 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2468 __ add(G2_thread, in_bytes(JavaThread::jni_environment_offset()), O0); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2469 } |
0 | 2470 |
2471 // Use that pc we placed in O7 a while back as the current frame anchor | |
2472 __ set_last_Java_frame(SP, O7); | |
2473 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2474 // We flushed the windows ages ago now mark them as flushed before transitioning. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2475 __ set(JavaFrameAnchor::flushed, G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2476 __ st(G3_scratch, G2_thread, JavaThread::frame_anchor_offset() + JavaFrameAnchor::flags_offset()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2477 |
0 | 2478 // Transition from _thread_in_Java to _thread_in_native. |
2479 __ set(_thread_in_native, G3_scratch); | |
2480 | |
2481 #ifdef _LP64 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2482 AddressLiteral dest(native_func); |
0 | 2483 __ relocate(relocInfo::runtime_call_type); |
727 | 2484 __ jumpl_to(dest, O7, O7); |
0 | 2485 #else |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2486 __ call(native_func, relocInfo::runtime_call_type); |
0 | 2487 #endif |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2488 __ delayed()->st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
0 | 2489 |
2490 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2491 | |
2492 // Unpack native results. For int-types, we do any needed sign-extension | |
2493 // and move things into I0. The return value there will survive any VM | |
2494 // calls for blocking or unlocking. An FP or OOP result (handle) is done | |
2495 // specially in the slow-path code. | |
2496 switch (ret_type) { | |
2497 case T_VOID: break; // Nothing to do! | |
2498 case T_FLOAT: break; // Got it where we want it (unless slow-path) | |
2499 case T_DOUBLE: break; // Got it where we want it (unless slow-path) | |
2500 // In 64 bits build result is in O0, in O0, O1 in 32bit build | |
2501 case T_LONG: | |
2502 #ifndef _LP64 | |
2503 __ mov(O1, I1); | |
2504 #endif | |
2505 // Fall thru | |
2506 case T_OBJECT: // Really a handle | |
2507 case T_ARRAY: | |
2508 case T_INT: | |
2509 __ mov(O0, I0); | |
2510 break; | |
2511 case T_BOOLEAN: __ subcc(G0, O0, G0); __ addc(G0, 0, I0); break; // !0 => true; 0 => false | |
2512 case T_BYTE : __ sll(O0, 24, O0); __ sra(O0, 24, I0); break; | |
2513 case T_CHAR : __ sll(O0, 16, O0); __ srl(O0, 16, I0); break; // cannot use and3, 0xFFFF too big as immediate value! | |
2514 case T_SHORT : __ sll(O0, 16, O0); __ sra(O0, 16, I0); break; | |
2515 break; // Cannot de-handlize until after reclaiming jvm_lock | |
2516 default: | |
2517 ShouldNotReachHere(); | |
2518 } | |
2519 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2520 Label after_transition; |
0 | 2521 // must we block? |
2522 | |
2523 // Block, if necessary, before resuming in _thread_in_Java state. | |
2524 // In order for GC to work, don't clear the last_Java_sp until after blocking. | |
2525 { Label no_block; | |
727 | 2526 AddressLiteral sync_state(SafepointSynchronize::address_of_state()); |
0 | 2527 |
2528 // Switch thread to "native transition" state before reading the synchronization state. | |
2529 // This additional state is necessary because reading and testing the synchronization | |
2530 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2531 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2532 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2533 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2534 // didn't see any synchronization is progress, and escapes. | |
2535 __ set(_thread_in_native_trans, G3_scratch); | |
727 | 2536 __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
0 | 2537 if(os::is_MP()) { |
2538 if (UseMembar) { | |
2539 // Force this write out before the read below | |
2540 __ membar(Assembler::StoreLoad); | |
2541 } else { | |
2542 // Write serialization page so VM thread can do a pseudo remote membar. | |
2543 // We use the current thread pointer to calculate a thread specific | |
2544 // offset to write to within the page. This minimizes bus traffic | |
2545 // due to cache line collision. | |
2546 __ serialize_memory(G2_thread, G1_scratch, G3_scratch); | |
2547 } | |
2548 } | |
2549 __ load_contents(sync_state, G3_scratch); | |
2550 __ cmp(G3_scratch, SafepointSynchronize::_not_synchronized); | |
2551 | |
2552 Label L; | |
727 | 2553 Address suspend_state(G2_thread, JavaThread::suspend_flags_offset()); |
0 | 2554 __ br(Assembler::notEqual, false, Assembler::pn, L); |
727 | 2555 __ delayed()->ld(suspend_state, G3_scratch); |
3839 | 2556 __ cmp_and_br_short(G3_scratch, 0, Assembler::equal, Assembler::pt, no_block); |
0 | 2557 __ bind(L); |
2558 | |
2559 // Block. Save any potential method result value before the operation and | |
2560 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this | |
2561 // lets us share the oopMap we used when we went native rather the create | |
2562 // a distinct one for this pc | |
2563 // | |
2564 save_native_result(masm, ret_type, stack_slots); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2565 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2566 __ call_VM_leaf(L7_thread_cache, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2567 CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans), |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2568 G2_thread); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2569 } else { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2570 __ call_VM_leaf(L7_thread_cache, |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2571 CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition), |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2572 G2_thread); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2573 } |
0 | 2574 |
2575 // Restore any method result value | |
2576 restore_native_result(masm, ret_type, stack_slots); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2577 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2578 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2579 // The call above performed the transition to thread_in_Java so |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2580 // skip the transition logic below. |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2581 __ ba(after_transition); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2582 __ delayed()->nop(); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2583 } |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2584 |
0 | 2585 __ bind(no_block); |
2586 } | |
2587 | |
2588 // thread state is thread_in_native_trans. Any safepoint blocking has already | |
2589 // happened so we can now change state to _thread_in_Java. | |
2590 __ set(_thread_in_Java, G3_scratch); | |
727 | 2591 __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2592 __ bind(after_transition); |
0 | 2593 |
2594 Label no_reguard; | |
727 | 2595 __ ld(G2_thread, JavaThread::stack_guard_state_offset(), G3_scratch); |
3839 | 2596 __ cmp_and_br_short(G3_scratch, JavaThread::stack_guard_yellow_disabled, Assembler::notEqual, Assembler::pt, no_reguard); |
0 | 2597 |
2598 save_native_result(masm, ret_type, stack_slots); | |
2599 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); | |
2600 __ delayed()->nop(); | |
2601 | |
2602 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2603 restore_native_result(masm, ret_type, stack_slots); | |
2604 | |
2605 __ bind(no_reguard); | |
2606 | |
2607 // Handle possible exception (will unlock if necessary) | |
2608 | |
2609 // native result if any is live in freg or I0 (and I1 if long and 32bit vm) | |
2610 | |
2611 // Unlock | |
2612 if (method->is_synchronized()) { | |
2613 Label done; | |
2614 Register I2_ex_oop = I2; | |
2615 const Register L3_box = L3; | |
2616 // Get locked oop from the handle we passed to jni | |
2617 __ ld_ptr(L6_handle, 0, L4); | |
2618 __ add(SP, lock_offset+STACK_BIAS, L3_box); | |
2619 // Must save pending exception around the slow-path VM call. Since it's a | |
2620 // leaf call, the pending exception (if any) can be kept in a register. | |
2621 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), I2_ex_oop); | |
2622 // Now unlock | |
2623 // (Roop, Rmark, Rbox, Rscratch) | |
2624 __ compiler_unlock_object(L4, L1, L3_box, L2); | |
2625 __ br(Assembler::equal, false, Assembler::pt, done); | |
2626 __ delayed()-> add(SP, lock_offset+STACK_BIAS, L3_box); | |
2627 | |
2628 // save and restore any potential method result value around the unlocking | |
2629 // operation. Will save in I0 (or stack for FP returns). | |
2630 save_native_result(masm, ret_type, stack_slots); | |
2631 | |
2632 // Must clear pending-exception before re-entering the VM. Since this is | |
2633 // a leaf call, pending-exception-oop can be safely kept in a register. | |
2634 __ st_ptr(G0, G2_thread, in_bytes(Thread::pending_exception_offset())); | |
2635 | |
2636 // slow case of monitor enter. Inline a special case of call_VM that | |
2637 // disallows any pending_exception. | |
2638 __ mov(L3_box, O1); | |
2639 | |
2640 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), relocInfo::runtime_call_type); | |
2641 __ delayed()->mov(L4, O0); // Need oop in O0 | |
2642 | |
2643 __ restore_thread(L7_thread_cache); // restore G2_thread | |
2644 | |
2645 #ifdef ASSERT | |
2646 { Label L; | |
2647 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); | |
3839 | 2648 __ br_null_short(O0, Assembler::pt, L); |
0 | 2649 __ stop("no pending exception allowed on exit from IR::monitorexit"); |
2650 __ bind(L); | |
2651 } | |
2652 #endif | |
2653 restore_native_result(masm, ret_type, stack_slots); | |
2654 // check_forward_pending_exception jump to forward_exception if any pending | |
2655 // exception is set. The forward_exception routine expects to see the | |
2656 // exception in pending_exception and not in a register. Kind of clumsy, | |
2657 // since all folks who branch to forward_exception must have tested | |
2658 // pending_exception first and hence have it in a register already. | |
2659 __ st_ptr(I2_ex_oop, G2_thread, in_bytes(Thread::pending_exception_offset())); | |
2660 __ bind(done); | |
2661 } | |
2662 | |
2663 // Tell dtrace about this method exit | |
2664 { | |
2665 SkipIfEqual skip_if( | |
2666 masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); | |
2667 save_native_result(masm, ret_type, stack_slots); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
2668 __ set_metadata_constant(method(), O1); |
0 | 2669 __ call_VM_leaf(L7_thread_cache, |
2670 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2671 G2_thread, O1); | |
2672 restore_native_result(masm, ret_type, stack_slots); | |
2673 } | |
2674 | |
2675 // Clear "last Java frame" SP and PC. | |
2676 __ verify_thread(); // G2_thread must be correct | |
2677 __ reset_last_Java_frame(); | |
2678 | |
2679 // Unpack oop result | |
2680 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2681 Label L; | |
2682 __ addcc(G0, I0, G0); | |
2683 __ brx(Assembler::notZero, true, Assembler::pt, L); | |
2684 __ delayed()->ld_ptr(I0, 0, I0); | |
2685 __ mov(G0, I0); | |
2686 __ bind(L); | |
2687 __ verify_oop(I0); | |
2688 } | |
2689 | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2690 if (!is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2691 // reset handle block |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2692 __ ld_ptr(G2_thread, in_bytes(JavaThread::active_handles_offset()), L5); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2693 __ st_ptr(G0, L5, JNIHandleBlock::top_offset_in_bytes()); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2694 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2695 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2696 check_forward_pending_exception(masm, G3_scratch); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2697 } |
0 | 2698 |
2699 | |
2700 // Return | |
2701 | |
2702 #ifndef _LP64 | |
2703 if (ret_type == T_LONG) { | |
2704 | |
2705 // Must leave proper result in O0,O1 and G1 (c2/tiered only) | |
2706 __ sllx(I0, 32, G1); // Shift bits into high G1 | |
2707 __ srl (I1, 0, I1); // Zero extend O1 (harmless?) | |
2708 __ or3 (I1, G1, G1); // OR 64 bits into G1 | |
2709 } | |
2710 #endif | |
2711 | |
2712 __ ret(); | |
2713 __ delayed()->restore(); | |
2714 | |
2715 __ flush(); | |
2716 | |
2717 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
3d58a4983660
7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents:
2177
diff
changeset
|
2718 compile_id, |
0 | 2719 masm->code(), |
2720 vep_offset, | |
2721 frame_complete, | |
2722 stack_slots / VMRegImpl::slots_per_word, | |
2723 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2724 in_ByteSize(lock_offset), | |
2725 oop_maps); | |
4873
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2726 |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2727 if (is_critical_native) { |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2728 nm->set_lazy_critical_native(true); |
0382d2b469b2
7013347: allow crypto functions to be called inline to enhance performance
never
parents:
4114
diff
changeset
|
2729 } |
0 | 2730 return nm; |
2731 | |
2732 } | |
2733 | |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2734 #ifdef HAVE_DTRACE_H |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2735 // --------------------------------------------------------------------------- |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2736 // Generate a dtrace nmethod for a given signature. The method takes arguments |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2737 // in the Java compiled code convention, marshals them to the native |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2738 // abi and then leaves nops at the position you would expect to call a native |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2739 // function. When the probe is enabled the nops are replaced with a trap |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2740 // instruction that dtrace inserts and the trace will cause a notification |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2741 // to dtrace. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2742 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2743 // The probes are only able to take primitive types and java/lang/String as |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2744 // arguments. No other java types are allowed. Strings are converted to utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2745 // strings so that from dtrace point of view java strings are converted to C |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2746 // strings. There is an arbitrary fixed limit on the total space that a method |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2747 // can use for converting the strings. (256 chars per string in the signature). |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2748 // So any java string larger then this is truncated. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2749 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2750 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2751 static bool offsets_initialized = false; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2752 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2753 nmethod *SharedRuntime::generate_dtrace_nmethod( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2754 MacroAssembler *masm, methodHandle method) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2755 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2756 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2757 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2758 // be single threaded in this method. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2759 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2760 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2761 // Fill in the signature array, for the calling-convention call. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2762 int total_args_passed = method->size_of_parameters(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2763 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2764 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2765 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2766 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2767 // The signature we are going to use for the trap that dtrace will see |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2768 // java/lang/String is converted. We drop "this" and any other object |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2769 // is converted to NULL. (A one-slot java/lang/Long object reference |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2770 // is converted to a two-slot long, which is why we double the allocation). |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2771 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2772 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2773 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2774 int i=0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2775 int total_strings = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2776 int first_arg_to_pass = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2777 int total_c_args = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2778 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2779 // Skip the receiver as dtrace doesn't want to see it |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2780 if( !method->is_static() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2781 in_sig_bt[i++] = T_OBJECT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2782 first_arg_to_pass = 1; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2783 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2784 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2785 SignatureStream ss(method->signature()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2786 for ( ; !ss.at_return_type(); ss.next()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2787 BasicType bt = ss.type(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2788 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2789 out_sig_bt[total_c_args++] = bt; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2790 if( bt == T_OBJECT) { |
2177
3582bf76420e
6990754: Use native memory and reference counting to implement SymbolTable
coleenp
parents:
1972
diff
changeset
|
2791 Symbol* s = ss.as_symbol_or_null(); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2792 if (s == vmSymbols::java_lang_String()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2793 total_strings++; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2794 out_sig_bt[total_c_args-1] = T_ADDRESS; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2795 } else if (s == vmSymbols::java_lang_Boolean() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2796 s == vmSymbols::java_lang_Byte()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2797 out_sig_bt[total_c_args-1] = T_BYTE; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2798 } else if (s == vmSymbols::java_lang_Character() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2799 s == vmSymbols::java_lang_Short()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2800 out_sig_bt[total_c_args-1] = T_SHORT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2801 } else if (s == vmSymbols::java_lang_Integer() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2802 s == vmSymbols::java_lang_Float()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2803 out_sig_bt[total_c_args-1] = T_INT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2804 } else if (s == vmSymbols::java_lang_Long() || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2805 s == vmSymbols::java_lang_Double()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2806 out_sig_bt[total_c_args-1] = T_LONG; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2807 out_sig_bt[total_c_args++] = T_VOID; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2808 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2809 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2810 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2811 // We convert double to long |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2812 out_sig_bt[total_c_args-1] = T_LONG; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2813 out_sig_bt[total_c_args++] = T_VOID; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2814 } else if ( bt == T_FLOAT) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2815 // We convert float to int |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2816 out_sig_bt[total_c_args-1] = T_INT; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2817 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2818 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2819 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2820 assert(i==total_args_passed, "validly parsed signature"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2821 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2822 // Now get the compiled-Java layout as input arguments |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2823 int comp_args_on_stack; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2824 comp_args_on_stack = SharedRuntime::java_calling_convention( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2825 in_sig_bt, in_regs, total_args_passed, false); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2826 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2827 // We have received a description of where all the java arg are located |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2828 // on entry to the wrapper. We need to convert these args to where |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2829 // the a native (non-jni) function would expect them. To figure out |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2830 // where they go we convert the java signature to a C signature and remove |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2831 // T_VOID for any long/double we might have received. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2832 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2833 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2834 // Now figure out where the args must be stored and how much stack space |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2835 // they require (neglecting out_preserve_stack_slots but space for storing |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2836 // the 1st six register arguments). It's weird see int_stk_helper. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2837 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2838 int out_arg_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2839 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2840 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2841 // Calculate the total number of stack slots we will need. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2842 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2843 // First count the abi requirement plus all of the outgoing args |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2844 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2845 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2846 // Plus a temp for possible converion of float/double/long register args |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2847 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2848 int conversion_temp = stack_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2849 stack_slots += 2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2850 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2851 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2852 // Now space for the string(s) we must convert |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2853 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2854 int string_locs = stack_slots; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2855 stack_slots += total_strings * |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2856 (max_dtrace_string_size / VMRegImpl::stack_slot_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2857 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2858 // Ok The space we have allocated will look like: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2859 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2860 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2861 // FP-> | | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2862 // |---------------------| |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2863 // | string[n] | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2864 // |---------------------| <- string_locs[n] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2865 // | string[n-1] | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2866 // |---------------------| <- string_locs[n-1] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2867 // | ... | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2868 // | ... | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2869 // |---------------------| <- string_locs[1] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2870 // | string[0] | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2871 // |---------------------| <- string_locs[0] |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2872 // | temp | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2873 // |---------------------| <- conversion_temp |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2874 // | outbound memory | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2875 // | based arguments | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2876 // | | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2877 // |---------------------| |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2878 // | | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2879 // SP-> | out_preserved_slots | |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2880 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2881 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2882 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2883 // Now compute actual number of stack words we need rounding to make |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2884 // stack properly aligned. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2885 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2886 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2887 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2888 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2889 intptr_t start = (intptr_t)__ pc(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2890 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2891 // First thing make an ic check to see if we should even be here |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2892 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2893 { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2894 Label L; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2895 const Register temp_reg = G3_scratch; |
727 | 2896 AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2897 __ verify_oop(O0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2898 __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), temp_reg); |
3839 | 2899 __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2900 |
727 | 2901 __ jump_to(ic_miss, temp_reg); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2902 __ delayed()->nop(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2903 __ align(CodeEntryAlignment); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2904 __ bind(L); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2905 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2906 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2907 int vep_offset = ((intptr_t)__ pc()) - start; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2908 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2909 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2910 // The instruction at the verified entry point must be 5 bytes or longer |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2911 // because it can be patched on the fly by make_non_entrant. The stack bang |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2912 // instruction fits that requirement. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2913 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2914 // Generate stack overflow check before creating frame |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2915 __ generate_stack_overflow_check(stack_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2916 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2917 assert(((intptr_t)__ pc() - start - vep_offset) >= 5, |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2918 "valid size for make_non_entrant"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2919 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2920 // Generate a new frame for the wrapper. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2921 __ save(SP, -stack_size, SP); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2922 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2923 // Frame is now completed as far a size and linkage. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2924 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2925 int frame_complete = ((intptr_t)__ pc()) - start; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2926 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2927 #ifdef ASSERT |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2928 bool reg_destroyed[RegisterImpl::number_of_registers]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2929 bool freg_destroyed[FloatRegisterImpl::number_of_registers]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2930 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2931 reg_destroyed[r] = false; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2932 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2933 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2934 freg_destroyed[f] = false; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2935 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2936 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2937 #endif /* ASSERT */ |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2938 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2939 VMRegPair zero; |
176
6b648fefb395
6705523: Fix for 6695506 will violate spec when used in JDK6
kamg
parents:
116
diff
changeset
|
2940 const Register g0 = G0; // without this we get a compiler warning (why??) |
6b648fefb395
6705523: Fix for 6695506 will violate spec when used in JDK6
kamg
parents:
116
diff
changeset
|
2941 zero.set2(g0->as_VMReg()); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2942 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2943 int c_arg, j_arg; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2944 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2945 Register conversion_off = noreg; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2946 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2947 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2948 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2949 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2950 VMRegPair src = in_regs[j_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2951 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2952 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2953 #ifdef ASSERT |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2954 if (src.first()->is_Register()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2955 assert(!reg_destroyed[src.first()->as_Register()->encoding()], "ack!"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2956 } else if (src.first()->is_FloatRegister()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2957 assert(!freg_destroyed[src.first()->as_FloatRegister()->encoding( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2958 FloatRegisterImpl::S)], "ack!"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2959 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2960 if (dst.first()->is_Register()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2961 reg_destroyed[dst.first()->as_Register()->encoding()] = true; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2962 } else if (dst.first()->is_FloatRegister()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2963 freg_destroyed[dst.first()->as_FloatRegister()->encoding( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2964 FloatRegisterImpl::S)] = true; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2965 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2966 #endif /* ASSERT */ |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2967 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2968 switch (in_sig_bt[j_arg]) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2969 case T_ARRAY: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2970 case T_OBJECT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2971 { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2972 if (out_sig_bt[c_arg] == T_BYTE || out_sig_bt[c_arg] == T_SHORT || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2973 out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2974 // need to unbox a one-slot value |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2975 Register in_reg = L0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2976 Register tmp = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2977 if ( src.first()->is_reg() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2978 in_reg = src.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2979 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2980 assert(Assembler::is_simm13(reg2offset(src.first()) + STACK_BIAS), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2981 "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2982 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2983 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2984 // If the final destination is an acceptable register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2985 if ( dst.first()->is_reg() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2986 if ( dst.is_single_phys_reg() || out_sig_bt[c_arg] != T_LONG ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2987 tmp = dst.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2988 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2989 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2990 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2991 Label skipUnbox; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2992 if ( wordSize == 4 && out_sig_bt[c_arg] == T_LONG ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2993 __ mov(G0, tmp->successor()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2994 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2995 __ br_null(in_reg, true, Assembler::pn, skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2996 __ delayed()->mov(G0, tmp); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2997 |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2998 BasicType bt = out_sig_bt[c_arg]; |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2999 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
3000 switch (bt) { |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3001 case T_BYTE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3002 __ ldub(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3003 case T_SHORT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3004 __ lduh(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3005 case T_INT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3006 __ ld(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3007 case T_LONG: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3008 __ ld_long(in_reg, box_offset, tmp); break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3009 default: ShouldNotReachHere(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3010 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3011 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3012 __ bind(skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3013 // If tmp wasn't final destination copy to final destination |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3014 if (tmp == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3015 VMRegPair tmp_as_VM = reg64_to_VMRegPair(L2); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3016 if (out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3017 long_move(masm, tmp_as_VM, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3018 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3019 move32_64(masm, tmp_as_VM, out_regs[c_arg]); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3020 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3021 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3022 if (out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3023 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3024 ++c_arg; // move over the T_VOID to keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3025 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3026 } else if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3027 Register s = |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3028 src.first()->is_reg() ? src.first()->as_Register() : L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3029 Register d = |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3030 dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3031 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3032 // We store the oop now so that the conversion pass can reach |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3033 // while in the inner frame. This will be the only store if |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3034 // the oop is NULL. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3035 if (s != L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3036 // src is register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3037 if (d != L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3038 // dst is register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3039 __ mov(s, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3040 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3041 assert(Assembler::is_simm13(reg2offset(dst.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3042 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3043 __ st_ptr(s, SP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3044 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3045 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3046 // src not a register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3047 assert(Assembler::is_simm13(reg2offset(src.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3048 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3049 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3050 if (d == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3051 assert(Assembler::is_simm13(reg2offset(dst.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3052 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3053 __ st_ptr(d, SP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3054 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3055 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3056 } else if (out_sig_bt[c_arg] != T_VOID) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3057 // Convert the arg to NULL |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3058 if (dst.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3059 __ mov(G0, dst.first()->as_Register()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3060 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3061 assert(Assembler::is_simm13(reg2offset(dst.first()) + |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3062 STACK_BIAS), "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3063 __ st_ptr(G0, SP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3064 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3065 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3066 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3067 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3068 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3069 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3070 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3071 case T_FLOAT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3072 if (src.first()->is_stack()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3073 // Stack to stack/reg is simple |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3074 move32_64(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3075 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3076 if (dst.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3077 // freg -> reg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3078 int off = |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3079 STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3080 Register d = dst.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3081 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3082 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3083 SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3084 __ ld(SP, off, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3085 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3086 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3087 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3088 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3089 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3090 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3091 SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3092 __ ld(SP, conversion_off , d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3093 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3094 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3095 // freg -> mem |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3096 int off = STACK_BIAS + reg2offset(dst.first()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3097 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3098 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3099 SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3100 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3101 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3102 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3103 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3104 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3105 __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3106 SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3107 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3108 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3109 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3110 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3111 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3112 case T_DOUBLE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3113 assert( j_arg + 1 < total_args_passed && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3114 in_sig_bt[j_arg + 1] == T_VOID && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3115 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3116 if (src.first()->is_stack()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3117 // Stack to stack/reg is simple |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3118 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3119 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3120 Register d = dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3121 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3122 // Destination could be an odd reg on 32bit in which case |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3123 // we can't load direct to the destination. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3124 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3125 if (!d->is_even() && wordSize == 4) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3126 d = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3127 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3128 int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3129 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3130 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3131 SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3132 __ ld_long(SP, off, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3133 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3134 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3135 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3136 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3137 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3138 __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3139 SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3140 __ ld_long(SP, conversion_off, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3141 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3142 if (d == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3143 long_move(masm, reg64_to_VMRegPair(L2), dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3144 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3145 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3146 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3147 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3148 case T_LONG : |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3149 // 32bit can't do a split move of something like g1 -> O0, O1 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3150 // so use a memory temp |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3151 if (src.is_single_phys_reg() && wordSize == 4) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3152 Register tmp = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3153 if (dst.first()->is_reg() && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3154 (wordSize == 8 || dst.first()->as_Register()->is_even())) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3155 tmp = dst.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3156 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3157 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3158 int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3159 if (Assembler::is_simm13(off)) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3160 __ stx(src.first()->as_Register(), SP, off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3161 __ ld_long(SP, off, tmp); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3162 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3163 if (conversion_off == noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3164 __ set(off, L6); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3165 conversion_off = L6; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3166 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3167 __ stx(src.first()->as_Register(), SP, conversion_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3168 __ ld_long(SP, conversion_off, tmp); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3169 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3170 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3171 if (tmp == L2) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3172 long_move(masm, reg64_to_VMRegPair(L2), dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3173 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3174 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3175 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3176 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3177 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3178 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3179 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3180 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3181 default: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3182 move32_64(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3183 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3184 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3185 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3186 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3187 // If we have any strings we must store any register based arg to the stack |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3188 // This includes any still live xmm registers too. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3189 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3190 if (total_strings > 0 ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3191 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3192 // protect all the arg registers |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3193 __ save_frame(0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3194 __ mov(G2_thread, L7_thread_cache); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3195 const Register L2_string_off = L2; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3196 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3197 // Get first string offset |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3198 __ set(string_locs * VMRegImpl::stack_slot_size, L2_string_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3199 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3200 for (c_arg = 0 ; c_arg < total_c_args ; c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3201 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3202 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3203 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3204 const Register d = dst.first()->is_reg() ? |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3205 dst.first()->as_Register()->after_save() : noreg; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3206 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3207 // It's a string the oop and it was already copied to the out arg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3208 // position |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3209 if (d != noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3210 __ mov(d, O0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3211 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3212 assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3213 "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3214 __ ld_ptr(FP, reg2offset(dst.first()) + STACK_BIAS, O0); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3215 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3216 Label skip; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3217 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3218 __ br_null(O0, false, Assembler::pn, skip); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3219 __ delayed()->add(FP, L2_string_off, O1); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3220 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3221 if (d != noreg) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3222 __ mov(O1, d); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3223 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3224 assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3225 "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3226 __ st_ptr(O1, FP, reg2offset(dst.first()) + STACK_BIAS); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3227 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3228 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3229 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::get_utf), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3230 relocInfo::runtime_call_type); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3231 __ delayed()->add(L2_string_off, max_dtrace_string_size, L2_string_off); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3232 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3233 __ bind(skip); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3234 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3235 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3236 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3237 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3238 __ mov(L7_thread_cache, G2_thread); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3239 __ restore(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3240 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3241 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3242 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3243 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3244 // Ok now we are done. Need to place the nop that dtrace wants in order to |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3245 // patch in the trap |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3246 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3247 int patch_offset = ((intptr_t)__ pc()) - start; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3248 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3249 __ nop(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3250 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3251 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3252 // Return |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3253 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3254 __ ret(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3255 __ delayed()->restore(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3256 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3257 __ flush(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3258 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3259 nmethod *nm = nmethod::new_dtrace_nmethod( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3260 method, masm->code(), vep_offset, patch_offset, frame_complete, |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3261 stack_slots / VMRegImpl::slots_per_word); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3262 return nm; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3263 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3264 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3265 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3266 #endif // HAVE_DTRACE_H |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3267 |
0 | 3268 // this function returns the adjust size (in number of words) to a c2i adapter |
3269 // activation for use during deoptimization | |
3270 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { | |
3271 assert(callee_locals >= callee_parameters, | |
3272 "test and remove; got more parms than locals"); | |
3273 if (callee_locals < callee_parameters) | |
3274 return 0; // No adjustment for negative locals | |
1506 | 3275 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3276 return round_to(diff, WordsPerLong); |
3277 } | |
3278 | |
3279 // "Top of Stack" slots that may be unused by the calling convention but must | |
3280 // otherwise be preserved. | |
3281 // On Intel these are not necessary and the value can be zero. | |
3282 // On Sparc this describes the words reserved for storing a register window | |
3283 // when an interrupt occurs. | |
3284 uint SharedRuntime::out_preserve_stack_slots() { | |
3285 return frame::register_save_words * VMRegImpl::slots_per_word; | |
3286 } | |
3287 | |
3288 static void gen_new_frame(MacroAssembler* masm, bool deopt) { | |
3289 // | |
3290 // Common out the new frame generation for deopt and uncommon trap | |
3291 // | |
3292 Register G3pcs = G3_scratch; // Array of new pcs (input) | |
3293 Register Oreturn0 = O0; | |
3294 Register Oreturn1 = O1; | |
3295 Register O2UnrollBlock = O2; | |
3296 Register O3array = O3; // Array of frame sizes (input) | |
3297 Register O4array_size = O4; // number of frames (input) | |
3298 Register O7frame_size = O7; // number of frames (input) | |
3299 | |
3300 __ ld_ptr(O3array, 0, O7frame_size); | |
3301 __ sub(G0, O7frame_size, O7frame_size); | |
3302 __ save(SP, O7frame_size, SP); | |
3303 __ ld_ptr(G3pcs, 0, I7); // load frame's new pc | |
3304 | |
3305 #ifdef ASSERT | |
3306 // make sure that the frames are aligned properly | |
3307 #ifndef _LP64 | |
3308 __ btst(wordSize*2-1, SP); | |
5923 | 3309 __ breakpoint_trap(Assembler::notZero, Assembler::ptr_cc); |
0 | 3310 #endif |
3311 #endif | |
3312 | |
3313 // Deopt needs to pass some extra live values from frame to frame | |
3314 | |
3315 if (deopt) { | |
3316 __ mov(Oreturn0->after_save(), Oreturn0); | |
3317 __ mov(Oreturn1->after_save(), Oreturn1); | |
3318 } | |
3319 | |
3320 __ mov(O4array_size->after_save(), O4array_size); | |
3321 __ sub(O4array_size, 1, O4array_size); | |
3322 __ mov(O3array->after_save(), O3array); | |
3323 __ mov(O2UnrollBlock->after_save(), O2UnrollBlock); | |
3324 __ add(G3pcs, wordSize, G3pcs); // point to next pc value | |
3325 | |
3326 #ifdef ASSERT | |
3327 // trash registers to show a clear pattern in backtraces | |
3328 __ set(0xDEAD0000, I0); | |
3329 __ add(I0, 2, I1); | |
3330 __ add(I0, 4, I2); | |
3331 __ add(I0, 6, I3); | |
3332 __ add(I0, 8, I4); | |
3333 // Don't touch I5 could have valuable savedSP | |
3334 __ set(0xDEADBEEF, L0); | |
3335 __ mov(L0, L1); | |
3336 __ mov(L0, L2); | |
3337 __ mov(L0, L3); | |
3338 __ mov(L0, L4); | |
3339 __ mov(L0, L5); | |
3340 | |
3341 // trash the return value as there is nothing to return yet | |
3342 __ set(0xDEAD0001, O7); | |
3343 #endif | |
3344 | |
3345 __ mov(SP, O5_savedSP); | |
3346 } | |
3347 | |
3348 | |
3349 static void make_new_frames(MacroAssembler* masm, bool deopt) { | |
3350 // | |
3351 // loop through the UnrollBlock info and create new frames | |
3352 // | |
3353 Register G3pcs = G3_scratch; | |
3354 Register Oreturn0 = O0; | |
3355 Register Oreturn1 = O1; | |
3356 Register O2UnrollBlock = O2; | |
3357 Register O3array = O3; | |
3358 Register O4array_size = O4; | |
3359 Label loop; | |
3360 | |
3361 // Before we make new frames, check to see if stack is available. | |
3362 // Do this after the caller's return address is on top of stack | |
3363 if (UseStackBanging) { | |
3364 // Get total frame size for interpreted frames | |
727 | 3365 __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes(), O4); |
0 | 3366 __ bang_stack_size(O4, O3, G3_scratch); |
3367 } | |
3368 | |
727 | 3369 __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(), O4array_size); |
3370 __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(), G3pcs); | |
3371 __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(), O3array); | |
0 | 3372 |
3373 // Adjust old interpreter frame to make space for new frame's extra java locals | |
3374 // | |
3375 // We capture the original sp for the transition frame only because it is needed in | |
3376 // order to properly calculate interpreter_sp_adjustment. Even though in real life | |
3377 // every interpreter frame captures a savedSP it is only needed at the transition | |
3378 // (fortunately). If we had to have it correct everywhere then we would need to | |
3379 // be told the sp_adjustment for each frame we create. If the frame size array | |
3380 // were to have twice the frame count entries then we could have pairs [sp_adjustment, frame_size] | |
3381 // for each frame we create and keep up the illusion every where. | |
3382 // | |
3383 | |
727 | 3384 __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(), O7); |
0 | 3385 __ mov(SP, O5_savedSP); // remember initial sender's original sp before adjustment |
3386 __ sub(SP, O7, SP); | |
3387 | |
3388 #ifdef ASSERT | |
3389 // make sure that there is at least one entry in the array | |
3390 __ tst(O4array_size); | |
5923 | 3391 __ breakpoint_trap(Assembler::zero, Assembler::icc); |
0 | 3392 #endif |
3393 | |
3394 // Now push the new interpreter frames | |
3395 __ bind(loop); | |
3396 | |
3397 // allocate a new frame, filling the registers | |
3398 | |
3399 gen_new_frame(masm, deopt); // allocate an interpreter frame | |
3400 | |
3839 | 3401 __ cmp_zero_and_br(Assembler::notZero, O4array_size, loop); |
0 | 3402 __ delayed()->add(O3array, wordSize, O3array); |
3403 __ ld_ptr(G3pcs, 0, O7); // load final frame new pc | |
3404 | |
3405 } | |
3406 | |
3407 //------------------------------generate_deopt_blob---------------------------- | |
3408 // Ought to generate an ideal graph & compile, but here's some SPARC ASM | |
3409 // instead. | |
3410 void SharedRuntime::generate_deopt_blob() { | |
3411 // allocate space for the code | |
3412 ResourceMark rm; | |
3413 // setup code generation tools | |
3414 int pad = VerifyThread ? 512 : 0;// Extra slop space for more verify code | |
4957
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3415 if (UseStackBanging) { |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3416 pad += StackShadowPages*16 + 32; |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3417 } |
0 | 3418 #ifdef _LP64 |
3419 CodeBuffer buffer("deopt_blob", 2100+pad, 512); | |
3420 #else | |
3421 // Measured 8/7/03 at 1212 in 32bit debug build (no VerifyThread) | |
3422 // Measured 8/7/03 at 1396 in 32bit debug build (VerifyThread) | |
3423 CodeBuffer buffer("deopt_blob", 1600+pad, 512); | |
3424 #endif /* _LP64 */ | |
3425 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3426 FloatRegister Freturn0 = F0; | |
3427 Register Greturn1 = G1; | |
3428 Register Oreturn0 = O0; | |
3429 Register Oreturn1 = O1; | |
3430 Register O2UnrollBlock = O2; | |
1037 | 3431 Register L0deopt_mode = L0; |
3432 Register G4deopt_mode = G4_scratch; | |
0 | 3433 int frame_size_words; |
727 | 3434 Address saved_Freturn0_addr(FP, -sizeof(double) + STACK_BIAS); |
0 | 3435 #if !defined(_LP64) && defined(COMPILER2) |
727 | 3436 Address saved_Greturn1_addr(FP, -sizeof(double) -sizeof(jlong) + STACK_BIAS); |
0 | 3437 #endif |
3438 Label cont; | |
3439 | |
3440 OopMapSet *oop_maps = new OopMapSet(); | |
3441 | |
3442 // | |
3443 // This is the entry point for code which is returning to a de-optimized | |
3444 // frame. | |
3445 // The steps taken by this frame are as follows: | |
3446 // - push a dummy "register_save" and save the return values (O0, O1, F0/F1, G1) | |
3447 // and all potentially live registers (at a pollpoint many registers can be live). | |
3448 // | |
3449 // - call the C routine: Deoptimization::fetch_unroll_info (this function | |
3450 // returns information about the number and size of interpreter frames | |
3451 // which are equivalent to the frame which is being deoptimized) | |
3452 // - deallocate the unpack frame, restoring only results values. Other | |
3453 // volatile registers will now be captured in the vframeArray as needed. | |
3454 // - deallocate the deoptimization frame | |
3455 // - in a loop using the information returned in the previous step | |
3456 // push new interpreter frames (take care to propagate the return | |
3457 // values through each new frame pushed) | |
3458 // - create a dummy "unpack_frame" and save the return values (O0, O1, F0) | |
3459 // - call the C routine: Deoptimization::unpack_frames (this function | |
3460 // lays out values on the interpreter frame which was just created) | |
3461 // - deallocate the dummy unpack_frame | |
3462 // - ensure that all the return values are correctly set and then do | |
3463 // a return to the interpreter entry point | |
3464 // | |
3465 // Refer to the following methods for more information: | |
3466 // - Deoptimization::fetch_unroll_info | |
3467 // - Deoptimization::unpack_frames | |
3468 | |
3469 OopMap* map = NULL; | |
3470 | |
3471 int start = __ offset(); | |
3472 | |
3473 // restore G2, the trampoline destroyed it | |
3474 __ get_thread(); | |
3475 | |
3476 // On entry we have been called by the deoptimized nmethod with a call that | |
3477 // replaced the original call (or safepoint polling location) so the deoptimizing | |
3478 // pc is now in O7. Return values are still in the expected places | |
3479 | |
3480 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3839 | 3481 __ ba(cont); |
1037 | 3482 __ delayed()->mov(Deoptimization::Unpack_deopt, L0deopt_mode); |
0 | 3483 |
3484 int exception_offset = __ offset() - start; | |
3485 | |
3486 // restore G2, the trampoline destroyed it | |
3487 __ get_thread(); | |
3488 | |
3489 // On entry we have been jumped to by the exception handler (or exception_blob | |
3490 // for server). O0 contains the exception oop and O7 contains the original | |
3491 // exception pc. So if we push a frame here it will look to the | |
3492 // stack walking code (fetch_unroll_info) just like a normal call so | |
3493 // state will be extracted normally. | |
3494 | |
3495 // save exception oop in JavaThread and fall through into the | |
3496 // exception_in_tls case since they are handled in same way except | |
3497 // for where the pending exception is kept. | |
727 | 3498 __ st_ptr(Oexception, G2_thread, JavaThread::exception_oop_offset()); |
0 | 3499 |
3500 // | |
3501 // Vanilla deoptimization with an exception pending in exception_oop | |
3502 // | |
3503 int exception_in_tls_offset = __ offset() - start; | |
3504 | |
3505 // No need to update oop_map as each call to save_live_registers will produce identical oopmap | |
3506 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3507 | |
3508 // Restore G2_thread | |
3509 __ get_thread(); | |
3510 | |
3511 #ifdef ASSERT | |
3512 { | |
3513 // verify that there is really an exception oop in exception_oop | |
3514 Label has_exception; | |
727 | 3515 __ ld_ptr(G2_thread, JavaThread::exception_oop_offset(), Oexception); |
3839 | 3516 __ br_notnull_short(Oexception, Assembler::pt, has_exception); |
0 | 3517 __ stop("no exception in thread"); |
3518 __ bind(has_exception); | |
3519 | |
3520 // verify that there is no pending exception | |
3521 Label no_pending_exception; | |
727 | 3522 Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
0 | 3523 __ ld_ptr(exception_addr, Oexception); |
3839 | 3524 __ br_null_short(Oexception, Assembler::pt, no_pending_exception); |
0 | 3525 __ stop("must not have pending exception here"); |
3526 __ bind(no_pending_exception); | |
3527 } | |
3528 #endif | |
3529 | |
3839 | 3530 __ ba(cont); |
1037 | 3531 __ delayed()->mov(Deoptimization::Unpack_exception, L0deopt_mode);; |
0 | 3532 |
3533 // | |
3534 // Reexecute entry, similar to c2 uncommon trap | |
3535 // | |
3536 int reexecute_offset = __ offset() - start; | |
3537 | |
3538 // No need to update oop_map as each call to save_live_registers will produce identical oopmap | |
3539 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3540 | |
1037 | 3541 __ mov(Deoptimization::Unpack_reexecute, L0deopt_mode); |
0 | 3542 |
3543 __ bind(cont); | |
3544 | |
3545 __ set_last_Java_frame(SP, noreg); | |
3546 | |
3547 // do the call by hand so we can get the oopmap | |
3548 | |
3549 __ mov(G2_thread, L7_thread_cache); | |
3550 __ call(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), relocInfo::runtime_call_type); | |
3551 __ delayed()->mov(G2_thread, O0); | |
3552 | |
3553 // Set an oopmap for the call site this describes all our saved volatile registers | |
3554 | |
3555 oop_maps->add_gc_map( __ offset()-start, map); | |
3556 | |
3557 __ mov(L7_thread_cache, G2_thread); | |
3558 | |
3559 __ reset_last_Java_frame(); | |
3560 | |
3561 // NOTE: we know that only O0/O1 will be reloaded by restore_result_registers | |
3562 // so this move will survive | |
3563 | |
1037 | 3564 __ mov(L0deopt_mode, G4deopt_mode); |
0 | 3565 |
3566 __ mov(O0, O2UnrollBlock->after_save()); | |
3567 | |
3568 RegisterSaver::restore_result_registers(masm); | |
3569 | |
3570 Label noException; | |
3839 | 3571 __ cmp_and_br_short(G4deopt_mode, Deoptimization::Unpack_exception, Assembler::notEqual, Assembler::pt, noException); |
0 | 3572 |
3573 // Move the pending exception from exception_oop to Oexception so | |
3574 // the pending exception will be picked up the interpreter. | |
3575 __ ld_ptr(G2_thread, in_bytes(JavaThread::exception_oop_offset()), Oexception); | |
3576 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::exception_oop_offset())); | |
3577 __ bind(noException); | |
3578 | |
3579 // deallocate the deoptimization frame taking care to preserve the return values | |
3580 __ mov(Oreturn0, Oreturn0->after_save()); | |
3581 __ mov(Oreturn1, Oreturn1->after_save()); | |
3582 __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); | |
3583 __ restore(); | |
3584 | |
3585 // Allocate new interpreter frame(s) and possible c2i adapter frame | |
3586 | |
3587 make_new_frames(masm, true); | |
3588 | |
3589 // push a dummy "unpack_frame" taking care of float return values and | |
3590 // call Deoptimization::unpack_frames to have the unpacker layout | |
3591 // information in the interpreter frames just created and then return | |
3592 // to the interpreter entry point | |
3593 __ save(SP, -frame_size_words*wordSize, SP); | |
3594 __ stf(FloatRegisterImpl::D, Freturn0, saved_Freturn0_addr); | |
3595 #if !defined(_LP64) | |
3596 #if defined(COMPILER2) | |
1783 | 3597 // 32-bit 1-register longs return longs in G1 |
3598 __ stx(Greturn1, saved_Greturn1_addr); | |
0 | 3599 #endif |
3600 __ set_last_Java_frame(SP, noreg); | |
1037 | 3601 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, G4deopt_mode); |
0 | 3602 #else |
3603 // LP64 uses g4 in set_last_Java_frame | |
1037 | 3604 __ mov(G4deopt_mode, O1); |
0 | 3605 __ set_last_Java_frame(SP, G0); |
3606 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O1); | |
3607 #endif | |
3608 __ reset_last_Java_frame(); | |
3609 __ ldf(FloatRegisterImpl::D, saved_Freturn0_addr, Freturn0); | |
3610 | |
3611 #if !defined(_LP64) && defined(COMPILER2) | |
3612 // In 32 bit, C2 returns longs in G1 so restore the saved G1 into | |
1783 | 3613 // I0/I1 if the return value is long. |
3614 Label not_long; | |
3839 | 3615 __ cmp_and_br_short(O0,T_LONG, Assembler::notEqual, Assembler::pt, not_long); |
1783 | 3616 __ ldd(saved_Greturn1_addr,I0); |
3617 __ bind(not_long); | |
0 | 3618 #endif |
3619 __ ret(); | |
3620 __ delayed()->restore(); | |
3621 | |
3622 masm->flush(); | |
3623 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_words); | |
3624 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
3625 } | |
3626 | |
3627 #ifdef COMPILER2 | |
3628 | |
3629 //------------------------------generate_uncommon_trap_blob-------------------- | |
3630 // Ought to generate an ideal graph & compile, but here's some SPARC ASM | |
3631 // instead. | |
3632 void SharedRuntime::generate_uncommon_trap_blob() { | |
3633 // allocate space for the code | |
3634 ResourceMark rm; | |
3635 // setup code generation tools | |
3636 int pad = VerifyThread ? 512 : 0; | |
4957
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3637 if (UseStackBanging) { |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3638 pad += StackShadowPages*16 + 32; |
931e5f39e365
7147064: assert(allocates2(pc)) failed: not in CodeBuffer memory: 0xffffffff778d9d60 <= 0xffffffff778da69c
kvn
parents:
4873
diff
changeset
|
3639 } |
0 | 3640 #ifdef _LP64 |
3641 CodeBuffer buffer("uncommon_trap_blob", 2700+pad, 512); | |
3642 #else | |
3643 // Measured 8/7/03 at 660 in 32bit debug build (no VerifyThread) | |
3644 // Measured 8/7/03 at 1028 in 32bit debug build (VerifyThread) | |
3645 CodeBuffer buffer("uncommon_trap_blob", 2000+pad, 512); | |
3646 #endif | |
3647 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3648 Register O2UnrollBlock = O2; | |
3649 Register O2klass_index = O2; | |
3650 | |
3651 // | |
3652 // This is the entry point for all traps the compiler takes when it thinks | |
3653 // it cannot handle further execution of compilation code. The frame is | |
3654 // deoptimized in these cases and converted into interpreter frames for | |
3655 // execution | |
3656 // The steps taken by this frame are as follows: | |
3657 // - push a fake "unpack_frame" | |
3658 // - call the C routine Deoptimization::uncommon_trap (this function | |
3659 // packs the current compiled frame into vframe arrays and returns | |
3660 // information about the number and size of interpreter frames which | |
3661 // are equivalent to the frame which is being deoptimized) | |
3662 // - deallocate the "unpack_frame" | |
3663 // - deallocate the deoptimization frame | |
3664 // - in a loop using the information returned in the previous step | |
3665 // push interpreter frames; | |
3666 // - create a dummy "unpack_frame" | |
3667 // - call the C routine: Deoptimization::unpack_frames (this function | |
3668 // lays out values on the interpreter frame which was just created) | |
3669 // - deallocate the dummy unpack_frame | |
3670 // - return to the interpreter entry point | |
3671 // | |
3672 // Refer to the following methods for more information: | |
3673 // - Deoptimization::uncommon_trap | |
3674 // - Deoptimization::unpack_frame | |
3675 | |
3676 // the unloaded class index is in O0 (first parameter to this blob) | |
3677 | |
3678 // push a dummy "unpack_frame" | |
3679 // and call Deoptimization::uncommon_trap to pack the compiled frame into | |
3680 // vframe array and return the UnrollBlock information | |
3681 __ save_frame(0); | |
3682 __ set_last_Java_frame(SP, noreg); | |
3683 __ mov(I0, O2klass_index); | |
3684 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap), G2_thread, O2klass_index); | |
3685 __ reset_last_Java_frame(); | |
3686 __ mov(O0, O2UnrollBlock->after_save()); | |
3687 __ restore(); | |
3688 | |
3689 // deallocate the deoptimized frame taking care to preserve the return values | |
3690 __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); | |
3691 __ restore(); | |
3692 | |
3693 // Allocate new interpreter frame(s) and possible c2i adapter frame | |
3694 | |
3695 make_new_frames(masm, false); | |
3696 | |
3697 // push a dummy "unpack_frame" taking care of float return values and | |
3698 // call Deoptimization::unpack_frames to have the unpacker layout | |
3699 // information in the interpreter frames just created and then return | |
3700 // to the interpreter entry point | |
3701 __ save_frame(0); | |
3702 __ set_last_Java_frame(SP, noreg); | |
3703 __ mov(Deoptimization::Unpack_uncommon_trap, O3); // indicate it is the uncommon trap case | |
3704 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O3); | |
3705 __ reset_last_Java_frame(); | |
3706 __ ret(); | |
3707 __ delayed()->restore(); | |
3708 | |
3709 masm->flush(); | |
3710 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, NULL, __ total_frame_size_in_bytes(0)/wordSize); | |
3711 } | |
3712 | |
3713 #endif // COMPILER2 | |
3714 | |
3715 //------------------------------generate_handler_blob------------------- | |
3716 // | |
3717 // Generate a special Compile2Runtime blob that saves all registers, and sets | |
3718 // up an OopMap. | |
3719 // | |
3720 // This blob is jumped to (via a breakpoint and the signal handler) from a | |
3721 // safepoint in compiled code. On entry to this blob, O7 contains the | |
3722 // address in the original nmethod at which we should resume normal execution. | |
3723 // Thus, this blob looks like a subroutine which must preserve lots of | |
3724 // registers and return normally. Note that O7 is never register-allocated, | |
3725 // so it is guaranteed to be free here. | |
3726 // | |
3727 | |
3728 // The hardest part of what this blob must do is to save the 64-bit %o | |
3729 // registers in the 32-bit build. A simple 'save' turn the %o's to %i's and | |
3730 // an interrupt will chop off their heads. Making space in the caller's frame | |
3731 // first will let us save the 64-bit %o's before save'ing, but we cannot hand | |
3732 // the adjusted FP off to the GC stack-crawler: this will modify the caller's | |
3733 // SP and mess up HIS OopMaps. So we first adjust the caller's SP, then save | |
3734 // the 64-bit %o's, then do a save, then fixup the caller's SP (our FP). | |
3735 // Tricky, tricky, tricky... | |
3736 | |
3753
cba7b5c2d53f
7045514: SPARC assembly code for JSR 292 ricochet frames
never
parents:
2405
diff
changeset
|
3737 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
0 | 3738 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3739 | |
3740 // allocate space for the code | |
3741 ResourceMark rm; | |
3742 // setup code generation tools | |
3743 // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) | |
3744 // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) | |
3745 // even larger with TraceJumps | |
3746 int pad = TraceJumps ? 512 : 0; | |
3747 CodeBuffer buffer("handler_blob", 1600 + pad, 512); | |
3748 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3749 int frame_size_words; | |
3750 OopMapSet *oop_maps = new OopMapSet(); | |
3751 OopMap* map = NULL; | |
3752 | |
3753 int start = __ offset(); | |
3754 | |
3755 // If this causes a return before the processing, then do a "restore" | |
3756 if (cause_return) { | |
3757 __ restore(); | |
3758 } else { | |
3759 // Make it look like we were called via the poll | |
3760 // so that frame constructor always sees a valid return address | |
3761 __ ld_ptr(G2_thread, in_bytes(JavaThread::saved_exception_pc_offset()), O7); | |
3762 __ sub(O7, frame::pc_return_offset, O7); | |
3763 } | |
3764 | |
3765 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3766 | |
3767 // setup last_Java_sp (blows G4) | |
3768 __ set_last_Java_frame(SP, noreg); | |
3769 | |
3770 // call into the runtime to handle illegal instructions exception | |
3771 // Do not use call_VM_leaf, because we need to make a GC map at this call site. | |
3772 __ mov(G2_thread, O0); | |
3773 __ save_thread(L7_thread_cache); | |
3774 __ call(call_ptr); | |
3775 __ delayed()->nop(); | |
3776 | |
3777 // Set an oopmap for the call site. | |
3778 // We need this not only for callee-saved registers, but also for volatile | |
3779 // registers that the compiler might be keeping live across a safepoint. | |
3780 | |
3781 oop_maps->add_gc_map( __ offset() - start, map); | |
3782 | |
3783 __ restore_thread(L7_thread_cache); | |
3784 // clear last_Java_sp | |
3785 __ reset_last_Java_frame(); | |
3786 | |
3787 // Check for exceptions | |
3788 Label pending; | |
3789 | |
3790 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); | |
3839 | 3791 __ br_notnull_short(O1, Assembler::pn, pending); |
0 | 3792 |
3793 RegisterSaver::restore_live_registers(masm); | |
3794 | |
3795 // We are back the the original state on entry and ready to go. | |
3796 | |
3797 __ retl(); | |
3798 __ delayed()->nop(); | |
3799 | |
3800 // Pending exception after the safepoint | |
3801 | |
3802 __ bind(pending); | |
3803 | |
3804 RegisterSaver::restore_live_registers(masm); | |
3805 | |
3806 // We are back the the original state on entry. | |
3807 | |
3808 // Tail-call forward_exception_entry, with the issuing PC in O7, | |
3809 // so it looks like the original nmethod called forward_exception_entry. | |
3810 __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); | |
3811 __ JMP(O0, 0); | |
3812 __ delayed()->nop(); | |
3813 | |
3814 // ------------- | |
3815 // make sure all code is generated | |
3816 masm->flush(); | |
3817 | |
3818 // return exception blob | |
3819 return SafepointBlob::create(&buffer, oop_maps, frame_size_words); | |
3820 } | |
3821 | |
3822 // | |
3823 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3824 // | |
3825 // Generate a stub that calls into vm to find out the proper destination | |
3826 // of a java call. All the argument registers are live at this point | |
3827 // but since this is generic code we don't know what they are and the caller | |
3828 // must do any gc of the args. | |
3829 // | |
3753
cba7b5c2d53f
7045514: SPARC assembly code for JSR 292 ricochet frames
never
parents:
2405
diff
changeset
|
3830 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3831 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3832 | |
3833 // allocate space for the code | |
3834 ResourceMark rm; | |
3835 // setup code generation tools | |
3836 // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) | |
3837 // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) | |
3838 // even larger with TraceJumps | |
3839 int pad = TraceJumps ? 512 : 0; | |
3840 CodeBuffer buffer(name, 1600 + pad, 512); | |
3841 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3842 int frame_size_words; | |
3843 OopMapSet *oop_maps = new OopMapSet(); | |
3844 OopMap* map = NULL; | |
3845 | |
3846 int start = __ offset(); | |
3847 | |
3848 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); | |
3849 | |
3850 int frame_complete = __ offset(); | |
3851 | |
3852 // setup last_Java_sp (blows G4) | |
3853 __ set_last_Java_frame(SP, noreg); | |
3854 | |
3855 // call into the runtime to handle illegal instructions exception | |
3856 // Do not use call_VM_leaf, because we need to make a GC map at this call site. | |
3857 __ mov(G2_thread, O0); | |
3858 __ save_thread(L7_thread_cache); | |
3859 __ call(destination, relocInfo::runtime_call_type); | |
3860 __ delayed()->nop(); | |
3861 | |
3862 // O0 contains the address we are going to jump to assuming no exception got installed | |
3863 | |
3864 // Set an oopmap for the call site. | |
3865 // We need this not only for callee-saved registers, but also for volatile | |
3866 // registers that the compiler might be keeping live across a safepoint. | |
3867 | |
3868 oop_maps->add_gc_map( __ offset() - start, map); | |
3869 | |
3870 __ restore_thread(L7_thread_cache); | |
3871 // clear last_Java_sp | |
3872 __ reset_last_Java_frame(); | |
3873 | |
3874 // Check for exceptions | |
3875 Label pending; | |
3876 | |
3877 __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); | |
3839 | 3878 __ br_notnull_short(O1, Assembler::pn, pending); |
0 | 3879 |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
3880 // get the returned Method* |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
3881 |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6266
diff
changeset
|
3882 __ get_vm_result_2(G5_method); |
0 | 3883 __ stx(G5_method, SP, RegisterSaver::G5_offset()+STACK_BIAS); |
3884 | |
3885 // O0 is where we want to jump, overwrite G3 which is saved and scratch | |
3886 | |
3887 __ stx(O0, SP, RegisterSaver::G3_offset()+STACK_BIAS); | |
3888 | |
3889 RegisterSaver::restore_live_registers(masm); | |
3890 | |
3891 // We are back the the original state on entry and ready to go. | |
3892 | |
3893 __ JMP(G3, 0); | |
3894 __ delayed()->nop(); | |
3895 | |
3896 // Pending exception after the safepoint | |
3897 | |
3898 __ bind(pending); | |
3899 | |
3900 RegisterSaver::restore_live_registers(masm); | |
3901 | |
3902 // We are back the the original state on entry. | |
3903 | |
3904 // Tail-call forward_exception_entry, with the issuing PC in O7, | |
3905 // so it looks like the original nmethod called forward_exception_entry. | |
3906 __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); | |
3907 __ JMP(O0, 0); | |
3908 __ delayed()->nop(); | |
3909 | |
3910 // ------------- | |
3911 // make sure all code is generated | |
3912 masm->flush(); | |
3913 | |
3914 // return the blob | |
3915 // frame_size_words or bytes?? | |
3916 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
3917 } |