Mercurial > hg > truffle
annotate src/share/vm/opto/mulnode.cpp @ 624:337400e7a5dd
6797305: Add LoadUB and LoadUI opcode class
Summary: Add a LoadUB (unsigned byte) and LoadUI (unsigned int) opcode class so we have these load optimizations in the first place and do not need to handle them in the matcher.
Reviewed-by: never, kvn
| author | twisti |
|---|---|
| date | Mon, 09 Mar 2009 03:17:11 -0700 |
| parents | 7628781568e1 |
| children | 18a08a7e16b5 |
| rev | line source |
|---|---|
| 0 | 1 /* |
|
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2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
| 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 21 * have any questions. | |
| 22 * | |
| 23 */ | |
| 24 | |
| 25 // Portions of code courtesy of Clifford Click | |
| 26 | |
| 27 #include "incls/_precompiled.incl" | |
| 28 #include "incls/_mulnode.cpp.incl" | |
| 29 | |
| 30 | |
| 31 //============================================================================= | |
| 32 //------------------------------hash------------------------------------------- | |
| 33 // Hash function over MulNodes. Needs to be commutative; i.e., I swap | |
| 34 // (commute) inputs to MulNodes willy-nilly so the hash function must return | |
| 35 // the same value in the presence of edge swapping. | |
| 36 uint MulNode::hash() const { | |
| 37 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode(); | |
| 38 } | |
| 39 | |
| 40 //------------------------------Identity--------------------------------------- | |
| 41 // Multiplying a one preserves the other argument | |
| 42 Node *MulNode::Identity( PhaseTransform *phase ) { | |
| 43 register const Type *one = mul_id(); // The multiplicative identity | |
| 44 if( phase->type( in(1) )->higher_equal( one ) ) return in(2); | |
| 45 if( phase->type( in(2) )->higher_equal( one ) ) return in(1); | |
| 46 | |
| 47 return this; | |
| 48 } | |
| 49 | |
| 50 //------------------------------Ideal------------------------------------------ | |
| 51 // We also canonicalize the Node, moving constants to the right input, | |
| 52 // and flatten expressions (so that 1+x+2 becomes x+3). | |
| 53 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 54 const Type *t1 = phase->type( in(1) ); | |
| 55 const Type *t2 = phase->type( in(2) ); | |
| 56 Node *progress = NULL; // Progress flag | |
| 57 // We are OK if right is a constant, or right is a load and | |
| 58 // left is a non-constant. | |
| 59 if( !(t2->singleton() || | |
| 60 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) { | |
| 61 if( t1->singleton() || // Left input is a constant? | |
| 62 // Otherwise, sort inputs (commutativity) to help value numbering. | |
| 63 (in(1)->_idx > in(2)->_idx) ) { | |
| 64 swap_edges(1, 2); | |
| 65 const Type *t = t1; | |
| 66 t1 = t2; | |
| 67 t2 = t; | |
| 68 progress = this; // Made progress | |
| 69 } | |
| 70 } | |
| 71 | |
| 72 // If the right input is a constant, and the left input is a product of a | |
| 73 // constant, flatten the expression tree. | |
| 74 uint op = Opcode(); | |
| 75 if( t2->singleton() && // Right input is a constant? | |
| 76 op != Op_MulF && // Float & double cannot reassociate | |
| 77 op != Op_MulD ) { | |
| 78 if( t2 == Type::TOP ) return NULL; | |
| 79 Node *mul1 = in(1); | |
| 80 #ifdef ASSERT | |
| 81 // Check for dead loop | |
| 82 int op1 = mul1->Opcode(); | |
| 83 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) || | |
| 84 ( op1 == mul_opcode() || op1 == add_opcode() ) && | |
| 85 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) || | |
| 86 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) ) | |
| 87 assert(false, "dead loop in MulNode::Ideal"); | |
| 88 #endif | |
| 89 | |
| 90 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply? | |
| 91 // Mul of a constant? | |
| 92 const Type *t12 = phase->type( mul1->in(2) ); | |
| 93 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant? | |
| 94 // Compute new constant; check for overflow | |
| 95 const Type *tcon01 = mul1->as_Mul()->mul_ring(t2,t12); | |
| 96 if( tcon01->singleton() ) { | |
| 97 // The Mul of the flattened expression | |
| 98 set_req(1, mul1->in(1)); | |
| 99 set_req(2, phase->makecon( tcon01 )); | |
| 100 t2 = tcon01; | |
| 101 progress = this; // Made progress | |
| 102 } | |
| 103 } | |
| 104 } | |
| 105 // If the right input is a constant, and the left input is an add of a | |
| 106 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0 | |
| 107 const Node *add1 = in(1); | |
| 108 if( add1->Opcode() == add_opcode() ) { // Left input is an add? | |
| 109 // Add of a constant? | |
| 110 const Type *t12 = phase->type( add1->in(2) ); | |
| 111 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant? | |
| 112 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" ); | |
| 113 // Compute new constant; check for overflow | |
| 114 const Type *tcon01 = mul_ring(t2,t12); | |
| 115 if( tcon01->singleton() ) { | |
| 116 | |
| 117 // Convert (X+con1)*con0 into X*con0 | |
| 118 Node *mul = clone(); // mul = ()*con0 | |
| 119 mul->set_req(1,add1->in(1)); // mul = X*con0 | |
| 120 mul = phase->transform(mul); | |
| 121 | |
| 122 Node *add2 = add1->clone(); | |
| 123 add2->set_req(1, mul); // X*con0 + con0*con1 | |
| 124 add2->set_req(2, phase->makecon(tcon01) ); | |
| 125 progress = add2; | |
| 126 } | |
| 127 } | |
| 128 } // End of is left input an add | |
| 129 } // End of is right input a Mul | |
| 130 | |
| 131 return progress; | |
| 132 } | |
| 133 | |
| 134 //------------------------------Value----------------------------------------- | |
| 135 const Type *MulNode::Value( PhaseTransform *phase ) const { | |
| 136 const Type *t1 = phase->type( in(1) ); | |
| 137 const Type *t2 = phase->type( in(2) ); | |
| 138 // Either input is TOP ==> the result is TOP | |
| 139 if( t1 == Type::TOP ) return Type::TOP; | |
| 140 if( t2 == Type::TOP ) return Type::TOP; | |
| 141 | |
| 142 // Either input is ZERO ==> the result is ZERO. | |
| 143 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0 | |
| 144 int op = Opcode(); | |
| 145 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) { | |
| 146 const Type *zero = add_id(); // The multiplicative zero | |
| 147 if( t1->higher_equal( zero ) ) return zero; | |
| 148 if( t2->higher_equal( zero ) ) return zero; | |
| 149 } | |
| 150 | |
| 151 // Either input is BOTTOM ==> the result is the local BOTTOM | |
| 152 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM ) | |
| 153 return bottom_type(); | |
| 154 | |
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155 #if defined(IA32) |
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156 // Can't trust native compilers to properly fold strict double |
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157 // multiplication with round-to-zero on this platform. |
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158 if (op == Op_MulD && phase->C->method()->is_strict()) { |
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159 return TypeD::DOUBLE; |
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160 } |
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161 #endif |
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162 |
| 0 | 163 return mul_ring(t1,t2); // Local flavor of type multiplication |
| 164 } | |
| 165 | |
| 166 | |
| 167 //============================================================================= | |
| 168 //------------------------------Ideal------------------------------------------ | |
| 169 // Check for power-of-2 multiply, then try the regular MulNode::Ideal | |
| 170 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 171 // Swap constant to right | |
| 172 jint con; | |
| 173 if ((con = in(1)->find_int_con(0)) != 0) { | |
| 174 swap_edges(1, 2); | |
| 175 // Finish rest of method to use info in 'con' | |
| 176 } else if ((con = in(2)->find_int_con(0)) == 0) { | |
| 177 return MulNode::Ideal(phase, can_reshape); | |
| 178 } | |
| 179 | |
| 180 // Now we have a constant Node on the right and the constant in con | |
| 181 if( con == 0 ) return NULL; // By zero is handled by Value call | |
| 182 if( con == 1 ) return NULL; // By one is handled by Identity call | |
| 183 | |
| 184 // Check for negative constant; if so negate the final result | |
| 185 bool sign_flip = false; | |
| 186 if( con < 0 ) { | |
| 187 con = -con; | |
| 188 sign_flip = true; | |
| 189 } | |
| 190 | |
| 191 // Get low bit; check for being the only bit | |
| 192 Node *res = NULL; | |
| 193 jint bit1 = con & -con; // Extract low bit | |
| 194 if( bit1 == con ) { // Found a power of 2? | |
| 195 res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); | |
| 196 } else { | |
| 197 | |
| 198 // Check for constant with 2 bits set | |
| 199 jint bit2 = con-bit1; | |
| 200 bit2 = bit2 & -bit2; // Extract 2nd bit | |
| 201 if( bit2 + bit1 == con ) { // Found all bits in con? | |
| 202 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); | |
| 203 Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); | |
| 204 res = new (phase->C, 3) AddINode( n2, n1 ); | |
| 205 | |
| 206 } else if (is_power_of_2(con+1)) { | |
| 207 // Sleezy: power-of-2 -1. Next time be generic. | |
| 208 jint temp = (jint) (con + 1); | |
| 209 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); | |
| 210 res = new (phase->C, 3) SubINode( n1, in(1) ); | |
| 211 } else { | |
| 212 return MulNode::Ideal(phase, can_reshape); | |
| 213 } | |
| 214 } | |
| 215 | |
| 216 if( sign_flip ) { // Need to negate result? | |
| 217 res = phase->transform(res);// Transform, before making the zero con | |
| 218 res = new (phase->C, 3) SubINode(phase->intcon(0),res); | |
| 219 } | |
| 220 | |
| 221 return res; // Return final result | |
| 222 } | |
| 223 | |
| 224 //------------------------------mul_ring--------------------------------------- | |
| 225 // Compute the product type of two integer ranges into this node. | |
| 226 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const { | |
| 227 const TypeInt *r0 = t0->is_int(); // Handy access | |
| 228 const TypeInt *r1 = t1->is_int(); | |
| 229 | |
| 230 // Fetch endpoints of all ranges | |
| 231 int32 lo0 = r0->_lo; | |
| 232 double a = (double)lo0; | |
| 233 int32 hi0 = r0->_hi; | |
| 234 double b = (double)hi0; | |
| 235 int32 lo1 = r1->_lo; | |
| 236 double c = (double)lo1; | |
| 237 int32 hi1 = r1->_hi; | |
| 238 double d = (double)hi1; | |
| 239 | |
| 240 // Compute all endpoints & check for overflow | |
| 241 int32 A = lo0*lo1; | |
| 242 if( (double)A != a*c ) return TypeInt::INT; // Overflow? | |
| 243 int32 B = lo0*hi1; | |
| 244 if( (double)B != a*d ) return TypeInt::INT; // Overflow? | |
| 245 int32 C = hi0*lo1; | |
| 246 if( (double)C != b*c ) return TypeInt::INT; // Overflow? | |
| 247 int32 D = hi0*hi1; | |
| 248 if( (double)D != b*d ) return TypeInt::INT; // Overflow? | |
| 249 | |
| 250 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints | |
| 251 else { lo0 = B; hi0 = A; } | |
| 252 if( C < D ) { | |
| 253 if( C < lo0 ) lo0 = C; | |
| 254 if( D > hi0 ) hi0 = D; | |
| 255 } else { | |
| 256 if( D < lo0 ) lo0 = D; | |
| 257 if( C > hi0 ) hi0 = C; | |
| 258 } | |
| 259 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); | |
| 260 } | |
| 261 | |
| 262 | |
| 263 //============================================================================= | |
| 264 //------------------------------Ideal------------------------------------------ | |
| 265 // Check for power-of-2 multiply, then try the regular MulNode::Ideal | |
| 266 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 267 // Swap constant to right | |
| 268 jlong con; | |
| 269 if ((con = in(1)->find_long_con(0)) != 0) { | |
| 270 swap_edges(1, 2); | |
| 271 // Finish rest of method to use info in 'con' | |
| 272 } else if ((con = in(2)->find_long_con(0)) == 0) { | |
| 273 return MulNode::Ideal(phase, can_reshape); | |
| 274 } | |
| 275 | |
| 276 // Now we have a constant Node on the right and the constant in con | |
| 277 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call | |
| 278 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call | |
| 279 | |
| 280 // Check for negative constant; if so negate the final result | |
| 281 bool sign_flip = false; | |
| 282 if( con < 0 ) { | |
| 283 con = -con; | |
| 284 sign_flip = true; | |
| 285 } | |
| 286 | |
| 287 // Get low bit; check for being the only bit | |
| 288 Node *res = NULL; | |
| 289 jlong bit1 = con & -con; // Extract low bit | |
| 290 if( bit1 == con ) { // Found a power of 2? | |
| 291 res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); | |
| 292 } else { | |
| 293 | |
| 294 // Check for constant with 2 bits set | |
| 295 jlong bit2 = con-bit1; | |
| 296 bit2 = bit2 & -bit2; // Extract 2nd bit | |
| 297 if( bit2 + bit1 == con ) { // Found all bits in con? | |
| 298 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); | |
| 299 Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); | |
| 300 res = new (phase->C, 3) AddLNode( n2, n1 ); | |
| 301 | |
| 302 } else if (is_power_of_2_long(con+1)) { | |
| 303 // Sleezy: power-of-2 -1. Next time be generic. | |
| 304 jlong temp = (jlong) (con + 1); | |
| 305 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); | |
| 306 res = new (phase->C, 3) SubLNode( n1, in(1) ); | |
| 307 } else { | |
| 308 return MulNode::Ideal(phase, can_reshape); | |
| 309 } | |
| 310 } | |
| 311 | |
| 312 if( sign_flip ) { // Need to negate result? | |
| 313 res = phase->transform(res);// Transform, before making the zero con | |
| 314 res = new (phase->C, 3) SubLNode(phase->longcon(0),res); | |
| 315 } | |
| 316 | |
| 317 return res; // Return final result | |
| 318 } | |
| 319 | |
| 320 //------------------------------mul_ring--------------------------------------- | |
| 321 // Compute the product type of two integer ranges into this node. | |
| 322 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const { | |
| 323 const TypeLong *r0 = t0->is_long(); // Handy access | |
| 324 const TypeLong *r1 = t1->is_long(); | |
| 325 | |
| 326 // Fetch endpoints of all ranges | |
| 327 jlong lo0 = r0->_lo; | |
| 328 double a = (double)lo0; | |
| 329 jlong hi0 = r0->_hi; | |
| 330 double b = (double)hi0; | |
| 331 jlong lo1 = r1->_lo; | |
| 332 double c = (double)lo1; | |
| 333 jlong hi1 = r1->_hi; | |
| 334 double d = (double)hi1; | |
| 335 | |
| 336 // Compute all endpoints & check for overflow | |
| 337 jlong A = lo0*lo1; | |
| 338 if( (double)A != a*c ) return TypeLong::LONG; // Overflow? | |
| 339 jlong B = lo0*hi1; | |
| 340 if( (double)B != a*d ) return TypeLong::LONG; // Overflow? | |
| 341 jlong C = hi0*lo1; | |
| 342 if( (double)C != b*c ) return TypeLong::LONG; // Overflow? | |
| 343 jlong D = hi0*hi1; | |
| 344 if( (double)D != b*d ) return TypeLong::LONG; // Overflow? | |
| 345 | |
| 346 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints | |
| 347 else { lo0 = B; hi0 = A; } | |
| 348 if( C < D ) { | |
| 349 if( C < lo0 ) lo0 = C; | |
| 350 if( D > hi0 ) hi0 = D; | |
| 351 } else { | |
| 352 if( D < lo0 ) lo0 = D; | |
| 353 if( C > hi0 ) hi0 = C; | |
| 354 } | |
| 355 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); | |
| 356 } | |
| 357 | |
| 358 //============================================================================= | |
| 359 //------------------------------mul_ring--------------------------------------- | |
| 360 // Compute the product type of two double ranges into this node. | |
| 361 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const { | |
| 362 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT; | |
| 363 return TypeF::make( t0->getf() * t1->getf() ); | |
| 364 } | |
| 365 | |
| 366 //============================================================================= | |
| 367 //------------------------------mul_ring--------------------------------------- | |
| 368 // Compute the product type of two double ranges into this node. | |
| 369 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const { | |
| 370 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE; | |
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371 // We must be multiplying 2 double constants. |
| 0 | 372 return TypeD::make( t0->getd() * t1->getd() ); |
| 373 } | |
| 374 | |
| 375 //============================================================================= | |
| 145 | 376 //------------------------------Value------------------------------------------ |
| 377 const Type *MulHiLNode::Value( PhaseTransform *phase ) const { | |
| 378 // Either input is TOP ==> the result is TOP | |
| 379 const Type *t1 = phase->type( in(1) ); | |
| 380 const Type *t2 = phase->type( in(2) ); | |
| 381 if( t1 == Type::TOP ) return Type::TOP; | |
| 382 if( t2 == Type::TOP ) return Type::TOP; | |
| 383 | |
| 384 // Either input is BOTTOM ==> the result is the local BOTTOM | |
| 385 const Type *bot = bottom_type(); | |
| 386 if( (t1 == bot) || (t2 == bot) || | |
| 387 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
| 388 return bot; | |
| 389 | |
| 390 // It is not worth trying to constant fold this stuff! | |
| 391 return TypeLong::LONG; | |
| 392 } | |
| 393 | |
| 394 //============================================================================= | |
| 0 | 395 //------------------------------mul_ring--------------------------------------- |
| 396 // Supplied function returns the product of the inputs IN THE CURRENT RING. | |
| 397 // For the logical operations the ring's MUL is really a logical AND function. | |
| 398 // This also type-checks the inputs for sanity. Guaranteed never to | |
| 399 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. | |
| 400 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const { | |
| 401 const TypeInt *r0 = t0->is_int(); // Handy access | |
| 402 const TypeInt *r1 = t1->is_int(); | |
| 403 int widen = MAX2(r0->_widen,r1->_widen); | |
| 404 | |
| 405 // If either input is a constant, might be able to trim cases | |
| 406 if( !r0->is_con() && !r1->is_con() ) | |
| 407 return TypeInt::INT; // No constants to be had | |
| 408 | |
| 409 // Both constants? Return bits | |
| 410 if( r0->is_con() && r1->is_con() ) | |
| 411 return TypeInt::make( r0->get_con() & r1->get_con() ); | |
| 412 | |
| 413 if( r0->is_con() && r0->get_con() > 0 ) | |
| 414 return TypeInt::make(0, r0->get_con(), widen); | |
| 415 | |
| 416 if( r1->is_con() && r1->get_con() > 0 ) | |
| 417 return TypeInt::make(0, r1->get_con(), widen); | |
| 418 | |
| 419 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) { | |
| 420 return TypeInt::BOOL; | |
| 421 } | |
| 422 | |
| 423 return TypeInt::INT; // No constants to be had | |
| 424 } | |
| 425 | |
| 426 //------------------------------Identity--------------------------------------- | |
| 427 // Masking off the high bits of an unsigned load is not required | |
| 428 Node *AndINode::Identity( PhaseTransform *phase ) { | |
| 429 | |
| 430 // x & x => x | |
| 431 if (phase->eqv(in(1), in(2))) return in(1); | |
| 432 | |
| 433 Node *load = in(1); | |
| 434 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
| 435 if( t2 && t2->is_con() ) { | |
| 436 int con = t2->get_con(); | |
| 437 // Masking off high bits which are always zero is useless. | |
| 438 const TypeInt* t1 = phase->type( in(1) )->isa_int(); | |
| 439 if (t1 != NULL && t1->_lo >= 0) { | |
| 440 jint t1_support = ((jint)1 << (1 + log2_intptr(t1->_hi))) - 1; | |
| 441 if ((t1_support & con) == t1_support) | |
| 442 return load; | |
| 443 } | |
| 444 uint lop = load->Opcode(); | |
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445 if( lop == Op_LoadUS && |
| 0 | 446 con == 0x0000FFFF ) // Already zero-extended |
| 447 return load; | |
| 448 // Masking off the high bits of a unsigned-shift-right is not | |
| 449 // needed either. | |
| 450 if( lop == Op_URShiftI ) { | |
| 451 const TypeInt *t12 = phase->type( load->in(2) )->isa_int(); | |
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452 if( t12 && t12->is_con() ) { // Shift is by a constant |
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453 int shift = t12->get_con(); |
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454 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts |
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455 int mask = max_juint >> shift; |
| 0 | 456 if( (mask&con) == mask ) // If AND is useless, skip it |
| 457 return load; | |
| 458 } | |
| 459 } | |
| 460 } | |
| 461 return MulNode::Identity(phase); | |
| 462 } | |
| 463 | |
| 464 //------------------------------Ideal------------------------------------------ | |
| 465 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 466 // Special case constant AND mask | |
| 467 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
| 468 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); | |
| 469 const int mask = t2->get_con(); | |
| 470 Node *load = in(1); | |
| 471 uint lop = load->Opcode(); | |
| 472 | |
| 473 // Masking bits off of a Character? Hi bits are already zero. | |
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474 if( lop == Op_LoadUS && |
| 0 | 475 (mask & 0xFFFF0000) ) // Can we make a smaller mask? |
| 476 return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF)); | |
| 477 | |
| 478 // Masking bits off of a Short? Loading a Character does some masking | |
| 479 if( lop == Op_LoadS && | |
| 480 (mask & 0xFFFF0000) == 0 ) { | |
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481 Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control), |
| 0 | 482 load->in(MemNode::Memory), |
| 483 load->in(MemNode::Address), | |
| 484 load->adr_type()); | |
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485 ldus = phase->transform(ldus); |
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486 return new (phase->C, 3) AndINode(ldus, phase->intcon(mask&0xFFFF)); |
| 0 | 487 } |
| 488 | |
| 624 | 489 // Masking sign bits off of a Byte? Do an unsigned byte load. |
| 490 if (lop == Op_LoadB && mask == 0x000000FF) { | |
| 491 return new (phase->C, 3) LoadUBNode(load->in(MemNode::Control), | |
| 492 load->in(MemNode::Memory), | |
| 493 load->in(MemNode::Address), | |
| 494 load->adr_type()); | |
| 495 } | |
| 496 | |
| 497 // Masking sign bits off of a Byte plus additional lower bits? Do | |
| 498 // an unsigned byte load plus an and. | |
| 499 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { | |
| 500 Node* ldub = new (phase->C, 3) LoadUBNode(load->in(MemNode::Control), | |
| 501 load->in(MemNode::Memory), | |
| 502 load->in(MemNode::Address), | |
| 503 load->adr_type()); | |
| 504 ldub = phase->transform(ldub); | |
| 505 return new (phase->C, 3) AndINode(ldub, phase->intcon(mask)); | |
| 0 | 506 } |
| 507 | |
| 508 // Masking off sign bits? Dont make them! | |
| 509 if( lop == Op_RShiftI ) { | |
| 510 const TypeInt *t12 = phase->type(load->in(2))->isa_int(); | |
| 511 if( t12 && t12->is_con() ) { // Shift is by a constant | |
| 512 int shift = t12->get_con(); | |
| 513 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
| 514 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift); | |
| 515 // If the AND'ing of the 2 masks has no bits, then only original shifted | |
| 516 // bits survive. NO sign-extension bits survive the maskings. | |
| 517 if( (sign_bits_mask & mask) == 0 ) { | |
| 518 // Use zero-fill shift instead | |
| 519 Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2))); | |
| 520 return new (phase->C, 3) AndINode( zshift, in(2) ); | |
| 521 } | |
| 522 } | |
| 523 } | |
| 524 | |
| 525 // Check for 'negate/and-1', a pattern emitted when someone asks for | |
| 526 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement | |
| 527 // plus 1) and the mask is of the low order bit. Skip the negate. | |
| 528 if( lop == Op_SubI && mask == 1 && load->in(1) && | |
| 529 phase->type(load->in(1)) == TypeInt::ZERO ) | |
| 530 return new (phase->C, 3) AndINode( load->in(2), in(2) ); | |
| 531 | |
| 532 return MulNode::Ideal(phase, can_reshape); | |
| 533 } | |
| 534 | |
| 535 //============================================================================= | |
| 536 //------------------------------mul_ring--------------------------------------- | |
| 537 // Supplied function returns the product of the inputs IN THE CURRENT RING. | |
| 538 // For the logical operations the ring's MUL is really a logical AND function. | |
| 539 // This also type-checks the inputs for sanity. Guaranteed never to | |
| 540 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. | |
| 541 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const { | |
| 542 const TypeLong *r0 = t0->is_long(); // Handy access | |
| 543 const TypeLong *r1 = t1->is_long(); | |
| 544 int widen = MAX2(r0->_widen,r1->_widen); | |
| 545 | |
| 546 // If either input is a constant, might be able to trim cases | |
| 547 if( !r0->is_con() && !r1->is_con() ) | |
| 548 return TypeLong::LONG; // No constants to be had | |
| 549 | |
| 550 // Both constants? Return bits | |
| 551 if( r0->is_con() && r1->is_con() ) | |
| 552 return TypeLong::make( r0->get_con() & r1->get_con() ); | |
| 553 | |
| 554 if( r0->is_con() && r0->get_con() > 0 ) | |
| 555 return TypeLong::make(CONST64(0), r0->get_con(), widen); | |
| 556 | |
| 557 if( r1->is_con() && r1->get_con() > 0 ) | |
| 558 return TypeLong::make(CONST64(0), r1->get_con(), widen); | |
| 559 | |
| 560 return TypeLong::LONG; // No constants to be had | |
| 561 } | |
| 562 | |
| 563 //------------------------------Identity--------------------------------------- | |
| 564 // Masking off the high bits of an unsigned load is not required | |
| 565 Node *AndLNode::Identity( PhaseTransform *phase ) { | |
| 566 | |
| 567 // x & x => x | |
| 568 if (phase->eqv(in(1), in(2))) return in(1); | |
| 569 | |
| 570 Node *usr = in(1); | |
| 571 const TypeLong *t2 = phase->type( in(2) )->isa_long(); | |
| 572 if( t2 && t2->is_con() ) { | |
| 573 jlong con = t2->get_con(); | |
| 574 // Masking off high bits which are always zero is useless. | |
| 575 const TypeLong* t1 = phase->type( in(1) )->isa_long(); | |
| 576 if (t1 != NULL && t1->_lo >= 0) { | |
| 577 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1; | |
| 578 if ((t1_support & con) == t1_support) | |
| 579 return usr; | |
| 580 } | |
| 581 uint lop = usr->Opcode(); | |
| 582 // Masking off the high bits of a unsigned-shift-right is not | |
| 583 // needed either. | |
| 584 if( lop == Op_URShiftL ) { | |
| 585 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int(); | |
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586 if( t12 && t12->is_con() ) { // Shift is by a constant |
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587 int shift = t12->get_con(); |
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588 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
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589 jlong mask = max_julong >> shift; |
| 0 | 590 if( (mask&con) == mask ) // If AND is useless, skip it |
| 591 return usr; | |
| 592 } | |
| 593 } | |
| 594 } | |
| 595 return MulNode::Identity(phase); | |
| 596 } | |
| 597 | |
| 598 //------------------------------Ideal------------------------------------------ | |
| 599 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 600 // Special case constant AND mask | |
| 601 const TypeLong *t2 = phase->type( in(2) )->isa_long(); | |
| 602 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); | |
| 603 const jlong mask = t2->get_con(); | |
| 604 | |
| 624 | 605 Node* in1 = in(1); |
| 606 uint op = in1->Opcode(); | |
| 607 | |
| 608 // Masking sign bits off of an integer? Do an unsigned integer to long load. | |
| 609 if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == 0x00000000FFFFFFFFL) { | |
| 610 Node* load = in1->in(1); | |
| 611 return new (phase->C, 3) LoadUI2LNode(load->in(MemNode::Control), | |
| 612 load->in(MemNode::Memory), | |
| 613 load->in(MemNode::Address), | |
| 614 load->adr_type()); | |
| 615 } | |
| 0 | 616 |
| 617 // Masking off sign bits? Dont make them! | |
| 624 | 618 if (op == Op_RShiftL) { |
| 619 const TypeInt *t12 = phase->type(in1->in(2))->isa_int(); | |
| 0 | 620 if( t12 && t12->is_con() ) { // Shift is by a constant |
| 621 int shift = t12->get_con(); | |
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622 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
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623 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1); |
| 0 | 624 // If the AND'ing of the 2 masks has no bits, then only original shifted |
| 625 // bits survive. NO sign-extension bits survive the maskings. | |
| 626 if( (sign_bits_mask & mask) == 0 ) { | |
| 627 // Use zero-fill shift instead | |
| 624 | 628 Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(in1->in(1), in1->in(2))); |
| 0 | 629 return new (phase->C, 3) AndLNode( zshift, in(2) ); |
| 630 } | |
| 631 } | |
| 632 } | |
| 633 | |
| 634 return MulNode::Ideal(phase, can_reshape); | |
| 635 } | |
| 636 | |
| 637 //============================================================================= | |
| 638 //------------------------------Identity--------------------------------------- | |
| 639 Node *LShiftINode::Identity( PhaseTransform *phase ) { | |
| 640 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
| 641 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this; | |
| 642 } | |
| 643 | |
| 644 //------------------------------Ideal------------------------------------------ | |
| 645 // If the right input is a constant, and the left input is an add of a | |
| 646 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 | |
| 647 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 648 const Type *t = phase->type( in(2) ); | |
| 649 if( t == Type::TOP ) return NULL; // Right input is dead | |
| 650 const TypeInt *t2 = t->isa_int(); | |
| 651 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
| 652 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count | |
| 653 | |
| 654 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count | |
| 655 | |
| 656 // Left input is an add of a constant? | |
| 657 Node *add1 = in(1); | |
| 658 int add1_op = add1->Opcode(); | |
| 659 if( add1_op == Op_AddI ) { // Left input is an add? | |
| 660 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" ); | |
| 661 const TypeInt *t12 = phase->type(add1->in(2))->isa_int(); | |
| 662 if( t12 && t12->is_con() ){ // Left input is an add of a con? | |
| 663 // Transform is legal, but check for profit. Avoid breaking 'i2s' | |
| 664 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'. | |
| 665 if( con < 16 ) { | |
| 666 // Compute X << con0 | |
| 667 Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) ); | |
| 668 // Compute X<<con0 + (con1<<con0) | |
| 669 return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con)); | |
| 670 } | |
| 671 } | |
| 672 } | |
| 673 | |
| 674 // Check for "(x>>c0)<<c0" which just masks off low bits | |
| 675 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) && | |
| 676 add1->in(2) == in(2) ) | |
| 677 // Convert to "(x & -(1<<c0))" | |
| 678 return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con))); | |
| 679 | |
| 680 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | |
| 681 if( add1_op == Op_AndI ) { | |
| 682 Node *add2 = add1->in(1); | |
| 683 int add2_op = add2->Opcode(); | |
| 684 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) && | |
| 685 add2->in(2) == in(2) ) { | |
| 686 // Convert to "(x & (Y<<c0))" | |
| 687 Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) ); | |
| 688 return new (phase->C, 3) AndINode( add2->in(1), y_sh ); | |
| 689 } | |
| 690 } | |
| 691 | |
| 692 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits | |
| 693 // before shifting them away. | |
| 694 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con); | |
| 695 if( add1_op == Op_AndI && | |
| 696 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) ) | |
| 697 return new (phase->C, 3) LShiftINode( add1->in(1), in(2) ); | |
| 698 | |
| 699 return NULL; | |
| 700 } | |
| 701 | |
| 702 //------------------------------Value------------------------------------------ | |
| 703 // A LShiftINode shifts its input2 left by input1 amount. | |
| 704 const Type *LShiftINode::Value( PhaseTransform *phase ) const { | |
| 705 const Type *t1 = phase->type( in(1) ); | |
| 706 const Type *t2 = phase->type( in(2) ); | |
| 707 // Either input is TOP ==> the result is TOP | |
| 708 if( t1 == Type::TOP ) return Type::TOP; | |
| 709 if( t2 == Type::TOP ) return Type::TOP; | |
| 710 | |
| 711 // Left input is ZERO ==> the result is ZERO. | |
| 712 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
| 713 // Shift by zero does nothing | |
| 714 if( t2 == TypeInt::ZERO ) return t1; | |
| 715 | |
| 716 // Either input is BOTTOM ==> the result is BOTTOM | |
| 717 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) || | |
| 718 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
| 719 return TypeInt::INT; | |
| 720 | |
| 721 const TypeInt *r1 = t1->is_int(); // Handy access | |
| 722 const TypeInt *r2 = t2->is_int(); // Handy access | |
| 723 | |
| 724 if (!r2->is_con()) | |
| 725 return TypeInt::INT; | |
| 726 | |
| 727 uint shift = r2->get_con(); | |
| 728 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
| 729 // Shift by a multiple of 32 does nothing: | |
| 730 if (shift == 0) return t1; | |
| 731 | |
| 732 // If the shift is a constant, shift the bounds of the type, | |
| 733 // unless this could lead to an overflow. | |
| 734 if (!r1->is_con()) { | |
| 735 jint lo = r1->_lo, hi = r1->_hi; | |
| 736 if (((lo << shift) >> shift) == lo && | |
| 737 ((hi << shift) >> shift) == hi) { | |
| 738 // No overflow. The range shifts up cleanly. | |
| 739 return TypeInt::make((jint)lo << (jint)shift, | |
| 740 (jint)hi << (jint)shift, | |
| 741 MAX2(r1->_widen,r2->_widen)); | |
| 742 } | |
| 743 return TypeInt::INT; | |
| 744 } | |
| 745 | |
| 746 return TypeInt::make( (jint)r1->get_con() << (jint)shift ); | |
| 747 } | |
| 748 | |
| 749 //============================================================================= | |
| 750 //------------------------------Identity--------------------------------------- | |
| 751 Node *LShiftLNode::Identity( PhaseTransform *phase ) { | |
| 752 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
| 753 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
| 754 } | |
| 755 | |
| 756 //------------------------------Ideal------------------------------------------ | |
| 757 // If the right input is a constant, and the left input is an add of a | |
| 758 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 | |
| 759 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 760 const Type *t = phase->type( in(2) ); | |
| 761 if( t == Type::TOP ) return NULL; // Right input is dead | |
| 762 const TypeInt *t2 = t->isa_int(); | |
| 763 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
| 764 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count | |
| 765 | |
| 766 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count | |
| 767 | |
| 768 // Left input is an add of a constant? | |
| 769 Node *add1 = in(1); | |
| 770 int add1_op = add1->Opcode(); | |
| 771 if( add1_op == Op_AddL ) { // Left input is an add? | |
| 772 // Avoid dead data cycles from dead loops | |
| 773 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" ); | |
| 774 const TypeLong *t12 = phase->type(add1->in(2))->isa_long(); | |
| 775 if( t12 && t12->is_con() ){ // Left input is an add of a con? | |
| 776 // Compute X << con0 | |
| 777 Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) ); | |
| 778 // Compute X<<con0 + (con1<<con0) | |
| 779 return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con)); | |
| 780 } | |
| 781 } | |
| 782 | |
| 783 // Check for "(x>>c0)<<c0" which just masks off low bits | |
| 784 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) && | |
| 785 add1->in(2) == in(2) ) | |
| 786 // Convert to "(x & -(1<<c0))" | |
| 787 return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con))); | |
| 788 | |
| 789 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | |
| 790 if( add1_op == Op_AndL ) { | |
| 791 Node *add2 = add1->in(1); | |
| 792 int add2_op = add2->Opcode(); | |
| 793 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) && | |
| 794 add2->in(2) == in(2) ) { | |
| 795 // Convert to "(x & (Y<<c0))" | |
| 796 Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) ); | |
| 797 return new (phase->C, 3) AndLNode( add2->in(1), y_sh ); | |
| 798 } | |
| 799 } | |
| 800 | |
| 801 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits | |
| 802 // before shifting them away. | |
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803 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1); |
| 0 | 804 if( add1_op == Op_AndL && |
| 805 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) ) | |
| 806 return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ); | |
| 807 | |
| 808 return NULL; | |
| 809 } | |
| 810 | |
| 811 //------------------------------Value------------------------------------------ | |
| 812 // A LShiftLNode shifts its input2 left by input1 amount. | |
| 813 const Type *LShiftLNode::Value( PhaseTransform *phase ) const { | |
| 814 const Type *t1 = phase->type( in(1) ); | |
| 815 const Type *t2 = phase->type( in(2) ); | |
| 816 // Either input is TOP ==> the result is TOP | |
| 817 if( t1 == Type::TOP ) return Type::TOP; | |
| 818 if( t2 == Type::TOP ) return Type::TOP; | |
| 819 | |
| 820 // Left input is ZERO ==> the result is ZERO. | |
| 821 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
| 822 // Shift by zero does nothing | |
| 823 if( t2 == TypeInt::ZERO ) return t1; | |
| 824 | |
| 825 // Either input is BOTTOM ==> the result is BOTTOM | |
| 826 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) || | |
| 827 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
| 828 return TypeLong::LONG; | |
| 829 | |
| 830 const TypeLong *r1 = t1->is_long(); // Handy access | |
| 831 const TypeInt *r2 = t2->is_int(); // Handy access | |
| 832 | |
| 833 if (!r2->is_con()) | |
| 834 return TypeLong::LONG; | |
| 835 | |
| 836 uint shift = r2->get_con(); | |
|
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837 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
| 0 | 838 // Shift by a multiple of 64 does nothing: |
| 839 if (shift == 0) return t1; | |
| 840 | |
| 841 // If the shift is a constant, shift the bounds of the type, | |
| 842 // unless this could lead to an overflow. | |
| 843 if (!r1->is_con()) { | |
| 844 jlong lo = r1->_lo, hi = r1->_hi; | |
| 845 if (((lo << shift) >> shift) == lo && | |
| 846 ((hi << shift) >> shift) == hi) { | |
| 847 // No overflow. The range shifts up cleanly. | |
| 848 return TypeLong::make((jlong)lo << (jint)shift, | |
| 849 (jlong)hi << (jint)shift, | |
| 850 MAX2(r1->_widen,r2->_widen)); | |
| 851 } | |
| 852 return TypeLong::LONG; | |
| 853 } | |
| 854 | |
| 855 return TypeLong::make( (jlong)r1->get_con() << (jint)shift ); | |
| 856 } | |
| 857 | |
| 858 //============================================================================= | |
| 859 //------------------------------Identity--------------------------------------- | |
| 860 Node *RShiftINode::Identity( PhaseTransform *phase ) { | |
| 861 const TypeInt *t2 = phase->type(in(2))->isa_int(); | |
| 862 if( !t2 ) return this; | |
| 863 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 ) | |
| 864 return in(1); | |
| 865 | |
| 866 // Check for useless sign-masking | |
| 867 if( in(1)->Opcode() == Op_LShiftI && | |
| 868 in(1)->req() == 3 && | |
| 869 in(1)->in(2) == in(2) && | |
| 870 t2->is_con() ) { | |
| 871 uint shift = t2->get_con(); | |
| 872 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
| 873 // Compute masks for which this shifting doesn't change | |
| 874 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000 | |
| 875 int hi = ~lo; // 00007FFF | |
| 876 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int(); | |
| 877 if( !t11 ) return this; | |
| 878 // Does actual value fit inside of mask? | |
| 879 if( lo <= t11->_lo && t11->_hi <= hi ) | |
| 880 return in(1)->in(1); // Then shifting is a nop | |
| 881 } | |
| 882 | |
| 883 return this; | |
| 884 } | |
| 885 | |
| 886 //------------------------------Ideal------------------------------------------ | |
| 887 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 888 // Inputs may be TOP if they are dead. | |
| 889 const TypeInt *t1 = phase->type( in(1) )->isa_int(); | |
| 890 if( !t1 ) return NULL; // Left input is an integer | |
| 891 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
| 892 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
| 893 const TypeInt *t3; // type of in(1).in(2) | |
| 894 int shift = t2->get_con(); | |
| 895 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
| 896 | |
| 897 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count | |
| 898 | |
| 899 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller. | |
| 900 // Such expressions arise normally from shift chains like (byte)(x >> 24). | |
| 901 const Node *mask = in(1); | |
| 902 if( mask->Opcode() == Op_AndI && | |
| 903 (t3 = phase->type(mask->in(2))->isa_int()) && | |
| 904 t3->is_con() ) { | |
| 905 Node *x = mask->in(1); | |
| 906 jint maskbits = t3->get_con(); | |
| 907 // Convert to "(x >> shift) & (mask >> shift)" | |
| 908 Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) ); | |
| 909 return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift)); | |
| 910 } | |
| 911 | |
| 912 // Check for "(short[i] <<16)>>16" which simply sign-extends | |
| 913 const Node *shl = in(1); | |
| 914 if( shl->Opcode() != Op_LShiftI ) return NULL; | |
| 915 | |
| 916 if( shift == 16 && | |
| 917 (t3 = phase->type(shl->in(2))->isa_int()) && | |
| 918 t3->is_con(16) ) { | |
| 919 Node *ld = shl->in(1); | |
| 920 if( ld->Opcode() == Op_LoadS ) { | |
| 921 // Sign extension is just useless here. Return a RShiftI of zero instead | |
| 922 // returning 'ld' directly. We cannot return an old Node directly as | |
| 923 // that is the job of 'Identity' calls and Identity calls only work on | |
| 924 // direct inputs ('ld' is an extra Node removed from 'this'). The | |
| 925 // combined optimization requires Identity only return direct inputs. | |
| 926 set_req(1, ld); | |
| 927 set_req(2, phase->intcon(0)); | |
| 928 return this; | |
| 929 } | |
|
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930 else if( ld->Opcode() == Op_LoadUS ) |
| 0 | 931 // Replace zero-extension-load with sign-extension-load |
| 932 return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control), | |
| 933 ld->in(MemNode::Memory), | |
| 934 ld->in(MemNode::Address), | |
| 935 ld->adr_type()); | |
| 936 } | |
| 937 | |
| 938 // Check for "(byte[i] <<24)>>24" which simply sign-extends | |
| 939 if( shift == 24 && | |
| 940 (t3 = phase->type(shl->in(2))->isa_int()) && | |
| 941 t3->is_con(24) ) { | |
| 942 Node *ld = shl->in(1); | |
| 943 if( ld->Opcode() == Op_LoadB ) { | |
| 944 // Sign extension is just useless here | |
| 945 set_req(1, ld); | |
| 946 set_req(2, phase->intcon(0)); | |
| 947 return this; | |
| 948 } | |
| 949 } | |
| 950 | |
| 951 return NULL; | |
| 952 } | |
| 953 | |
| 954 //------------------------------Value------------------------------------------ | |
| 955 // A RShiftINode shifts its input2 right by input1 amount. | |
| 956 const Type *RShiftINode::Value( PhaseTransform *phase ) const { | |
| 957 const Type *t1 = phase->type( in(1) ); | |
| 958 const Type *t2 = phase->type( in(2) ); | |
| 959 // Either input is TOP ==> the result is TOP | |
| 960 if( t1 == Type::TOP ) return Type::TOP; | |
| 961 if( t2 == Type::TOP ) return Type::TOP; | |
| 962 | |
| 963 // Left input is ZERO ==> the result is ZERO. | |
| 964 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
| 965 // Shift by zero does nothing | |
| 966 if( t2 == TypeInt::ZERO ) return t1; | |
| 967 | |
| 968 // Either input is BOTTOM ==> the result is BOTTOM | |
| 969 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
| 970 return TypeInt::INT; | |
| 971 | |
| 972 if (t2 == TypeInt::INT) | |
| 973 return TypeInt::INT; | |
| 974 | |
| 975 const TypeInt *r1 = t1->is_int(); // Handy access | |
| 976 const TypeInt *r2 = t2->is_int(); // Handy access | |
| 977 | |
| 978 // If the shift is a constant, just shift the bounds of the type. | |
| 979 // For example, if the shift is 31, we just propagate sign bits. | |
| 980 if (r2->is_con()) { | |
| 981 uint shift = r2->get_con(); | |
| 982 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
| 983 // Shift by a multiple of 32 does nothing: | |
| 984 if (shift == 0) return t1; | |
| 985 // Calculate reasonably aggressive bounds for the result. | |
| 986 // This is necessary if we are to correctly type things | |
| 987 // like (x<<24>>24) == ((byte)x). | |
| 988 jint lo = (jint)r1->_lo >> (jint)shift; | |
| 989 jint hi = (jint)r1->_hi >> (jint)shift; | |
| 990 assert(lo <= hi, "must have valid bounds"); | |
| 991 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
| 992 #ifdef ASSERT | |
| 993 // Make sure we get the sign-capture idiom correct. | |
| 994 if (shift == BitsPerJavaInteger-1) { | |
| 995 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0"); | |
| 996 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1"); | |
| 997 } | |
| 998 #endif | |
| 999 return ti; | |
| 1000 } | |
| 1001 | |
| 1002 if( !r1->is_con() || !r2->is_con() ) | |
| 1003 return TypeInt::INT; | |
| 1004 | |
| 1005 // Signed shift right | |
| 1006 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) ); | |
| 1007 } | |
| 1008 | |
| 1009 //============================================================================= | |
| 1010 //------------------------------Identity--------------------------------------- | |
| 1011 Node *RShiftLNode::Identity( PhaseTransform *phase ) { | |
| 1012 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
| 1013 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
| 1014 } | |
| 1015 | |
| 1016 //------------------------------Value------------------------------------------ | |
| 1017 // A RShiftLNode shifts its input2 right by input1 amount. | |
| 1018 const Type *RShiftLNode::Value( PhaseTransform *phase ) const { | |
| 1019 const Type *t1 = phase->type( in(1) ); | |
| 1020 const Type *t2 = phase->type( in(2) ); | |
| 1021 // Either input is TOP ==> the result is TOP | |
| 1022 if( t1 == Type::TOP ) return Type::TOP; | |
| 1023 if( t2 == Type::TOP ) return Type::TOP; | |
| 1024 | |
| 1025 // Left input is ZERO ==> the result is ZERO. | |
| 1026 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
| 1027 // Shift by zero does nothing | |
| 1028 if( t2 == TypeInt::ZERO ) return t1; | |
| 1029 | |
| 1030 // Either input is BOTTOM ==> the result is BOTTOM | |
| 1031 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
| 1032 return TypeLong::LONG; | |
| 1033 | |
| 1034 if (t2 == TypeInt::INT) | |
| 1035 return TypeLong::LONG; | |
| 1036 | |
| 1037 const TypeLong *r1 = t1->is_long(); // Handy access | |
| 1038 const TypeInt *r2 = t2->is_int (); // Handy access | |
| 1039 | |
| 1040 // If the shift is a constant, just shift the bounds of the type. | |
| 1041 // For example, if the shift is 63, we just propagate sign bits. | |
| 1042 if (r2->is_con()) { | |
| 1043 uint shift = r2->get_con(); | |
| 1044 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts | |
| 1045 // Shift by a multiple of 64 does nothing: | |
| 1046 if (shift == 0) return t1; | |
| 1047 // Calculate reasonably aggressive bounds for the result. | |
| 1048 // This is necessary if we are to correctly type things | |
| 1049 // like (x<<24>>24) == ((byte)x). | |
| 1050 jlong lo = (jlong)r1->_lo >> (jlong)shift; | |
| 1051 jlong hi = (jlong)r1->_hi >> (jlong)shift; | |
| 1052 assert(lo <= hi, "must have valid bounds"); | |
| 1053 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
| 1054 #ifdef ASSERT | |
| 1055 // Make sure we get the sign-capture idiom correct. | |
| 1056 if (shift == (2*BitsPerJavaInteger)-1) { | |
| 1057 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0"); | |
| 1058 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1"); | |
| 1059 } | |
| 1060 #endif | |
| 1061 return tl; | |
| 1062 } | |
| 1063 | |
| 1064 return TypeLong::LONG; // Give up | |
| 1065 } | |
| 1066 | |
| 1067 //============================================================================= | |
| 1068 //------------------------------Identity--------------------------------------- | |
| 1069 Node *URShiftINode::Identity( PhaseTransform *phase ) { | |
| 1070 const TypeInt *ti = phase->type( in(2) )->isa_int(); | |
| 1071 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1); | |
| 1072 | |
| 1073 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x". | |
| 1074 // Happens during new-array length computation. | |
| 1075 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)] | |
| 1076 Node *add = in(1); | |
| 1077 if( add->Opcode() == Op_AddI ) { | |
| 1078 const TypeInt *t2 = phase->type(add->in(2))->isa_int(); | |
| 1079 if( t2 && t2->is_con(wordSize - 1) && | |
| 1080 add->in(1)->Opcode() == Op_LShiftI ) { | |
| 1081 // Check that shift_counts are LogBytesPerWord | |
| 1082 Node *lshift_count = add->in(1)->in(2); | |
| 1083 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int(); | |
| 1084 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) && | |
| 1085 t_lshift_count == phase->type(in(2)) ) { | |
| 1086 Node *x = add->in(1)->in(1); | |
| 1087 const TypeInt *t_x = phase->type(x)->isa_int(); | |
| 1088 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) { | |
| 1089 return x; | |
| 1090 } | |
| 1091 } | |
| 1092 } | |
| 1093 } | |
| 1094 | |
| 1095 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this; | |
| 1096 } | |
| 1097 | |
| 1098 //------------------------------Ideal------------------------------------------ | |
| 1099 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 1100 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
| 1101 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
| 1102 const int con = t2->get_con() & 31; // Shift count is always masked | |
| 1103 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count | |
| 1104 // We'll be wanting the right-shift amount as a mask of that many bits | |
| 1105 const int mask = right_n_bits(BitsPerJavaInteger - con); | |
| 1106 | |
| 1107 int in1_op = in(1)->Opcode(); | |
| 1108 | |
| 1109 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32 | |
| 1110 if( in1_op == Op_URShiftI ) { | |
| 1111 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int(); | |
| 1112 if( t12 && t12->is_con() ) { // Right input is a constant | |
| 1113 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" ); | |
| 1114 const int con2 = t12->get_con() & 31; // Shift count is always masked | |
| 1115 const int con3 = con+con2; | |
| 1116 if( con3 < 32 ) // Only merge shifts if total is < 32 | |
| 1117 return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) ); | |
| 1118 } | |
| 1119 } | |
| 1120 | |
| 1121 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z | |
| 1122 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". | |
| 1123 // If Q is "X << z" the rounding is useless. Look for patterns like | |
| 1124 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. | |
| 1125 Node *add = in(1); | |
| 1126 if( in1_op == Op_AddI ) { | |
| 1127 Node *lshl = add->in(1); | |
| 1128 if( lshl->Opcode() == Op_LShiftI && | |
| 1129 phase->type(lshl->in(2)) == t2 ) { | |
| 1130 Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) ); | |
| 1131 Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) ); | |
| 1132 return new (phase->C, 3) AndINode( sum, phase->intcon(mask) ); | |
| 1133 } | |
| 1134 } | |
| 1135 | |
| 1136 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | |
| 1137 // This shortens the mask. Also, if we are extracting a high byte and | |
| 1138 // storing it to a buffer, the mask will be removed completely. | |
| 1139 Node *andi = in(1); | |
| 1140 if( in1_op == Op_AndI ) { | |
| 1141 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int(); | |
| 1142 if( t3 && t3->is_con() ) { // Right input is a constant | |
| 1143 jint mask2 = t3->get_con(); | |
| 1144 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | |
| 1145 Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) ); | |
| 1146 return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2)); | |
| 1147 // The negative values are easier to materialize than positive ones. | |
| 1148 // A typical case from address arithmetic is ((x & ~15) >> 4). | |
| 1149 // It's better to change that to ((x >> 4) & ~0) versus | |
| 1150 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64. | |
| 1151 } | |
| 1152 } | |
| 1153 | |
| 1154 // Check for "(X << z ) >>> z" which simply zero-extends | |
| 1155 Node *shl = in(1); | |
| 1156 if( in1_op == Op_LShiftI && | |
| 1157 phase->type(shl->in(2)) == t2 ) | |
| 1158 return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) ); | |
| 1159 | |
| 1160 return NULL; | |
| 1161 } | |
| 1162 | |
| 1163 //------------------------------Value------------------------------------------ | |
| 1164 // A URShiftINode shifts its input2 right by input1 amount. | |
| 1165 const Type *URShiftINode::Value( PhaseTransform *phase ) const { | |
| 1166 // (This is a near clone of RShiftINode::Value.) | |
| 1167 const Type *t1 = phase->type( in(1) ); | |
| 1168 const Type *t2 = phase->type( in(2) ); | |
| 1169 // Either input is TOP ==> the result is TOP | |
| 1170 if( t1 == Type::TOP ) return Type::TOP; | |
| 1171 if( t2 == Type::TOP ) return Type::TOP; | |
| 1172 | |
| 1173 // Left input is ZERO ==> the result is ZERO. | |
| 1174 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
| 1175 // Shift by zero does nothing | |
| 1176 if( t2 == TypeInt::ZERO ) return t1; | |
| 1177 | |
| 1178 // Either input is BOTTOM ==> the result is BOTTOM | |
| 1179 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
| 1180 return TypeInt::INT; | |
| 1181 | |
| 1182 if (t2 == TypeInt::INT) | |
| 1183 return TypeInt::INT; | |
| 1184 | |
| 1185 const TypeInt *r1 = t1->is_int(); // Handy access | |
| 1186 const TypeInt *r2 = t2->is_int(); // Handy access | |
| 1187 | |
| 1188 if (r2->is_con()) { | |
| 1189 uint shift = r2->get_con(); | |
| 1190 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
| 1191 // Shift by a multiple of 32 does nothing: | |
| 1192 if (shift == 0) return t1; | |
| 1193 // Calculate reasonably aggressive bounds for the result. | |
| 1194 jint lo = (juint)r1->_lo >> (juint)shift; | |
| 1195 jint hi = (juint)r1->_hi >> (juint)shift; | |
| 1196 if (r1->_hi >= 0 && r1->_lo < 0) { | |
| 1197 // If the type has both negative and positive values, | |
| 1198 // there are two separate sub-domains to worry about: | |
| 1199 // The positive half and the negative half. | |
| 1200 jint neg_lo = lo; | |
| 1201 jint neg_hi = (juint)-1 >> (juint)shift; | |
| 1202 jint pos_lo = (juint) 0 >> (juint)shift; | |
| 1203 jint pos_hi = hi; | |
| 1204 lo = MIN2(neg_lo, pos_lo); // == 0 | |
| 1205 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; | |
| 1206 } | |
| 1207 assert(lo <= hi, "must have valid bounds"); | |
| 1208 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
| 1209 #ifdef ASSERT | |
| 1210 // Make sure we get the sign-capture idiom correct. | |
| 1211 if (shift == BitsPerJavaInteger-1) { | |
| 1212 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0"); | |
| 1213 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1"); | |
| 1214 } | |
| 1215 #endif | |
| 1216 return ti; | |
| 1217 } | |
| 1218 | |
| 1219 // | |
| 1220 // Do not support shifted oops in info for GC | |
| 1221 // | |
| 1222 // else if( t1->base() == Type::InstPtr ) { | |
| 1223 // | |
| 1224 // const TypeInstPtr *o = t1->is_instptr(); | |
| 1225 // if( t1->singleton() ) | |
| 1226 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); | |
| 1227 // } | |
| 1228 // else if( t1->base() == Type::KlassPtr ) { | |
| 1229 // const TypeKlassPtr *o = t1->is_klassptr(); | |
| 1230 // if( t1->singleton() ) | |
| 1231 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); | |
| 1232 // } | |
| 1233 | |
| 1234 return TypeInt::INT; | |
| 1235 } | |
| 1236 | |
| 1237 //============================================================================= | |
| 1238 //------------------------------Identity--------------------------------------- | |
| 1239 Node *URShiftLNode::Identity( PhaseTransform *phase ) { | |
| 1240 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
| 1241 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
| 1242 } | |
| 1243 | |
| 1244 //------------------------------Ideal------------------------------------------ | |
| 1245 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
| 1246 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
| 1247 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
| 1248 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked | |
| 1249 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count | |
| 1250 // note: mask computation below does not work for 0 shift count | |
| 1251 // We'll be wanting the right-shift amount as a mask of that many bits | |
|
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6795362: 32bit server compiler leads to wrong results on solaris-x86
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1252 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1); |
| 0 | 1253 |
| 1254 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z | |
| 1255 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". | |
| 1256 // If Q is "X << z" the rounding is useless. Look for patterns like | |
| 1257 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. | |
| 1258 Node *add = in(1); | |
| 1259 if( add->Opcode() == Op_AddL ) { | |
| 1260 Node *lshl = add->in(1); | |
| 1261 if( lshl->Opcode() == Op_LShiftL && | |
| 1262 phase->type(lshl->in(2)) == t2 ) { | |
| 1263 Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) ); | |
| 1264 Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) ); | |
| 1265 return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) ); | |
| 1266 } | |
| 1267 } | |
| 1268 | |
| 1269 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | |
| 1270 // This shortens the mask. Also, if we are extracting a high byte and | |
| 1271 // storing it to a buffer, the mask will be removed completely. | |
| 1272 Node *andi = in(1); | |
| 1273 if( andi->Opcode() == Op_AndL ) { | |
| 1274 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long(); | |
| 1275 if( t3 && t3->is_con() ) { // Right input is a constant | |
| 1276 jlong mask2 = t3->get_con(); | |
| 1277 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | |
| 1278 Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) ); | |
| 1279 return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2)); | |
| 1280 } | |
| 1281 } | |
| 1282 | |
| 1283 // Check for "(X << z ) >>> z" which simply zero-extends | |
| 1284 Node *shl = in(1); | |
| 1285 if( shl->Opcode() == Op_LShiftL && | |
| 1286 phase->type(shl->in(2)) == t2 ) | |
| 1287 return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) ); | |
| 1288 | |
| 1289 return NULL; | |
| 1290 } | |
| 1291 | |
| 1292 //------------------------------Value------------------------------------------ | |
| 1293 // A URShiftINode shifts its input2 right by input1 amount. | |
| 1294 const Type *URShiftLNode::Value( PhaseTransform *phase ) const { | |
| 1295 // (This is a near clone of RShiftLNode::Value.) | |
| 1296 const Type *t1 = phase->type( in(1) ); | |
| 1297 const Type *t2 = phase->type( in(2) ); | |
| 1298 // Either input is TOP ==> the result is TOP | |
| 1299 if( t1 == Type::TOP ) return Type::TOP; | |
| 1300 if( t2 == Type::TOP ) return Type::TOP; | |
| 1301 | |
| 1302 // Left input is ZERO ==> the result is ZERO. | |
| 1303 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
| 1304 // Shift by zero does nothing | |
| 1305 if( t2 == TypeInt::ZERO ) return t1; | |
| 1306 | |
| 1307 // Either input is BOTTOM ==> the result is BOTTOM | |
| 1308 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
| 1309 return TypeLong::LONG; | |
| 1310 | |
| 1311 if (t2 == TypeInt::INT) | |
| 1312 return TypeLong::LONG; | |
| 1313 | |
| 1314 const TypeLong *r1 = t1->is_long(); // Handy access | |
| 1315 const TypeInt *r2 = t2->is_int (); // Handy access | |
| 1316 | |
| 1317 if (r2->is_con()) { | |
| 1318 uint shift = r2->get_con(); | |
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7628781568e1
6795362: 32bit server compiler leads to wrong results on solaris-x86
twisti
parents:
558
diff
changeset
|
1319 shift &= BitsPerJavaLong - 1; // semantics of Java shifts |
| 0 | 1320 // Shift by a multiple of 64 does nothing: |
| 1321 if (shift == 0) return t1; | |
| 1322 // Calculate reasonably aggressive bounds for the result. | |
| 1323 jlong lo = (julong)r1->_lo >> (juint)shift; | |
| 1324 jlong hi = (julong)r1->_hi >> (juint)shift; | |
| 1325 if (r1->_hi >= 0 && r1->_lo < 0) { | |
| 1326 // If the type has both negative and positive values, | |
| 1327 // there are two separate sub-domains to worry about: | |
| 1328 // The positive half and the negative half. | |
| 1329 jlong neg_lo = lo; | |
| 1330 jlong neg_hi = (julong)-1 >> (juint)shift; | |
| 1331 jlong pos_lo = (julong) 0 >> (juint)shift; | |
| 1332 jlong pos_hi = hi; | |
| 1333 //lo = MIN2(neg_lo, pos_lo); // == 0 | |
| 1334 lo = neg_lo < pos_lo ? neg_lo : pos_lo; | |
| 1335 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; | |
| 1336 hi = neg_hi > pos_hi ? neg_hi : pos_hi; | |
| 1337 } | |
| 1338 assert(lo <= hi, "must have valid bounds"); | |
| 1339 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
| 1340 #ifdef ASSERT | |
| 1341 // Make sure we get the sign-capture idiom correct. | |
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7628781568e1
6795362: 32bit server compiler leads to wrong results on solaris-x86
twisti
parents:
558
diff
changeset
|
1342 if (shift == BitsPerJavaLong - 1) { |
| 0 | 1343 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0"); |
| 1344 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1"); | |
| 1345 } | |
| 1346 #endif | |
| 1347 return tl; | |
| 1348 } | |
| 1349 | |
| 1350 return TypeLong::LONG; // Give up | |
| 1351 } |