Mercurial > hg > truffle
annotate src/cpu/sparc/vm/vm_version_sparc.hpp @ 4591:33f181ad79d5
changed DynamicSizeBasedInliningPolicy to use log(probability) for frequently executed loops, added check for SmallCompiledCodeSize to WeightBasedInliningPolicy.
author | Christian Haeubl <christian.haeubl@oracle.com> |
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date | Mon, 13 Feb 2012 18:40:54 -0800 |
parents | baf763f388e6 |
children | 8cb110fd7627 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef CPU_SPARC_VM_VM_VERSION_SPARC_HPP |
26 #define CPU_SPARC_VM_VM_VERSION_SPARC_HPP | |
27 | |
28 #include "runtime/globals_extension.hpp" | |
29 #include "runtime/vm_version.hpp" | |
30 | |
0 | 31 class VM_Version: public Abstract_VM_Version { |
32 protected: | |
33 enum Feature_Flag { | |
3839 | 34 v8_instructions = 0, |
35 hardware_mul32 = 1, | |
36 hardware_div32 = 2, | |
37 hardware_fsmuld = 3, | |
38 hardware_popc = 4, | |
39 v9_instructions = 5, | |
40 vis1_instructions = 6, | |
41 vis2_instructions = 7, | |
42 sun4v_instructions = 8, | |
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43 blk_init_instructions = 9, |
3839 | 44 fmaf_instructions = 10, |
45 fmau_instructions = 11, | |
46 vis3_instructions = 12, | |
47 sparc64_family = 13, | |
48 T_family = 14, | |
49 T1_model = 15, | |
50 cbcond_instructions = 16 | |
0 | 51 }; |
52 | |
53 enum Feature_Flag_Set { | |
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54 unknown_m = 0, |
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55 all_features_m = -1, |
0 | 56 |
3839 | 57 v8_instructions_m = 1 << v8_instructions, |
58 hardware_mul32_m = 1 << hardware_mul32, | |
59 hardware_div32_m = 1 << hardware_div32, | |
60 hardware_fsmuld_m = 1 << hardware_fsmuld, | |
61 hardware_popc_m = 1 << hardware_popc, | |
62 v9_instructions_m = 1 << v9_instructions, | |
63 vis1_instructions_m = 1 << vis1_instructions, | |
64 vis2_instructions_m = 1 << vis2_instructions, | |
65 sun4v_m = 1 << sun4v_instructions, | |
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66 blk_init_instructions_m = 1 << blk_init_instructions, |
3839 | 67 fmaf_instructions_m = 1 << fmaf_instructions, |
68 fmau_instructions_m = 1 << fmau_instructions, | |
69 vis3_instructions_m = 1 << vis3_instructions, | |
70 sparc64_family_m = 1 << sparc64_family, | |
71 T_family_m = 1 << T_family, | |
72 T1_model_m = 1 << T1_model, | |
73 cbcond_instructions_m = 1 << cbcond_instructions, | |
0 | 74 |
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75 generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m, |
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76 generic_v9_m = generic_v8_m | v9_instructions_m, |
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77 ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m, |
0 | 78 |
79 // Temporary until we have something more accurate | |
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80 niagara1_unique_m = sun4v_m, |
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81 niagara1_m = generic_v9_m | niagara1_unique_m |
0 | 82 }; |
83 | |
84 static int _features; | |
85 static const char* _features_str; | |
86 | |
87 static void print_features(); | |
88 static int determine_features(); | |
89 static int platform_features(int features); | |
90 | |
2080 | 91 // Returns true if the platform is in the niagara line (T series) |
92 static bool is_T_family(int features) { return (features & T_family_m) != 0; } | |
93 static bool is_niagara() { return is_T_family(_features); } | |
94 DEBUG_ONLY( static bool is_niagara(int features) { return (features & sun4v_m) != 0; } ) | |
95 | |
96 // Returns true if it is niagara1 (T1). | |
97 static bool is_T1_model(int features) { return is_T_family(features) && ((features & T1_model_m) != 0); } | |
0 | 98 |
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99 static int maximum_niagara1_processor_count() { return 32; } |
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100 |
0 | 101 public: |
102 // Initialization | |
103 static void initialize(); | |
104 | |
105 // Instruction support | |
106 static bool has_v8() { return (_features & v8_instructions_m) != 0; } | |
107 static bool has_v9() { return (_features & v9_instructions_m) != 0; } | |
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108 static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; } |
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109 static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; } |
0 | 110 static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; } |
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111 static bool has_hardware_popc() { return (_features & hardware_popc_m) != 0; } |
0 | 112 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; } |
113 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; } | |
2080 | 114 static bool has_vis3() { return (_features & vis3_instructions_m) != 0; } |
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115 static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; } |
3839 | 116 static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; } |
0 | 117 |
118 static bool supports_compare_and_exchange() | |
119 { return has_v9(); } | |
120 | |
2080 | 121 // Returns true if the platform is in the niagara line (T series) |
122 // and newer than the niagara1. | |
123 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); } | |
3854 | 124 static bool is_T4() { return is_T_family(_features) && has_cbcond(); } |
3839 | 125 |
2080 | 126 // Fujitsu SPARC64 |
127 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; } | |
0 | 128 |
3839 | 129 static bool is_sun4v() { return (_features & sun4v_m) != 0; } |
130 static bool is_ultra3() { return (_features & ultra3_m) == ultra3_m && !is_sun4v() && !is_sparc64(); } | |
131 | |
2080 | 132 static bool has_fast_fxtof() { return is_niagara() || is_sparc64() || has_v9() && !is_ultra3(); } |
133 static bool has_fast_idiv() { return is_niagara_plus() || is_sparc64(); } | |
3854 | 134 |
3839 | 135 // T4 and newer Sparc have fast RDPC instruction. |
3854 | 136 static bool has_fast_rdpc() { return is_T4(); } |
137 | |
3892 | 138 // On T4 and newer Sparc BIS to the beginning of cache line always zeros it. |
139 static bool has_block_zeroing() { return has_blk_init() && is_T4(); } | |
0 | 140 |
141 static const char* cpu_features() { return _features_str; } | |
142 | |
3854 | 143 static intx prefetch_data_size() { |
144 return is_T4() ? 32 : 64; // default prefetch block size on sparc | |
0 | 145 } |
146 | |
147 // Prefetch | |
148 static intx prefetch_copy_interval_in_bytes() { | |
149 intx interval = PrefetchCopyIntervalInBytes; | |
150 return interval >= 0 ? interval : (has_v9() ? 512 : 0); | |
151 } | |
152 static intx prefetch_scan_interval_in_bytes() { | |
153 intx interval = PrefetchScanIntervalInBytes; | |
154 return interval >= 0 ? interval : (has_v9() ? 512 : 0); | |
155 } | |
156 static intx prefetch_fields_ahead() { | |
157 intx count = PrefetchFieldsAhead; | |
158 return count >= 0 ? count : (is_ultra3() ? 1 : 0); | |
159 } | |
160 | |
161 static intx allocate_prefetch_distance() { | |
162 // This method should be called before allocate_prefetch_style(). | |
163 intx count = AllocatePrefetchDistance; | |
164 if (count < 0) { // default is not defined ? | |
165 count = 512; | |
166 } | |
167 return count; | |
168 } | |
169 static intx allocate_prefetch_style() { | |
170 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive"); | |
171 // Return 0 if AllocatePrefetchDistance was not defined. | |
172 return AllocatePrefetchDistance > 0 ? AllocatePrefetchStyle : 0; | |
173 } | |
174 | |
175 // Legacy | |
176 static bool v8_instructions_work() { return has_v8() && !has_v9(); } | |
177 static bool v9_instructions_work() { return has_v9(); } | |
178 | |
179 // Assembler testing | |
180 static void allow_all(); | |
181 static void revert(); | |
182 | |
183 // Override the Abstract_VM_Version implementation. | |
184 static uint page_size_count() { return is_sun4v() ? 4 : 2; } | |
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185 |
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186 // Calculates the number of parallel threads |
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187 static unsigned int calc_parallel_worker_threads(); |
0 | 188 }; |
1972 | 189 |
190 #endif // CPU_SPARC_VM_VM_VERSION_SPARC_HPP |